JP2010028361A - Switch circuit for high frequency signal - Google Patents

Abstract

A high-frequency signal switch circuit with less distortion of a high-frequency signal is provided.
In a high frequency signal switch circuit formed on an SOI substrate, through switch portions are provided between one antenna terminal and a plurality of high frequency terminals. In the through switch unit M4T, n (n is an integer of 2 or more) field effect transistors M1 to Mn are connected in series between the antenna terminal ANT and the high frequency terminal RF4. The transistors M1 to Mn switch between an on state and an off state based on a common control signal Cont4. The through switch M4T is provided with a field effect transistor Mx, which is connected in parallel to the transistor Mn. The power supply potential Vdd is always applied to the gate of the transistor Mx, and the transistor Mx is always turned on.
[Selection] Figure 1

Description

  The present invention relates to a high-frequency signal switch circuit, and more particularly, to a high-frequency signal switch circuit configured by field effect transistors.

  In a mobile phone, a transmission circuit and a reception circuit are selectively connected to a common antenna via a high-frequency signal switch circuit. Conventionally, HEMT (High Electron Mobility Transistor) using a compound semiconductor has been used as a switch element of such a high-frequency signal switch circuit, but in recent years, it has been formed on a silicon substrate. Replacement with a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) is being studied. However, when a MOSFET formed on a normal silicon substrate is used, the parasitic capacitance between the source / drain and the ground potential increases, and the power loss increases because silicon is a semiconductor. Therefore, a technique for forming a high-frequency signal switch circuit on an SOI (Silicon On Insulator) substrate has been proposed (see, for example, Patent Document 1).

  However, such a high-frequency signal switch circuit has a problem in that, when a high-frequency signal to be transmitted or received passes through the circuit, harmonics are generated and the high-frequency signal is distorted. This is because the characteristics of the MOSFET used as the switch element are nonlinear. The distortion of the high-frequency signal caused by the MOSFET includes an on-distortion that occurs when the MOSFET is in an on state and an off-distortion that occurs when the MOSFET is in an off state. As the number of MOSFETs in each state increases, the degree of each distortion also increases.

  By the way, in recent years, multiband mobile phones have become widespread. In a multiband mobile phone, a large number of transmission / reception circuits can be connected to one antenna via a high-frequency signal switch circuit. Therefore, in a high-frequency signal switch circuit of a multiband mobile phone, a large number of MOSFETs are connected to one antenna terminal, and only one MOSFET is turned on, and the remaining MOSFETs are turned off. Thus, only one circuit is connected to the antenna. As described above, the MOSFETs connected to the antenna have many off-states, and thus off-distortion is a particular problem.

JP 2005-515657 A

  An object of the present invention is to provide a switch circuit for a high frequency signal with less distortion of the high frequency signal.

  According to one aspect of the present invention, the first switch unit connected between the high-frequency input / output terminal and the first high-frequency terminal, and connected between the high-frequency input / output terminal and the second high-frequency terminal. A second switch unit, wherein the first switch unit is connected in series between the high-frequency input / output terminal and the first high-frequency terminal, and is turned on based on a common control signal. A plurality of first field effect transistors that are switched to an off state, and at least one of the plurality of first field effect transistors that are connected in parallel to each other and are always on. There is provided a high-frequency signal switch circuit comprising: a second field effect transistor.

  According to the present invention, it is possible to realize a high-frequency signal switch circuit with less distortion of a high-frequency signal.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
First, a first embodiment of the present invention will be described.
FIG. 1 is a circuit diagram illustrating a high-frequency signal switch circuit according to this embodiment.
FIG. 2 is a circuit diagram illustrating one through switch unit in the present embodiment.
The range shown in FIG. 2 corresponds to the circuit block A shown in FIG.

  The high-frequency signal switch circuit (hereinafter also simply referred to as “switch circuit”) according to the present embodiment is a multi-port switch IC formed as a single chip on a single SOI substrate. It is an SP6T (Single-Pole 6-Throw) type switch circuit that is mounted and connects an antenna of a mobile phone to one of six circuits. A high potential side power supply potential Vdd and a ground potential GND are supplied from the outside to the chip in which the switch circuit is formed. The high potential side power supply potential Vdd is higher than the ground potential GND.

  As shown in FIG. 1, in the high-frequency signal switch circuit 1 according to the present embodiment, an antenna terminal ANT as a high-frequency input / output terminal is branched into six high-frequency terminals RF1 to RF6. The antenna terminal ANT is connected to the antenna of the mobile phone. The high frequency terminals RF1 to RF6 are connected to different high frequency circuits. The six high-frequency circuits connected to the high-frequency terminals RF1 to RF6 are, for example, a transmission circuit and a reception circuit in three frequency bands used by the mobile phone for communication.

Through switch portions M1T to M6T are connected between the antenna terminal ANT and the high frequency terminals RF1 to RF6, respectively. In addition, shunt switch portions M1S to M6S are connected between the high frequency terminals RF1 to RF6 and the ground potential GND, respectively.
Each of the through switch portions M1T to M6T is composed of a plurality of field effect transistors (hereinafter also simply referred to as “transistors”), and most of the transistors belonging to each through switch portion are common to each other. Switching between the on state and the off state is performed by the control signals Cont1 to Cont6. The control signals Cont1 to Cont6 are, for example, binary signals having a high level as the high potential side power supply potential Vdd and a low level as the low potential side power supply potential Vss. Note that the low potential side power supply potential Vss is lower than the ground potential GND.
Each of the shunt switch sections M1S to M6S is also composed of a plurality of transistors, and most of the transistors are switched between an on state and an off state by a common control signal Cont1 / to Cont6 /. The control signals Cont1 / to Cont6 / are inverted signals of the control signals Cont1 to Cont6, respectively.

  Hereinafter, the configuration of each through switch section will be described in detail with reference to FIG. In FIG. 2, the through switch unit M4T will be described as an example, but the configuration of other through switch units is the same.

  As shown in FIG. 2, in the through switch unit M4T, a plurality of, for example, n-stage field effect transistors M1 to Mn are provided as the first field effect transistors between the antenna terminal ANT and the high frequency terminal RF4. Is provided. n is an integer of 2 or more. The transistors M1 to Mn are all the same conductivity type, for example, n-type MOSFETs, and are connected in series with each other. That is, one of the source and drain of a transistor at a certain stage is connected to the other of the source and drain of a transistor at the adjacent stage.

  The gates of the transistors M1 to Mn are commonly connected to a control terminal Cont4 to which a control signal Cont4 is input. In the present specification, the control terminal and the control signal input thereto are denoted by the same reference numerals. The control terminal Cont4 is connected to a control circuit (not shown) that generates the control signal Cont4. Gate resistors Rg1 to Rgn are respectively connected between the gates of the transistors M1 to Mn and the control terminal Cont4. The gate resistors Rg1 to Rgn have resistance values that are high enough that high frequency signals applied to the transistors M1 to Mn do not leak to the control circuit. Also, resistors Rds1 to Rdsn are connected in parallel between the drains and sources of the transistors M1 to Mn, respectively.

  In the through switch unit M4T, a transistor Mx is provided as a second field effect transistor. The transistor Mx is connected in parallel to the final stage transistor Mn, for example. The conductivity type of the transistor Mx is not necessarily the same as that of the transistors M1 to Mn, but is preferably the same conductivity type in order to simplify the manufacturing process, and is, for example, n-type in this embodiment. The power supply potential Vdd is always applied to the gate of the transistor Mx via the gate resistance Rgx. Thus, the transistor Mx is always on.

  The configuration of the shunt switch units M1S to M6S is the same as the configuration of the above-described through switch unit, but the gate width of the transistor of the shunt switch unit is smaller than the gate width of the transistors M1 to Mn of the through switch unit. The driving ability is small.

  Note that the resistance value of the gate resistor Rgx connected to the gate of the transistor Mx that is always on is preferably higher than the resistance values of the gate resistors Rg1 to Rgn connected to the gates of the other transistors M1 to Mn. . The reason is that the gate width of the transistor Mx is smaller than the gate widths of the transistors M1 to Mn, as shown in the simulation results to be described later. Therefore, the gate capacitance in the ON state is small and the impedance is high. This is because if the gate resistance is increased as much as possible, the high-frequency signal leaks to the power supply potential Vdd and even-order harmonic distortion occurs. When it is difficult to increase the gate resistance Rgx, capacitive elements having the same capacitance value between the source and gate and between the source and drain of the transistor Mx, for example, MIM (Metal Insulator Metal: metal-insulation) It is desirable to add a (metal-metal) capacitive element.

Next, the operation of the high-frequency signal switch circuit according to this embodiment will be described.
As an example of the operation, let us consider a case where the antenna terminal ANT is conducted only to the high frequency terminal RF1 and is cut off from the other high frequency terminals RF2 to RF6. Thereby, for example, when the high-frequency circuit connected to the high-frequency terminal RF1 is a transmission circuit, the high-frequency signal output from the transmission circuit conducts the through switch portion M1T from the terminal RF1 and reaches the antenna terminal ANT. Sent from antenna.

  In this case, the control signal Cont1 is set to the high level (for example, the power supply potential Vdd), and the control signals Cont2 to Cont6 are set to the low level (for example, the power supply potential Vss). Further, the control signal Cont1 / is set to the low level, and the control signals Cont2 // Cont6 / are set to the high level. As a result, as shown in FIG. 1, only one through switch unit M1T is turned on, the other through switch units M2T to M6T are turned off, and only one shunt switch unit M1S is turned off. The shunt switch sections M2S to M6S are turned on.

  As shown in FIG. 2, in the through switch unit M4T in the off state, the low level control signal Cont4 is applied to the gates of the transistors M1 to Mn via the gate resistors Rg1 to Rgn. As a result, the transistors M1 to Mn are turned off. On the other hand, since the power supply potential Vdd is constantly applied to the gate of the transistor Mx via the gate resistance Rgx, the transistor Mx is always in the on state regardless of the control signal Cont4. Since the transistors M1 to Mn are in an off state, the entire through switch unit M4T is in an off state.

  At this time, in the switch circuit 1, distortion occurs in the high-frequency signal. This distortion is a combination of the on distortion generated by the MOSFET in the on state and the off distortion generated by the MOSFET in the off state. In the switch circuit 1, the number of on-state through switch portions to which a high-frequency signal is applied is only one, that is, only the through switch portion M1T, but the number of off-state through switch portions is five, that is, the through switch portion. M2T to M6T. The high frequency signal is also applied to the shunt switch M1S in the off state. For this reason, the harmonic distortion generated in the switch circuit 1 is larger in the off distortion than in the on distortion.

  For example, as shown in FIG. 2, in the through switch unit M4T, a high frequency signal is applied from the antenna terminal ANT side, so that off distortion occurs from the transistors M1 to Mn in the off state, but the on state On-distortion occurs from the transistor Mx. As a result, the off distortion caused by the transistors M1 to Mn and the on distortion caused by the transistor Mx are offset. The state of offset between the off distortion and the on distortion depends on the gate width of the transistor Mx that is always on. Therefore, if the gate width of the transistor Mx is appropriately selected, harmonic distortion generated from the entire through switch unit M4T can be reduced, and consequently harmonic distortion generated from the entire switch circuit 1 can be reduced. .

  Note that only off-order harmonic distortion appears in principle for the off-distortion of a transistor. Of the odd-order harmonic distortions, the highest-strength distortion is the third-order harmonic distortion. Therefore, by grasping the dependency of the third-order harmonic distortion on the gate width, the dependence of the off-distortion on the entire gate width It is possible to grasp sex.

In FIG. 3, the horizontal axis represents the gate width of the transistor that is always on, and the vertical axis represents the third-order harmonic distortion factor of the high-frequency signal. It is a graph which illustrates the influence which acts on a wave distortion.
FIG. 3 shows the result of simulation by changing the gate width Wgx of the transistor Mx. The simulation conditions are shown in Table 1 below. The “gate width” shown in Table 1 is the gate width of the transistor at each stage. That is, when the gate width of the h-th stage transistor Mh is Wgh, Wg1 = Wg2 =... = Wg11 = Wg12 + Wgx = 4 mm.

  As shown in FIG. 3, when the gate width Wgx of the transistor Mx in the on state is within a certain range B, the third-order harmonic distortion is higher than when the transistor Mx is not provided, that is, when Wgx = 0. Becomes smaller. For example, the third harmonic distortion when Wgx = 0 is −90.5 dBc, whereas the third harmonic distortion when Wgx = 76 μm is −101.5 dBc, which is an improvement of 11 dB. In the example shown in FIG. 3, the range B of the gate width Wgx in which the third-order harmonic distortion is improved as compared with the case of Wgx = 0 is approximately 0.06 to 0.13 mm, which is the sum of the transistor Mn and the transistor Mx. This corresponds to approximately 1.5 to 3.2% of the gate width.

  When the antenna terminal ANT is connected to the high frequency terminal RF4, that is, when the through switch M4T is turned on, the control signal Cont4 is set to the high level. Thereby, the transistors M1 to Mn are all turned on, and the antenna terminal ANT and the high frequency terminal RF4 are electrically connected. At this time, the transistor Mx is also on. In the above description, the through switch unit M4T has been described as an example, but the operations of the other through switch units are the same. Further, the operation of the shunt switch unit is the same.

Next, the effect of this embodiment will be described.
As described above, according to the present embodiment, by providing the field effect transistor Mx that is always in the on state in the through switch section, it is possible to cancel off distortion and on distortion, and to reduce the overall distortion. Note that the preferable range B of the gate width of the transistor that is always on depends on factors such as the frequency of the high-frequency signal and the configuration of each transistor, but can be obtained by simulation or the like when designing the switch circuit.

Next, a second embodiment of the present invention will be described.
FIG. 4 is a circuit diagram illustrating one through switch portion in the high-frequency signal switch circuit according to this embodiment.
The range shown in FIG. 4 corresponds to the circuit block A shown in FIG.

  As shown in FIG. 4, in the high-frequency signal switch circuit according to the present embodiment, the transistors M1 to Mn constituting each stage of each through switch unit are each multi-finger type, and a plurality of unit transistors are provided. It is configured to be connected to each other in parallel. Each unit transistor corresponds to each finger of each transistor. That is, the transistor M1 is configured by m unit transistors M11 to M1m connected in parallel to each other. Note that m is an integer of 2 or more. Similarly, the transistor M2 includes m unit transistors M21 to M2m connected in parallel to each other, and the transistor M (n−1) includes the unit transistors M (n−1) 1 to M (n−1). ) M. A common control signal Cont4 is applied to the gates of these unit transistors.

  Further, the transistor Mn and the transistor Mx are configured by m unit transistors Mn1 to Mnm connected in parallel to each other. Among these unit transistors Mn1 to Mnm, k (k is an integer of 1 to less than m) unit transistors Mn1 to Mnk constitute a transistor Mx, and the remaining (m−k) unit transistors Mn (k + 1). ~ Mnm constitutes the transistor Mn. That is, the power supply potential Vdd is always applied to the gates of the unit transistors Mn1 to Mnk, and the unit transistors Mn1 to Mnk are always turned on. The control signal Cont4 is applied to the gates of the unit transistors Mn (k + 1) to Mnm, and the unit transistors M11 to M (n−1) m are turned on or off in synchronization with the unit transistors M11 to M (n−1) m.

In FIG. 4, an arbitrary unit transistor is represented by a symbol Mij. i is an integer from 1 to n, and j is an integer from 1 to m. For any i and j, the unit transistors Mij have the same gate width. Therefore, when the gate widths of the transistors M1 to Mn are Wg1 to Wgn and the gate width of the transistor Mx is Wgx, the following formula (1) is established. Accordingly, the unit transistors M11 to Mnm can be arranged in a matrix of m rows and n columns on the SOI substrate, and the layout becomes easy.

Wg1 = Wg2 = ... = Wg (n-1) = Wg (n) + Wgx (1)

  According to the present embodiment, the current driving capability can be increased by making each stage transistor in the through switch section a multi-finger type transistor. In addition, the present embodiment does not increase from the layout of the conventional high-frequency signal switch circuit by constantly turning on some of the plurality of unit transistors constituting the transistor of at least one stage. Such a switch circuit can be manufactured. As a result, the switch circuit according to the present embodiment can be realized at low cost. Other configurations, operations, and effects of the present embodiment are the same as those of the first embodiment.

Next, a comparative example of this embodiment will be described.
FIG. 5 is a circuit diagram illustrating one through switch portion in the high-frequency signal switch circuit according to this comparative example.
As shown in FIG. 5, in the high frequency signal switch circuit according to this comparative example, the transistors constituting each stage of each through switch section are each multi-finger type, and a plurality of unit transistors are parallel to each other. Connected to and configured. A common control signal is applied to the gates of all unit transistors belonging to each through switch section.

  In this comparative example, a transistor that is always on is not provided in the through switch section, and all transistors are switched between an on state and an off state by a common control signal. For this reason, when the through switch section is in the OFF state, the off distortion is not canceled out by the on distortion, and the distortion of the entire through switch section is large.

Next, a third embodiment of the present invention will be described.
FIG. 6 is a circuit diagram illustrating one through switch portion in the high-frequency signal switch circuit according to this embodiment.
6 corresponds to the circuit block A shown in FIG.

  As shown in FIG. 6, in the present embodiment, the transistor Mx that is always turned on is connected in parallel to the intermediate stage transistor, not the final stage transistor Mn. That is, when i is an integer of 2 or more and (n−1) or less, the transistor Mx is connected in parallel to the transistor Mi.

  Even with such a configuration, the same effects as those of the first embodiment described above can be obtained. Other configurations, operations, and effects of the present embodiment are the same as those of the first embodiment. The transistor Mx may be connected in parallel to the foremost transistor M1. In addition, a plurality of transistors Mx may be provided in each through switch unit and connected in parallel to two or more stages of transistors. Further, in this embodiment as well, as in the second embodiment described above, the transistors M1 to Mn are each a multi-finger type transistor, and a part of gates of a plurality of unit transistors constituting the i-th transistor Mi. In addition, the power supply potential Vdd may be applied.

Next, a fourth embodiment of the present invention will be described.
FIG. 7 is a circuit diagram illustrating one through switch section in the high-frequency signal switch circuit according to this embodiment.
The range shown in FIG. 7 corresponds to the circuit block A shown in FIG.

  As shown in FIG. 7, in this embodiment, a transistor My is provided as a third field effect transistor in each through switch unit. The transistor My is connected in parallel to the transistor Mx and the transistor Mn, and a control signal ContF4 is applied to the gate of the transistor My via the gate resistance Rgy. The control signal ContF4 is a binary signal having a high level as the high potential side power supply potential Vdd and a low level as the low potential side power supply potential Vss. Note that, similarly to the resistance value of the gate resistance Rgx, the resistance value of the gate resistance Rgy is preferably higher than the resistance values of the gate resistances Rg1 to Rgn in order to prevent occurrence of even-order harmonic distortion. If this is difficult, it is preferable to add capacitive elements having the same capacitance value between the source and gate and between the source and drain of the transistor My.

Next, the operation of this embodiment will be described.
In FIG. 8, the horizontal axis represents the gate width of the transistor that is always on, and the vertical axis represents the third-order harmonic distortion factor of the high-frequency signal. It is a graph which illustrates the influence which acts on a wave distortion.
FIG. 8 shows the simulation results when the frequency of the high-frequency signal propagating through the switch circuit is 0.8 GHz and 1.9 GHz. Conditions other than the above in this simulation are the same as in the simulation shown in FIG.

  As shown in FIG. 8, the range B in which the third harmonic distortion is reduced in the gate width of the transistor that is always on is smaller than that in the case where the transistor that is always on is not provided. Depends on the frequency of the high-frequency signal input to the circuit. In the example shown in FIG. 8, when the frequency of the high frequency signal is 0.8 GHz, the range B is approximately 0.03 to 0.06 mm. On the other hand, when the frequency is 1.9 GHz, the range B is approximately 0.06 to 0.13 mm.

  Therefore, in this embodiment, by providing the transistor My in addition to the transistor Mx, the gate width of the transistor that is always on is selected according to the frequency of the high-frequency signal input to the switch circuit. Specifically, when the frequency of the high frequency signal is 0.8 GHz, the value of the control signal ContF4 is made equal to the control signal Cont4. Thereby, the transistor My is switched between an on state and an off state in synchronization with the transistors M1 to Mn. On the other hand, when the frequency of the high frequency signal is 1.9 GHz, the value of the control signal ContF4 is set to the high level, that is, the power supply potential Vdd. As a result, the transistor My is always in an on state, like the transistor Mx. As described above, the transistor My selects whether the on state and the off state are switched or always on based on the common control signal Cont4 in accordance with the frequency of the high frequency signal flowing through the switch circuit. .

  For example, in the example shown in FIG. 8, the gate width of the transistor Mx may be 32 μm, and the gate width of the transistor My may be 44 μm. As a result, when transmitting a signal in the 0.8 GHz band, the third-harmonic distortion, which was −97 dBc when the always-on transistor is not provided, is reduced to −111 dBc, and a signal in the 1.9 GHz band is transmitted. In this case, the third-order harmonic distortion, which was -90.5 dBc without the always-on transistor, is reduced to -101.5 dBc.

  According to the present embodiment, it is possible to select the gate width of the transistor that is always on according to the frequency of the high-frequency signal. As a result, harmonic distortion can be reduced regardless of the frequency of the high-frequency signal. For example, even in a multiband mobile phone, harmonic distortion can be suppressed regardless of the frequency used. Other configurations, operations, and effects of the present embodiment are the same as those of the first embodiment.

Next, a fifth embodiment of the present invention will be described.
The circuit configuration of the switch circuit according to the present embodiment is the same as that of the first embodiment (see FIGS. 1 and 2). However, the gate width of the transistor Mx is set so as to reduce the harmonic distortion of the high-frequency signal having the highest frequency among the high-frequency signals flowing between the antenna terminal and the high-frequency terminal.

  As shown in FIG. 8, the higher the frequency of the high-frequency signal, the greater the harmonic distortion. Therefore, when the switch circuit in which the transistor My is not provided and the gate width cannot be selected as in the present embodiment is used for an application using a plurality of frequency bands as in the fourth embodiment, the frequency is further increased. It is preferable to preferentially suppress harmonic distortion of a high-frequency signal. Therefore, in the present embodiment, the gate width of the transistor Mx is set so as to reduce the harmonic distortion of the high-frequency signal having the highest frequency among the high-frequency signals flowing between the antenna terminal and the high-frequency terminal. Thereby, the harmonic distortion of the high frequency signal can be improved without increasing the harmonic distortion of the low frequency signal.

  For example, in the example shown in FIG. 8, if the gate width Wgx is 76 μm, the third-order harmonic distortion can be substantially minimized with respect to a signal having a frequency of 1.9 GHz, and the signal having a frequency of 0.8 GHz. As for the third-order harmonic distortion, the third-order harmonic distortion can be maintained at substantially the same level as when the transistor Mx is not provided (Wgx = 0). Operations and effects other than those described above in the present embodiment are the same as those in the first embodiment described above.

Next, a sixth embodiment of the present invention will be described.
FIG. 9 is a circuit diagram illustrating a high-frequency signal switch circuit according to this embodiment.
FIG. 10 is a circuit diagram illustrating the high-frequency signal switch circuit according to this embodiment.

  As shown in FIGS. 9 and 10, the high-frequency signal switch circuit 6 according to the present embodiment is an SPDT (Single-Pole Double-Throw) type switch circuit, and connects the antenna terminal ANT to the high-frequency terminal RF1. It is switched whether to connect to the high frequency terminal RF2. A through switch portion M1T is connected between the antenna terminal ANT and the high frequency terminal RF1, and a through switch portion M2T is connected between the antenna terminal ANT and the high frequency terminal RF2. A shunt switch unit M1S is connected between the high frequency terminal RF1 and the ground potential GND, and a shunt switch unit M2S is connected between the high frequency terminal RF2 and the ground potential GND.

  The configurations of the through switch units M1T and M2T are the same as the configuration of the through switch unit MT4 described in the first embodiment. That is, in the through switch unit M1T, a plurality of transistors M1 to Mn are connected in series between the high frequency terminal RF1 and the antenna terminal ANT, and in parallel with the transistor Mn connected to the most high frequency terminal RF1 side. The transistor Mx1 is connected, and the power supply potential Vdd is always applied to the gate of the transistor Mx1. Similarly, in the through switch unit M2T, a transistor Mx2 that is always on is connected in parallel with the transistor Mn on the most high frequency terminal RF2 side. The resistance values of the gate resistors Rx1 and Rx2 are higher than the resistance values of the other gate resistors.

  On the other hand, in the shunt switch units M1S and M2S, a plurality of transistors Ms are connected in series between the high-frequency terminal and the ground potential GND, but no transistor that is always on is provided.

  A common control signal Cont is input to the gates of the transistors M1 to Mn of the through switch unit M1T and the gate of the transistor Ms of the shunt switch unit M2S. A common control signal Cont / is input to the gates of the transistors M1 to Mn of the through switch unit M2T and the gate of the transistor Ms of the shunt switch unit M1S. The control signal Cont and the control signal Cont / are binary signals having a high level as the high potential side power supply potential Vdd and a low level as the low potential side power supply potential Vss, and are complementary signals.

  Other configurations, operations, and effects of the present embodiment are the same as those of the first embodiment. In the present embodiment, the transistor that is always on is not provided in the shunt switch unit, but the strength of the high-frequency signal flowing through the shunt switch unit is smaller than the strength of the high-frequency signal flowing through the through switch unit. The off-strain caused by the shunt switch is small and is not a problem in practice.

Next, a seventh embodiment of the present invention will be described.
FIG. 11 is a circuit diagram illustrating the high-frequency signal switch circuit according to this embodiment.
As shown in FIG. 11, the high-frequency signal switch circuit 7 according to the present embodiment is always on compared to the high-frequency signal switch circuit 6 (see FIG. 10) according to the sixth embodiment described above. The transistor Mx2 is provided only in the circuit block D (through switch portion M2T) and is not provided in the circuit block C (through switch portion M1T). Further, the gate width of the through switch portion M2T is smaller than the gate width of the through switch portion M1T.

Next, the operation of this embodiment will be described.
The switch circuit 7 according to the present embodiment is mounted on, for example, a mobile phone. The antenna terminal is connected to the antenna of the mobile phone, the transmission circuit is connected to the high frequency terminal RF1, and the reception circuit is connected to the high frequency terminal RF2.

  At the time of transmission, the control signal Cont is set to the high level and the control signal Cont / is set to the low level. As a result, the through switch unit M1T and the shunt switch unit M2S are turned on, the through switch unit M2T and the shunt switch unit M1S are turned off, and the high-frequency terminal RF1 and the antenna terminal ANT are in a conductive state. Is connected to the antenna. On the other hand, the high frequency terminal RF2 and the antenna terminal ANT are cut off. At this time, a strong transmission signal is applied to the through switch unit M2T in the off state. However, since the transistor Mx2 is provided in the through switch unit M2T, off distortion can be suppressed.

  On the other hand, at the time of reception, the control signal Cont / is set to the high level and the control signal Cont is set to the low level. As a result, the through switch unit M2T and the shunt switch unit M1S are turned on, the through switch unit M1T and the shunt switch unit M2S are turned off, the conductive state is established between the antenna terminal ANT and the high frequency terminal RF2, and the antenna is Connected to receiving circuit. On the other hand, the antenna terminal ANT and the high frequency terminal RF1 are cut off. At this time, the received signal is applied to the through switch unit M1T in the off state. However, since the received signal is weak, even though the transistor Mx1 (see FIG. 10) is not provided in the through switch unit M1T. , Almost no off-distortion occurs.

Next, the effect of this embodiment will be described.
When the use of the switch circuit 7 is specified as in the present embodiment and it is determined in advance that the high frequency terminal RF1 is connected to the transmission circuit and the high frequency terminal RF2 is connected to the reception circuit, it is turned off. By not providing a transistor that is always turned on in the through switch portion to which a weak received signal is applied in the state, the area of the entire switch circuit can be reduced and the cost can be reduced. On the other hand, when the connection relationship is not determined in advance, the transistors Mx1 and Mx2 that are always on may be provided in the through switch sections on both sides as in the sixth embodiment described above. Configurations, operations, and effects other than those described above in the present embodiment are the same as those in the above-described sixth embodiment.

  While the present invention has been described with reference to the embodiments, the present invention is not limited to these embodiments. For example, those in which those skilled in the art appropriately added, deleted, or changed the design of the above-described embodiments are also included in the scope of the present invention as long as they have the gist of the present invention. For example, in each of the above-described embodiments, an example in which the switch circuit is SP6T or SPDT has been shown, but the present invention is not limited to this, and the number of high-frequency terminals may be any number as long as it is two or more.

1 is a circuit diagram illustrating a high-frequency signal switch circuit according to a first embodiment of the invention; It is a circuit diagram which illustrates one through switch part in a 1st embodiment. The horizontal axis represents the gate width of the transistor that is always on, and the vertical axis represents the third harmonic distortion factor of the high-frequency signal, so that the gate width of the transistor that is always on affects the third harmonic distortion. It is a graph which illustrates an influence. It is a circuit diagram which illustrates one through switch part in the switch circuit for high frequency signals concerning the 2nd embodiment of the present invention. It is a circuit diagram which illustrates one through switch part in the switch circuit for high frequency signals concerning the comparative example of a 2nd embodiment. It is a circuit diagram which illustrates one through switch part in the switch circuit for high frequency signals concerning the 3rd embodiment of the present invention. It is a circuit diagram which illustrates one through switch part in the switch circuit for high frequency signals concerning the 4th embodiment of the present invention. The horizontal axis represents the gate width of the transistor that is always on, and the vertical axis represents the third harmonic distortion factor of the high-frequency signal, so that the gate width of the transistor that is always on affects the third harmonic distortion. It is a graph which illustrates an influence. FIG. 10 is a circuit diagram illustrating a high-frequency signal switch circuit according to a sixth embodiment of the invention; FIG. 10 is a circuit diagram illustrating a high-frequency signal switch circuit according to a sixth embodiment; FIG. 10 is a circuit diagram illustrating a high-frequency signal switch circuit according to a seventh embodiment of the invention;

Explanation of symbols

1, 6, 7, 101 High-frequency signal switch circuit, A, C, D circuit block, ANT antenna terminal, B range, Cont1-Cont6, Cont1 / -Cont6 / control signal, GND ground potential, RF1-RF6 high-frequency terminal, M1 to Mn, Mx, Mx1, Mx2, Mx transistor, M1T to M6T through switch part, M1S to M6S shunt switch part, M11 to Mnm unit transistor, Rds1 to Rdsn resistance, Rg1 to Rgn, Rgx gate resistance, Vdd power supply potential, Wgx gate width

Claims (5)

A first switch connected between the high-frequency input / output terminal and the first high-frequency terminal;
A second switch portion connected between the high-frequency input / output terminal and a second high-frequency terminal;
With
The first switch unit includes:
A plurality of first field-effect transistors that are connected in series between the high-frequency input / output terminal and the first high-frequency terminal and are switched between an on state and an off state based on a common control signal;
At least one second field-effect transistor connected in parallel to at least one of the plurality of first field-effect transistors and being always on;
A high-frequency signal switch circuit comprising:   The gate width of the second field effect transistor is set so as to reduce harmonic distortion of a high-frequency signal having the highest frequency among high-frequency signals flowing between the high-frequency input / output terminal and the second high-frequency terminal. 2. The high frequency signal switch circuit according to claim 1, wherein the switch circuit is set.   The first switch unit is connected in parallel to the second field effect transistor, and according to the frequency of a high-frequency signal flowing between the high-frequency input / output terminal and the second high-frequency terminal, 2. The high-frequency device according to claim 1, further comprising a third field effect transistor that selects whether the on state and the off state are switched based on a common control signal or is always on. Signal switch circuit. Among the plurality of first field effect transistors, those not connected in parallel to the second field effect transistor are each m (m is 2 or more) connected in parallel to each other. (Integer) unit transistors,
Among the plurality of first field effect transistors, those connected in parallel to the second field effect transistor are each (m−k) (k) (k) connected in parallel to each other. Is an integer less than or equal to 1 and less than m).
3. The high-frequency signal switch circuit according to claim 1, wherein each of the second field-effect transistors includes k unit transistors connected in parallel to each other.   The high-frequency signal switch circuit according to claim 1, wherein the high-frequency signal switch circuit is formed on an SOI substrate.

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