JP2010028197A - Signal transfer circuit using pulse transformer - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To avoid malfunctions of a circuit element connected to the signal transfer circuit, using a pulse transformer. <P>SOLUTION: At a secondary side of the pulse transformer T, a switching element Q2 is prepared between a gate and an emitter of an IGBT (Insulated Gate Bipolar Transistor). A capacitor C is connected to a control terminal of the switching element Q2. A switching element Q3 is connected to the capacitor C. If a switching element Q1 prepared on the primary side of the pulse transformer T is turned off, a negative voltage is produced on the secondary side, and the capacitor C is charged. During a period when the switching element Q1 is in off state, negative voltage of the capacitor C is held, and the switching element Q2 is held in ON state, even after exciting energy of the pulse transformer T is discharged. Accordingly, impedance is maintained at a low state between the gate and the emitter of the IGBT. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a signal transmission circuit using a pulse transformer, and more particularly to a signal transmission circuit for transmitting a signal for driving a semiconductor element.

  As a circuit for transmitting a signal while ensuring insulation, a signal transmission circuit using a pulse transformer is known. A signal transmission circuit using a pulse transformer is used for driving a power semiconductor element, for example.

  FIG. 5 is a diagram showing an example of a conventional signal transmission circuit using a pulse transformer. In the following description, an IGBT (insulated gate bipolar transistor) is driven using a signal transmission circuit.

  In FIG. 5, the pulse transformer T includes windings N1 and N2 on the primary side and a winding N3 on the secondary side. A DC power supply Vcc is connected to one terminal of the windings N1 and N2, and a switch element Q1 is connected to the other terminal of the winding N1. The switch element Q1 is a MOS transistor in this embodiment. The cathode of the diode D2 is connected to the other terminal of the winding N2, and the anode of the diode D2 is grounded. In addition, the black dot attached | subjected to each winding has shown the polarity of winding.

  A drive circuit for driving the IGBT is configured on the secondary side of the pulse transformer T. This drive circuit includes a diode D1, resistors R1 and R2, and a switch element Q2. The switch element Q2 is a pMOS transistor in this embodiment. One terminal of the winding N3 is connected to the anode of the diode D1 and the gate of the switch element Q2. The cathode of the diode D1 is connected to the gate of the IGBT via the resistor R1. The resistor R2 is connected in parallel with the diode D1 and the resistor R1. Furthermore, the other terminal of the winding N3 is connected to the emitter of the IGBT. The source and drain of the switch element Q2 are connected to the gate and emitter of the IGBT, respectively.

  In the signal transmission circuit having the above-described configuration, an AC signal is applied to the pulse transformer T by performing on / off control of the switch element Q1. That is, when the switch element Q1 is controlled to be in the on state, the secondary-side voltage V2 of the pulse transformer T becomes a positive voltage, and the switch element Q2 is controlled to be in the off state. Then, a current is supplied to the gate of the IGBT via the diode D1, and the IGBT is controlled to be in an on state. On the other hand, when the switch element Q1 is controlled to be turned off, the voltage V2 becomes a negative voltage, and the switch element Q2 is controlled to be turned on. Then, the IGBT is controlled to the off state. As described above, the IGBT is controlled according to the signal input to the switch element Q1.

The signal transmission circuit having the above configuration is mounted on a vehicle, for example, because the response speed is high and the deterioration over time is small. Patent Document 1 describes a power MOSFET drive circuit having a configuration similar to that of the signal transmission circuit.
JP-A 61-242416

In the signal transmission circuit having the configuration shown in FIG. 5, when the switch element Q1 is held in the off state, the energy accumulated in the pulse transformer T is released, and the pulse transformer T is turned off. Then, the switch element Q2 is also kept off. At this time, for example, when a voltage or current is applied to the gate of the IGBT due to an external factor, the drive voltage V _GE rises and the IGBT may be temporarily turned on. That is, the IGBT is erroneously turned on. For example, when a voltage is applied to the collector of the IGBT, a voltage (that is, a drive voltage V _GE ) is generated at the gate due to the parasitic capacitance between the collector and the gate. When the drive voltage V _GE becomes larger than the threshold level, the IGBT is turned on and a current flows. In this case, useless current consumption occurs.

  An object of the present invention is to avoid malfunction of a circuit element connected to a signal transmission circuit using a pulse transformer.

  The signal transmission circuit according to the present invention includes a primary winding to which an input switch driven by an input signal that selectively indicates the first state and the second state is connected, and a one-way element at one terminal. A pulse transformer comprising a secondary winding to which the control terminal of the circuit element is connected and the reference terminal of the circuit element is connected to the other terminal, and between the control terminal and the reference terminal of the circuit element A drive switch provided and a switch that controls the drive switch to an off state when the first state is instructed, and controls the drive switch to an on state when the second state is instructed Control means and a capacitor for holding the drive switch in the on state in the second state.

  In the signal transmission circuit having the above configuration, when the second state is instructed, the switch control unit controls the voltage of the capacitor, whereby the drive switch is controlled to be in the on state. As a result, the impedance between the control terminal of the circuit element to be controlled and the reference terminal is kept low. Therefore, in this case, even if an unnecessary signal is applied to the control terminal of the circuit element to be controlled, an increase in voltage between the control terminal and the reference terminal is suppressed, and occurrence of malfunction is suppressed.

  In the signal transmission circuit having the above configuration, a pMOS transistor may be employed as the drive switch, and a transistor element including a diode may be employed as the switch control means. In this case, the capacitor is connected to the control terminal of the drive switch, and holds the drive switch in the on state by the voltage charged through the diode when the second state is instructed. In this configuration, the capacitance of the capacitor may be small.

  In the signal transmission circuit having the above configuration, when the first state is instructed, the switch control unit may control the drive switch to an off state by releasing the charge of the capacitor. When the charge of the capacitor is discharged, the pMOS transistor is kept off, and a predetermined voltage is applied to the control terminal of the circuit element to be controlled.

  In the signal transmission circuit configured as described above, the circuit element may be an IGBT, and the signal transmission circuit may be a gate drive circuit of the IGBT. In this configuration, even if a large voltage is applied to the collector of the IGBT, the gate voltage (control terminal) of the IGBT does not exceed the threshold value. That is, it is avoided that the IGBT is turned on at an inappropriate timing and unnecessary current flows.

  Note that “connection” in the present invention includes not only direct connection but also indirect connection through a resistance element or the like.

  According to the present invention, it is possible to avoid malfunction of circuit elements connected to a signal transmission circuit using a pulse transformer.

FIG. 1 is a diagram illustrating a configuration of a signal transmission circuit according to an embodiment of the present invention. In the following description, it is assumed that the IGBT is driven using a signal transmission circuit.
In this embodiment, the signal transmission circuit 1 of the embodiment employs the circuit configuration shown in FIG. That is, a switch element (input switch) Q1 is connected to the primary side of the pulse transformer T. Switch element Q1 is driven by an input signal that selectively indicates the first state and the second state. The first state corresponds to the on state, and the second state corresponds to the off state. For example, the first state is indicated when the voltage level of the input signal is higher than the threshold voltage of the switch element Q1, and when the voltage level of the input signal is lower than the threshold voltage of the switch element Q1. A second state is indicated.

  On the secondary side of the pulse transformer T, a drive circuit for driving an IGBT (circuit element) is configured. In the following description, the terminal (one terminal) on which the black dot of the winding N3 is attached may be referred to as a hot terminal and the other terminal as a cold terminal.

  As described with reference to FIG. 5, the drive circuit includes a diode (unidirectional element) D1, resistors R1 and R2, and a switch element (drive switch) Q2. Here, the diode D1 is provided in a direction in which a forward current flows from the pulse transformer T to the IGBT between the pulse transformer T and the gate (control terminal) of the IGBT. The switch element Q2 is a pMOS transistor. The source and drain of the switch element Q2 are connected to the gate and emitter (reference terminal) of the IGBT, respectively.

  The signal transmission circuit 1 of the embodiment further includes a capacitor C and a switch element (switch control means) Q3. One terminal of the capacitor C is connected to the gate (control terminal) of the switch element Q2, and the other terminal of the capacitor C is connected to the drain of the switch element Q2. Hereinafter, the potential of one terminal with respect to the potential of the other terminal of the capacitor C will be described as the voltage Vc of the capacitor C. The switch element Q3 is a pMOS transistor in this embodiment. The gate of the switch element Q3 is connected to the cold terminal of the winding N3, its source is connected to the hot terminal of the winding N3, and its drain is connected to the capacitor C and the gate of the switch element Q2. Furthermore, the switch element Q3 includes a body diode BD. The anode and cathode of the body diode BD are connected to the drain and source of the switch element Q3, respectively.

  The winding N2 and the diode D2 are provided in order to efficiently return the excitation energy of the pulse transformer T to the power source, but are not essential components in the signal transmission circuit of the embodiment. The switch element Q2 may also include a body diode.

  In the signal transmission circuit 1 configured as described above, the IGBT is driven according to an input signal applied to the primary side of the pulse transformer T. That is, the signal transmission circuit 1 according to the embodiment transmits an input signal while ensuring insulation, and applies the signal to the gate (between the gate and the emitter) of the IGBT. In the following description, the voltage at the emitter terminal of the IGBT (that is, the voltage at the cold terminal of the winding N3) may be referred to as a reference potential Vref. The reference potential Vref is not necessarily constant.

  When the IGBT is turned on, the switch element Q1 connected to the primary side of the pulse transformer T is controlled to be turned on. That is, the first state is instructed. In this embodiment, when the switch Q1 is turned on, the switch element Q2 is in an on state, and the capacitor C is holding a negative voltage. The state where the capacitor C holds a negative voltage corresponds to a state where the gate potential of the switch element Q2 is lower than the reference potential Vref.

  When the switch element Q1 is turned on, the voltage V2 on the secondary side of the pulse transformer T becomes a positive voltage. When this voltage V2 reaches the threshold voltage of switch element Q3, switch element Q3 is turned on. As a result, the potential of the gate of the switch element Q2 rises due to the current flowing through the switch element Q3 (or the negative charge is extracted from the capacitor C). As a result, the switch element Q2 is turned off. Thereafter, a current is supplied to the gate of the IGBT through the diode D1, thereby generating a gate voltage, and the IGBT is turned on.

  When turning off the IGBT, the switch element Q1 is controlled to be in an off state. That is, the second state is instructed. When the switch Q1 is turned off, the voltage V2 on the secondary side of the pulse transformer T becomes a negative voltage. Then, the switch element Q3 is turned off. Further, since the voltage V2 is a negative voltage, a current flows through the body diode BD of the switch element Q3 (or positive charge is drawn from the capacitor C). Thereby, the capacitor C is charged, the voltage Vc becomes a negative voltage, and the potential of the gate of the switch element Q2 becomes lower than its source potential. That is, a negative voltage is generated between the gate and the source, and the switch Q2 is turned on. As a result, the potential of the gate of the IGBT is lowered, and the IGBT shifts to an off state. Due to the current flowing through the body diode BD, the capacitor C is charged and the voltage Vc becomes a negative voltage.

  Thereafter, when the switch Q1 is held in the OFF state, the excitation energy of the pulse transformer T is released with the passage of time, and the voltage V2 eventually becomes substantially zero. At this time, the voltage Vc of the capacitor C holds a negative voltage. Further, since a reverse voltage is applied to the body diode BD of the switch element Q3, the switch element Q3 maintains the off state. As a result, the electric charge accumulated in the capacitor C is not extracted, and a negative voltage remains applied to the gate of the switch element Q2. Therefore, the switch Q2 is kept on.

  Thus, in the signal transmission circuit 1 according to the embodiment, when the pulse transformer T is in the off state, the switch element Q2 holds the on state. Then, the impedance between the gate and the emitter of the IGBT is kept low. This impedance depends on the ON characteristics of the switch element Q2, and is about several ohms, for example. Therefore, even if an external factor occurs on the collector side of the IGBT, the IGBT gate voltage fluctuates little and the IGBT does not shift to the ON state against the input signal. As a result, it is possible to avoid a wasteful current from flowing through the IGBT.

  The capacitor C is provided for generating a threshold voltage at the gate of the switch element Q2. For this reason, the capacity of the capacitor C depends on the rating of the switch element Q2, but may be sufficiently small. Therefore, the IGBT turn-off time is also shortened.

  FIG. 2 is a diagram illustrating a usage example of the signal transmission circuit 1 according to the embodiment. In this embodiment, the signal transmission circuit 1 is used in a DC / DC converter 10. The DC / DC converter 10 includes a pair of IGBTs 11 and 12. The IGBTs 11 and 12 are connected in series and are provided between the input power source Vin and the ground. A coil L and an output capacitor Cout are provided on the output side of the IGBTs 11 and 12. The signal transmission circuit 1 according to the embodiment is used to drive the IGBT 12 provided on the ground side. In this case, the IGBT shown in FIG. 1 corresponds to the IGBT 12 shown in FIG. The IGBT 11 provided on the input power source Vin side may be driven by the signal transmission circuit 1 of the embodiment or may be driven by a circuit having another configuration.

  In the DC / DC converter 10 having the above configuration, the IGBTs 11 and 12 are driven alternately. When the IGBT 11 is controlled to be in the on state and the IGBT 12 is controlled to be in the off state, the switch element Q2 shown in FIG. I'm leaning. Therefore, for example, even if a large voltage is applied to the collector of the IGBT 12 from the coil L side during this period, the gate voltage of the IGBT 12 does not exceed the threshold value. That is, it is avoided that the IGBT 12 is turned on at an inappropriate timing and an unnecessary current flows.

<Other embodiments>
FIG. 3 is a diagram illustrating a configuration of the signal transmission circuit 2 according to another embodiment. The configuration of the signal transmission circuit 2 is basically the same as that of the signal transmission circuit 1 shown in FIG. However, the signal transmission circuit 2 includes a switch element Q4 (drive switch) instead of the switch element Q2 included in the signal transmission circuit 1 shown in FIG. The switch element Q4 is an nMOS transistor. The signal transmission circuit 2 includes a diode D3 and an inverting buffer INV (switch control means) instead of the switch element Q3 included in the signal transmission circuit 1 shown in FIG. The anode of diode D3 is connected to the hot terminal of winding N3, the cathode of diode D3 is connected to one terminal of capacitor C, and the other terminal of capacitor C is connected to the cold terminal of winding N3. The hot terminal of the winding N3 is connected to the input terminal of the inverting buffer INV. The output terminal of the inverting buffer INV is connected to the gate of the switch element Q4. Further, a resistor R3 is provided in parallel with the winding N3. Further, both ends of the capacitor C are connected to the power supply terminal and the ground terminal of the inverting buffer INV so that the voltage Vc of the capacitor C becomes an output voltage source of the inverting buffer INV.

  The operation of the signal transmission circuit 2 configured as described above is basically the same as that of the signal transmission circuit 2 described with reference to FIG. When the first state is instructed, that is, when the switch element Q1 is turned on, a positive voltage is generated on the secondary side of the pulse transformer T, and the capacitor C is charged. At the same time, a high level signal is applied to the input terminal of the inversion buffer INV and the output signal of the inversion buffer INV is in a low level state, so that the switch element Q4, which is an nMOS transistor, is controlled to be in an off state. Then, current is supplied to the gate of the IGBT via the diode D1, and the IGBT is controlled to be in an on state.

  When the second state is instructed, that is, when the switch element Q1 is turned off, a negative voltage is generated on the secondary side of the pulse transformer T, and a low level signal is applied to the input terminal of the inverting buffer INV. Then, the output signal of the inversion buffer INV becomes a high level state by the voltage charged in the capacitor C, and the switch element Q4 is turned on, so that the IGBT is turned off. Thereafter, it is assumed that the switch element Q1 is maintained in the OFF state, the excitation energy of the pulse transformer T is released, and the voltage of the winding N3 approaches zero. At this time, the electric charge accumulated in the capacitor C is not extracted, and the output signal of the inverting buffer INV maintains a high level state. Therefore, the switch element Q4 remains on, and the impedance between the gate and the emitter of the IGBT is kept low. Therefore, similarly to the circuit configuration shown in FIG. 1, even if there is an external factor from the collector side, the IGBT is not erroneously fired.

<Other usage patterns>
FIG. 4 is a diagram illustrating an embodiment in which a signal transmission circuit is used for signal transmission and reception. The signal transmission circuit may have either the configuration shown in FIG. 1 or the configuration shown in FIG. And according to this usage pattern, in the configuration for transmitting and receiving signals while ensuring insulation, signal errors are suppressed even when the signal line receives external noise. The output signal of the signal transmission circuit is given to the receiving element (circuit element: for example, transistor) of the control circuit 20. If the signal transmission circuit of the embodiment is provided in parallel, signals can be transmitted and received with a duty of 0 to 100%. A configuration that can handle a signal with a duty of 0 to 100% while avoiding magnetic saturation of the pulse transformer is not particularly limited, but is described in, for example, Japanese Patent Laid-Open No. 7-15949.

  Although the diode D1 is used as the unidirectional element, for example, a switching element such as a transistor may be used. In this case, the switching element is controlled so that the current flows only in one direction.

It is a figure which shows the structure of the signal transmission circuit of embodiment of this invention. It is a figure which shows the usage example of the signal transmission circuit of embodiment. It is a figure which shows the structure of the signal transmission circuit of other embodiment. It is a figure which shows the Example by which a signal transmission circuit is used for transmission / reception of a signal. It is a figure which shows an example of the conventional signal transmission circuit using a pulse transformer.

Explanation of symbols

1, 2 Signal transmission circuit 10 DC / DC converter

Claims (4)

A primary winding to which an input switch driven by an input signal selectively indicating the first state and the second state is connected, and a control terminal of a circuit element is connected to one terminal via a one-way element A pulse transformer comprising a secondary winding connected and connected to the other terminal to the reference terminal of the circuit element;
A drive switch provided between a control terminal and a reference terminal of the circuit element;
Switch control means for controlling the drive switch to an off state when the first state is instructed, and to control the drive switch to an on state when the second state is instructed;
A capacitor for holding the drive switch in an on state in the second state;
A signal transmission circuit comprising: The signal transmission circuit according to claim 1,
The drive switch is a pMOS transistor;
The switch control means is a transistor element including a diode,
The capacitor is connected to a control terminal of the drive switch, and holds the drive switch in an on state by a voltage charged through the diode when the second state is instructed. Signal transmission circuit. The signal transmission circuit according to claim 2,
When the first state is instructed, the switch control means controls the drive switch to be in an OFF state by releasing the electric charge of the capacitor. The signal transmission circuit according to claim 1,
The circuit element is an IGBT;
A signal transmission circuit which is the gate drive circuit of the IGBT.

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