JP2010087567A - Amplification ic device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve ESD (Electrostatic Discharge) tolerance of an amplification IC element, and reduce the number of parts. <P>SOLUTION: One-chip amplification IC element is achieved by connecting a resistor or an inductor for ESD protection, and a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) whose 2 terminals out of 3 terminals are diode-connected, to an amplification element. Moreover, a varistor diode or a chip capacitor is externally connected. The amplification element is protected by the inductor or the resistor and the MOSFET, and the amplification IC element is protected by the varistor diode or the chip capacitor. Moreover, reduction of the number of parts and cost reduction and device miniaturization resulting from the reduced number of parts are achieved using a LPF (Low-Pass Filter) utilizing impedance of the resistor (inductor), the capacity of the MOSFET, and the capacity of the varistor diode (chip capacitor). <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to an amplification integrated circuit device used for an electret condenser microphone, and more particularly to an amplification integrated circuit device that realizes improvement of RF (Radio Frequency) noise and improvement of electrostatic breakdown resistance.

  An amplifying element is used to perform impedance conversion and amplification of an electret condenser microphone (hereinafter referred to as ECM). The amplifying element is composed of, for example, a junction field effect transistor (hereinafter referred to as J-FET) or an amplifying integrated circuit element.

  By the way, when the ECM is mounted on, for example, a mobile phone, radio waves of the mobile phone affect the wiring and related parts and are detected as ECM noise.

  Therefore, various noise filters are used to prevent leakage and intrusion of noise through wiring such as signals and to improve RFI (Radio Frequency Interference) (see, for example, Patent Document 1).

  FIG. 4 is a circuit diagram showing a conventional amplification integrated circuit device for impedance conversion.

  The amplification integrated circuit device 100 of FIG. 4A is obtained by connecting a noise filter 120 to an amplification integrated circuit element 110. The amplification integrated circuit element 110 is formed by integrating an amplification element (for example, J-FET) 111, a p-channel type MOSFET (Metal Oxide Semiconductor Field Effect Transistor) 112, and an n-channel type MOSFET 113. An n-channel MOSFET 113 and a p-channel MOSFET 112 are connected in parallel between the output terminal and the output terminal on the low voltage side. Both the n-channel MOSFET 113 and the p-channel MOSFET 112 are diode-connected at two of the three terminals, and serve as protective transistors that block electrostatic discharge (ESD) applied to the amplifying element 111. The noise filter 120 is formed by connecting capacitors C11 and C12 in parallel between the output terminal on the high voltage side of the amplification integrated circuit element 110 and the output terminal on the low voltage side. Capacitors C11 and C12 have self-inductors L1 and L2, respectively, and constitute a resonance filter.

In addition, the amplification integrated circuit device 150 of FIG. 4B is configured by connecting a low-pass filter (LPF) 160 for preventing electromagnetic interference to the amplification integrated circuit element 110, and includes two components. Capacitors C21 and C22 are connected in parallel between the output terminal on the high voltage side and the output terminal on the low voltage side of the amplification integrated circuit element 110, and a resistor or inductor Z is connected between one end on the high voltage side of the two capacitors C21 and C22. Are connected in series. The amplification integrated circuit element 110 is the same as that shown in FIG.
Japanese Patent Publication No. 2007-267168

  In the conventional method, unless the withstand voltage of the protection MOSFETs 112 and 113 built in the amplification integrated circuit element 110 and the resistance at the time of breakdown are sufficiently low, the absorption of ESD becomes insufficient and the amplification element 111 is damaged. was there. In order to increase the ESD absorption of the MOSFETs 112 and 113, it is necessary to increase the size (the number of transistor cells), which increases the size of the amplification integrated circuit element 110.

  In addition, the noise filters 120 and 160 that are externally attached to suppress output noise due to the RF noise of the amplification integrated circuit devices 100 and 150 are two to three capacitors C11, C12, C21, C22, and a resistor Z, respectively. External components are required, which hinders the miniaturization of the amplification integrated circuit devices 100 and 150 and the ECM to which the amplification integrated circuit devices 100 and 150 are connected, and prevents cost reduction.

  The present invention has been made in view of such a problem, and is an amplification integrated circuit device used for an electret condenser microphone, wherein the amplification integrated circuit element, and an output terminal on the high voltage side of the amplification integrated circuit element are connected to one end, and the amplification An output terminal on the low-voltage side of the integrated circuit element and a capacitive element connected to the other end; the amplification integrated circuit element includes: an amplification element; a protection element that protects the amplification element; and a resistor or an inductor. The amplifier element is integrated on one chip, and the amplifier element has an input terminal connected to the input terminal of the amplifier integrated circuit element, a high voltage side output terminal connected to one end of the resistor or inductor, and a low voltage side output terminal. The terminal is connected to the low voltage side terminal of the protection element protecting the amplification element, and the other end of the resistor or inductor is connected to the high voltage side terminal of the protection element protecting the amplification element. It is intended to be solved by.

  According to the present invention, firstly, the ESD tolerance of an amplification integrated circuit element can be improved while maintaining the same size as the conventional one, and the number of components of the amplification integrated circuit device incorporating the amplification integrated circuit element can be reduced. Can be realized. By incorporating a resistor or an inductor in the amplification integrated circuit element, the ESD tolerance of the amplification integrated circuit element can be increased compared to the conventional case even if the ESD absorption of the protection MOSFET is equivalent to the conventional one. In other words, the ESD tolerance of the amplification integrated circuit element can be increased without changing the size of the protection MOSFET or reducing the size of the MOSFET.

  Second, by connecting one capacitor or varistor diode externally to the amplification integrated circuit element, the RFI can be improved by configuring the LPF together with the resistance or inductor impedance in the amplification integrated circuit element and the capacitance of the MOSFET. . In this case, the external component of the amplification integrated circuit element may be any one of a capacitor such as a chip capacitor or a varistor diode, so the number of components is larger than that of a conventional external noise filter (resonance filter or LPF). Can be reduced. Therefore, the amplification integrated circuit device can be reduced in size and cost. In addition, when a varistor diode is used, ESD resistance is further improved because ESD is absorbed together with the protection MOSFET.

  Third, by integrating the amplifying element, the passive element, and the protection MOSFET on the same substrate (chip), there is an advantage that the circuit protection design is facilitated.

  Fourth, ESD can be absorbed by breakdown by adopting a MOSFET or Zener diode in which two terminals are diode-connected as a capacitor integrated in the amplifier element. Therefore, it is possible to improve the ESD tolerance as compared with the case where a capacitive element using electrostatic capacitance is connected.

  An embodiment of the present invention will be described with reference to FIGS.

  FIG. 1 is a circuit diagram showing an amplification integrated circuit device 1 according to a first embodiment of the present invention. The amplification integrated circuit device 1 includes an amplification integrated circuit element 2 and a capacitive element 3.

  The amplification integrated circuit element 2 is formed by integrating an amplification element 21, a resistor or inductor 22, and a transistor 23 on one chip. The capacitive element 3 is a varistor diode or a chip capacitor.

  In the amplification integrated circuit element 2, the input terminal I 1 is connected to the input terminal I 2 of the amplification element 21. The input terminal I1 of the amplification integrated circuit element 2 is connected to an ECM (not shown). A capacitive element (here, a varistor diode) 3 is connected in parallel between the output terminal O21 on the high voltage side of the amplification integrated circuit element 2 and the output terminal O22 of the low voltage type.

  The amplifying element 21 is constituted by, for example, a J-FET alone or a CMOS amplifier circuit.

  The resistance or inductor 22 has a resistance value of about 50Ω to 100Ω and an inductance value of about 0.25 μH to 1 μH. In the following description, the resistor 22 is generally referred to, but the same applies to an inductor.

  The transistor 23 is a p-channel MOSFET (Metal Oxide Semiconductor Field Effect Transistor) having a source S, a drain D, a gate G, and a back gate BG connected to the source S. The source S and the gate G are diode-connected. The anode becomes the anode, and the drain D becomes the cathode. Although the transistor 23 will be described below as the MOSFET 23, the transistor 23 may be a bipolar transistor 23. In that case, the emitter E and the base B are diode-connected to be an anode, and the collector C is a cathode.

  In the amplifying element 21, the output terminal O11 on the high voltage side is connected to one end of the resistor 22, the output terminal O12 on the low voltage side is connected to the terminal on the low voltage side (drain D) of the MOSFET 23, and the other end of the inductor 22 is It is connected to the high voltage side terminal (source S, gate G) of the MOSFET 23. In this case, a reverse bias is applied to the pn junction of the MOSFET 23. That is, when the MOSFET 23 breaks down, the ESD is absorbed and the ESD destruction of the amplifying element 21 is prevented.

  Furthermore, the inflow of static electricity to the amplifying element 21 is suppressed by the impedance Z of the resistor 22. That is, the amplifying element 21 of this embodiment is protected from ESD not only by the MOSFET 23 but also by the resistor 22 integrated on the same chip. Therefore, the ESD tolerance can be increased without increasing the size (number of cells) of the MOSFET 23, and the amplification integrated circuit element 2 can be downsized. For example, when the resistor 22 has a smaller area than the MOSFET 23, the protection circuit for the resistor 22 and the p-channel MOSFET 23 can be reduced rather than using an n-channel MOSFET and a p-channel MOSFET as in a conventional amplification integrated circuit element. Can achieve equivalent or higher ESD tolerance. Alternatively, if the ESD tolerance is the same, the amplification integrated circuit element can be downsized.

  Further, by using the resistor 22 as the ESD protection of the amplifying element 21, the MOSFET 23 can be flexibly changed as a protection transistor. For example, the breakdown voltage of the MOSFET 23 can be increased by increasing the distance between the channel region and the source region of the MOSFET 23. By designing the breakdown voltage to be high, the destruction of the MOSFET 23 itself due to ESD can be suppressed. On the other hand, if the breakdown voltage is too high, the amplifying element 21 is destroyed by ESD and the function as a protective diode is lowered. However, since the inflow of static electricity is suppressed by the resistor 22, the ESD tolerance of the amplifying element 21 is It is hard to decline. That is, it is desirable that the breakdown voltage of the MOSFET 23 can be flexibly changed according to the required ESD tolerance.

  In the present embodiment, even when the ESD tolerance of the MOSFET 23 is varied, the ESD tolerance sufficient for protecting the amplifying element 21 can be secured by changing the resistance value of the resistor 22 accordingly.

  Further, by integrating the resistor 22 and the MOSFET 23 in one chip with the amplification element 21 which is a protected element, the amplification integrated circuit element 2 can be protected from ESD even when the amplification integrated circuit element 2 is handled alone. .

  Furthermore, circuit protection design is facilitated by integrating the amplifying element 21, the resistor 22, and the MOSFET 23 on the same chip (same substrate).

In the present embodiment, a varistor diode 3 is connected as a capacitive element in parallel with the output terminal O21 on the high voltage side and the output terminal O22 on the low voltage side of the amplification integrated circuit element 2 configured as described above. The varistor diode 3 normally functions (when the applied voltage is low) and functions in the same manner as the electrostatic capacity, so that it is difficult for the voltage to rise when ESD occurs. When the varistor voltage is exceeded due to voltage rise, current is consumed by the varistor diode 3 to suppress voltage rise (voltage clamp). That is, the amplification integrated circuit element 2 can be protected from ESD damage by the capacitance C _VDR and the voltage clamp of the varistor diode 3. As a result, when the size of the MOSFET 23 in the amplification integrated circuit element 2 is maintained as usual, the capacitance C _{VDR of the} varistor diode 3 may not be sufficient for ESD protection of the amplification integrated circuit device 1 alone. The necessary ESD tolerance can be ensured by appropriately selecting the voltage clamp characteristics. Furthermore, the LPF can be configured by the capacitance C _VDR of the varistor diode 3, the impedance Z of the resistor 22 of the amplification integrated circuit element 2, and the capacitance of the MOSFET 23. Therefore, it is possible to configure the amplification integrated circuit device 1 that increases the ESD tolerance and is more resistant to RF noise.

  In this case, the external component of the amplification integrated circuit element 2 is only the varistor diode 3. Conventionally (FIG. 4), as the noise filter of the amplification integrated circuit element 2, in the case of the resonance filter 120, the capacitors C11 and C12 are necessary, and in the case of the LPF 160, the capacitors C21 and C22 and the resistor Z are necessary. there were. That is, two to three external parts are required to configure the noise filter.

However, according to the present embodiment, if only the varistor diode 3 is used as an external component, the LPF can be configured together with the impedance Z of the resistor 22 of the amplification integrated circuit element 2 and the capacitance C _{OUT of the} MOSFET 23. In other words, if the amplification integrated circuit element 2 is the same size as the conventional one, the number of parts can be reduced compared to the case where the conventional resonant filter 120 and the LPF filter 160 are externally connected (see FIG. 4). , Thereby realizing cost reduction. Further, the amplification integrated circuit device 1 can be reduced in size.

In addition, by appropriately selecting the external capacitor C _VDR , the RF noise resistance can be improved.

  Further, as described above, when the ESD tolerance of the amplification integrated circuit element 2 of the present embodiment is designed to be equal, the conventional amplification circuit element 110 using two n-channel and p-channel MOSFETs (FIG. 4). Since the chip size can be reduced as compared with the above, it is possible to contribute to the miniaturization of the amplification integrated circuit device 1.

  FIG. 2 is a circuit diagram when a chip capacitor 3 using a capacitance instead of a varistor diode is connected as a capacitive element as a second embodiment of the present invention. The same components as those in FIG. 1 are denoted by the same reference numerals, and description thereof is omitted.

Use Again, the capacitance C _C of the chip capacitor 3, but the ESD immunity of the amplifier integrated circuit device 2 by suppressing a voltage rise when ESD enters improved, minute no voltage clamping characteristic, the varistor diode The ESD tolerance is lower than that of the case. Further, the capacitance _{C C} of the chip capacitor is a capacitor and the external capacitor of the impedance Z, MOSFET 23 of the resistor 22 of the amplifier integrated circuit device 2, LPF is configured, it can be improved RF noise immunity. The varistor diode 3 breaks down when the applied voltage becomes high and absorbs ESD simultaneously with the MOSFET 23. Therefore, the varistor diode 3 is more advantageous in terms of ESD tolerance than the capacitive element (chip capacitor) based on capacitance.

  On the other hand, when the chip capacitor is used, the cost can be reduced as compared with the case where the varistor diode 3 is used.

  FIG. 3 shows a circuit diagram in the case where a Zener diode 24 is connected to the protection element of the amplification integrated circuit element 2 as a third embodiment of the present invention. The same components as those in FIG. 1 are denoted by the same reference numerals, and description thereof is omitted.

Also in this case, the amplifying element 21 can be protected from ESD by the ESD absorption of the resistor 22 and the Zener diode 24. Furthermore, the amplification integrated circuit element 2 can be protected from ESD damage by the capacitance C _VDR and voltage clamp characteristic of the varistor diode 3 and the capacitance C _OUT of the Zener diode 24. The LPF is configured by the impedance Z of the resistor 22 of the amplification integrated circuit element 2, the capacitance C _OUT of the Zener diode 24, and the capacitance C _VDR of the varistor diode 3, which is an external capacitance, and the RF noise resistance can be improved. The varistor diode 3 may be replaced with a chip capacitor.

  Further, the number of parts as the amplification integrated circuit device 1 can be reduced as compared with the conventional structure (FIG. 4).

1 is a circuit diagram illustrating an amplification integrated circuit device according to a first embodiment of the present invention. It is a circuit diagram explaining the amplification integrated circuit device of the 2nd Embodiment of this invention. It is a circuit diagram explaining the amplification integrated circuit device of the 3rd Embodiment of this invention. It is a circuit diagram explaining the conventional amplification integrated circuit device.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Amplification integrated circuit device 2 Amplification integrated circuit element 3 Capacitance element 21 Amplification element 22 Inductor or resistance 23 (p channel type) MOSFET
24 Zener diode I1 Input terminal of the amplification integrated circuit element I2 Input terminal of the amplification element O11 Output terminal on the high voltage side (amplification element)
O12 Low voltage output terminal (amplifier)
O21 High voltage output terminal (amplified integrated circuit element)
O22 Output terminal on the low voltage side (amplified integrated circuit element)

Claims (4)

An amplification integrated circuit device used for an electret condenser microphone,
An amplification integrated circuit element;
A high-voltage side output terminal of the amplification integrated circuit element is connected to one end, and a low-voltage side output terminal of the amplification integrated circuit element and a capacitive element connected to the other end;
The amplification integrated circuit element is formed by integrating an amplification element, a protection element that protects the amplification element, and a resistor or an inductor, and the amplification element has an input terminal that is an input of the amplification integrated circuit element. A high-voltage side output terminal is connected to one end of the resistor or inductor, a low-voltage side output terminal is connected to a low-voltage side terminal of a protection element protecting the amplifying element, and the resistor or The other end of the inductor is connected to a terminal on a high voltage side of a protection element that protects the amplification element. The amplification integrated circuit device according to claim 1, wherein the protection element for protecting the amplification element is a transistor in which two of the three terminals are diode-connected. The amplification integrated circuit device according to claim 1, wherein the protection element protecting the amplification element is a Zener diode.   The amplification integrated circuit device according to claim 2, wherein the capacitive element is a varistor diode or a chip capacitor.

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