JP2009111118A - Back-illuminated solid-state imaging device and manufacturing method thereof - Google Patents

Abstract

Provided is a back-illuminated imaging device capable of reliably realizing signal charge separation between photoelectric conversion regions and having high sensitivity.
A step of forming a first pixel isolation region by introducing an impurity into a semiconductor substrate, a step of forming a first epitaxial growth layer on the surface of the semiconductor substrate, and a step of forming the first epitaxial growth layer. Forming a second pixel isolation region so as to penetrate and contact the first pixel isolation region; and a photoelectric conversion unit and a peripheral circuit in a semiconductor substrate defined by the first and second pixel isolation regions Forming a portion.
[Selection] Figure 1

Description

  The present invention relates to a back-illuminated solid-state imaging device and a manufacturing method thereof, and in particular, irradiates light from the back side of a semiconductor substrate, and charges generated in the semiconductor substrate in response to the light The present invention relates to pixel separation in a back-illuminated image sensor that reads out images from and captures images.

  Conventionally, light is irradiated from the back surface side of the semiconductor substrate, and charges generated in the semiconductor substrate in response to the light are accumulated in a charge accumulation region formed on the front surface side of the semiconductor substrate, and the charges accumulated here are accumulated. A back-illuminated image sensor that outputs a corresponding signal to the outside by a CCD or a CMOS circuit to perform imaging, that is, a back-illuminated solid-state image sensor that is used by irradiating light from the back side of a semiconductor substrate has been proposed. Yes.

According to this backside-illuminated imaging device, the light receiving area can be formed using almost the entire imaging area provided on one surface of the semiconductor substrate, and the sensor sensitivity can be improved without increasing the chip size. It has been known for a long time that high photoelectric conversion efficiency can be realized. For this reason, in this backside illuminating type image pickup device, if the thickness of the semiconductor substrate can be 10 μm or more, a device with very high sensitivity can be realized.
However, the back-illuminated image sensor has a problem that signal charges are diffused between adjacent pixels and color mixing occurs.

  Therefore, a backside accumulation layer for suppressing dark current by ion implantation from the backside, which is a light irradiation surface of the semiconductor substrate on which the photoelectric conversion portion of each pixel is formed, and a pixel isolation region of the same conductivity type as this There has been proposed a method of forming (Patent Document 1).

  Also proposed is a structure in which the thickness of the semiconductor substrate is 10 μm or less and the pixel isolation region is formed over the entire thickness of the substrate (Patent Document 2).

JP 2006-93587 A JP 2005-142221 A

  In order to reliably realize signal charge separation between the respective pixel regions, that is, different photoelectric conversion regions, a deep pixel separation layer is required, but the entire depth direction of the semiconductor substrate in which the photoelectric conversion regions are formed is used. In order to form the pixel separation layer, ion implantation with high energy is required, and the pixel separation layer diffuses in the lateral direction and also compresses the photoelectric conversion region, resulting in a decrease in the detected charge amount and a decrease in sensitivity. There was a problem of bringing about.

  The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a back-illuminated imaging device with high sensitivity that can reliably realize separation of signal charges between photoelectric conversion regions. To do.

The method for manufacturing a backside illuminating type imaging device according to the present invention includes a step of forming a first pixel isolation region by introducing impurities into a semiconductor substrate, and a step of forming a first epitaxial growth layer on the surface of the semiconductor substrate. Forming a second pixel isolation region so as to penetrate the first epitaxial growth layer and contact the first pixel isolation region; and a semiconductor defined by the first and second pixel isolation regions Forming a photoelectric conversion portion and a peripheral circuit portion in the substrate.
According to this configuration, since it is not necessary to form the pixel isolation region in a deep region, ion implantation with high energy is unnecessary, and extension of the diffusion length in the lateral direction can be suppressed. Accordingly, the width of the pixel separation region can be reduced, and the area of the photoelectric conversion region can be increased correspondingly, and high sensitivity can be achieved.

According to the present invention, in the manufacturing method of the backside illumination type imaging device, the step of forming the first pixel isolation region includes an ion implantation step and an activation annealing step.
If an impurity region is formed in a deep region by ion implantation, it is extremely difficult to suppress lateral spread. However, by performing ion implantation in a plurality of times as in the present invention, ions per time The implantation depth can be shallow, and lateral expansion can be suppressed.

According to the present invention, in the manufacturing method of the backside illumination type imaging device, the step of forming the second pixel isolation region includes an ion implantation step and an activation annealing step.
Even when the impurity is introduced into the epitaxial growth layer by ion implantation, by performing ion implantation in a plurality of times as in the present invention, the impurity can be introduced only by one ion implantation into the epitaxial growth layer. Therefore, the depth of ion implantation per time can be shallow, and the spread in the lateral direction can be suppressed.

According to the present invention, in the method for manufacturing the backside illumination type image pickup device, a step of forming a second epitaxial growth layer on the first epitaxial growth layer, and the second pixel penetrating the second epitaxial growth layer. Forming a third pixel isolation region so as to be in contact with the isolation region.
Since the introduction of impurities into the epitaxial growth layer may be divided into a plurality of times and the growth and the introduction of impurities may be repeated, the depth of ion implantation per time can be shallow and the lateral spread is suppressed. It becomes possible.

According to the present invention, in the method for manufacturing the backside illumination type imaging device, the step of forming the first epitaxial growth layer or the second epitaxial growth layer is a vapor phase growth step.
According to this configuration, although the throughput is good, there is a disadvantage that it is difficult to control the impurity profile because the diffusion of impurities during growth is large.

According to the present invention, in the manufacturing method of the backside illumination type imaging device, the step of forming the first epitaxial growth layer or the second epitaxial growth layer is a molecular beam epitaxy step.
According to this configuration, although there is a slight problem with the throughput, since growth at a low temperature is possible, diffusion from impurities already introduced can be suppressed.

According to the present invention, in the manufacturing method of the back-illuminated image sensor, the activation annealing step is collectively performed after the ion implantation step for forming the first and second pixel isolation regions is completed.
According to this configuration, since it is not necessary to perform annealing each time, the total number of high-temperature processes can be reduced, so that the extension of the lateral diffusion length is suppressed. Also, workability is good.

According to the present invention, in the manufacturing method of the backside illumination type imaging device, the activation annealing step is performed after the ion implantation step for forming the first and second pixel isolation regions is completed.
According to this configuration, it is necessary to perform annealing each time, but a stable and reliable predetermined impurity profile can be obtained.

  In the backside illumination type imaging device of the present invention, the thickness from the front surface to the back surface of the semiconductor substrate including the epitaxial growth layer is 5 μm or more, preferably 8 μm or more.

The back-illuminated imaging device of the present invention includes a semiconductor substrate having a first pixel isolation region formed from the surface to a predetermined depth, a first epitaxial growth layer formed on the surface of the semiconductor substrate, and the first A second pixel isolation region penetrating through the epitaxial growth layer and in contact with the first pixel isolation region, and a photoelectric conversion unit and a peripheral circuit in a semiconductor substrate defined by the first and second pixel isolation regions A portion is formed.
According to this configuration, the width of the pixel isolation region can be reduced, and the area of the photoelectric conversion region can be increased.

Further, the present invention includes the backside illumination type imaging device, wherein the first pixel isolation region and the second pixel isolation region have a discontinuous portion of the impurity profile in the vicinity of the contact surface.
According to this configuration, since the first and second pixel isolation regions are formed in separate steps, it is possible to suppress the pixel isolation region from becoming wide by having the discontinuous portion.

  According to the present invention, the formation of the pixel isolation region is performed in a plurality of times in the depth direction, thereby eliminating the need for ion implantation at a high energy, suppressing the extension of the diffusion length in the lateral direction, and It is possible to suppress the compression of the conversion area sensor area, increase the signal charge amount, and improve the sensitivity.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
(Embodiment 1)

FIG. 1A to FIG. 1D are schematic views illustrating a manufacturing process of a backside illumination type image sensor according to an embodiment of the present invention.
As shown in FIG. 1D, the backside illumination type imaging device of this embodiment includes a semiconductor substrate 1000 having a first pixel isolation region 1001 formed to a predetermined depth from the surface, and a surface of the semiconductor substrate. A first epitaxial growth layer 1002 formed; and a second pixel isolation region 1003 penetrating the first epitaxial growth layer 1002 and in contact with the first pixel isolation region 1001. A photoelectric conversion portion 1004 and a peripheral circuit portion 1005 are formed in a semiconductor substrate defined by the pixel separation region. The first pixel isolation region and the second pixel isolation region have a discontinuous portion K of the impurity profile in the vicinity of the contact surface. Here, an SOI substrate 1000 having an epitaxial growth layer 1000E is used as a semiconductor substrate. 1000I is a silicon oxide film, and 1000S is a silicon substrate.

  This back-illuminated image sensor is formed as follows. The present embodiment is characterized in that the impurity ion implantation process for forming the pixel isolation region is performed in a plurality of times. As shown in FIGS. 1A to 1D, the manufacturing process of this back-illuminated image pickup device is a process of forming a first pixel isolation region 1001 by introducing impurities into the semiconductor substrate 1000. A step of forming a first epitaxial growth layer 1002 on the surface of the semiconductor substrate 1000; and a second pixel isolation region 1003 so as to penetrate the first epitaxial growth layer and come into contact with the first pixel isolation region 1001. And forming a photoelectric conversion unit 1004 and a peripheral circuit unit 1005 in the semiconductor substrate defined by the first and second pixel isolation regions, thereby forming a backside illumination type solid-state imaging device. It is characterized by doing so.

  First, as shown in FIG. 1A, a semiconductor substrate 1000 is prepared. Actually, an SOI substrate having an n-type epitaxial growth layer 1000E formed on the surface of the silicon substrate 1000S via a silicon oxide film 100I is prepared, ion implantation is performed in this n-type epitaxial growth layer 1000E, activation annealing is performed, A p-type diffusion layer having a thickness of about 3 μm is formed (first pixel isolation region 1001).

  Next, as shown in FIG. 1B, a first epitaxial growth layer 1002 having a thickness of about 3 μm is formed on the semiconductor substrate 1000 on which the first pixel isolation layer 1001 is formed.

Thereafter, as shown in FIG. 1C, ion implantation is performed in the first epitaxial growth layer 1002, activation annealing is performed, and a p-type diffusion layer having a depth of about 3 μm is formed (second second). Pixel separation region 1003).
Here, the activation annealing after the impurity ion implantation may be performed once or at the end. As a method, RTA (rapid heat treatment) is preferably performed. Epitaxial growth was performed by vapor phase growth at a substrate temperature of 800 ° C. to 1100 ° C. using thermal decomposition of SiH ₄ or hydrogen reduction of SiCl ₄ .

  As shown in FIG. 1D, a photodiode as a photoelectric conversion unit 1004 and a drive circuit as a peripheral circuit 1005 are formed in the first epitaxial growth layer 1002 defined in the pixel isolation region. Thereafter, a support substrate is attached to the photoelectric conversion portion forming surface side (not shown), and when the photoelectric conversion portion formation surface is the front surface, a lens, a color filter, or the like is formed on the back surface side with respect to this surface. C.

  According to this configuration, since it is not necessary to implant impurity ions into a deep region when forming the pixel isolation region, ion implantation with high energy is unnecessary, and extension of the diffusion length in the lateral direction can be suppressed. . Accordingly, the width of the pixel separation region can be reduced, and the area of the photoelectric conversion region can be increased correspondingly, and high sensitivity can be achieved.

(Embodiment 2)
Moreover, the formation process of an epitaxial growth layer is not limited to once, and may be twice or more. In the present embodiment, the epitaxial growth layer is formed in two steps. In this embodiment mode, an impurity ion implantation process for forming a pixel isolation region is performed by introducing impurities into the semiconductor substrate 1000 as shown in FIGS. 2A to 2C. A step of forming one pixel isolation region 1001, a step of forming a first epitaxial growth layer 1002 having a thickness of 3 μm on the surface of the semiconductor substrate 1000, and the first pixel isolation through the first epitaxial growth layer. Forming a second pixel isolation region 1003 in contact with the region 1001, forming a second epitaxial growth layer 1006 having a thickness of 3 μm on the surface of the first epitaxial growth layer 1002, and the first Forming a third pixel isolation region 1007 so as to penetrate the epitaxial growth layer and contact the first pixel isolation region 1003; The back-illuminated solid-state imaging device is formed in the step of forming the photoelectric conversion unit 1004 and the peripheral circuit unit 1005 in the semiconductor substrate defined by the first to third pixel isolation regions. It is what.

  First, as shown in FIG. 2A, a semiconductor substrate 1000 is prepared. Actually, an SOI substrate having an n-type epitaxial growth layer 1000E formed on the surface of the silicon substrate 1000S via a silicon oxide film 100I is prepared, ion implantation is performed in this n-type epitaxial growth layer 1000E, activation annealing is performed, A p-type diffusion layer having a thickness of about 3 μm is formed (first pixel isolation region 1001).

  Next, as shown in FIG. 2B, a first epitaxial growth layer 1002 having a thickness of about 3 μm is formed on the semiconductor substrate 1000 on which the first pixel isolation layer 1001 is formed, and the first epitaxial growth layer 1002 is formed. Inside, ion implantation is performed, activation annealing is performed, and a p-type diffusion layer having a depth of about 3 μm is formed (second pixel isolation region 1003).

  Next, as shown in FIG. 2C, a second epitaxial growth layer 1006 having a thickness of about 3 μm is further formed on the first epitaxial growth layer 1002 on which the second pixel isolation layer 1003 is formed. Ions are implanted into the second epitaxial growth layer 1006 and activation annealing is performed to form a p-type diffusion layer having a depth of about 3 μm (second pixel isolation region 1007).

  Also here, the activation annealing after the impurity ion implantation may be performed once or at the end. As a method, RTA (rapid heat treatment) is preferably performed. Epitaxial growth may be performed by molecular beam epitaxy at a substrate temperature of about 400 ° C.

After forming the deep pixel isolation region in this way, as shown in FIG. 2D, the first and second epitaxial growth layers 1002 defined by the pixel isolation region are provided with photodiodes as photoelectric conversion portions 1004. In addition, a driving circuit as the peripheral circuit 1005 is formed. Thereafter, a support substrate is attached to the photoelectric conversion portion forming surface side (not shown), and the support substrate and the silicon oxide film on the semiconductor substrate side are removed.
Then, a support substrate is attached to the photoelectric conversion portion formation surface side (not shown), and a lens, a color filter, or the like is formed on the back surface side with respect to the formation surface to form an imaging surface C.

  Also with this configuration, since it is not necessary to implant impurity ions into a deep region when forming the pixel isolation region, ion implantation with high energy is not necessary, and an increase in the lateral diffusion length can be suppressed. Therefore, it can be seen that the width of the pixel separation region can be reduced, the sensor region can be increased correspondingly, and high sensitivity can be achieved.

  In the first embodiment, the example in which the pixel isolation region is formed by dividing into two epitaxial growth steps has been described. However, the number of times can be selected as appropriate. Ion implantation is performed three times in the semiconductor substrate while changing the acceleration energy, then epitaxial growth is performed, and the pixel separation region is formed by changing the acceleration energy into the semiconductor substrate and performing ion implantation three times. The result of measuring the impurity profile is shown in FIGS. FIG. 3 shows a state immediately after ion implantation, and FIG. 4 shows a state after activation annealing. Also here, one (1) discontinuous portion K of impurity distribution is formed at the boundary between the semiconductor substrate and the epitaxial growth portion. For comparison, FIG. 5 and FIG. 6 show impurity profiles when a pixel isolation region is formed by changing the acceleration energy and performing ion implantation five times with a thickness of 6 μm by one epitaxial growth. FIG. 5 shows a state immediately after ion implantation, and FIG. 6 shows a state after activation annealing. As is clear from the comparison between FIG. 4 and FIG. 6, the lateral extension of the pixel isolation region in FIG. 4 is reduced by about 0.2 μm in FIG. 6. The area can be increased.

  In the first and second embodiments, the SOI substrate on which the epitaxial growth layer is formed is used as a starting material. However, it goes without saying that an SOI substrate obtained by bonding or a single crystal silicon substrate may be used as a starting material.

(Embodiment 3)
Next, a method for forming a solid-state imaging element on the semiconductor substrate on which the pixel isolation region is thus formed will be described. FIG. 7 is a partial cross-sectional schematic view of an interline back-illuminated image sensor formed in a region defined by a p-type impurity region as the pixel isolation region 15 by using the method of the embodiment of the present invention. is there.
As shown in FIG. 7, the back-illuminated imaging device 100 is formed by a p-type silicon layer 1E (p layer) formed by epitaxial growth on the first surface of the p-type silicon substrate 1S and ion implantation on the second surface. The p-type semiconductor substrate 30 (hereinafter referred to as the substrate 30) provided with the p-type silicon layer 2 (hereinafter referred to as the p ⁺⁺ layer 2) having a high impurity concentration is used. The p-type silicon substrate 1S is ion-implanted to form a lower portion of the pixel isolation region 15, and a p-type semiconductor layer 1E is formed on the surface of the p-type silicon substrate 1S by epitaxial growth. A p layer constituting the pixel isolation region 15 is formed by ion implantation.
Since this back-illuminated image sensor includes the deep pixel separation region 15, color mixing is reduced and high-quality image reading is possible.

  The back-illuminated image sensor 100 performs imaging by allowing light to enter from the lower side to the upper side in the drawing. In the present specification, of the two surfaces perpendicular to the light incident direction of the substrate 30, the surface on the light incident side is referred to as the back surface, and the opposite surface is referred to as the front surface. In addition, the direction in which the incident light travels is defined as the upper direction of each component when the components constituting the back-illuminated image sensor 100 are used as a reference, and the direction opposite to the direction in which the incident light travels is defined as the component. And below. In addition, a direction orthogonal to the back surface and the front surface of the substrate 30 is a vertical direction, and a direction parallel to the back surface and the front surface of the substrate 30 is a horizontal direction.

On the same surface extending in the horizontal direction near the surface of the substrate 30 in the p layer 1E, an n-type semiconductor layer 4 (hereinafter referred to as an n layer 4) for accumulating charges generated in the substrate 30 in response to incident light. Are arranged. The n layer 4 includes an n type semiconductor layer 4a (hereinafter referred to as an n layer 4a) formed on the surface side of the substrate 30, and an n type semiconductor having a lower impurity concentration than the n layer 4a formed under the n layer 4a. Although it has a two-layer structure with the layer 4b (hereinafter referred to as n ^- layer 4b), it is not limited to this. The charges generated in the n layer 4 and the charges generated in the substrate 30 on the path of light incident on the n layer 4 are accumulated in the n layer 4.

On each n layer 4, a high-concentration p-type semiconductor layer 5 (hereinafter referred to as p ⁺ layer 5) is formed to prevent dark charges generated on the surface of the substrate 30 from accumulating in each n layer 4. Yes. In each p ⁺ layer 5, an n-type semiconductor layer 6 (hereinafter referred to as an n ⁺ layer 6) having an impurity concentration higher than that of the n layer 4 is formed from the surface of the substrate 30 toward the inside thereof. The n ⁺ layer 6 functions as an overflow drain for discharging unnecessary charges accumulated in the n layer 4, and the p ⁺ layer 5 also functions as an overflow barrier for this overflow drain. As illustrated, the n ⁺ layer 6 has an exposed surface exposed on the surface of the substrate 30.

  On one side of the p + layer 5 and the n layer 4, a charge transfer channel 12 made of an n-type semiconductor having an impurity concentration higher than that of the n layer 4 is formed. The p + layer is formed around the charge transfer channel 12. A p-type semiconductor layer 11 (hereinafter referred to as a p-layer 11) having an impurity concentration lower than 5 is formed.

  In the p layer 11 and the n layer 1 between the p + layer 5 and the n layer 4 and the charge transfer channel 12, a charge reading region (not shown) for reading out the charges accumulated in the n layer 4 to the charge transfer channel 12. ) Is formed. Charge transfer for controlling the charge transfer operation by supplying a voltage to the charge transfer channel 12 via the gate insulating film 20 made of a silicon oxide film, an ONO film or the like above the charge transfer channel 12 and the charge readout region. An electrode 13 made of polysilicon or the like serving as an electrode and a charge readout electrode for controlling a charge readout operation by supplying a readout voltage to the charge readout region is formed. An insulating film 14 such as silicon oxide is formed around the electrode 13. The charge transfer channel 12 and the electrode 13 thereabove constitute a CCD.

  A pixel isolation layer 15 made of a p-type semiconductor is formed below the p layer 11 between the adjacent n layers 4. The pixel separation layer 15 is for preventing the charges to be accumulated in the n layer 4 from leaking to the adjacent n layer 4. In the present embodiment, the pixel isolation layer 15 is formed deep and thin, and color mixing can be prevented without increasing the occupied area.

  A gate insulating film 20 is formed on the surface of the substrate 30, and an insulating layer 9 such as silicon oxide is formed on the gate insulating film 20, and an electrode 13 and an insulating film 14 are formed in the insulating layer 9. Buried. Further, in the gate insulating film 20 and the insulating layer 9, a contact hole having an area equal to or smaller than the exposed surface is formed on the exposed surface of the n + layer 6 in plan view. An electrode 7 is formed.

The electrode 7 only needs to be a conductive material, and is particularly preferably composed of a metal material such as W (tungsten), Ti (titanium), or Mo (molybdenum), or silicide with these. It is preferable to provide a diffusion prevention layer between the electrode 7 and the n ⁺ layer 6 for preventing diffusion of the conductive material constituting the electrode 7. For example, TiN (titanium nitride) is used as a constituent material of the diffusion prevention layer. By providing the diffusion preventing layer, the PN junction between the n ⁺ layer 6 and the p ⁺ layer 5 becomes uniform, and the saturation variation between pixels can be reduced.

  An electrode 8 is formed on the insulating layer 9, and the electrode 8 is connected to the electrode 7. A protective layer 10 is formed on the electrode 8. The electrode 8 may be any conductive material. A terminal is connected to the electrode 8, and a predetermined voltage can be applied to the terminal.

Since the charges transferred to the n ⁺ layer 6 move to the electrode 7 connected to the exposed surface of the n ⁺ layer 6 and the electrode 8 connected thereto, this allows the n ⁺ layer 6 to function as an overflow drain. Can do.

A p ⁺⁺ layer 2 is formed on the inner side from the rear surface of the substrate 30 in order to prevent dark charges generated on the rear surface of the substrate 30 from moving to the n layer 4. A terminal is connected to the p ⁺⁺ layer 2, and a predetermined voltage can be applied to the terminal. The impurity concentration of the p ⁺⁺ layer 2 is, for example, 1 × 10 ¹⁷ / cm ³ to 1 × 10 ²⁰ / cm ³ .

Under the p ⁺⁺ layer 2, an insulating layer 3 transparent to incident light such as silicon oxide or silicon nitride is formed. Under the insulating layer 3, in order to prevent reflection of light on the back surface of the substrate 30 due to a difference in refractive index between the insulating layer 3 and the substrate 30, incident light such as silicon nitride or diamond structure carbon film is prevented. A transparent high refractive index transparent layer 16 is formed. The high refractive index transparent layer 16 is preferably a layer having a refractive index exceeding n = 1.46, such as amorphous silicon nitride which can be formed at a low temperature of 400 ° C. or lower such as plasma CVD or photo-CVD.

Under the high refractive index transparent layer 16, a color filter layer formed by arranging a plurality of color filters 18 in the horizontal direction is formed. The plurality of color filters 18 are classified into a plurality of types of color filters that transmit light in different wavelength ranges. For example, the color filter layer includes an R color filter that transmits light in the red wavelength region, a G color filter that transmits light in the green wavelength region, and a B color filter that transmits light in the blue wavelength region. It has become the composition. The color filter 18 is formed below each of the plurality of n layers 4, and one color filter 18 is provided for each n layer 4. Further, in each n layer 4, since one of the n ⁺ layer 6 corresponding color filter 18 can be said to correspond to one of a plurality of n ⁺ layer 6.

  A light shielding member 17 for preventing color mixture is formed between adjacent color filters 18. The light shielding member 17 may be any member having a function of not transmitting light, and a metal having a low visible light transmittance such as W, Mo, and Al (aluminum) or a black filter can be used.

  The cross-sectional shape of the light shielding member 17 is a taper shape (a triangle whose apex is directed to the light incident side or a trapezoid whose upper base is longer than the lower base) spreading toward the back surface of the substrate 30. preferable. By doing in this way, the light perpendicularly incident on the light shielding member 17 can be reflected by the tapered surface and guided into the substrate 30, and the light utilization efficiency can be increased.

  Under each color filter 18, a microlens 19 is formed. The shape of the microlens 19 is determined so that the refracted light becomes an optical path that avoids the light blocking member 17 between the color filter 18 above and the color filter 18 adjacent to the color filter 18. . Further, the focal point of the microlens 19 is designed to be in the center of the n layer 4. Further, the arrangement pitch of the microlenses 19 may be different from the arrangement pitch of the n layer 4 in order to reduce shading according to the characteristics of the optical system to be used.

  Of the region from the upper surface of the n layer 4 to the back surface of the substrate 30, the region partitioned by the pixel separation layer 15 in plan view is a region that performs photoelectric conversion that contributes to imaging, and is hereinafter referred to as a photoelectric conversion region. Since a signal corresponding to the charge generated in one photoelectric conversion region is the basis of one pixel data of image data, this photoelectric conversion region is also referred to as a pixel in this specification. That is, the back-illuminated image sensor 100 includes a plurality of pixels and a CCD-type or CMOS-type signal readout unit that reads out a signal corresponding to the charge generated in each of the plurality of pixels.

  In the back-illuminated imaging device 100 configured as described above, light incident on one microlens 19 enters the color filter 18 above the microlens 19, and light transmitted therethrough enters the color filter 18. The light enters the corresponding n layer 4. At this time, charges are also generated in the portion of the substrate 30 that becomes the path of incident light, but this charge moves to the n layer 4 via the potential slope formed in the photoelectric conversion region and is accumulated here. . The charges generated here upon entering the n layer 4 are also accumulated here. The charges accumulated in the n layer 4 are read and transferred to the charge transfer channel 12, converted into a signal by an output amplifier, and output to the outside.

  In the above embodiment, a CCD type is used as the back-illuminated image sensor 100, but a MOS type image sensor may be used. That is, a configuration in which a signal corresponding to the charge accumulated in the n layer 4 is read out by a CMOS circuit or an NMOS circuit may be used.

  As described above, according to the method of the present invention, since the pixel isolation region can be formed deeply and finely, the sensor area can be increased, and a small and highly sensitive back-illuminated solid-state imaging device can be formed. Therefore, it can be applied to various image pickup apparatuses including a portable electronic terminal.

Schematic diagram showing the manufacturing process of the solid-state imaging device according to the first embodiment of the present invention. Schematic diagram showing the manufacturing process of the solid-state imaging device of Embodiment 2 of the present invention The schematic diagram which shows the figure (before activation annealing) which shows the impurity concentration profile of the pixel isolation region obtained at the manufacturing process of the solid-state image sensor of Embodiment 2 of this invention The schematic diagram which shows the figure (after activation annealing) which shows the impurity concentration profile of the pixel isolation region obtained at the manufacturing process of the solid-state image sensor of Embodiment 2 of this invention The schematic diagram which shows the figure (before activation annealing) which shows the impurity concentration profile of the pixel isolation region obtained by the manufacturing process of the solid-state image sensor of a prior art example The schematic diagram which shows the figure (after activation annealing) which shows the impurity concentration profile of the pixel isolation region obtained at the manufacturing process of the solid-state image sensor of a prior art example Schematic diagram of a partial cross section of an interline-type backside-illuminated image sensor for explaining an embodiment of the present invention

Explanation of symbols

1 p layer 2 p ⁺⁺ layer 3, 9, 14 Insulating layer 4 n layer 5 p ⁺ layer (overflow barrier)
6 n ⁺ layer (overflow drain)
7, 8 Electrode 10 Protective layer 11 P layer 12 Charge transfer channel 13 Charge transfer electrode / charge readout electrode 15 Pixel separation layer 16 High refractive index transparent layer 17 Light shielding member 18 Color filter 19 Micro lens 20 Gate insulating film 1000 Semiconductor substrate 1001 First 1 pixel isolation region 1002 first epitaxial growth layer 1003 second pixel isolation region 1004 photoelectric conversion unit 1005 peripheral circuit unit

Claims (10)

Forming a first pixel isolation region by introducing impurities into the semiconductor substrate;
On the surface of the semiconductor substrate,
Forming a first epitaxial growth layer;
Forming a second pixel isolation region so as to penetrate the first epitaxial growth layer and contact the first pixel isolation region;
Forming a photoelectric conversion unit and a peripheral circuit unit in a semiconductor substrate defined by the first and second pixel isolation regions. It is a manufacturing method of the solid-state image sensing device according to claim 1,
The process for forming the first pixel isolation region includes a back-illuminated solid-state imaging device including an ion implantation process and an activation annealing process. It is a manufacturing method of the solid-state image sensing device according to claim 1 or 2,
The step of forming the second pixel isolation region includes a backside illumination type solid-state imaging device including an ion implantation step and an activation annealing step. It is a manufacturing method of the solid-state image sensing device according to any one of claims 1 to 3,
A step of forming a second epitaxial growth layer on the first epitaxial growth layer;
Forming a third pixel isolation region so as to penetrate the second epitaxial growth layer and contact the second pixel isolation region. It is a manufacturing method of the solid-state image sensing device according to any one of claims 1 to 4,
The step of forming the first epitaxial growth layer or the second epitaxial growth layer is a method for manufacturing a backside illumination type solid-state imaging device, which is a vapor phase growth step. It is a manufacturing method of the solid-state image sensing device according to any one of claims 1 to 4,
The process of forming a 1st epitaxial growth layer or a 2nd epitaxial growth layer is a manufacturing method of the back irradiation type solid-state image sensor which is a molecular beam epitaxy process. A method for manufacturing a solid-state imaging device according to any one of claims 3 to 6,
The activation annealing step is a manufacturing method of a backside illumination type solid-state imaging device that is collectively implemented after the ion implantation step for forming the first and second pixel isolation regions is completed. A method for manufacturing a solid-state imaging device according to any one of claims 3 to 6,
The activation annealing step is a method for manufacturing a backside illumination type solid-state imaging device, which is performed after the ion implantation step for forming the first and second pixel isolation regions is completed. A semiconductor substrate having a first pixel isolation region formed from the surface to a predetermined depth;
A first epitaxial growth layer formed on the surface of the semiconductor substrate;
A second pixel isolation region penetrating through the first epitaxial growth layer and contacting the first pixel isolation region;
A back-illuminated image sensor in which a photoelectric conversion unit and a peripheral circuit unit are formed in a semiconductor substrate defined by the first and second pixel isolation regions. The back-illuminated image sensor according to claim 9,
The first pixel isolation region and the second pixel isolation region are back-illuminated imaging elements having a discontinuous portion of an impurity profile in the vicinity of the contact surface.

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