JP2009188121A - Manufacturing method of electronic component - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method of an electronic component for which an electrode layer wherein a part covering the surface of a chip element body is flat and a part covering a ridge part is thicker is formed. <P>SOLUTION: The manufacturing method includes a first conductive paste imparting process, a second conductive paste imparting process and a heat treatment process. A first paste electrode layer 21 covering a long side face 13 and the ridge part 17 in the chip element body 1 is formed in the first conductive paste imparting process, and a second paste electrode layer 22 further covering the part covering the long side face 13 and the ridge part 17 in the first paste electrode layer 21 is formed in the second conductive paste imparting process. In the first paste electrode layer 21, a first part 21d covering the center part 13a of the long side face 13 is thicker than a second part 21b covering the ridge part 17. In the second paste electrode layer 22, a third part 22d covering the first part 21d is thinner than a fourth part 22b covering the second part 21b. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a method for manufacturing an electronic component.

There is a chip-shaped electronic component that includes a substantially rectangular parallelepiped chip element having an internal electrode and external electrodes formed on the surfaces of a pair of opposing surfaces of the chip element. As a method for forming the external electrode of the electronic component, there is a method described in Patent Document 1 below. In this method, a conductive paste film is formed on the end face of the element chip by immersing one of the pair of faces of the chip element in the conductive paste, and is then baked to form an electrode layer that serves as a base for the external electrode. Form.
JP-A-5-144661

  In the technique disclosed in Patent Document 1, one surface of the chip body is dipped in a conductive paste stored in a container and lifted. Then, the conductive paste adhering to one surface of the chip body is pulled by the conductive paste in the container. Due to the action of the adhesive force (tensile force), the conductive paste accumulates at the center of one surface of the chip body. For this reason, the film | membrane of the electrically conductive paste formed in one surface becomes a mountain shape, and a center part becomes thick. Therefore, the thickness of the conductive paste is thinner than the thickness of the one surface at the ridge around the one surface of the chip body.

  In this case, there are the following problems. The conductive paste film becomes an electrode layer after firing, and is further subjected to a plating treatment. When the plating process is performed, if the thickness of the ridge portion in the electrode layer is thin, the plating solution may enter the inside of the chip body from the ridge portion of the chip body. When the plating solution penetrates into the chip body, it is a problem because the characteristics as an electronic component may be deteriorated or a short circuit may occur.

  Therefore, in order to increase the thickness of the ridges, a method of applying a larger amount of conductive paste to the chip body by increasing the immersion depth when the chip body is immersed in the conductive paste is considered. It is done. However, in this case, the thickness of the conductive paste on the end face of the chip body is increased, resulting in a more protruding mountain shape. Then, since the dimension as an electronic component becomes large by the protruding part, it is a problem.

  In addition, when the conductive paste film is formed on the other surface after the conductive paste film is formed on the one surface, the conductive paste film formed on the one surface is attached to the adhesive sheet. Hold the body. When the conductive paste film formed on one surface is formed in a mountain shape, the chip body is inclined with respect to the adhesive sheet. It is difficult to form a conductive paste film in a predetermined shape on the other surface of the chip body held in such a state.

  The present invention has been made in order to solve the above-described problems. An electronic component in which an electrode layer in which a portion covering a surface of a chip body is flat and a portion covering a ridge is thicker is formed. An object is to provide a manufacturing method.

  The electronic component manufacturing method of the present invention includes a preparatory step of preparing a chip body that is formed in a substantially rectangular parallelepiped shape and has a first surface and four second surfaces that are perpendicular to and adjacent to the first surface; A first conductive paste applying step of immersing a first surface of the element body and a portion extending from the first surface to four second surfaces in a conductive paste to form a first paste electrode layer; Applying a conductive paste to the first paste electrode layer to form a second paste electrode layer; and applying a heat treatment to the first and second paste electrode layers to form an electrode layer And a heat treatment step to be formed, and in the first conductive paste application step, the thickness of the first portion covering the central portion of the first surface is a pair of opposing surfaces of the four second surfaces, respectively. A first pace that is thicker than the thickness of the second portion covering the ridge between the first surface and the first surface In the step of forming the electrode layer and applying the second conductive paste, the thickness of the third portion covering the first portion is smaller than the thickness of the fourth portion covering the second portion. It is characterized by forming.

  In the method for manufacturing an electronic component according to the present invention, a second paste electrode layer is further formed on the first paste electrode layer. In the first paste electrode layer, the thickness of the first portion covering the central portion of the first surface of the chip body is thicker than the thickness of the second portion covering the ridge portion of the chip body. In the second paste electrode layer, the thickness of the third portion covering the first portion in the first paste electrode layer is smaller than the thickness of the fourth portion covering the second portion. Therefore, in the electrode layer formed by heat-treating the first and second paste electrode layers, the first surface of the chip body is made to be more than the electrode layer formed by heat-treating only the first paste electrode layer. The covering portion is flatter, and the thickness of the portion covering the ridge portion can be increased. That is, the difference between the thickness of the portion covering the first surface of the chip body and the thickness of the portion covering the ridge portion can be reduced.

  Preferably, a provisional drying step of drying a part of the first paste electrode layer is provided, and in the application step of the first conductive paste, the first portion has a protruding mountain shape, and the first portion is Forming a first paste electrode layer having a first region including the second region and a second region including the ridge, and in the temporary drying step, the first region is undried and the second region is dried; The first paste electrode layer is dried until it is in a dry state, and in the second conductive paste application step, the first paste electrode layer that is in a temporarily dry state is immersed in the conductive paste, whereby the second paste electrode Form a layer.

  In the step of applying the first conductive paste, when the conductive paste is dip-coated on the region including the first surface of the chip body, the portion of the first paste electrode layer that is formed covers the first surface in a mountain shape It becomes. When drying is performed in the temporary drying step, the drying proceeds faster in the second region including the second part than in the first region including the first part. Therefore, temporary drying is performed until the second region is dried and the first region is undried. When a portion covering the first surface and the second portion of the first paste electrode layer in the temporarily dried state is immersed in the conductive paste, the conductive paste adheres to the dried surface thicker than the undried surface. Therefore, it is possible to form the second paste electrode layer in which the thickness of the portion covering the second region is thicker than the thickness of the portion covering the first region. That is, it is possible to form the second paste electrode layer in which the thickness of the fourth portion covering the second portion is larger than the thickness of the third portion covering the first portion. As a result, an electrode layer can be formed in which the portion covering the surface of the chip body is flatter and the portion covering the ridge is thicker.

  Preferably, in the second conductive paste application step, the thickness of the third portion of the second paste electrode layer is smaller than the thickness of the first portion of the first paste electrode layer, and the second paste electrode layer The second paste electrode layer is formed such that the thickness of the fourth portion is greater than the thickness of the second portion of the first paste electrode layer. In this way, by forming the first and second paste electrode layers, an electrode layer is formed in which the portion covering the first surface of the chip body is flat and the portion covering the ridge is thicker. be able to.

  Preferably, the method further comprises a blotting step of pressing a portion covering the first surface of the first paste electrode layer against the flat surface. Thereby, the part which covers a 1st surface in a 1st paste electrode layer can be planarized more.

  Preferably, after the electrode layer is formed on the first surface, the first surface side of the chip body is held in order to form the electrode layer on the third surface opposite to the first surface of the chip body. A holding step of holding the chip body by holding the portion covering the first surface of the electrode layer formed on the first surface and the adhesive surface of the holder. . When the adhesive surface of the holder and the portion covering the first surface of the electrode layer are adhered, the portion covering the first surface of the electrode layer formed on the first surface is more flattened. The element body can be held horizontally and reliably. Therefore, the electrode layer can be formed in a predetermined shape on the other surface of the chip body.

  According to the electronic component manufacturing method of the present invention, it is possible to form an electrode layer in which the portion covering the end face of the chip body is flat and the portion covering the ridge is thicker.

  The best mode for carrying out the present invention will be described below in detail with reference to the accompanying drawings. In the description of the drawings, the same reference numerals are assigned to the same elements, and duplicate descriptions are omitted.

  With reference to FIG. 1, the structure of the electronic component which concerns on this embodiment is demonstrated. FIG. 1 is a perspective view of an electronic component according to this embodiment. The electronic component E according to the present embodiment is a flip chip type ceramic capacitor. The electronic component E has a substantially rectangular parallelepiped shape, and includes a chip element body 1, and a first external electrode 2 and a second external electrode 3 formed on the chip element body 1.

  The chip body 1 is formed by alternately laminating dielectric layers and internal electrode layers. The internal electrode layer includes a first internal electrode layer and a second internal electrode layer, and the first internal electrode layer and the second internal electrode layer are alternately stacked. The first internal electrode layer is electrically connected to the first external electrode 2, and the second internal electrode layer is electrically connected to the second external electrode 3.

  The chip body 1 has a substantially rectangular parallelepiped shape, and faces a main surface 11 and a main surface 12 that face each other, and a long side surface (first surface) 13 and a long side surface (third surface) 14 that face each other. A short side surface 15 and a short side surface 16. The main surfaces 11 and 12, the long side surfaces 13 and 14, and the short side surfaces 15 and 16 are substantially planar surfaces.

  The chip body 1 has a height dimension in a facing direction between the main surface 11 and the main surface 12, a length dimension in a facing direction between the long side surface 13 and the long side surface 14, and a facing direction in the short side surface 15 and the short side surface 16. Thinner than the width dimension. Also, the width dimension is thicker than the length dimension. That is, the electronic component E is a low-profile chip component. Further, in the chip body 1, the ridges between the major surface 11 and 12, the long side surfaces 13 and 14, and the short side surfaces 15 and 16 are rounded.

  The ridges 17 around the long side surface 13 are a portion between the long side surface 13 and the main surface 11, a corner portion between the long side surface 13 and the main surface 11 and the short side surface 15, and the long side surface 13 and the short side surface 15. Between the long side surface 13, the major surface 12 and the short side surface 15, between the long side surface 13 and the main surface 12, between the long side surface 13, the main surface 12 and the short side surface 16. Corner portions, a portion between the long side surface 13 and the short side surface 16, and a corner portion between the long side surface 13, the main surface 11 and the short side surface 16.

  The ridges 18 around the long side surface 14 are a portion between the long side surface 14 and the main surface 11, a corner portion between the long side surface 14, the main surface 11 and the short side surface 15, and the long side surface 14 and the short side surface 15. Between the long side surface 14, the major surface 12 and the short side surface 15, between the long side surface 14 and the main surface 12, between the long side surface 14, the main surface 12 and the short side surface 16. The corner portion includes a corner portion between the long side surface 14 and the major surface 11 and the short side surface 16.

  The first external electrode 2 and the second external electrode 3 respectively cover the electrode formation region A on the outer surface of the chip body 1. The electrode formation region A of the first external electrode 2 includes a long side surface 13, a ridge portion around the long side surface 13 including the ridge portion 17, and the long side surface 13 side of the main surfaces 11, 12 and the short side surfaces 15, 16. It is an area to include. The electrode formation region A of the second external electrode 3 includes the long side surface 14, the ridge portion around the long side surface 14 including the ridge portion 18, and the long side surface 14 side of the main surfaces 11, 12 and the short side surfaces 15, 16. It is an area to include. The first and second external electrodes 2 and 3 are each composed of an electrode layer and a plating layer covering the electrode layer.

  A method for manufacturing the electronic component E will be described. FIG. 2 is a flowchart showing a method for manufacturing an electronic component according to this embodiment. In the method of manufacturing an electronic component according to the present embodiment, first, the above-described chip body 1 is prepared (chip body body preparation step S1). In the chip body preparation step S1, the chip body 1 is formed as follows. First, a ceramic green sheet to be a dielectric layer is formed. The ceramic green sheet is formed by applying a ceramic slurry to a PET film and then drying it. The ceramic slurry can be obtained by adding a butyral resin to a dielectric material mainly composed of barium titanate, and further adding a solvent, a plasticizer, and the like and mixing and dispersing.

  Next, an electrode pattern to be an internal electrode layer is formed on the ceramic green sheet. The electrode pattern is formed by printing an electrode paste by screen printing or the like and then drying it. The electrode paste is obtained by mixing Ni powder with a binder (for example, ethyl cellulose resin), a solvent (for example, dihydroterpineol solvent), and the like. A plurality of ceramic green sheets on which the electrode patterns are thus formed are stacked. Then, a green chip is formed by cutting perpendicularly to the stacking direction, and the green chip is fired. After firing, the corners are rounded by barrel polishing to obtain the chip body 1.

  Next, a first green electrode layer is formed in a region A in which the first external electrode 2 is formed on the long side surface 13 side of the chip body 1 (first green electrode layer forming step S2). In the first green electrode layer forming step S2, as shown in FIG. 3A, the first green electrode layer 20 is formed on the chip body 1 while the chip body 1 is held by the holder 4. Form. FIG. 3A is a schematic cross-sectional view showing the first green electrode layer forming step S2.

  The holder 4 has a sticky adhesive surface 4a that is plate-shaped. The holder 4 has a sticky silicon rubber formed on the surface of a stainless base plate and functions as an adhesive surface 4a. The long side surface 14 of the chip element body 1 is attached to the adhesive surface 4 a to hold the chip element body 1. A plurality of chip bodies 1 are arranged and arranged on the adhesive surface 4a.

  Next, in order to form the second green electrode layer on the long side surface 14 side, the holder 4 is moved to the holder 5 and the long side surface 13 side is held by the holder 5 (holding step; Transfer step S3). In the holder transferring step S3, the long side face 14 is held from the upper side (the state shown in FIG. 3A) to the lower side state shown in FIG. (B) state), the first green electrode layer 20 is attached to the adhesive surface 5 a of the holder 5, and the chip body 1 is held by the holder 5.

  The holder 5 has an adhesive surface 5a in which a foaming peeling adhesive is applied to the surface of a PET (polyethylene terephthalate) film fixed to a rectangular holder. By sticking a portion covering the long side surface 13 of the chip body 1 in the first green electrode layer 20 to the adhesive surface 5a, the long side surface 13 side of the chip body 1 can be held.

  The foaming release adhesive is also called a heat release adhesive, exhibits normal adhesive strength at room temperature, and loses adhesive strength when heated to a predetermined temperature or higher. The adherend is peeled using this property. As the foaming release adhesive, a material that exhibits an adhesive strength higher than the adhesive strength of the adhesive surface 4 a of the holder 4 at room temperature is used, and the holder 4 is held in a state where the long side surface 13 side is held by the holder 5. Remove from long side 14. In this way, the holder is transferred.

  Next, a second green electrode layer is formed in a region A where the second external electrode 3 on the long side surface 14 side is formed (second green electrode layer forming step S4). Subsequently, when the first green electrode layer 20 and the second paste electrode layer are formed, the first and second green electrode layers are fired to obtain the first and second electrode layers (firing step S5). ).

  Thereafter, a plating process is performed to form plating layers covering the first and second electrode layers, respectively, and the first and second external electrodes 2 and 3 are completed. For example, a Ni plating layer and a Sn plating layer covering the Ni plating layer are formed as the plating layer.

  Subsequently, the first green electrode layer forming step S2 will be described in more detail. As shown in FIG. 4, the first green electrode layer 20 forming step S2 includes a first conductive paste applying step S11, a blotting step S12, a temporary drying step S13, a second conductive paste applying step S14, and a blot. Step S15 and main drying step S16 are provided. Hereinafter, each step will be described.

  First, in the first conductive paste application step S11, as shown in FIG. 5, the conductive paste is applied to the chip body 1 held by the holder 4. FIG. 5 is a schematic cross-sectional view showing the first conductive paste applying step S11. The conductive paste is, for example, a paste in which a conductive powder such as silver, palladium, silver palladium, or copper is mixed with a resinous binder and an organic solvent. This conductive paste is put on the plane of a coating bed (not shown) to prepare a conductive paste layer 6. The long side surface 13 side of the chip body 1 is immersed in the conductive paste layer 6 to a predetermined height (FIG. 5A) and pulled up (FIG. 5B).

  As a result, the conductive paste is applied to the area where the first external electrode 2 is to be formed in the chip body 1 to form the first paste electrode layer 21. As shown in FIG. 6, the first paste electrode layer 21 includes a portion 21 a that covers the long side surface 13 of the chip body 1, a second portion 21 b that covers the ridge portion 17 of the chip body 1, and the main surface 11, 12 and the short side surfaces 15 and 16 have a portion 21c that covers the region on the long side surface 13 side. FIG. 6 is a schematic cross-sectional view for explaining the shape of the first paste electrode layer 21. In FIG. 6, in order to show the characteristic of the 1st paste electrode layer 21, the thickness is shown larger than the actual ratio.

  In the first paste electrode layer 21, the conductor paste gathers at the center due to the surface tension of the conductive paste, and the portion 21 a covering the long side surface 13 has a mountain shape. In the first paste electrode layer 21, the thickness T1 of the first portion 21d covering the central portion 13a of the long side surface 13 is thicker than the thickness R1 of the second portion 21b.

  In the first paste electrode layer 21, the region constituted by the portion 21 a covering the long side surface 13 and the second portion 21 b covering the ridge portion 17 is the first region 21 e having a correlation with the thickness of the layer. A second region 21f. The thickness of each position of the first region 21e is thicker than the thickness of each position of the second region 21f. That is, the first region 21e includes the first portion 21d and corresponds to a protruding portion of the portion 21a formed in a mountain shape. The second region 21 f is configured by a skirt portion and a ridge portion 17 surrounding the first region 21 e in the portion 21 a covering the long side surface 13.

  Next, in the blotting step S <b> 12, as shown in FIG. 7A, the portion 21 a that covers the long side surface 13 of the first paste electrode layer 21 is pressed against the flat plate 7. This is for flattening the portion 21a formed in a mountain shape. By performing the blotting step S12, the thickness of the first portion 21d is somewhat smaller than before, but even after the blotting step S12, the portion 21a covering the long side surface 13 has a mountain shape. The thickness of each position of the first region 21e is thicker than the thickness of each position of the second region 21f. In the first paste electrode layer 21, the thickness of the first portion 21d covering the central portion 13a of the long side surface 13 is thicker than the thickness of the second portion 21b.

  Next, in the temporary drying step S13, the first paste electrode layer 21 is dried until the first region 21e is in an undried state and the second region 21f is in a temporarily dried state. As shown in FIG. 7B, drying is performed by far infrared rays using a far infrared heater 8. When the drying is started, the first paste electrode layer 21 is easier to dry in the thinner part than the thicker part, and dries from the outer part. Therefore, the drying is stopped in a state where the second region 21f is dried and the first region 21e is freshly dried.

  The temporarily dried state in which the first region 21e is in an undried state and the second region 21f is in a dried state is a state in which the proportion of the solvent remaining in the first region 21e is higher than that in the second region 21f. Indicates that The dry state is a state in which the proportion of the solvent remaining is lower than that in the undried state, and the surface of the dried state looks lighter than the surface in the undried state. The difference between the dried state and the undried state can be identified visually. FIGS. 8A and 8B are graphs quantitatively showing the difference in color between the dried state and the undried state.

  The graphs of FIGS. 8A and 8B show the color of each position along the central line extending in the longitudinal direction in the portion 21 a covering the long side surface 13 of the first paste electrode layer 21. The horizontal axis indicates the distance from one end of the center line. The vertical axis in FIG. 8A is a value obtained by performing color tone conversion of a color photographed image by the image recognition apparatus and indicating the color at each position in RGB decimal numbers. The vertical axis in FIG. Average values of R, G, and B are shown. The RGB value is a value indicating the color density.

  In FIG. 8, the RGB values are low and the range is in the undried state. For example, the range where the RGB value is 55 to 85% or less of the RGB value of the dried region is the range of the undried state. According to FIG. 8, the range from about 100 to about 700 is undried. For example, the undried first region 21e is preferably about 85 to 50% with respect to the portion 21a covering the long side surface 13 with the first portion 21d as the center.

  In the actual manufacturing process, for example, the drying state is visually confirmed to determine the drying conditions such as the output of the far infrared heater 8 and the drying time, and the provisional drying process S13 for the same lot is performed under the set drying conditions. Do. As a result, the drying can be finished in a state where the second region 21f is in a dry state and the first region 21e is in an undried state without visual confirmation of all the parts. For example, the drying condition is a drying time of about 10 seconds to 30 seconds using a far infrared heater of about 150 W to 200 W.

  Subsequently, in the second conductive paste application step S14, the second paste electrode layer 22 is formed by applying the conductive paste to the first paste electrode layer 21 in the temporarily dried state. As shown in FIG. 9A, the region where the first paste electrode layer 21 of the chip body 1 is formed in the conductive paste layer 6 is immersed in the conductive paste layer 6 and pulled up. The depth of immersing the chip body 1 in the conductive pace and the layer 6 is set to be deeper than the depth of immersing in the first conductive paste application step S14. Thereby, the second paste electrode layer 22 covering the entire area of the first paste electrode layer 21 is formed.

  When the chip body 1 is pulled up from the conductive paste layer 6, the conductive paste is less likely to adhere to the surface of the undried first region 21e, so the conductive paste is thicker from the first region 21e to the second region 21f. Adheres (FIG. 9B). That is, in the second paste electrode layer 22, the thickness T2 of the third portion 22d covering the central portion 13a of the long side surface 13 is thinner than the thickness R2 of the fourth portion 22b covering the ridge portion 17.

  Further, the thickness T2 of the third portion 22d of the second paste electrode layer 22 is smaller than the thickness T1 of the first portion 21d of the first paste electrode layer 21, and the fourth portion of the second paste electrode layer 22 is fourth. The thickness R2 of the portion 22b is larger than the thickness R1 of the second portion 21b of the first paste electrode layer 21. Thereby, in application | coating process S14 of 2nd electrically conductive paste, it can suppress that the thickness of the part which covers the center part in the long side surface 13 increases, and can increase the thickness of the part which covers the ridge part 17. FIG. Accordingly, the portion 22 a that covers the long side surface 13 in the second paste electrode layer 22 is flattened than the portion 21 a that covers the long side surface 13 in the first paste electrode layer 21. FIG. 9 is a schematic cross-sectional view showing the second conductive paste application step S14, but FIG. 9B shows the characteristics of the first and second paste electrode layers 21 and 22. The thickness is shown larger than the actual ratio.

  Next, in the blotting step S <b> 15, the portion 22 a that covers the long side surface 13 of the second paste electrode layer 22 is pressed against the flat plate 7. This is to make the portion 22a more flat. Subsequently, in the main drying step S16, the entire first and second paste electrode layers 21 and 22 are completely dried. As shown in FIG. 10A, the far-infrared heater 8 is disposed below the chip body 1, and the first and second paste electrode layers 21 and 22 are dried. Thus, as shown in FIG. 10B, the first green electrode layer 20 in which the first and second paste electrode layers 21 and 22 are integrated is obtained.

  Also in the second green electrode layer forming step S4, the second green electrode layer is formed on the long side surface 14 side of the chip body 1 in the same procedure as in the first green electrode layer forming step S2. Note that the first and second paste electrode layers 21 and 22 are subjected to heat treatment including the main drying step S16 and the firing step S5 to obtain the first and second electrode layers.

  In the electronic component manufacturing method according to the present embodiment described above, the second paste electrode layer 22 is further formed on the first paste electrode layer 21. In the first paste electrode layer 21, the thickness T <b> 1 of the first portion 21 d that covers the central portion 13 a of the long side surface 13 of the chip body 1 is thicker than the thickness R <b> 1 of the second portion 21 b that covers the ridge portion 17. In the second paste electrode layer 22, the thickness T2 of the third portion 22d covering the first portion 21d of the first paste electrode layer 21 is the thickness of the fourth portion 22b covering the second portion 21b. Thinner than R2. Therefore, in the electrode layer formed by heat-treating the first and second paste electrode layers 21 and 22, the chip body 1 is longer than the electrode layer formed by heat-treating only the first paste electrode layer. The portion 21a covering the side surface is flatter, and the thickness of the portion 21b covering the ridge portion 17 can be increased. Thereby, the difference of the thickness of the part which covers the long side surface 13 of the chip | tip body 1 and the thickness of the part which covers a ridge part can be made small.

  Further, in the holder transfer step S3, when the adhesive surface 5a of the holder 5 and the portion 21a covering the long side surface 13 of the first paste electrode layer 21 are adhered, the portion 21a is more flattened. The chip body 1 can be held horizontally and reliably.

  Moreover, in the manufacturing method of the electronic component according to the present embodiment, the first conductive paste is formed by immersing the conductive paste on the long side surface 13 and the ridge portion 17 of the chip body 1 in the first conductive paste application step S11. The paste electrode layer 21 has a mountain shape at the portion covering the long side surface 13. When drying is performed in the temporary drying step S13, the second region 21f is dried earlier than the first region 21e. Therefore, temporary drying is performed until the first region 21e is in an undried state and the second region 21f is in a dry state. When the first paste electrode layer 21 in the temporarily dried state is immersed in the conductive paste, the conductive paste adheres to the dried surface thicker than the undried surface. Accordingly, it is possible to form the second paste electrode layer 22 in which the thickness of the portion covering the second region 21f is thicker than the thickness of the portion covering the first region 21e. That is, in the second paste electrode layer 22, the thickness R2 of the fourth portion 22b that covers the ridge portion 17 of the chip body 1 is formed thicker than the thickness T2 of the third portion 22d that covers the central portion 13a of the long side surface 13. can do. Thereby, an electrode layer in which the portion covering the long side surface 13 of the chip body 1 is flatter and the portion covering the ridge portion 17 is thicker can be formed.

  In the electronic component manufacturing method according to the present embodiment, the thickness T2 of the third portion 22d of the second paste electrode layer 22 is the first and second conductive paste applying steps S11 and S14. The thickness R1 of the fourth portion 22b of the second paste electrode layer 22 is smaller than the thickness T1 of the first portion 21d of the paste electrode layer 21, and the thickness R2 of the fourth portion 22b of the second paste electrode layer 22 is the thickness of the second portion 21b of the first paste electrode layer 21. First and second paste electrode layers 21 and 22 are formed to be thicker than R1. By forming the first and second paste electrode layers 21 and 22 in this way, the part covering the first surface 13 of the chip body 1 is flatter and the part covering the ridge part 17 is thicker. An electrode layer can be formed.

  The electronic component manufacturing method according to the present embodiment further includes a blotting step S12 that presses a portion 21a covering the first surface 13 of the first paste electrode layer 21 against a flat surface. Thereby, the part 21a which covers the 1st surface 13 in the 1st paste electrode layer 21 can be planarized more.

  The present invention is not limited to the above embodiment, and various modifications can be made. For example, in the above embodiment, the blotting step S12 is performed after the temporary drying step S13, but may be performed after the temporary drying step S13.

  For example, in the above embodiment, the second region 21f to be dried in the temporary drying step S13 includes the ridge portion 17 around the long side surface 13, but the present invention is not limited thereto. Since the length of the long side surface 13 in the longitudinal direction is sufficiently larger than the length in the short side direction, the main surface 11 and the main surface 12 respectively have a long side surface in the first paste electrode layer 21 due to the action of adhesive force. The part which covers the center part of the ridge part between 13 may be comparatively thick. In this case, the second region 21f may not include a ridge between each of the main surface 11 and the main surface 12 and the long side surface 13. That is, the second conductive paste applying step S <b> 14 may be performed with the portion covering the central portion of the ridge between each of the main surface 11 and the main surface 12 and the long side surface 13 being undried. The action of adhesive force means that when one surface of the chip body is dipped in a conductive paste stored in a container and lifted, the conductive paste attached to one surface of the chip body is removed from the conductive paste in the container. It is the action that is pulled by.

  In the temporary drying step S13, the dry state of the first paste electrode layer 21 is visually confirmed. However, the present invention is not limited to this. In the above description, the image recognition apparatus is used to quantitatively measure color shading. However, the dry state may be confirmed based on the measurement result of the RGB values by the image recognition apparatus. Further, the density of the surface of the first paste electrode layer 21 may be visually recognized using a microscope. Moreover, since the sticking strength with respect to a smooth metal plate etc., such as stainless steel, differs in the undried area | region and dry area | region of the 1st paste electrode layer 21, even if it confirms a dry state based on this sticking strength Good.

  Moreover, in temporary drying process S13, it is preferable that the 1st area | region 21e of an undried state is about 85 to 50% with respect to the part 21a which covers the long side surface 13 centering on the 1st part 21d, and more. Preferably, it is about 80%. With respect to this point, the test results will be described with reference to FIG.

  FIG. 11 is a graph showing the relationship between the ratio of the undried region (first region 21e) to the portion 21a covering the long side surface 13 and the film thickness difference. The vertical axis represents the film thickness difference. The film thickness difference was moved by a quarter of the distance between the short side surface 15 and the short side surface 16 along the longitudinal direction from the central portion in the thickness direction of the thickest central portion of the first external electrode. It is the difference from the thickness at the position. As this film thickness difference is larger, the first external electrode protrudes in a mountain shape, and the difference between the thickness of the central portion and the thickness of the ridge portion is larger.

  The horizontal axis indicates the ratio of the undried region. In the graph of FIG. 11, the proportion of the undried region indicates a film thickness difference of 90%, 85%, 80%, 50%, and 30%. When the ratio of the undried region is 90%, the difference from the case where the second paste electrode layer 22 is formed following the first paste electrode layer 21 without going through the temporary drying step S13 is small, and the film thickness difference Is big. Further, when the ratio of the undried region is 30%, the difference from the case where the second paste electrode layer 22 is formed after the first paste electrode layer 21 is completely dried is small, and the film thickness difference is large. As shown in the graph of FIG. 11, the undried first region 21 e is preferably about 85 to 50%, more preferably about 80% with respect to the portion 21 a covering the long side surface 13. is there.

It is a schematic perspective view of the electronic component which concerns on this embodiment. It is a flowchart which shows the manufacturing process of the electronic component which concerns on this embodiment. It is a schematic sectional drawing which shows the transfer process of the holder of FIG. It is a flowchart which shows the manufacturing method of the electronic component which concerns on this embodiment. It is a schematic sectional drawing which shows the provision process of the 1st electrically conductive paste of FIG. It is the schematic sectional drawing and schematic plan view which show the 1st paste electrode layer formed in the manufacturing process of the electronic component which concerns on this embodiment. It is a schematic sectional drawing which shows the blotting process and temporary drying process of FIG. It is a graph which shows the temporary drying state by the temporary drying process of FIG. It is a schematic sectional drawing which shows the provision process of the 2nd electrically conductive paste of FIG. It is a figure which shows the main drying process of FIG. It is a graph which shows the relationship between the ratio of an undried area | region, and a film thickness difference.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Chip body, 2 ... 1st external electrode, 3 ... 2nd external electrode, 4, 5 ... Holder, 4a, 5a ... Adhesive surface, 6 ... Conductive paste layer, 13 ... Long side surface (1st Surface), 17, 18 ... ridge, 20 ... green electrode layer, 21 ... first paste electrode layer, 21b ... second portion, 21d ... first portion, 21e ... first region, 21f ... second 22 ... 2nd paste electrode layer, 22b ... 4th part, 22d ... 3rd part, E ... electronic component.

Claims (5)

A preparatory step of preparing a chip body having a substantially rectangular parallelepiped shape and having a first surface and four second surfaces perpendicular to and adjacent to the first surface;
A first conductive paste for forming a first paste electrode layer by immersing a first surface of the chip body and a portion extending from the first surface to the four second surfaces in a conductive paste. Granting process;
Applying a second conductive paste by applying a conductive paste to the first paste electrode layer to form a second paste electrode layer;
A heat treatment step of heat-treating the first and second paste electrode layers to form an electrode layer;
With
In the application step of the first conductive paste, the thickness of the first portion covering the central portion of the first surface is such that each of the pair of opposing surfaces of the four second surfaces and the first surface Forming the first paste electrode layer thicker than the thickness of the second portion covering the ridge between
In the applying step of the second conductive paste, the second paste electrode layer is formed such that the thickness of the third portion covering the first portion is smaller than the thickness of the fourth portion covering the second portion. A method for manufacturing an electronic component, comprising: A provisional drying step of drying a part of the first paste electrode layer;
In the application step of the first conductive paste, the first portion has a protruding mountain shape, and includes a first region including the first portion and a second region including the ridge portion. Forming the first paste electrode layer;
In the provisional drying step, the first paste electrode layer is dried until the first region is undried and the second region is in a dried state.
The second paste electrode layer is formed by immersing the first paste electrode layer in the temporarily dried state in a conductive paste in the applying step of the second conductive paste. 1. A method for producing an electronic component according to 1.   In the application step of the second conductive paste, the thickness of the third portion of the second paste electrode layer is thinner than the thickness of the first portion of the first paste electrode layer, The second paste electrode layer is formed so that a thickness of the fourth portion of the paste electrode layer is larger than a thickness of the second portion of the first paste electrode layer. Item 3. A method for manufacturing an electronic component according to Item 1 or 2.   The method of manufacturing an electronic component according to claim 1, further comprising a blotting step of pressing a portion covering the first surface of the first paste electrode layer against a flat surface.   After forming the electrode layer on the first surface, the first surface side of the chip body to form an electrode layer on the third surface of the chip body facing the first surface. A holding step of holding the substrate by means of a holding tool, wherein in the holding step, the portion of the electrode layer formed on the first surface that covers the first surface and the adhesive surface of the holder are adhered. The method of manufacturing an electronic component according to claim 1, wherein the chip body is held by the method.

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