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JP2009032949A - Ic chip, and method of mounting ic chip - Google Patents

Ic chip, and method of mounting ic chip Download PDF

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JP2009032949A
JP2009032949A JP2007196084A JP2007196084A JP2009032949A JP 2009032949 A JP2009032949 A JP 2009032949A JP 2007196084 A JP2007196084 A JP 2007196084A JP 2007196084 A JP2007196084 A JP 2007196084A JP 2009032949 A JP2009032949 A JP 2009032949A
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chip
mounting
connection
height
mounting terminals
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JP4990711B2 (en
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Misao Konishi
美佐夫 小西
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Dexerials Corp
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Sony Chemical and Information Device Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a technique of connecting an IC chip using an anisotropic conductive adhesive, which can prevent a connection failure and improve conduction reliability. <P>SOLUTION: The IC chip has a plurality of mounting terminals 3, 4 as connection terminals on a chip body 2 and is mounted using an anisotropic conductive adhesive. Of the mounting terminals 3, 4, the mounting terminals 4 in previously specified regions are height-difference mounting terminals 4 each in which the height of a connection portion is different in a certain bump and a top portion 4a of the mounting terminal 4 is higher than the other mounting terminals 3. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

本発明は、接続端子としてバンプを有するICチップ、及びICチップを用いた実装方法に関する。   The present invention relates to an IC chip having bumps as connection terminals, and a mounting method using the IC chip.

従来より、例えば液晶表示装置等の配線(ガラス)基板上にICチップを実装する手段として、異方導電性接着フィルムが用いられている(例えば、特許文献1参照)。   Conventionally, for example, an anisotropic conductive adhesive film has been used as means for mounting an IC chip on a wiring (glass) substrate such as a liquid crystal display device (see, for example, Patent Document 1).

この異方導電性接着フィルムを用いてICチップの実装を行うには、ICチップの接続端子(バンプ)と配線基部の電極端子との間に異方導電性接着フィルムを介在させ、熱圧着ヘッドによってICチップを加熱するとともに押圧することによって熱圧着を行う。   In order to mount an IC chip using this anisotropic conductive adhesive film, an anisotropic conductive adhesive film is interposed between the connection terminal (bump) of the IC chip and the electrode terminal of the wiring base, and the thermocompression bonding head. The IC chip is heated and pressed by thermocompression bonding.

しかし、従来、ICチップに設けられたバンプのうち、特定のバンプに関して接続不良が生ずる場合がある。   However, conventionally, a connection failure may occur with respect to a specific bump among the bumps provided on the IC chip.

例えば、図7(a)に示すように、ICチップ101のチップ本体102縁部に設けられたバンプ103、104のうち、短辺側に設けられたバンプ(楕円A、B内)に接続不良が生ずる場合がある。   For example, as shown in FIG. 7 (a), poor connection between the bumps 103 and 104 provided on the edge of the chip body 102 of the IC chip 101 (within ellipses A and B) provided on the short side. May occur.

また、図7(b)に示すように、ICチップ201のチップ本体202長辺部に設けられたバンプ203〜205のうち、一方の長辺側においてバンプが千鳥状に設けられたICチップ201にあっては、外側のバンプ204(楕円C内)に接続不良が生ずる場合がある。   Further, as shown in FIG. 7B, among the bumps 203 to 205 provided on the long side portion of the chip body 202 of the IC chip 201, the IC chip 201 in which the bumps are provided in a staggered manner on one long side. In such a case, connection failure may occur in the outer bump 204 (in the ellipse C).

さらに、近年、ICチップのバンプの接続面形状が細長いものがあり、そのようなバンプにおいては、チップ縁部の近傍の部分において接続不良が生ずる場合もある。
特開平8−7658号公報
Further, in recent years, there is a long and narrow shape of the connection surface of the bump of the IC chip. In such a bump, a connection failure may occur in the vicinity of the chip edge.
JP-A-8-7658

本発明は、このような従来技術の課題を解決するためになされたもので、接続不良が発生せず導通信頼性を向上させることが可能な異方導電性接着剤を用いたICチップの接続技術を提供することを目的とする。   The present invention has been made to solve the above-described problems of the prior art, and it is possible to connect an IC chip using an anisotropic conductive adhesive capable of improving conduction reliability without causing a connection failure. The purpose is to provide technology.

上記目的を達成するためになされた請求項1記載の発明は、接続電極としてチップ本体に複数のバンプを有し、異方導電性接着剤によって実装されるICチップであって、前記複数のバンプのうち、予め特定された領域のバンプについて、一つのバンプ内において接続部の高さが異なり、かつ、当該バンプの頂部が他のバンプの高さより高い高低差バンプを有するものである。
請求項2記載の発明は、請求項1記載の発明において、前記複数のバンプが長方形状の接続側面の縁部に設けられ、当該複数のバンプのうち、前記高低差バンプが、前記接続側面の長辺側縁部に配置されているものである。
請求項3記載の発明は、請求項1記載の発明において、前記複数のバンプが接続側面の縁部に沿って複数の列状に設けられ、当該複数列のバンプのうち、前記高低差バンプが、当該接続側面の縁部外側に配置されているものである。
請求項4記載の発明は、請求項1乃至3のいずれか1項記載の発明において、前記予め特定された領域の実装端子について、一つの実装端子内における接続部の高さの差が、使用する異方導電性接着剤の導電粒子の粒径の5%〜95%であるものである。
請求項5記載の発明は、所定の接続電極が形成された配線基板と、請求項1乃至4のいずれか1項記載のICチップとの間に異方導電性接着剤を配置し、加熱及び加圧を行うことにより、前記配線基板と前記ICチップを接着するとともに当該電極同士を電気的に接続する工程を有するICチップの実装方法である。
In order to achieve the above object, an invention according to claim 1 is an IC chip having a plurality of bumps on a chip body as connection electrodes and mounted by an anisotropic conductive adhesive, wherein the plurality of bumps Among the bumps in the region specified in advance, the height of the connection portion is different in one bump, and the top of the bump has a height difference bump higher than the height of the other bump.
The invention according to claim 2 is the invention according to claim 1, wherein the plurality of bumps are provided at an edge of a rectangular connection side surface, and the height difference bumps of the plurality of bumps are formed on the connection side surface. It is arranged at the long side edge.
The invention according to claim 3 is the invention according to claim 1, wherein the plurality of bumps are provided in a plurality of rows along the edge of the connection side surface, and the height difference bumps of the plurality of rows of bumps are , Is arranged outside the edge of the connection side surface.
According to a fourth aspect of the present invention, in the invention according to any one of the first to third aspects, a difference in height of a connection portion in one mounting terminal is used for the mounting terminal in the predetermined area. It is 5% to 95% of the particle size of the conductive particles of the anisotropic conductive adhesive.
According to a fifth aspect of the present invention, an anisotropic conductive adhesive is disposed between a wiring board on which a predetermined connection electrode is formed and the IC chip according to any one of the first to fourth aspects, and heating and An IC chip mounting method including a step of bonding the wiring substrate and the IC chip by applying pressure and electrically connecting the electrodes to each other.

本発明の場合、接続電極としてチップ本体に設けられた複数の実装端子のうち、予め特定された領域(例えば、長方形状の接続側面の短辺側縁部領域や、接続側面の縁部に沿って実装端子が複数の列状に設けられた場合の縁部外側領域)の実装端子について、一つの実装端子内において接続部の高さが異なり、かつ、当該実装端子の頂部が他の実装端子の高さより高い高低差実装端子を有することから、異方導電性接着剤を用いて熱圧着を行った場合に、従来技術ではつぶれ状態が不十分であった特定の導電粒子を十分に圧縮することができる。
その結果、本発明によれば、各実装端子上における導電粒子の圧縮状態を均一にすることができるので、種々のタイプのICチップにおいて、導通信頼性を向上させることができる。
特に、本発明によれば、径の大きな導電粒子を用いることなく、また実装端子の接続面形状が細長い場合であっても、導通信頼性を向上させることができるので、ファインピッチのバンプ状実装端子を有するICチップに有用となるものである。
In the case of the present invention, among a plurality of mounting terminals provided on the chip body as connection electrodes, a region specified in advance (for example, along the short-side edge region of the rectangular connection side surface or the edge of the connection side surface) For the mounting terminals in the outer edge area when the mounting terminals are arranged in a plurality of rows), the height of the connection portion is different within one mounting terminal, and the top of the mounting terminal is the other mounting terminal Because it has a height difference mounting terminal that is higher than the height, when conducting thermocompression bonding using an anisotropic conductive adhesive, it compresses sufficiently certain conductive particles that were insufficiently crushed by the prior art be able to.
As a result, according to the present invention, since the compression state of the conductive particles on each mounting terminal can be made uniform, the conduction reliability can be improved in various types of IC chips.
In particular, according to the present invention, it is possible to improve the conduction reliability without using conductive particles having a large diameter, and even when the connecting surface shape of the mounting terminal is elongated, so that fine pitch bump-shaped mounting is possible. This is useful for an IC chip having a terminal.

本発明によれば、接続不良が発生せず導通信頼性を向上させることができる異方導電性接着剤を用いたICチップの接続技術を提供することができる。   ADVANTAGE OF THE INVENTION According to this invention, the connection technique of the IC chip using the anisotropic conductive adhesive which can improve conduction | electrical_connection reliability without generating a connection failure can be provided.

以下、本発明に係るICチップ及びICチップの実装方法の好ましい形態について図面を用いて説明する。   Hereinafter, preferred embodiments of an IC chip and an IC chip mounting method according to the present invention will be described with reference to the drawings.

なお、後述するように、本発明に用いる異方導電性接着剤7は、絶縁性接着剤樹脂8中に導電粒子9が分散されているものであるが、その態様としては、ペースト状又はフィルム状のいずれにも適用することができる。   As will be described later, the anisotropic conductive adhesive 7 used in the present invention is one in which conductive particles 9 are dispersed in an insulating adhesive resin 8. It can be applied to any of the shapes.

図1(a)(b)は、本発明に係るICチップの実施の形態を示す概略図で、図1(a)は平面図、図1(b)は正面図である。また、図2(a)(b)及び図3(a)(b)は、本発明の原理を示す説明図である。   1A and 1B are schematic views showing an embodiment of an IC chip according to the present invention. FIG. 1A is a plan view and FIG. 1B is a front view. FIGS. 2A and 2B and FIGS. 3A and 3B are explanatory views showing the principle of the present invention.

図1(a)(b)に示すように、本実施の形態のICチップ1は、例えば、COG(Cip On Glass)方式に用いられるもので、長方体形状のチップ本体2を有し、その接続側面2aが長方形形状に形成されている。   As shown in FIGS. 1A and 1B, an IC chip 1 according to the present embodiment is used, for example, in a COG (Cip On Glass) system, and has a rectangular parallelepiped chip body 2. The connecting side surface 2a is formed in a rectangular shape.

ICチップ1の接続側面2aの縁部(長辺及び短辺)には、接続電極として、以下のようなバンプを用いた実装端子3、4が、所定のピッチをおいて複数個設けられている。なお、実装端子3、4は、その平面形状が長方形形状で、その短辺側がICチップ1の接続側面2aの縁部に対向するように配置されている。   On the edge (long side and short side) of the connection side surface 2a of the IC chip 1, a plurality of mounting terminals 3 and 4 using bumps as below are provided as connection electrodes at a predetermined pitch. Yes. The mounting terminals 3 and 4 are arranged such that the planar shape thereof is a rectangular shape and the short side thereof faces the edge of the connection side surface 2 a of the IC chip 1.

本実施の形態の場合、実装端子3、4は、それぞれパターン状のAl(アルミニウム)からなる電極部上に、Au(金)からなるバンプを形成することにより構成されている。   In the case of the present embodiment, the mounting terminals 3 and 4 are each formed by forming a bump made of Au (gold) on a patterned electrode part made of Al (aluminum).

ここで、Al電極部上にAuバンプを形成するには、例えば以下に説明する公知のめっき法(例えば特許2936680号公報参照)を用いることができる。
すなわち、めっき法では、Al配線(電極部)と絶縁膜が形成されたSi基板を用意し、この絶縁膜にAl配線を外部に接続するための開孔を形成し、その全面にTi(チタン)をスパッタしてTi膜を形成し、Pd(パラジウム)をスパッタしてPd膜を形成する。次いで、その上にレジストを被着しこれをパターニングすることによって、Auバンプ形成用の開孔を有するレジストマスクを形成する。
さらに、前述の開孔からPd膜の上にAuめっきを施してAuめっき層を形成し、その後、前述のレジストマスクを除去し、さらに金めっき層をマスクにしてPd膜とTi膜をエッチングする。これによりAl電極部上に形成されたAuバンプを得る。
Here, in order to form the Au bump on the Al electrode portion, for example, a known plating method described below (see, for example, Japanese Patent No. 2936680) can be used.
That is, in the plating method, an Si substrate on which an Al wiring (electrode part) and an insulating film are formed is prepared, an opening for connecting the Al wiring to the outside is formed in the insulating film, and Ti (titanium) is formed on the entire surface. ) Is sputtered to form a Ti film, and Pd (palladium) is sputtered to form a Pd film. Next, a resist is deposited thereon and patterned to form a resist mask having openings for forming Au bumps.
Further, Au plating is performed on the Pd film from the above-mentioned openings to form an Au plating layer, and then the above-described resist mask is removed, and the Pd film and Ti film are etched using the gold plating layer as a mask. . As a result, an Au bump formed on the Al electrode portion is obtained.

本発明では、複数の実装端子3、4のうち、予め特定された領域の実装端子について、一つの実装端子内において接続部の高さが異なり、かつ、当該実装端子の頂部が他の実装端子の高さより高くされている。   In the present invention, among the plurality of mounting terminals 3 and 4, for the mounting terminals in the region specified in advance, the height of the connection portion is different in one mounting terminal, and the top of the mounting terminal is another mounting terminal. It is higher than the height.

本実施の形態においては、図1(a)(b)に示すように、ICチップ1の接続側面2aの短辺側縁部(楕円A,Bで示す領域)に設けられた実装端子4は、一つの実装端子内において接続部の高さが異なり、かつ、当該実装端子の頂部4aが長辺側縁部の実装端子3の高さより高くなるように構成されている(以下「高低差実装端子」という)。   In the present embodiment, as shown in FIGS. 1A and 1B, the mounting terminals 4 provided on the short side edge portions (areas indicated by ellipses A and B) of the connection side surface 2a of the IC chip 1 are The height of the connecting portion is different in one mounting terminal, and the top portion 4a of the mounting terminal is configured to be higher than the height of the mounting terminal 3 on the long side edge (hereinafter referred to as “height difference mounting”). Terminal ").

本発明の場合、ICチップ1の短辺側縁部の高低差実装端子4の頂部4aの高さを長辺側縁部の実装端子3の高さより高くする方法は、特に限定されることはないが、製造工程の簡易さの観点からは、当初高低差実装端子4を厚く形成しておき、頂部4aを形成する領域以外の領域のバンプ表層部分をエッチング等によって除去してその領域の高さを低くすることが好ましい。   In the case of the present invention, the method of making the height of the top 4a of the height difference mounting terminal 4 on the short side edge of the IC chip 1 higher than the height of the mounting terminal 3 on the long side edge is particularly limited. However, from the viewpoint of the simplicity of the manufacturing process, the height difference mounting terminal 4 is initially formed thick, and the bump surface layer portion other than the region where the top portion 4a is formed is removed by etching or the like to increase the height of the region. It is preferable to reduce the thickness.

この場合、例えば、図3(b)に示すように、ICチップ1の接続側面2a上にパッシベーション膜21を形成した後、Al電極部20上に、上記方法によって、バンプ部40を形成し、さらに、その表層部分をエッチングによって部分的に低くする(符号4bにより示す領域)。   In this case, for example, as shown in FIG. 3B, after forming the passivation film 21 on the connection side surface 2a of the IC chip 1, the bump part 40 is formed on the Al electrode part 20 by the above method, Further, the surface layer portion is partially lowered by etching (region indicated by reference numeral 4b).

これにより、一つの実装端子内において接続部の高さが異なり、かつ、当該実装端子の頂部4aが長辺側縁部の実装端子3の高さより高くなるように構成された高低差実装端子4を有するICチップ1が得られる。   Thereby, the height of the connecting portion is different within one mounting terminal, and the height difference mounting terminal 4 is configured such that the top portion 4a of the mounting terminal is higher than the height of the mounting terminal 3 at the long side edge. An IC chip 1 having the following is obtained.

本発明の場合、高低差実装端子4において頂部4aを設ける位置は特に限定されることはないが、導電粒子9の圧縮率をより確実に高める観点からは、高低差実装端子4の、ICチップ1の接続側面2aの(短)縁部に近い部分に頂部4aを設けることが好ましい。   In the case of the present invention, the position where the top portion 4a is provided in the height difference mounting terminal 4 is not particularly limited, but from the viewpoint of more reliably increasing the compression rate of the conductive particles 9, the IC chip of the height difference mounting terminal 4 is provided. It is preferable to provide the top part 4a in the part close | similar to the (short) edge part of the 1 connection side surface 2a.

以下、本発明の原理を図2(a)(b)及び図3(a)(b)を用いて説明する。
ここでは、接続電極13、14が設けられた配線基板11上に、ICチップ1を実装する場合を考える。配線基板11の接続電極13、14は、ICチップ1の実装端子3、高低差実装端子4にそれぞれ対応するものである。
The principle of the present invention will be described below with reference to FIGS. 2 (a) and 2 (b) and FIGS. 3 (a) and 3 (b).
Here, consider a case where the IC chip 1 is mounted on the wiring substrate 11 provided with the connection electrodes 13 and 14. The connection electrodes 13 and 14 of the wiring board 11 correspond to the mounting terminal 3 and the height difference mounting terminal 4 of the IC chip 1, respectively.

ICチップ1の実装時には、図2(a)に示すように、配線基板11とICチップ1との間に、異方導電性接着剤7を配置して熱圧着を行うが、その際、ICチップ1側から加熱及び加圧を行う。   When the IC chip 1 is mounted, as shown in FIG. 2A, the anisotropic conductive adhesive 7 is disposed between the wiring substrate 11 and the IC chip 1 and thermocompression bonding is performed. Heating and pressing are performed from the chip 1 side.

この場合、ICチップ1の到達温度は200〜250℃程度となるが、配線基板11側の到達温度は100〜150℃程度とICチップ1に比べて低いため、加熱時にはICチップ1の方が延びた状態となっている。このため、実装後、冷却の際にICチップ1のチップ本体2の収縮が大きく、例えば、図2(b)に示すように、配線基板11よりICチップ1の反りが大きくなり、結果として、実装部分全体に反りが発生する。   In this case, the reached temperature of the IC chip 1 is about 200 to 250 ° C., but the reached temperature on the wiring board 11 side is about 100 to 150 ° C., which is lower than that of the IC chip 1. It is in an extended state. For this reason, the shrinkage of the chip body 2 of the IC chip 1 is large after cooling after mounting, for example, as shown in FIG. 2B, the warp of the IC chip 1 becomes larger than the wiring substrate 11, and as a result, Warpage occurs in the entire mounting part.

この状態では、ICチップ1の接続側面2aの縁部のうち短辺側縁部2bに応力が加わりやすいので、図3(a)に示すように、異方導電性接着剤7の導電粒子9に対する押圧力、特に短辺側縁部2bに最も近い領域の導電粒子9bが接続側面2a内方側の領域の導電粒子9に比べて小さく、導電粒子9bの変形(圧縮)率が不足する傾向にある。   In this state, stress is easily applied to the short side edge 2b of the edges of the connection side surface 2a of the IC chip 1, so that the conductive particles 9 of the anisotropic conductive adhesive 7 as shown in FIG. The conductive particles 9b in the region closest to the short side edge 2b are smaller than the conductive particles 9 in the region on the inner side of the connecting side surface 2a, and the deformation (compression) rate of the conductive particles 9b tends to be insufficient. It is in.

そこで、例えば、図3(b)に示すように、ICチップ1の接続側面2aの短辺側縁部2bにおいて、上述した頂部4aを有する高低差実装端子4を設け、この頂部4aの高さを、接続側面2aの長辺側縁部に設けられた実装端子3の高さより高くすることにより、ICチップ1の短辺側縁部の高低差実装端子4において導電粒子9に対して均一の力で押圧して圧縮率を均一にすることができる。そして、その結果、ICチップ1の接続側面2aの各縁部における導電粒子9の圧縮率を均一にすることができる。   Therefore, for example, as shown in FIG. 3B, the height difference mounting terminal 4 having the above-described top portion 4a is provided on the short side edge portion 2b of the connection side surface 2a of the IC chip 1, and the height of the top portion 4a is provided. Is higher than the height of the mounting terminal 3 provided at the long side edge of the connection side surface 2a, so that the height difference mounting terminal 4 at the short side edge of the IC chip 1 is uniform with respect to the conductive particles 9. The compression rate can be made uniform by pressing with force. As a result, the compressibility of the conductive particles 9 at each edge of the connection side surface 2a of the IC chip 1 can be made uniform.

図4(a)(b)、図5(a)(b)及び図6(a)(b)は、本発明の他の実施の形態を示すものであり、以下、上記実施の形態と同一の部分については同一の符号を付しその詳細な説明を省略する。   4 (a) (b), FIG. 5 (a) (b) and FIG. 6 (a) (b) show other embodiments of the present invention. These parts are denoted by the same reference numerals, and detailed description thereof is omitted.

図4(a)(b)に示すように、本実施の形態のICチップ1Aは、チップ本体2の接続側面2aの長辺側縁部に、接続電極としての実装端子3、4A、5が設けられているものである。
すなわち、本実施の形態では、ICチップ1Aの接続側面2aの長辺側縁部の一方において、この長辺側縁部に沿って2列の実装端子4A、5が千鳥状に配列されている。
As shown in FIGS. 4A and 4B, the IC chip 1A according to the present embodiment has mounting terminals 3, 4A, and 5 as connection electrodes on the long side edge of the connection side surface 2a of the chip body 2. It is provided.
That is, in this embodiment, two rows of mounting terminals 4A and 5 are arranged in a staggered pattern along one long side edge of the connection side surface 2a of the IC chip 1A. .

そして、ICチップ1Aの接続側面2aの一方の長辺側縁部外側(楕円Cで示す領域)に、上述した高低差実装端子4Aが設けられている。すなわち、この高低差実装端子4Aは、一つの実装端子内において接続部の高さが異なり、かつ、当該実装端子の頂部4aが長辺側縁部の実装端子3の高さより高くなるように構成されている。   Then, the above-described height difference mounting terminal 4A is provided on the outer side of one long side of the connection side surface 2a of the IC chip 1A (region indicated by an ellipse C). That is, the height difference mounting terminal 4A is configured such that the height of the connection portion is different in one mounting terminal, and the top portion 4a of the mounting terminal is higher than the height of the mounting terminal 3 on the long side edge. Has been.

この場合、高低差実装端子4Aの頂部4aは、ICチップ1Aの接続側面2aの長縁部に近い部分に設けられている。また、高低差実装端子4Aに頂部4aを設ける方法は、上記実施の形態と同様の方法を採用することができる。   In this case, the top portion 4a of the height difference mounting terminal 4A is provided in a portion near the long edge portion of the connection side surface 2a of the IC chip 1A. Moreover, the method similar to the said embodiment can be employ | adopted for the method of providing the top part 4a in the elevation difference mounting terminal 4A.

なお、本実施の形態の場合、ICチップ1Aの接続側面2aの短辺側縁部には、実装端子は設けられていない。   In the case of the present embodiment, no mounting terminal is provided on the short side edge of the connection side surface 2a of the IC chip 1A.

本実施の形態において、ICチップ1Aの実装時にICチップ1A側から加熱及び加圧を行うと、図5(b)に示すように、チップ本体2の中央部分が長辺側縁部と比較して沈み込む傾向がある。   In the present embodiment, when heating and pressurization are performed from the IC chip 1A side when the IC chip 1A is mounted, the center portion of the chip body 2 is compared with the long side edge as shown in FIG. Tend to sink.

このため、ICチップ1Aの実装後において、チップ本体2の中央部分と長辺側縁部との高さに差が生ずる。この差は、2列の実装端子4A、5が設けられた側の長辺側縁部において、特に大きくなる(数μm程度)。   For this reason, after mounting the IC chip 1A, a difference occurs in the height between the central portion of the chip body 2 and the long side edge. This difference is particularly large (about several μm) at the long side edge on the side where the two rows of mounting terminals 4A and 5 are provided.

その結果、この長辺側縁部外側の実装端子4Aの導電粒子9に対する押圧力が、他の領域の導電粒子9に比べて小さくなり、図6(a)に示すように、特に長辺側縁部2cに最も近い領域の導電粒子9cの変形(圧縮)率が不足する傾向にある。   As a result, the pressing force against the conductive particles 9 of the mounting terminals 4A outside the long side edge is smaller than that of the conductive particles 9 in other regions, and as shown in FIG. The deformation (compression) rate of the conductive particles 9c in the region closest to the edge 2c tends to be insufficient.

そこで、ICチップ1Aの接続側面2aの長辺側縁部2c外側における実装端子として、上述した頂部4aを有する高低差実装端子4Aを設け、この頂部4aの高さを、接続側面2aの長辺側縁部2c内側の実装端子3の高さより高くすることにより(図6(b)参照)、上記実施の形態と同様に、ICチップ1Aの縁部の各部分において導電粒子9に対して均一の力で押圧して圧縮率を均一にすることができる。   Therefore, the height difference mounting terminal 4A having the top 4a is provided as a mounting terminal outside the long side edge 2c of the connection side 2a of the IC chip 1A, and the height of the top 4a is set to the long side of the connection side 2a. By making it higher than the height of the mounting terminal 3 inside the side edge portion 2c (see FIG. 6B), it is uniform with respect to the conductive particles 9 in each portion of the edge portion of the IC chip 1A as in the above embodiment. The compression rate can be made uniform by pressing with the force of.

なお、本発明は上述の実施の形態に限られることなく、種々の変更を行うことができる。
例えば、頂部を有する高低差実装端子については、上述の実施の形態のように接続側面の縁部(短辺部又は長辺辺部)に配列されたものの全部には限られず、一部の実装端子であってもよい。
The present invention is not limited to the above-described embodiment, and various changes can be made.
For example, the height difference mounting terminal having the top portion is not limited to all of the elements arranged on the edge (short side portion or long side portion) of the connection side surface as in the above-described embodiment, but part of the mounting It may be a terminal.

この場合、チップ本体の接続側面の隅部分に高低差実装端子を設けるなどICチップに応じて種々の変更を行うことができる。   In this case, various changes can be made according to the IC chip, such as providing height difference mounting terminals at the corners of the connection side surface of the chip body.

また、高低差実装端子の頂部の形状、高さ等については、使用するICチップの大きさ形状に応じて適宜変更することができる。   Further, the shape and height of the top of the height difference mounting terminal can be appropriately changed according to the size and shape of the IC chip to be used.

また、高低差実装端子に頂部を設ける方法については、上述したように、当初電極部を厚く形成しておき、実装端子の高さを高くする領域以外の領域の電極部の表層部分をエッチング等によって除去してその領域の高さを低くする方法のほか、高低差実装端子の頂部を設ける部分について、電極部上に金属によるかさ上げ部を設けて多層化することもできる。   As for the method of providing the top portion on the height difference mounting terminal, as described above, the electrode portion is initially formed thick and the surface layer portion of the electrode portion in the region other than the region where the height of the mounting terminal is increased is etched. In addition to the method of removing the region by reducing the height of the region, the portion where the top portion of the height difference mounting terminal is provided can be multi-layered by providing a metal raised portion on the electrode portion.

この場合、かさ上げ部の形成方法としては、例えば、アルミニウムを用いたスパッタリング法を採用することができる。   In this case, as a method for forming the raised portion, for example, a sputtering method using aluminum can be employed.

さらに、本発明は、上記実施の形態のタイプのICチップのみならず、種々のタイプのICチップに適用することができるものである。   Furthermore, the present invention can be applied not only to the IC chip of the above embodiment type but also to various types of IC chips.

(a):本発明に係るICチップの実施の形態を外観構成を示す概略平面図である。(b):同ICチップの外観構成を示す概略正面図である。(A): It is a schematic plan view which shows external appearance structure of embodiment of the IC chip concerning this invention. (B): It is a schematic front view which shows the external appearance structure of the IC chip. (a)(b):本発明の原理を示す説明図である。(A) (b): It is explanatory drawing which shows the principle of this invention. (a)(b):本発明の原理を示す説明図である。(A) (b): It is explanatory drawing which shows the principle of this invention. (a):本発明に係るICチップの他の実施の形態を外観構成を示す概略平面図である。(b):同ICチップの外観構成を示す概略側面図である。(A): It is a schematic plan view which shows external appearance structure of other embodiment of IC chip based on this invention. (B): It is a schematic side view which shows the external appearance structure of the IC chip. (a)(b):本発明の原理を示す説明図である。(A) (b): It is explanatory drawing which shows the principle of this invention. (a)(b):本発明の原理を示す説明図である。(A) (b): It is explanatory drawing which shows the principle of this invention. (a):従来例に係るICチップの外観構成を示す概略平面図である。(b):他の従来例に係るICチップの外観構成を示す概略平面図である。(A): It is a schematic plan view which shows the external appearance structure of the IC chip which concerns on a prior art example. (B): It is a schematic plan view which shows the external appearance structure of the IC chip based on another prior art example.

符号の説明Explanation of symbols

1 ICチップ
2 チップ本体
2a 接続側面
2b 短辺側縁部
3 実装端子
4 高低差実装端子
4a 頂部
7 異方導電性接着剤
9 導電粒子
DESCRIPTION OF SYMBOLS 1 IC chip 2 Chip body 2a Connection side surface 2b Short side edge part 3 Mounting terminal 4 Height difference mounting terminal 4a Top part 7 Anisotropic conductive adhesive 9 Conductive particle

Claims (5)

接続電極としてチップ本体に複数の実装端子を有し、異方導電性接着剤によって実装されるICチップであって、
前記複数の実装端子のうち、予め特定された領域の実装端子について、一つの実装端子内において接続部の高さが異なり、かつ、当該実装端子の頂部が他の実装端子の高さより高い高低差実装端子を有するICチップ。
An IC chip having a plurality of mounting terminals on the chip body as connection electrodes and mounted by an anisotropic conductive adhesive,
Among the plurality of mounting terminals, for the mounting terminals in a predetermined area, the height of the connection portion is different in one mounting terminal, and the height difference between the tops of the mounting terminals is higher than the heights of the other mounting terminals. IC chip having mounting terminals.
前記複数の実装端子が長方形状の接続側面の縁部に設けられ、当該複数の実装端子のうち、前記高低差実装端子が、前記接続側面の長辺側縁部に配置されている請求項1記載のICチップ。   The plurality of mounting terminals are provided at an edge of a rectangular connection side surface, and the height difference mounting terminal is disposed at an edge of a long side of the connection side among the plurality of mounting terminals. The IC chip described. 前記複数の実装端子が接続側面の縁部に沿って複数の列状に設けられ、当該複数列の実装端子のうち、前記高低差実装端子が、当該接続側面の縁部外側に配置されている請求項1記載のICチップ。   The plurality of mounting terminals are provided in a plurality of rows along the edge of the connection side surface, and the height difference mounting terminal is disposed outside the edge of the connection side surface among the plurality of rows of mounting terminals. The IC chip according to claim 1. 前記予め特定された領域の実装端子について、一つの実装端子内における接続部の高さの差が、使用する異方導電性接着剤の導電粒子の粒径の5%〜95%である請求項1乃至3のいずれか1項記載のICチップ。   The mounting terminal in the region specified in advance has a difference in height of a connecting portion in one mounting terminal of 5% to 95% of a particle size of conductive particles of an anisotropic conductive adhesive to be used. The IC chip according to any one of 1 to 3. 所定の接続電極が形成された配線基板と、請求項1乃至4のいずれか1項記載のICチップとの間に異方導電性接着剤を配置し、
加熱及び加圧を行うことにより、前記配線基板と前記ICチップを接着するとともに当該電極同士を電気的に接続する工程を有するICチップの実装方法。
An anisotropic conductive adhesive is disposed between the wiring board on which the predetermined connection electrode is formed and the IC chip according to any one of claims 1 to 4,
An IC chip mounting method including a step of bonding the wiring board and the IC chip and electrically connecting the electrodes by heating and pressing.
JP2007196084A 2007-07-27 2007-07-27 IC chip manufacturing method and IC chip mounting method Expired - Fee Related JP4990711B2 (en)

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