JP2009051678A - Method for manufacturing sapphire substrate - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method of a sapphire substrate with a small amount of warpage. <P>SOLUTION: In the manufacturing method of the sapphire substrate, the sapphire substrate is prepared by lapping a surface of a wafer prepared by cutting a sapphire single crystal, wherein annealing is carried out before, after or during the lapping. Preferably, annealing is carried out at a temperature of 1,200-1,650°C with a holding time of at least 3 hr. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a sapphire substrate, and in particular, grows a compound semiconductor of a group 3-5 element, a nitride compound semiconductor such as gallium nitride (GaN) on a sapphire substrate, and a light emitting diode (LED), a laser diode ( The present invention relates to a method for manufacturing a sapphire substrate used to obtain devices such as LD) and transistors (FET).

  Conventionally, as a process for processing from a sapphire single crystal ingot to a wafer-shaped substrate, a series of processes of ingot cylindrical grinding, orientation flat processing, wafer slicing, wafer peripheral grinding, surface grinding, surface finishing and cleaning are performed. It will be a thing.

  First, in the cylindrical grinding process of the ingot, adjustment is performed so that the diameter of the single crystal becomes the required outer diameter of the wafer. Next, in the orientation flat processing step, a notched shape such as an orientation flat used for identifying the crystal orientation and the front and back of the wafer is formed on the cylindrically-ground ingot. In these processes, a grinding process using a diamond fixed grindstone is generally used.

  Next, in the wafer slicing step, a number of wafers having a desired thickness are cut out from the ingot.

  Thereafter, the sliced wafer is further processed in various ways. That is, the side surface of the wafer is processed into a desired shape in the wafer outer periphery grinding process. This process is called a beveling process, and has the effect of reducing wafer cracks and scratches from the wafer edge during wafer double-sided lapping and surface finishing. In addition, the epitaxial growth using this wafer as a substrate also prevents abnormal growth in the peripheral portion of the substrate, and also prevents cracking due to distortion due to temperature cycles and warpage in the device formation process. For example, in a processing process of a semiconductor such as GaAs having a high cleavage property and a low mechanical strength, an effect of preventing a decrease in yield is a large and indispensable step. However, sapphire, which has a very high hardness and a low cleaving ability, is often not beveled.

  Next, in the surface grinding process, processing accuracy such as wafer thickness adjustment, parallelism, and flatness is obtained. Here, an abrasive and a polishing method are selected according to the hardness of the substrate material, and high-precision processing is performed.

  Finally, a substrate having a clean surface state that is flat and free from strain and scratches, suitable for epitaxial growth of nitride semiconductors, is obtained by a surface finishing process and a cleaning process.

  In recent years, there has been a demand for a larger substrate diameter. However, as the substrate diameter increases, warpage that occurs in the sapphire substrate in the device fabrication process after epitaxial growth increases the number of defects in the substrate, and it is estimated that the yield will be greatly reduced. Has been. In other words, in epitaxial growth, the sapphire substrate is subjected to a combined force due to the warpage of the substrate itself and the warpage in the opposite direction due to the large difference in the thermal expansion coefficient between the substrate and the epitaxial film. This is because this power increases.

For this reason, as with substrates such as silicon and GaAs, the wafer side surface is ground to improve the wafer strength, and in the subsequent surface finishing process or epitaxial growth, the wafer cracks and the wafer edge It has been demanded to reduce scratches (see Patent Document 1).
JP-A-2005-255463

  The present invention has been made in view of the above problems, and an object of the present invention is to provide a method for manufacturing a sapphire substrate that does not cause cracking due to warpage in a device manufacturing process after epitaxial growth even when the substrate has a large diameter. .

  As a result of various studies to achieve the above object, the present inventor has found that the warpage of the sapphire substrate may be adjusted to a specific range, and has reached the present invention.

  That is, the present invention relates to a method of manufacturing a sapphire substrate comprising cylindrical grinding, orientation flat processing, wafer slicing, wafer peripheral grinding, surface grinding, surface finishing and cleaning process steps of a sapphire single crystal ingot. It is provided before or after the process, or an annealing process is provided during the surface grinding process, and then the surface finishing process is entered.

  And in the said surface grinding process, the average surface roughness after this process shall be 0.9 micrometer or less. For this purpose, the abrasive grains to be used are selected in the range of average grain size # 240-320. If a count smaller than # 240 is used, the lap rate is low and the productivity is poor. Moreover, if a count larger than # 320 is used, a required substrate having a roughness of 0.9 μm or less cannot be obtained. Therefore, by performing lapping under these conditions, it is possible to obtain a substrate with uniform surface roughness, a stable wrap rate, and less thickness variation.

  And the board | substrate whose curvature value is 7 micrometers or less is obtained by the said annealing process. Therefore, the annealing temperature is set to 1200 to 1650 ° C, preferably 1400 to 1650 ° C.

  This annealing step is performed in order to remove the work-affected layer on the substrate surface generated in the surface grinding step. The effect of removing the deteriorated layer is obtained from 1200 ° C., but if it is 1400 ° C. or less, the work affected layer that affects the warp cannot be sufficiently removed. Further, up to about 1650 ° C., the warpage is reduced due to the effect of removing the deteriorated layer, but there is a tendency for crystal defects to increase. Accordingly, when a substrate with a small amount of warpage is required without causing crystal defects, annealing is preferably performed up to about 1650 ° C. When the annealing temperature exceeds 1650 ° C., a further effect of removing the work-affected layer is hardly obtained, and only increases the energy cost. Further, the holding time may be a time (preferably 3 hours or more) at which the entire substrate becomes equal to a desired temperature within the above range.

Note that the annealing step may be performed either before or after the surface grinding step, so that the effect of reducing the work-affected layer can be obtained, and a wafer having a warp amount of 7 μm or less can be obtained.
According to the present invention, it is possible to stably mass-produce a sapphire substrate having a warp amount of 7 μm or less. In addition, defects such as cracks and scratches caused by warpage occurring in the substrate in a device process using the substrate manufactured according to the present invention, for example, a device process after epitaxial growth, are reduced, leading to stabilization of the process and improvement of yield.

  The annealing process to suppress the amount of warpage before or after surface grinding is performed to maintain the roughness of the polished non-polished surface during surface grinding (lapping) and to remove the work-affected layer that was received during lapping. Do. The effect of removing the deteriorated layer is obtained from 1200 ° C., but if it is 1400 ° C. or less, the work-affected layer that affects the warp cannot be sufficiently removed. Further, up to about 1650 ° C., the warpage is reduced due to the effect of removing the deteriorated layer, but there is a tendency that crystal defects increase. Accordingly, when a substrate with a small amount of warpage is required without causing crystal defects, annealing is preferably performed up to about 1650 ° C. When the annealing temperature exceeds 1650 ° C., a further effect of removing the work-affected layer is hardly obtained and only increases the energy cost. In addition, the holding time is a time required to make the entire substrate uniformly 1400 ° C.

  Double-sided lapping (surface grinding) performed before or after the annealing step is performed in the range of abrasive grain size # 240-320. If a count smaller than # 240 is used, the lap rate is low and the productivity is poor. Moreover, if a count larger than # 320 is used, a required substrate having a roughness of 0.9 μm or less cannot be obtained. Therefore, by performing lapping under these conditions (# 240 to # 320), it is possible to obtain a substrate with uniform surface roughness, a stable lapping rate, and a small thickness variation.

  In the substrate end face processing, it is considered that the warpage amount is not affected. For the purpose of removing the work-affected layer after lapping, diamond lapping using free diamond abrasive grains having an average particle diameter of about 2 μm is performed to remove about 25 μm of the polished surface. As described above, this is for a polished polished surface, and a polished non-polished surface cannot be processed.

  In addition, annealing can be performed from any step after the cutting (slicing) step, and the effect of reducing the work-affected layer can be obtained, and a wafer having a warp value of 7 μm or less can be obtained.

(Example 1)
As an example of the present invention, after cutting about Φ3 inch in diameter and warping amount of about 20 μm, a substrate of about 0.75 mmt is finished to a final finish of about 0.56 mmt. Examples of manufacturing the wafers are shown below.
1) The sapphire crystal whose outer periphery is ground is cut into thin pieces with an inner / outer peripheral blade cutter or a band saw and a wire saw. In order to adjust the thickness and surface roughness after cutting, double-sided lapping was performed using SiC free abrasive grains having a particle size range of about 20 to 100 μm, and about 139 μm was removed on both sides. At this time, the warpage amount is about 25 μm before lapping and about 10 μm after processing.
2) Thereafter, the end surface of the outer peripheral portion of the substrate is processed.
3) Annealing is performed after end face processing. When the annealing temperature was about 1500 ° C, the amount of warpage was about 5 µm. 4) After annealing, diamond lapping using free diamond abrasive grains with an average grain size of about 2 µm was performed to reduce the polished surface to about 25 μm is removed, and for the final finishing, polishing using colloidal silker having an average particle diameter of about 70 nm is performed to remove about 17 μm on one side.

  By these steps, it was possible to produce a wafer that maintained the surface roughness of the non-polished surface after lapping and suppressed the amount of warpage to about 5 μm.

In this example, annealing is performed before the lapping process, but even if it is added to the process after the lapping process, the effect of reducing the work-affected layer can be obtained, and a wafer with a warp value of 7 μm or less can be obtained. it can.
(Example 2)
When the sapphire substrate obtained in Example 1 was used as a substrate for growing a nitride semiconductor, it could be used almost without problems with few cracking defects. That is, in the epitaxial growth process, since the amount of warpage of the substrate according to the present invention is small, it is considered that the resultant force due to the thermal expansion coefficient between the substrate and the epitaxial film is suppressed and the effect of reducing cracks is obtained.

Claims (5)

  In a method for manufacturing a sapphire substrate, a single crystal of sapphire is cut to obtain a wafer, and the surface of the wafer is lapped to obtain a sapphire substrate. In the method for manufacturing a sapphire substrate, annealing is performed before or after lapping, or lapping is performed. A method for producing a sapphire substrate, which is performed during processing.   2. The method for manufacturing a sapphire substrate according to claim 1, wherein the annealing is performed at a temperature of 1200 [deg.] C. to 1650 [deg.] C. for at least 3 hours.   2. The sapphire substrate manufacturing method according to claim 1, wherein, as the lapping process, a first lapping process using SiC loose abrasive grains having a grain size of not more than a count # 240 and a SiC loose abrasive grains having a grain size of a count # 320 or more. And a second lapping process performed using a sapphire substrate.   2. The method for manufacturing a sapphire substrate according to claim 1, wherein after annealing, a lapping process using SiC free abrasive grains having an average particle diameter of about 40 [mu] m and a subsequent diamond wrapping process using free diamond abrasive grains having an average particle diameter of about 2 [mu] m are performed. And a method for manufacturing a sapphire substrate.   5. The method of manufacturing a sapphire substrate according to claim 4, wherein polishing using colloidal silker having an average particle diameter of about 70 nm is performed after the diamond wrapping.