JP2008289290A - Semiconductor integrated circuit device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To downsize a semiconductor integrated circuit device used for monitoring a secondary battery by reducing a test pad used for trimming. <P>SOLUTION: In probe inspection, a fuse 8 is not disconnected; an Lo signal is output from an inverter 23; and the data for trimming stored in a register 11 is output from a selector 12 to a decoder 13. A voltage reference circuit 14 generates the reference voltage based on a trimming signal decoded by the decoder 13. When the reference voltage is not a set value, new data for trimming is stored in the register 11 to adjust the reference voltage value until the reference voltage becomes the set value. After the trimming ends, the same data as the adjusted data for trimming is stored in a fuse unit 9 and the fuse 8 is disconnected. The inverter 23 outputs a Hi signal and the selector 12 outputs the data for trimming set in the fuse unit 9 to the decoder 13. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a technology for downsizing a semiconductor integrated circuit device, and more particularly to a technology effective for reducing the size of a semiconductor chip of a monitoring semiconductor integrated circuit device for monitoring a power source of a secondary battery.

  In recent years, secondary batteries such as lithium ion batteries have been widely used in portable electronic devices such as mobile phones. This type of secondary battery is provided with a monitoring semiconductor integrated circuit device with protection functions such as overcharge protection, overdischarge protection, and overcurrent protection to avoid dangers such as overcharge and overdischarge. It has been.

  The semiconductor integrated circuit device for monitoring is required to have high accuracy in order to maximize the performance of the secondary battery. To ensure this required accuracy, for example, the detection voltage is trimmed during probe inspection. ing.

  In order to set the monitoring semiconductor integrated circuit device to the trimming mode, the setting is performed by inputting a test signal through a test pad provided on a semiconductor chip of the monitoring semiconductor integrated circuit device.

As for the trimming test technology in this type of monitoring semiconductor integrated circuit device, a test fuse is provided, a test delay time reduction mode is realized in a test state in which a charge / discharge control circuit is evaluated, and a test time required for trimming is achieved. (See Patent Document 1).
JP 2005-229742 A

  However, the present inventors have found that the trimming mode setting technique in the monitoring semiconductor integrated circuit device as described above has the following problems.

  That is, a test pad must be provided on the semiconductor chip of the monitoring semiconductor integrated circuit device. Since the test pad is originally a small semiconductor chip, the area ratio occupied by the semiconductor chip is very large. .

  As a result, it is difficult to reduce the size of the semiconductor chip, and there is a problem that the size of the secondary battery package is also limited.

  An object of the present invention is to provide a technique capable of greatly reducing the size of a semiconductor integrated circuit device used for monitoring by reducing the number of test pads used for trimming setting.

  The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  Of the inventions disclosed in the present application, the outline of typical ones will be briefly described as follows.

  The present invention includes a first trimming data storage section that stores voltage correction trimming data in the trimming mode, a second trimming data storage section that stores voltage correction trimming data that has been adjusted by trimming, and trimming. A trimming mode setting signal that outputs a trimming mode setting signal that outputs a trimming mode release signal indicating that the trimming mode has ended when trimming is completed, and a trimming mode setting signal is output from the trimming mode setting unit. When output, the trimming data for voltage correction stored in the first trimming data storage unit is selected and output, and when the trimming mode release signal is output from the trimming mode setting unit, the second trimming data storage unit Trimin for voltage correction stored in A first selector that selects and outputs data, and a reference voltage generator that trims a voltage based on a trimming signal input via the first selector, generates a reference voltage that corrects voltage variations, and outputs the reference voltage Part.

  Moreover, the outline | summary of the other invention of this application is shown briefly.

  According to the present invention, the trimming mode setting section includes a fuse that can be cut, and outputs a trimming mode setting signal before the fuse is cut, and outputs a trimming mode release signal when the fuse is cut It is.

  In the present invention, the fuse is cut by, for example, a laser trimmer after the trimming for correcting the variation in the reference voltage output from the reference voltage generation unit is completed during the probe inspection.

  Further, according to the present invention, the semiconductor integrated circuit device is used for monitoring a secondary battery, detects overdischarge, overcharge, or overcurrent of the secondary battery, and disconnects the charge / discharge path of the secondary battery. The control which performs is performed.

  The present invention also provides a third trimming data storage unit that stores delay time correction trimming data in the trimming mode, and a fourth trimming data storage that stores delay time correction trimming data that has been adjusted by trimming. And when the trimming mode setting signal is output from the trimming mode setting unit, the trimming data for delay time correction stored in the third trimming data storage unit is selected and output, and the trimming mode is canceled from the trimming mode setting unit A second selector that selects and outputs the delay time correction trimming data stored in the fourth trimming data storage unit when the signal is output, and is output when the charge / discharge path of the secondary battery is disconnected. A delay time setting unit for generating a delay time of the control signal, the delay time setting unit being a second selector Trim the delay time based on the trimming signal inputted through, and generates a delay signal by correcting the variation of the delay time.

  Among the inventions disclosed in the present application, effects obtained by typical ones will be briefly described as follows.

  (1) Since the test setting pad for setting the trimming mode is not necessary, the semiconductor chip can be greatly reduced in size.

  (2) Further, according to the above (1), it is possible to reduce the size of the semiconductor integrated circuit device for monitoring the secondary battery, and it is possible to reduce the size of the battery pack configured using the semiconductor integrated circuit device.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiment, and the repetitive description thereof will be omitted.

  1 is an explanatory diagram of a battery pack according to an embodiment of the present invention, FIG. 2 is an explanatory diagram showing a connection configuration in the battery pack of FIG. 1, and FIG. 3 is a semiconductor provided in the battery pack of FIG. FIG. 4 is a block diagram showing a configuration example of the integrated circuit device, and FIG. 4 is an explanatory diagram showing a configuration example of a reference voltage circuit and a detection voltage circuit provided in the semiconductor integrated circuit device of FIG.

  In the present embodiment, battery pack 1 is used, for example, as a power source for portable electronic devices such as mobile phones. As shown in FIG. 1, the battery pack 1 includes a battery 2 and a battery monitoring module 3.

  The battery 2 is a secondary battery such as a lithium ion battery. The battery monitoring module 3 is provided with a mounting board 4 made of a printed wiring board.

  On the back surface of the mounting substrate 4, there are provided electrode portions that are electrically connected to the positive (+) side electrode portion 2 a and the negative (−) side electrode portion 2 b provided above the battery 2. On the right side of the main surface of the mounting substrate 4, battery electrode portions 4 a and 4 b are provided to which portable electronic devices such as mobile phones and chargers for charging the battery 2 are connected.

  The battery electrode portions 4a and 4b are connected to the positive electrode portion 2a and the negative electrode portion 2b via the wiring of the mounting substrate 4, respectively. A monitoring semiconductor integrated circuit device 5 for monitoring the battery 2 is mounted on the central portion of the main surface of the mounting substrate 4.

  The semiconductor integrated circuit device 5 performs various types of monitoring such as overcharge, overdischarge, and overcurrent in the battery 2 and battery protection. On the mounting substrate 4, switch units 6 and 7 are mounted on the left side of the semiconductor integrated circuit device 5.

  FIG. 2 is an explanatory diagram showing a connection configuration of the battery pack 1.

  The semiconductor integrated circuit device 5 is provided with a power supply terminal VC, a ground terminal GND, an output terminal OUT1, an output terminal OUT2, and a current detection terminal IDT. A power supply terminal VC is connected to the positive electrode portion 2 a of the battery 2. A ground terminal GND is connected to the negative electrode portion 2b of the battery 2 that becomes the reference potential VSS.

  One connection part of the switch part 6 is connected to the negative electrode part 2 a of the battery 2, and one connection part of the switch part 7 is connected to the other connection part of the switch part 6. .

  A current detection terminal IDT is connected to the other connection portion of the switch portion 7. Between the current detection terminal IDT and the positive electrode portion 2 a of the battery 2, a portable electronic device such as a mobile phone or the like A load circuit LD such as a charger for charging the battery 2 is connected.

  An output terminal OUT 1 is connected to the control terminal of the switch unit 6, and an output terminal OUT 2 is connected to the control terminal of the switch unit 7. The switch unit 6 is controlled to be ON (conductive) / OFF (non-conductive) based on a control signal output from the output terminal OUT1. Similarly, the switch section 7 is controlled to be ON (conductive) / OFF (non-conductive) based on a control signal output from the output terminal OUT2.

  The semiconductor integrated circuit device 5 indirectly measures the current value by measuring the power supply voltage VCC acquired from the power supply terminal VC and the voltage drop of the current flowing from the current detection terminal IDT to the switch unit 6 and the switch unit 7. The current value flowing through the battery 2 is detected from the measurement result to protect the battery 2.

  For example, when the portable electronic device is used, the semiconductor integrated circuit device 5 controls the switch unit 6 to be turned off when the voltage level of the power supply terminal VC becomes equal to or lower than an arbitrary voltage (for example, about 2 V). A signal is output to prevent discharge overcurrent of the battery 2.

  Further, when the voltage level of the power supply terminal VC becomes higher than an arbitrary voltage (for example, about 4.2 V) during charging by the charger, a control signal is output so that the switch unit 7 is turned off, and the battery 2 Stop charging and prevent overcharging.

  Further, when the current value of the current detection terminal IDT is equal to or greater than an arbitrary current value, a control signal is output so that the switch unit 6 is turned off, and the battery 2 is prevented from being overdischarged.

  FIG. 3 is a block diagram illustrating a configuration example of the semiconductor integrated circuit device 5.

  As shown in the figure, the semiconductor integrated circuit device 5 includes a fuse 8, a fuse unit 9, a resistor 10, a register 11, a selector 12, a decoder 13, a reference voltage circuit 14, detection voltage circuits 15 and 16, an oscillator circuit 17, and a control circuit 18. And inverters 19 to 23 are provided. In addition, the trimming mode setting unit is configured by the fuse 8, the resistor 10, and the inverter 23.

  One connection portion of the fuse 8 is connected to be supplied with the power supply voltage VCC, and the other connection portion of the fuse 8 is connected to one connection portion of the resistor 10 and the input portion of the inverter 23. Each is connected. The reference potential VSS is connected to the other connection portion of the resistor 10.

  The fuse unit 9 and the register 11 are connected to the selection terminal of the selector 12, and the trimming mode setting signal output from the inverter 23 or the trimming is supplied to the control terminal of the selector 12 and the control circuit 18. Each is connected so that a signal serving as a mode release signal is input. Based on the signal (trimming mode setting signal / trimming mode release signal) output from the inverter 23, the control circuit 18 recognizes whether it is in the normal operation (monitoring operation of the battery 2) or in the trimming mode.

  The fuse unit 9 serving as the second trimming data storage unit and the fourth trimming data storage unit has a configuration in which a plurality of fuses are provided, and stores trimming data for which trimming is set. The register 11 serving as the first trimming data storage unit and the second trimming data storage unit stores trimming data input from the outside.

  The selector 12 selects and outputs the trimming data set in either the fuse unit 9 or the register 11 based on the signal output from the inverter 23. The decoder 13 decodes the trimming data input via the selector 12 and outputs it as a trimming signal.

  A reference voltage circuit 14 and an oscillator circuit 17 serving as a delay time setting unit are connected to the output unit of the decoder 13. A reference voltage circuit 14 serving as a reference voltage generation unit generates and outputs a reference voltage having an arbitrary voltage level based on the trimming signal output from the decoder 13.

  The detection voltage circuit 15 compares the voltage level of the power supply voltage VCC input to the power supply terminal VC with the reference voltage output from the reference voltage circuit 14, and outputs the comparison result to the control circuit 18 as a detection signal.

  The detection voltage circuit 16 compares the voltage value with the reference voltage output from the reference voltage circuit 14 by measuring the voltage drop of the current flowing from the current detection terminal IDT to the switch unit 6 and the switch unit 7 and compares them. The result is output to the control circuit 18 as a detection signal.

  Based on the trimming signal output from the decoder 13, the oscillator circuit 17 varies the oscillation period of the clock signal and outputs it to the control circuit 18. The clock signal generated by the oscillator circuit 17 is used to control the OFF operation of the switch unit 7 that prevents overcharging of the battery 2 when the battery 2 is charged.

  For example, when the battery 2 is charged, there is a possibility that the charging may be stopped before the battery 2 is fully charged due to malfunction caused by external noise.

  Therefore, in order to prevent malfunction, the clock signal of the oscillator circuit 17 is given an arbitrary delay, and the switch unit 7 is activated after an arbitrary time has elapsed since the control circuit 18 is fully charged. A delay time for performing control so as to be OFF is generated.

  The control circuit 18 performs ON / OFF control of the switch units 6 and 7 based on detection signals output from the detection voltage circuits 15 and 16, and monitors and protects the battery 2.

  FIG. 4 is an explanatory diagram showing a configuration example of the reference voltage circuit 14 and the detection voltage circuit 15.

  The reference voltage circuit 14 includes an amplifier 24, a transistor 25, a selection unit 26, and a resistance unit 27. A reference voltage VREF is connected to one input portion of the amplifier 24.

  The gate of the transistor 25 is connected to the output part of the amplifier 24, and the power supply voltage VCC is supplied to one connection part of the transistor 25. The resistance unit 27 includes a plurality of resistors, and these resistors are connected in series between the other connection portion of the transistor 25 and the reference potential VSS.

  The selection unit 26 includes, for example, a plurality of transistors, and one connection portion of the transistors is connected to an arbitrary connection point of each resistor in the resistance unit 27, and the other connection portion of the transistor includes an amplifier. The other input unit of 24 is connected.

  The gate of the transistor of the selection unit 26 is connected so that the trimming signal output from the decoder 13 is input, and each transistor is turned ON / OFF based on the trimming signal.

  In the reference voltage circuit 14, a feedback circuit is configured by the amplifier 24, the transistor 25, the selection unit 26, and the resistance unit 27, and generates a reference voltage to be supplied to the comparator 30 based on the trimming signal.

  The detection voltage circuit 15 includes resistors 28 and 29 and a comparator 30. The resistors 28 and 29 are connected in series between the power supply voltage VCC and the reference potential VSS, and a connection portion between the resistors 28 and 29 is connected to the negative (−) side input terminal of the comparator 30.

  Further, an arbitrary connection point in the resistor unit 27 is connected to the positive (+) side input terminal of the comparator 30, and the comparator 30 resistances the reference voltage generated by the reference voltage circuit 14 and the power supply voltage VCC. The divided voltage is compared, and the comparison result is output to the control circuit 18.

  Next, the operation of the semiconductor integrated circuit device 5 in the present embodiment will be described.

  Here, for example, a technique for acquiring a trimming code in a trimming mode in the probe inspection process will be described.

  First, at the time of probe inspection, since the fuse 8 is not cut, a Lo signal serving as a trimming setting signal is input to the control terminal of the selector 23 via the inverter 23. Accordingly, the selector 12 is selected so that the trimming data set in the register 11 is output to the decoder 13. Further, the control circuit 18 recognizes that the trimming mode is set based on the Lo signal output from the inverter 23.

  In this trimming mode, the output terminal OUT1 is used as a clock input terminal, and the current detection terminal IDT is used as a data input terminal for trimming data. Then, the trimming data input via the current detection terminal IDT is stored in the register 11 in synchronization with the clock signal input via the output terminal OUT1.

  Subsequently, the trimming data stored in the register 11 is input to the decoder 13 via the selector 12, decoded by the decoder 13, and output as a trimming signal.

  Based on this trimming signal, a prober determines from the output terminal OUT2 whether or not the reference voltage generated by the reference voltage circuit 14 by turning on an arbitrary transistor of the selection unit 26 is a preset voltage level.

  If the voltage level is not set in advance, the next trimming data is stored in the register 11 and the other arbitrary transistors in the selection unit 26 are turned on to adjust the voltage level of the reference voltage. Adjustment is performed in the same manner until the reference voltage reaches the required set value.

  When the adjustment of the reference voltage circuit 14 is completed, the fuse of the fuse unit 9 is cut so that the same data as the trimming data stored in the register 11 is stored in the fuse unit 9 when the adjustment is completed. .

  At this time, the fuse 8 is also cut. As a result, a Hi signal that is a trimming release signal is input to the control terminal of the selector 23 via the inverter 23, and the selector 12 outputs the trimming data set in the fuse unit 9 to the decoder 13. Select

  Further, the control circuit 18 recognizes that it is not the trimming mode but the normal operation mode based on the Hi signal output from the inverter 23, and is fixed to the normal operation mode.

  Although the adjustment technique of the reference voltage circuit 14 has been described here, the trimming technique for setting the delay time of the oscillator circuit 17 is performed in the same procedure.

  Thereby, according to the present embodiment, the provision of the fuse 8 eliminates the need for a test pad to be set to the trimming mode in the semiconductor integrated circuit device 5 and greatly reduces the chip size of the semiconductor integrated circuit device 5. be able to.

  As mentioned above, the invention made by the present inventor has been specifically described based on the embodiment. However, the present invention is not limited to the embodiment, and various modifications can be made without departing from the scope of the invention. Needless to say.

  For example, in the above-described embodiment, one fuse for setting the trimming mode is provided. However, for example, as shown in FIG. 5, two fuses are provided and the normal mode is set, and then the trimming mode is set again. It is good also as a structure which can be performed.

  In this case, in the semiconductor integrated circuit device 5, as shown in FIG. 5, the selector 12 is provided with two control terminals, and a fuse 31, a resistor 32, a transistor 33, and a latch circuit 34 are newly provided. It is a different point.

  A power supply voltage VCC is connected to one connection portion of the transistor 33. A fuse 31 and a resistor 32 are connected in series between the other connection portion of the transistor 33 and the reference potential VSS.

  Further, the input part of the latch circuit 34 is connected to the connection part between the fuse 31 and the resistor 32, and the other control terminal of the selector 12 is connected to the output part of the latch circuit 34.

  The transistor 33 is controlled so as to be turned on for an arbitrary time, for example, when the power supply of the semiconductor integrated circuit device 5 is turned on by the control circuit 18. Is done.

  By providing the latch circuit 34, it is possible to prevent a current from constantly flowing, and to reduce unnecessary current consumption.

  When the semiconductor integrated circuit device 5 is in the normal state after finishing the trimming mode, the fuse 8 is cut and the fuse 31 is not cut. When the trimming mode is set again for some reason, the fuse 31 is cut and the signal state input to the latch circuit 34 is switched.

  As a result, the selector 12 performs selection so that the trimming data set in the register 11 is output to the decoder 13 again, and enters the trimming mode.

  Thereby, it is possible to easily set the trimming mode at the time of failure analysis of the semiconductor integrated circuit device 5 and the efficiency of failure analysis can be improved.

  The present invention is suitable for a technique for miniaturizing a semiconductor integrated circuit device used for monitoring a secondary battery.

It is explanatory drawing of the battery pack by one embodiment of this invention. It is explanatory drawing which showed the connection structure in the battery pack of FIG. FIG. 2 is a block diagram illustrating a configuration example of a semiconductor integrated circuit device provided in the battery pack of FIG. 1. FIG. 4 is an explanatory diagram showing a configuration example of a reference voltage circuit and a detection voltage circuit provided in the semiconductor integrated circuit device of FIG. 3. It is explanatory drawing which shows the partial structure of the semiconductor integrated circuit device by other embodiment of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Battery pack 2 Battery 2a Positive side electrode part 2b Negative side electrode part 3 Battery monitoring module 4 Mounting board 4a, 4b Battery electrode part 5 Semiconductor integrated circuit device 6, 7 Switch part 8 Fuse 9 Fuse part 10 Resistance 11 Register 12 Selector 13 Decoder 14 Reference voltage circuit 15 and 16 Detection voltage circuit 17 Oscillator circuit 18 Control circuit 19 to 23 Inverter 24 Amplifier 25 Transistor 26 Selector 27 Resistor 28 and 29 Resistor 30 Comparator 31 Fuse 32 Resistor 33 Transistor 34 Latch circuit VC Power supply terminal GND Ground terminal OUT1 Output terminal OUT2 Output terminal IDT Current detection terminal

Claims (5)

A first trimming data storage for storing voltage correction trimming data in the trimming mode;
A second trimming data storage for storing voltage correction trimming data for which adjustment by trimming has been completed;
A trimming mode setting unit that outputs a trimming mode setting signal that sets a trimming mode at the time of trimming, and outputs a trimming mode release signal that indicates that the trimming mode has ended when trimming is completed;
When the trimming mode setting signal is output from the trimming mode setting unit, the voltage correction trimming data stored in the first trimming data storage unit is selected and output, and the trimming mode release signal is output from the trimming mode setting unit. A first selector that selects and outputs the voltage correction trimming data stored in the second trimming data storage unit when
A semiconductor integrated circuit, comprising: a reference voltage generation unit that trims a voltage based on a trimming signal input through the first selector and generates and outputs a reference voltage corrected for voltage variation apparatus. The semiconductor integrated circuit device according to claim 1.
The trimming mode setting unit
A semiconductor integrated circuit device comprising a fuse that can be cut, and outputs a trimming mode setting signal before the fuse is cut, and outputs a trimming mode release signal when the fuse is cut. The semiconductor integrated circuit device according to claim 1 or 2,
The fuse is
The semiconductor integrated circuit device is characterized in that, at the time of probe inspection, the semiconductor integrated circuit device is cut after trimming for correcting variations in the reference voltage output from the reference voltage generation unit is completed. The semiconductor integrated circuit device according to any one of claims 1 to 3,
The semiconductor integrated circuit device includes:
A semiconductor integrated circuit that is used for monitoring a secondary battery, detects overdischarge, overcharge, or overcurrent of the secondary battery, and controls to cut off a charge / discharge path of the secondary battery apparatus. The semiconductor integrated circuit device according to claim 4.
A third trimming data storage unit for storing delay time correction trimming data in the trimming mode;
A fourth trimming data storage for storing delay time correction trimming data for which adjustment by trimming has been completed;
When the trimming mode setting signal is output from the trimming mode setting unit, the delay time correction trimming data stored in the third trimming data storage unit is selected and output, and the trimming mode is released from the trimming mode setting unit A second selector for selecting and outputting delay time correction trimming data stored in the fourth trimming data storage unit when a signal is output;
A delay time setting unit that generates a delay time of a control signal output when the charge / discharge path of the secondary battery is disconnected,
The delay time setting unit includes:
A semiconductor integrated circuit device, wherein a delay time is trimmed based on a trimming signal input via the second selector, and a delay signal is generated by correcting variation in the delay time.

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