JP2008135649A - Manufacturing method of semiconductor device - Google Patents

Abstract

An object of the present invention is to provide a method of manufacturing a semiconductor device in which pattern formation is simplified.
A first pattern 105 is formed on a film to be processed 100, an antireflection film 106 and a resist film 107 are sequentially formed on the film 100 to be processed including a region where the first pattern 105 is formed. The resist film 107 is processed to form a resist pattern 103, and the antireflection film 106 exposed under the resist pattern 108 is processed with the same developer as that used for processing the resist film 107, so that the film 100 to be processed is processed. A part of the first pattern 105 and at least a part of the first pattern 105 are exposed, and the processed film 100 is processed using the first pattern 105 and the resist pattern 108 as a mask, thereby forming a wiring pattern 110 and the like on the processed film 100 To do.
[Selection] Figure 1

Description

The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for forming a fine pattern.

Generally, photolithography is used when forming a fine pattern such as a wiring pattern in a semiconductor device. Here, when exposing the mask pattern to the resist film applied on the film to be processed, an antireflection film is applied between the film to be processed and the resist pattern in order to prevent incident light from being reflected by the film to be processed. (For example, refer to Patent Document 1).

However, when a film to be processed is processed by photolithography, if a stepped portion such as a mask pattern is previously formed on the film to be processed, the antireflection film has a uniform thickness over the entire film to be processed. There is a risk of not being filmed. For example, when the space portion of the mask pattern formed in advance is fine, the film thickness of the antireflection film formed in the space portion is locally higher than the film thickness of the antireflection film formed in other portions. It may become thick.

Thus, if the film thickness of the antireflection film formed on the film to be processed is not uniform, in the process of removing the antireflection film by removing the resist pattern, the parts having different film thicknesses are separated by separate processes. It may be necessary to remove the pattern, and the pattern formation process may be complicated.
Japanese Patent Laid-Open No. 06-204130 (FIG. 4)

The present invention has been made to solve the above problems, and an object of the present invention is to provide a method of manufacturing a semiconductor device in which pattern formation is simplified.

  In order to achieve the above object, a method for manufacturing a semiconductor device of one embodiment of the present invention includes a step of forming a first pattern on a film to be processed, and the target including a region where the first pattern is formed. A step of sequentially forming an antireflection film and a resist film on the processed film; and developing the resist film to form a resist pattern to expose the antireflection film, and exposing the exposed antireflection film to the resist film Removing using a developer used for development to expose a part of the film to be processed and at least a part of the first pattern; and using the first pattern and the resist pattern as a mask, The method includes a step of processing a processed film.

  According to another aspect of the present invention, there is provided a method for manufacturing a semiconductor device, comprising: forming a first pattern on a film to be processed; and forming the first pattern on the film to be processed including the region where the first pattern is formed. A step of sequentially forming an antireflection film and a resist film, and developing the resist film to form a resist pattern to expose the antireflection film, and the exposed antireflection film is used for developing the resist film. Removing a part of the first pattern, processing the exposed first pattern part, and removing the resist pattern and the antireflection film. It is characterized by providing.

  According to another aspect of the present invention, there is provided a method for manufacturing a semiconductor device, the step of forming an antireflection insulating film on a film to be processed, the step of forming a first pattern on the antireflection insulating film, Forming a resist film on the antireflection insulating film including a region where the first pattern is formed; forming a resist pattern on the resist film to form a part of the antireflection insulating film and the first pattern; Exposing the processed film by processing the antireflection insulating film using the exposed first pattern and resist pattern as a mask, and exposing the processed film It is characterized by comprising a step of processing.

According to another aspect of the present invention, there is provided a method for manufacturing a semiconductor device, the step of forming an antireflection insulating film on a film to be processed, the step of forming a first pattern on the antireflection insulating film, Forming a resist film on the antireflection insulating film including the region where the first pattern is formed; forming a resist pattern on the resist film to expose a part of the first pattern; Processing the exposed first pattern; processing and removing the resist pattern; then processing the antireflection insulating film to expose the processing film; and processing the exposed processing film A process is provided.

ADVANTAGE OF THE INVENTION According to this invention, the manufacturing method of the semiconductor device which simplified pattern formation can be provided.

A method for manufacturing a semiconductor device according to an embodiment of the present invention will be described below with reference to the drawings.

With reference to FIG. 1, a method of forming a wiring pattern in a semiconductor device by a method for manufacturing a semiconductor device according to Example 1 of the present invention will be described. FIG. 1 is a process cross-sectional view illustrating a method for manufacturing a semiconductor device according to this embodiment.

First, as shown in FIG. 1A, a plasma CVD (Chemical Vapor Deposition) using a silane gas or TEOS or a high-density plasma source is used on a semiconductor substrate (not shown) such as single crystal silicon. A film to be processed 100 having a polysilicon film or the like as a constituent material is formed by CVD or the like.

Further, a first film 101, for example, a silicon nitride film or the like, which becomes a mask material when the processed film 100 is finally processed to form a wiring pattern by using a CVD method or the like on the processed film 100. Form.

Subsequently, an antireflection film 102 is formed on the first film 101 and a resist pattern 103 is formed on the antireflection film 102 by photolithography. That is, the antireflection film 102 is formed on the film to be processed 100 by using a spin coating method or the like, and then a resist film is applied on the antireflection film 102. Further, the resist film is exposed using a photomask, and the resist portion of the resist film is removed with a developer to form a resist pattern 103.

Here, the antireflection film 102 is a thin film having a function of suppressing the occurrence of interference between the incident wave and the reflected wave when light incident on the resist film during exposure reaches the surface of the film 100 to be processed and is reflected. Yes, for example, a coated organic film or an inorganic CVD film such as amorphous carbon or SiON film. The resist film is made of, for example, an acrylic resin or a methacrylic resin, and the photosensitive portion thereof is soluble in an alkaline aqueous solution used as a developer.

Next, as shown in FIG. 1B, the antireflection film 102 is processed using the resist pattern 103 as a mask by using RIE (Reactive Ion Etching) or the like using fluorine gas, and the first film 101 is further processed. Are sequentially processed to form the first pattern 105. Further, the resist pattern 103 and the antireflection film 102 remaining on the first pattern 105 are removed by ashing or etching using oxygen plasma or the like.

Next, as shown in FIG. 1C, an antireflection film 106 is formed on the film to be processed 100 so as to cover the first pattern 105 by using a spin coating method or the like. This antireflection film 106 is a film made of a material that is soluble in a developer, for example, an alkaline aqueous solution, used in the subsequent development process of the resist film 107, and is hereinafter referred to as a developer-soluble antireflection film 106. The developer-soluble antireflection film 106 contains a photoacid generator that generates an acid by light irradiation, such as triphenylsulfonium triflate, triphenylsulfonium nonaflate, and the like.

Although not clearly shown in FIG. 1C, the film thickness of the developer-soluble antireflection film 106 is not necessarily formed uniformly on the entire film to be processed 100, and the space between the first patterns with a narrow interval is used. The film thickness of the developer-soluble antireflection film 106 formed on the part may be locally thick.

Next, as shown in FIG. 1D, a resist film 107 is formed by coating on the developer-soluble antireflection film 106. The resist film 107 is made of a material that is developed by a developer capable of dissolving the developer-soluble antireflection film 106, for example, an acrylic resin or the like, similar to the resist film 107 described above.

Next, as shown in FIG. 1E, the resist film 107 is exposed using a photomask, and the photosensitive portion of the resist film 107 is developed with a developer such as an alkaline aqueous solution to form a resist pattern 108. Further, the developer-soluble antireflection film 106 underneath is continuously dissolved and removed using the same developer to expose a part of the surface of the film to be processed 100 and the first pattern 105.

In this embodiment, as shown in FIG. 1E, the resist pattern 108 is formed so as to remain in the middle position of the first pattern 105. As a result, the first pattern 105 and the resist pattern 108 can be formed on the film to be processed 100 so that the space between the first pattern 105 and the resist pattern 108 has a half pitch that is a lithography limit.

In this embodiment, the resist pattern 108 is formed so as to expose the first pattern 105, but the resist pattern 108 may be formed so as to cover a part of the first pattern 105.

Generally, when an antireflection film and a resist film are formed on a film to be processed on which a stepped portion such as a pattern is formed, particularly when a step between adjacent steps (pattern space portion or the like) is fine, In some cases, the film thickness of the antireflection film formed between the steps is locally thicker than the film thickness of the antireflection film formed in another part.

As described above, when the thickness of the antireflection film formed on the film to be processed is not uniform, in the process of removing the antireflection film, it is necessary to remove portions having different film thicknesses by separate processes. Therefore, the pattern formation process of the semiconductor device may be complicated.

However, as in this embodiment, by using a material soluble in the developer used for forming the resist pattern for the antireflection film (developer-soluble antireflective film 106), the resist film 107 is subjected to the development process following the resist film 107 development process. The different portions of the developer-soluble antireflection film 106 formed under the film 107 can be simultaneously dissolved by the developer. Thereby, the removal process of the antireflection film formed on the film to be processed having a stepped portion such as a pattern can be reduced, and the pattern forming process can be simplified.

Next, as shown in FIG. 1F, the film to be processed 100 is processed by RIE using the first pattern 105, the resist pattern 108, and the developer-soluble antireflection film 106 as a mask to form the wiring groove 109. Form.

Finally, as shown in FIG. 1G, after removing the resist pattern 108, the first pattern 105, and the developer-soluble antireflection film 106 by ashing, etching, etc., wiring is performed using an electroplating method or the like. A wiring material such as copper is embedded in the groove 109 and copper outside the wiring groove 109 is polished and removed by CMP (Chemical Mechanical Polishing) to form a wiring pattern 110 on the film to be processed 100. The wiring pattern 110 is formed as a line pattern, for example.

As described above, by using the semiconductor device manufacturing method according to this embodiment, the antireflection film removing step can be simplified, and a wiring pattern can be formed by a simple method.

(Modification of Example 1)
Next, with reference to FIG. 2, a modification of the semiconductor device manufacturing method according to the first embodiment will be described. FIG. 2 is a process cross-sectional view illustrating a method for manufacturing a semiconductor device according to this modification. The semiconductor device manufacturing method according to this modification differs from the semiconductor device manufacturing method according to the first embodiment in that the first pattern formed on the film to be processed is further processed to form a fine pattern. The film to be processed is processed using the first pattern as a mask. For this reason, the same parts as those of the semiconductor device described in the first embodiment are denoted by the same reference numerals, and description of the same steps as those of the semiconductor device manufacturing method described in the first embodiment is omitted.

First, as in the manufacturing process shown in FIGS. 1A to 1D, a first pattern, a developer-soluble antireflection film, and a resist film are sequentially formed on a film to be processed. Next, as shown in FIG. 2A, the resist film is exposed using a photomask having a predetermined pattern, and the exposed portion of the resist film is developed and removed using a developer such as an alkaline aqueous solution. . Subsequently, after developing the resist film, using the same developer as used for developing the resist film, the exposed portion of the developer-soluble antireflection film 106 is dissolved, and a predetermined portion of the first pattern 105 is removed. Exposed.

At this time, although not shown, not only the first pattern 105 but also the resist film and the developer-soluble antireflection film 106 may be removed so as to expose the film 100 to be processed.

As described above, also in the present modification, it is possible to process and remove the antireflection film portions having different film thicknesses by dissolving the antireflection film 106 with the developing solution of the resist film. The process can be simplified.

Next, as shown in FIG. 2B, the exposed first pattern 105 portion is removed by RIE to expose the film to be processed 100. By processing the first pattern 105 in this way, a fine pattern can be formed by additionally forming a pattern on the first pattern 105.

Next, as shown in FIG. 2C, the resist pattern 108 and the developer-soluble antireflection film 106 are removed by ashing, etching, or the like, respectively, and then the film to be processed 100 with the first pattern 105 exposed using a mask is formed. The wiring groove 109 is formed in the processed film 100 by processing.

Thereafter, after removing the first pattern 105 by etching or the like, a wiring pattern is formed by embedding a wiring material in the wiring groove 109 in the same manner as the manufacturing process shown in FIG.

As described above, even when the method for manufacturing a semiconductor device according to this modification is used, the removal process of the antireflection film can be simplified, and a wiring pattern can be formed by a simple method.

Next, with reference to FIG. 3, a method for forming a wiring pattern in a semiconductor device by the method for manufacturing a semiconductor device according to Example 2 of the present invention will be described. FIG. 3 is a process cross-sectional view illustrating the method of manufacturing the semiconductor device according to this example. The semiconductor device manufacturing method according to the present embodiment differs from the semiconductor device manufacturing method according to the first embodiment in that an insulating film having an antireflection function is used as a film to be processed without using a developer-soluble antireflection film. And intervening in the first pattern. For this reason, the same parts as those of the semiconductor device described in the first embodiment are denoted by the same reference numerals, and description of the same steps as those of the semiconductor device manufacturing method described in the first embodiment is omitted.

First, as shown in FIG. 3A, an insulating film 111 having an antireflection function (hereinafter referred to as an antireflection insulating film 111) is formed on a film to be processed 100 such as a polysilicon film by a coating method or the like. . The antireflection insulating film 111 includes, for example, a silicon compound, that is, methylsiloxane, methylsilsesquioxane, phenylsiloxane, phenylsilsesquioxane, methylphenylsiloxane, methylphenylsilsesquioxane, silicate polymer, and a mixture thereof. More specifically, DARC ^™ (Dielectric Anti Reflective Coating, manufactured by Applied Materials, Inc.), TERA (Tunable Etch-Resistant Anti-Reflective Coating, IBM, manufactured by Tokyo Electron) Etc. are used. Further, as in Example 1, the first film 101, the antireflection film 102, and the resist film are laminated on the antireflection insulating film 111, and then a resist pattern 103 is formed.

  Next, as shown in FIG. 3B, the antireflection film 102 is processed by RIE using the resist pattern 103 as a mask, and then the first film 101 is processed to form a first pattern 105.

  Next, as shown in FIG. 3C, after removing the resist pattern 103 and the antireflection film 102 by ashing, etching, or the like, the resist film is again formed so as to cover the first pattern 105 on the antireflection insulating film 111. 107 is formed.

  Next, as shown in FIG. 3D, the resist film 107 is exposed using a photomask, and the photosensitive portion is processed so that the first pattern 105 and the antireflection insulating film 111 are exposed. A pattern 108 is formed. Here, in this embodiment, the resist pattern 108 is formed at an intermediate position of the first pattern 105. As a result, the first pattern 105 and the resist pattern 108 can be formed on the antireflection insulating film 111 so that the first pattern 105 and the resist pattern 108 have a half pitch that is a lithography limit. At this time, since an antireflection insulating film 111 having an antireflection function is formed under the resist film 107, light incident on the resist film 107 during exposure is exposed to the resist film 107, the first pattern 105, and the antireflection insulating film. Reflection at the interface with the film 111 can be prevented.

  Next, as shown in FIG. 3E, the antireflection insulating film 111 is processed using the first pattern 105 and the resist pattern 108 as a mask. Subsequently, the processed film 100 is processed using the first pattern 105 and the resist pattern 108 as a mask, and a wiring groove 109 is formed in the processed film 100. At this time, after processing the antireflection insulating film 111 using the resist pattern 108 and the first pattern 105 as a mask, the resist pattern 108 and the first pattern 105 are removed and only the antireflection insulating film 111 is used as a mask. 100 may be processed.

Thereafter, the first pattern 105, the resist pattern 108, and the antireflection insulating film 111 are removed by etching, ashing, or the like, and then a wiring material is embedded in the wiring groove 109 to form a wiring pattern.

As described above, the wiring pattern of the semiconductor device can be formed by using the manufacturing method of the semiconductor device according to this embodiment.

In the manufacturing method of the semiconductor device according to the present example, an antireflection insulating film having an antireflection function is formed between the film to be processed and the pattern, and the object to be processed in which the pattern or the like is formed as in Example 1. No antireflection film is formed on the film.

For this reason, in the manufacturing method of the semiconductor device according to the present embodiment, the film thickness of the antireflection film formed on the film to be processed is not uniform, and it is not necessary to remove the antireflection film by a separate process. The formation of can be simplified.

In general, when an antireflection film formed on a film to be processed having a stepped portion such as a pattern is processed and removed, the removal speed of the antireflection film formed between the pattern portions having a narrow space is reduced between other pattern portions. There is a possibility that the removal rate of the antireflection film formed on the substrate may be relatively different, and it may be difficult to process the entire antireflection film into a desired shape.

In contrast, in this embodiment, since the antireflection insulating film 111 is formed on the flat film to be processed 100, the removal rate of the antireflection insulating film 111 is not likely to vary at a specific location, and the removal rate is increased. Can be kept constant. Therefore, it becomes easy to process the antireflection insulating film 111 into a desired shape using the first pattern 105 and the resist pattern 108 as a mask, and the shape of the wiring pattern processed using the antireflection insulating film 111 as a mask can be changed. It becomes easy to process into a desired shape and size.

(Modification of Example 2)
Next, with reference to FIG. 4, a modification of the method for manufacturing the semiconductor device according to the second embodiment will be described. FIG. 4 is a process cross-sectional view illustrating a method for manufacturing a semiconductor device according to this modification. The semiconductor device manufacturing method according to this modification differs from the semiconductor device manufacturing method according to the second embodiment in that the first pattern formed on the film to be processed is further processed to form a fine pattern. is there. For this reason, the same parts as those of the semiconductor device described in the first and second embodiments are denoted by the same reference numerals, and description of the same steps as those of the semiconductor device manufacturing method described in the first and second embodiments is omitted.

First, similarly to the steps shown in FIGS. 3A to 3C, the antireflection insulating film 111 is formed on the film to be processed 100, the first pattern 105 and the resist film are sequentially formed on the antireflection insulating film 111. Form. Thereafter, as shown in FIG. 4A, the resist film is developed using a photomask to form a resist pattern 108 so that the first pattern 105 is exposed.

At this time, although not shown, the resist film and the first film 101 may be removed so as to expose not only the first pattern 105 but also the film to be processed 100.

As described above, also in this modification, since the antireflection insulating film 111 having an antireflection function is formed under the resist film, the light incident on the resist film at the time of exposure is formed between the resist film and the first pattern 105. It is possible to prevent reflection at the interface.

Next, as shown in FIG. 4B, the exposed first pattern 105 portion is processed by RIE to expose the antireflection insulating film 111. By further processing the first pattern 105 in this way, a pattern can be added to the first pattern 105 and a fine pattern can be formed on the first film 101.

Next, as shown in FIG. 4C, after the resist pattern 108 is removed by ashing, the antireflection insulating film 111 with the first pattern 105 exposed as a mask is processed by RIE.

Subsequently, as illustrated in FIG. 4D, the processed film 100 is processed using the first pattern 105 and the antireflection insulating film 111 as a mask to form a wiring groove 109 in the processed film 100. At this time, after the first pattern 105 is removed, the film to be processed 100 may be processed using the antireflection insulating film 111 as a mask.

Thereafter, the first pattern 105 and the antireflection insulating film 111 are removed by etching or the like, and then a wiring material is embedded in the wiring groove 109 to form a wiring pattern, as in the manufacturing process shown in FIG. To do.

As described above, by using the semiconductor device manufacturing method according to this modification, the antireflection film removing step can be simplified, and a wiring pattern can be formed by a simple method.

Also by the semiconductor device manufacturing method according to this modification, the antireflection insulating film 111 having an antireflection function is formed between the flat film 100 and the pattern, so that the reflection formed on the film is processed. It is possible to simplify the formation of a wiring pattern or the like because the film thickness of the anti-reflection film becomes non-uniform and it is not necessary to remove the anti-reflection film by a separate process.

Further, since the antireflection insulating film 111 is formed on the flat film to be processed 100, the processing speed of the antireflection insulating film 111 is not likely to vary at a specific location, and the processing speed can be kept constant. For this reason, it becomes easy to process the antireflection insulating film 111 into a desired shape.

Next, with reference to FIGS. 5 to 7, a method of forming a wiring pattern in a semiconductor device by the method for manufacturing a semiconductor device according to Example 3 of the present invention will be described. 5 to 7 are process diagrams showing the method of manufacturing the semiconductor device according to this embodiment. The semiconductor device manufacturing method according to the present embodiment differs from the semiconductor device manufacturing method according to the first embodiment in the first pattern formation method. For this reason, the same parts as those of the semiconductor device described in the first embodiment are denoted by the same reference numerals, and description of the same steps as those of the semiconductor device manufacturing method described in the first embodiment is omitted.

Further, this embodiment shows a method of simultaneously forming respective wiring patterns in a memory cell area such as a NAND flash memory and its peripheral circuit area, and the left figure in FIGS. A sectional view and a right view are process plan views. In each figure, the right side is the memory cell area A ₁ and the left side is the memory peripheral circuit area A ₂ .

First, as shown in FIG. 5A, on a semiconductor substrate such as single crystal silicon (not shown), for example, plasma CVD using silane gas or TEOS, or CVD using a high-density plasma source is used. A film to be processed 100 including a silicon film or the like as a constituent material is formed. Subsequently, a sacrificial film 112 such as a BSG film is formed on the film to be processed 100 using a plasma CVD method or the like.

Next, by photolithography, a resist film is applied over the antireflective on the sacrificial film 112 film 102 (not shown), transferring a predetermined linear pattern on the resist film in the memory Cell area A _1. Thus, a resist pattern 103 on the sacrificial layer 112 line-shaped memory Cell area _{A 1} is formed. At this time, in this embodiment, the width of the linear resist pattern 103 is about 60 nm, and the pitch of the resist pattern 103 is about 120 nm.

Next, as shown in FIG. 5B, the resist pattern 103 is slimmed by etching. At this time, the width of the resist pattern 103 after slimming is finally substantially equal to the width of the line-shaped wiring pattern, and is about 30 nm in this embodiment. If this slimming process is unnecessary, the slimming process can be omitted.

Next, as shown in FIG. 5 (c), the resist pattern 103 as a mask, to process the sacrificial layer 112 by RIE, forming a sacrificial layer pattern 113 on the film to be processed 100 in the memory Cell area _{A 1.} Further, the antireflection film 102 and the resist pattern 103 on the sacrificial film pattern 113 are removed by etching and ashing.

Next, as shown in FIG. 6A, a first film 101 made of a silicon nitride film or the like is formed on the film to be processed 100 so as to cover the sacrificial film pattern 113 by using a CVD method or the like. Form. Here, the film thickness of the first film 101 is substantially the same as the width of the first pattern 105 processed and formed by a later etch back process, and the space dimension of the finally formed line-shaped wiring pattern. It becomes. In this embodiment, the film thickness of the first film 101 is set to about 30 nm so as to be the same as the design width of the line-shaped wiring pattern.

Next, as shown in FIG. 6 (b), the first film 101 and the entire surface is processed by etching back the film to be processed 100 in between the peripheral circuit region _{A 2} and the sacrificial layer patterns 113 in the memory Cell area _{A 1} The first pattern 105 is formed on the side wall of the sacrificial film pattern 113 while being exposed. Here, the first pattern 105 has a loop-like planar shape surrounding the sacrificial film pattern 113 as shown in the process plan view of FIG.

Next, as shown in FIG. 6C, the sacrificial film pattern 113 is selectively peeled off by etching using a solution containing neutral HF molecules.

Next, as shown in FIG. 6D, an antireflection film 106 is formed on the film to be processed 100 by a spin coating method or the like. The antireflection film 106 is a developer-soluble antireflection film 106 that dissolves in a developer used in a subsequent resist film development step, such as an alkaline aqueous solution. Here, as shown in the figure, there is a case where the thickness of the antireflection film 106 is locally increased in a portion where the pattern space is narrow, and the antireflection film 106 is formed up to the vicinity of the height position of the first pattern 105. is there.

Next, as shown in FIG. 7A, a resist film 107 is formed on the developer soluble antireflection film 106 so as to cover the first pattern 105.

Next, as shown in FIG. 7 (b), while exposing the first pattern 105 of the Cell area _{A 1,} in order to form a wiring pattern of the peripheral side circuit region _{A 2,} the resist film on the film to be processed 100 107 is exposed, and the photosensitive portion is further developed with a developer to form a resist pattern 108. At this time, as shown in the process plan view of FIG. 7B, the resist pattern 108 is formed so as to cover both ends of the first pattern 105 closed in a loop shape.

Further, when developing the resist film 107, the developer-soluble antireflection film 106 under the resist film 107 is removed by being dissolved by the developer. Thus, a developer soluble antireflective film 106 to dissolve by the developer, the developer layer different portions of thicknesses of soluble anti-reflection film 106, for example, in the present embodiment Cell area A ₁ and the peripheral side circuit region A ₂ It is not necessary to remove the developer-soluble antireflection film portions formed in step 1 in separate steps, and can be removed all at once.

Next, as shown in FIG. 7 (c), by RIE, and the first pattern 105 as a mask to form a wiring groove 109 and Cell area _{A 1} processing film to be processed 100, the mask resist pattern 108 at the same time to to form a wiring trench 109 in the peripheral circuit region a ₂ by processing the film to be processed 100. At this time, since both end portions of the first pattern 105 are covered with the resist pattern 108, the region to be processed 100 located under both end portions of the first pattern 105 is not processed. Thus, a line-like wiring groove 109 having a width of about 30nm isolated with the space of approximately 30nm to each other in the film to be processed 100 in the Cell area _{A 1} is formed. After the formation of the wiring groove 109, the first pattern 105 and the resist pattern 108 are removed by an etching process, a plasma process containing oxygen, or the like.

When the wiring groove 109 is formed, the processed film 100 is provided with a dummy so that the coverage of the wiring pattern 110 formed on the processed film 100 is constant in order to stabilize the flattening of the subsequent wiring material in the CMP process. The groove 114 is also formed at the same time.

Next, as shown in FIG. 7D, a wiring material such as Cu is embedded in the wiring groove 109 and the dummy groove 114 by electroplating or the like, and Cu on the film to be processed 100 is polished and removed by CMP. Then, a line-shaped wiring pattern 110 is formed in the memory cell area A ₁ of the film to be processed 100, and a circuit wiring pattern 110 is formed in the peripheral circuit area A ₂ of the film to be processed 100. At the same time, a dummy pattern 115 is formed in the dummy groove 114.

As described above, by using the manufacturing method of the semiconductor device according to the present embodiment, the removal process of the antireflection film having a non-uniform film thickness is simplified, and the memory cell region A ₁ and the peripheral circuit region A Each wiring pattern 110 can be formed on the substrate ₂ .

In the method for manufacturing the semiconductor device according to the present embodiment, only the first pattern 105 is developed when the resist film 107 formed on the first pattern 105 is developed, as in the method for manufacturing the semiconductor device according to the second embodiment. May be exposed, the exposed first pattern 105 may be processed, and further patterns may be added to the first pattern 105. In that case, the resist pattern 108 is removed, the processed film 100 is processed using the first pattern 105 as a mask, and the wiring groove 109 can be formed.

(Modification of Example 3)
Next, a method for manufacturing a semiconductor device according to a modification of the third embodiment will be described with reference to FIG. FIG. 8 is a process diagram showing a method of manufacturing a semiconductor device according to this modification. The semiconductor device manufacturing method according to this modification differs from the semiconductor device manufacturing method according to the third embodiment in that an antireflection insulating film is formed on the film to be processed, and the first pattern is formed on the antireflection insulating film. Is to further form. For this reason, the same parts as those of the semiconductor device described in the first and third embodiments are denoted by the same reference numerals, and description of the same steps as those of the semiconductor device manufacturing method described in the first and third embodiments is omitted.

First, as shown in FIG. 8A, the above-described antireflection insulating film 111 is formed on the film to be processed 100 such as a polysilicon film by a coating method or the like. Further, as in Example 3, a sacrificial film 112, an antireflection film (not shown), and a resist film are laminated on the antireflection insulating film 111, and then a resist pattern 103 is formed on the resist film.

Next, as shown in FIG. 8B, the antireflection film is removed by RIE using the resist pattern 103 as a mask, the sacrificial film 112 is processed to form the sacrificial film pattern 113, and then the resist pattern 103 and The antireflection film is removed, and a first film is formed on the antireflection insulating film 111 so as to cover the sacrificial film pattern 113. Subsequently, the first film is etched back so as to expose the antireflection insulating film 111, thereby forming the first pattern 105 on the side wall portion of the sacrificial film pattern 113. Thereafter, the sacrificial film pattern 113 is removed by etching.

Next, as shown in FIG. 8 (c), after applying a resist film on the first pattern 105 on dielectric antireflective film 111, Cell area _{A 1} of the first pattern 105 and the peripheral circuit region _{A 2} A predetermined pattern is formed on the resist film so as to expose the antireflection insulating film 111.

Next, as shown in FIG. 8D, after the antireflection insulating film 111 is processed by the RIE using the first pattern 105 and the resist pattern 108 as a mask, the first pattern 105 and the resist pattern 103 are further removed. , and the dielectric antireflective film 111 as a mask to process the film to be processed 100 to form a predetermined wiring trench 109 in the Cell area _{a 1} and the peripheral circuit region _{a 2.} Further, in order to make the coverage of the wiring pattern formed in the film to be processed 100 constant, the dummy groove 114 is also processed in the film to be processed 100 simultaneously with the wiring groove 109. In the processing step of the processing target film 100, the processing target film 100 is processed by RIE using the first pattern 105 and the resist pattern 108 as a mask without removing the first pattern 105 and the resist pattern 108. You can also

After further removing the dielectric antireflective film 111, burying the wiring material in the wiring groove 109 and the dummy groove 114, the wiring material on the processed film 100 is polished removed by CMP, Cell area _{A 1} and the peripheral circuit region _{A 2} A predetermined wiring pattern and a dummy pattern are formed.

As described above, a wiring pattern can be formed by using the method for manufacturing a semiconductor device according to this modification. Also in the method of manufacturing a semiconductor device according to this modification, the antireflection insulating film 111 is formed between the film to be processed 100 and the first pattern 105, so that the thickness of the film formed on the film to be processed is not large. It is not necessary to remove the uniform antireflection film by a separate process, and the formation of a wiring pattern or the like can be simplified.

Further, since the antireflection insulating film 111 is formed on the flat film to be processed 100, the processing speed of the antireflection insulating film 111 is not likely to vary at a specific location, and the processing speed can be kept constant.

In each of the above-described embodiments and modifications, an example is shown in which the present invention is applied to a method for forming a wiring pattern. However, the present invention can also be applied to a method for forming a gate pattern, a hole pattern, or the like. .

Process sectional drawing which shows the manufacturing method of the semiconductor device which concerns on Example 1 of this invention. Process sectional drawing which shows the manufacturing method of the semiconductor device which concerns on the modification of Example 1 of this invention. Process sectional drawing which shows the manufacturing method of the semiconductor device which concerns on Example 2 of this invention. Process sectional drawing which shows the manufacturing method of the semiconductor device which concerns on the modification of Example 2 of this invention. Process drawing which shows the manufacturing method of the semiconductor device which concerns on Example 3 of this invention. Process drawing which shows the manufacturing method of the semiconductor device which concerns on Example 3 of this invention. Process drawing which shows the manufacturing method of the semiconductor device which concerns on Example 3 of this invention. Process drawing which shows the manufacturing method of the semiconductor device which concerns on the modification of Example 3 of this invention.

Explanation of symbols

100: Film to be processed 101: First film
105: First pattern
106: Antireflection film (developer-soluble antireflection film)
107: resist film 108: resist pattern 109: wiring groove 110: wiring pattern 111: antireflection insulating film 112: sacrificial film
113: Sacrificial film pattern

Claims (5)

Forming a first pattern on the workpiece film;
A step of sequentially forming an antireflection film and a resist film on the film to be processed including the region where the first pattern is formed;
The resist film is developed to form a resist pattern to expose the antireflection film, and the exposed antireflection film is removed using a developer used for developing the resist film, and the film to be processed Exposing a part of the first pattern and at least a part of the first pattern;
Processing the film to be processed using the first pattern and the resist pattern as a mask;
A method for manufacturing a semiconductor device, comprising: Forming a first pattern on the workpiece film;
A step of sequentially forming an antireflection film and a resist film on the film to be processed including the region where the first pattern is formed;
The resist film is developed to form a resist pattern to expose the antireflection film, and the exposed antireflection film is removed using a developer used for developing the resist film. Exposing a part of the pattern;
Processing the exposed first pattern portion;
Removing the resist pattern and the antireflection film;
A method for manufacturing a semiconductor device, comprising: Forming an antireflection insulating film on the film to be processed;
Forming a first pattern on the antireflection insulating film;
Forming a resist film on the antireflection insulating film including the region where the first pattern is formed;
Forming a resist pattern on the resist film to expose at least a part of the antireflection insulating film and the first pattern;
Processing the antireflection insulating film using the exposed first pattern and the resist pattern as a mask to expose the film to be processed;
Processing the exposed film to be processed;
A method for manufacturing a semiconductor device, comprising: Forming an antireflection insulating film on the film to be processed;
Forming a first pattern on the antireflection insulating film;
Forming a resist film on the antireflection insulating film including the region where the first pattern is formed;
Forming a resist pattern on the resist film to expose a part of the first pattern;
Processing the exposed first pattern;
After processing and removing the resist pattern, processing the antireflection insulating film to expose the film to be processed;
Processing the exposed film to be processed;
A method for manufacturing a semiconductor device, comprising: The step of forming the first pattern on the film to be processed includes:
Forming a sacrificial film on the film to be processed;
Processing the sacrificial film to form a sacrificial film pattern;
Forming a first film so as to cover the sacrificial film pattern on the film to be processed;
Processing the first film to expose the film to be processed, and forming the first pattern on the side wall of the sacrificial film pattern;
Removing the sacrificial film pattern;
5. The method of manufacturing a semiconductor device according to claim 1, comprising:

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