JP2008166565A - Circuit device and digital broadcast receiving device - Google Patents

Abstract

An object of the present invention is to suppress an increase in size accompanying an increase in connection electrodes.
A wiring substrate having a wiring layer on at least one surface side, a circuit element disposed on one surface of the wiring substrate, connected to the wiring layer, and disposed on one surface of the wiring substrate, A plurality of connection electrodes connected to the wiring layer, wherein the height of the plurality of connection electrodes protruding from one surface of the wiring board is lower than the height of the circuit element protruding from one surface of the wiring board; The contact electrode is in contact with a plurality of connection portions disposed on one surface of the other wiring board, and the circuit element is disposed at a position where the circuit element does not interfere with one surface of the other wiring substrate. Connectable.
[Selection] Figure 6

Description

  The present invention relates to a circuit device and a digital broadcast receiving device.

  In order to reduce the size of equipment on which a semiconductor device is mounted, it is important to reduce the size of a circuit device including the semiconductor device. As a technique for reducing the size of a circuit device, SoC (System on a Chip) or SiP (System in Package) storing various functions in one chip is used.

  FIG. 8 is a diagram illustrating a configuration example of a circuit device configured using SiP. The circuit device 200 includes a wiring board 201 having a multilayer wiring layer. A bare chip LSI (Large Scale Integration) 202 is disposed on one surface of the wiring substrate 201, and the surface on which the LSI 202 is disposed is sealed with a sealing resin 203. On the other surface of the wiring board 201, a memory 204 for storing data used when the LSI 202 executes processing is disposed. Furthermore, a plurality of connection electrodes 205 for connecting the circuit device 200 to the wiring board 210 are disposed on the other surface of the wiring board 201. In this way, by mounting a plurality of circuit elements on one circuit device 200, connection electrodes required for an interface with an external device, compared to the case where all the circuit elements are separately connected to the wiring board 210, are provided. The number 205 can be reduced, and the size of the circuit device 200 can be reduced.

Further, in order to reduce the mounting area of the circuit device 200 on the wiring substrate 210, the circuit device 200 is generally surface-mounted (flip-chip mounted). As illustrated in FIG. 8, the connection electrode 205 is composed of, for example, a solder ball or the like, and is disposed on the same surface as the memory 204 of the wiring board 201. Then, the connection electrode 205 is brought into contact with the wiring board 210 and, for example, the solder constituting the outer periphery of the connection electrode 205 is melted, whereby the circuit device 200 is mounted on the wiring board 210. Thus, when the circuit device 200 is surface-mounted, the height of the connection electrode 205 needs to be larger than the thickness of the memory 204 so that the memory 204 does not become an obstacle at the time of mounting (see, for example, Patent Document 1). ).
JP 2006-129255 A

  By the way, the number of bits of data transmitted / received between the circuit device 200 mounted on these devices and the external device increases with the full high-definition support of the digital broadcast receiving device and the higher resolution of the digital camera, for example. There is. In such a case, it is necessary to increase the number of connection electrodes 205, but the connection electrode 205 cannot be reduced due to the limitation of the thickness of the memory 204, and the size of the circuit device 200 increases as the number of connection electrodes 205 increases. turn into.

  The present invention has been made in view of the above problems, and an object thereof is to provide a circuit device and a digital broadcast receiving device that can suppress an increase in size accompanying an increase in connection electrodes.

  To achieve the above object, a circuit device of the present invention includes a wiring board having a wiring layer on at least one surface side, and a circuit element disposed on the one surface of the wiring board and connected to the wiring layer. And a plurality of connection electrodes disposed on the one surface of the wiring board and connected to the wiring layer, the height of the plurality of connection electrodes protruding from the one surface of the wiring board Is lower than the height of the circuit element protruding from the one surface of the wiring substrate, and the plurality of connection electrodes are in contact with a plurality of connection portions disposed on one surface of the other wiring substrate. The circuit element can be connected by being disposed at a position where it does not interfere with the one surface of the other wiring board.

  In the circuit device, each of the plurality of connection electrodes may be formed in a substantially spherical shape.

  In the circuit device, the plurality of connection electrodes may be disposed on at least two opposing sides of the one surface of the wiring board.

  In the circuit device, the plurality of connection electrodes are in contact with the plurality of connection portions of the other wiring board, and the circuit element is connected to the other surface from the one surface of the other wiring board. It can also be supposed that it can connect by inserting in the excision part excised toward the direction.

  The digital broadcast receiving apparatus of the present invention includes a tuner that outputs a digital broadcast signal of a desired channel, a digital broadcast processing apparatus that outputs an analog video signal based on the digital broadcast signal output from the tuner, An analog video processing device that performs video display processing based on the analog video signal output from the digital broadcast processing device, wherein the device is mounted on a first wiring board; The wiring board has a plurality of connecting portions arranged on one side, and the digital broadcast processing device has a second wiring board having a wiring layer on at least one side, and the second wiring board. A circuit element disposed on one side, connected to the wiring layer, and related to processing based on the digital broadcast signal; and the one of the second wiring boards A plurality of connection electrodes connected to the wiring layer, wherein a height of the plurality of connection electrodes protruding from the one surface of the second wiring board is the first of the circuit elements. The height is lower than the height protruding from the one surface of the two wiring boards, the plurality of connection electrodes are in contact with the plurality of connection portions, and the circuit element does not interfere with the one surface of the first wiring board. By being arranged at the position, it is possible to connect to the first wiring board.

  It is possible to provide a circuit device and a digital broadcast receiving device that can suppress an increase in size accompanying an increase in connection electrodes.

  First, the configuration of a digital broadcast processing apparatus which is an embodiment of the circuit device of the present invention will be described. FIG. 1 is a plan view showing the configuration of the digital broadcast processing apparatus 10. The digital broadcast processing apparatus 10 is mounted on the wiring board 11, FIG. 1A is a plan view seen from one side of the wiring board 11, and FIG. 1B is the other side of the wiring board 11. It is the top view seen from.

  The digital broadcast processing apparatus 10 includes a wiring board 11, a digital broadcast LSI (Large Scale Integration) 12, a flash memory 13, a DDR-SDRAM (Double Data Rate Synchronous Dynamic Random Access Memory) 14, chip elements 15 and 16, and a crystal oscillator. 17 and 18 are included.

  The wiring board 11 has a multilayer wiring structure, and the digital broadcasting LSI 12 and the flash memory 13 are connected to the wiring layer (first wiring layer) on one side (the surface shown in FIG. 2A), and the other side. The DDR-SDRAM 14, chip elements 15 and 16, and crystal oscillators 17 and 18 are connected to the wiring layer (second wiring layer) on the surface (surface shown in FIG. 2B).

  The digital broadcast LSI 12 (integrated circuit) is a bare chip that performs processing such as demodulation and decoding of a digital broadcast signal. The flash memory 13 (integrated circuit) is a bare chip having a storage area in which programs executed in the digital broadcast LSI 12, definition data necessary for various processes, and the like are stored. As shown in FIG. 2A, a sealing resin 20 is provided on one surface of the wiring board 11 so as to cover the digital broadcast LSI 12 and the flash memory 13 which are bare chips. The sealing resin 20 is formed by, for example, transfer molding, which is a molding method in which a mold resin tablet is poured into a heated mold.

  The DDR-SDRAM 14 (circuit element) is a resin-sealed package having a storage area for temporarily storing data used when the digital broadcast LSI 12 executes various processes. The chip elements 15 and 16 are bypass capacitors, chip resistors, or the like. In particular, the chip element 15 that is a bypass capacitor is used to suppress the influence of power supply noise in the digital broadcast LSI 12. The crystal oscillators 17 and 18 are packages that generate clocks having different frequencies. For example, a clock generated by the crystal oscillator 18 is used as a system clock in the digital broadcast processing apparatus 10, and a clock generated by the crystal oscillator 17 is used when demodulating a digital broadcast signal.

  The other surface of the wiring board 11 is provided with a plurality of connection electrodes 21 arranged in two rows on two opposing sides (upper and lower sides in FIG. 2B). The connection electrode 21 can be configured using a substantially spherical connection member such as a solder ball. When the connection electrode 21 is configured using the solder ball, the digital broadcast processing is performed by melting the solder that forms the outer periphery of the connection electrode 21 after the connection electrode 21 is brought into contact with a connection portion of another wiring board. The device 10 is connected to another wiring board. In the present embodiment, the connection electrodes 21 are provided only on the two opposing sides of the other surface of the wiring board 11, but on the other sides (the left and right sides in FIG. 2B). Alternatively, the connection electrode 21 may be provided. Further, the connection electrodes 21 are arranged in two rows on each side, but may be only one row or three or more rows. Furthermore, the connection electrode 21 may be provided on the other surface of the wiring board 11 at a position different from the side.

  A plurality of test connection terminals 24 (test terminals) are provided at positions where the DDR-SDRAMs 14 are arranged on the wiring board 11. The connection terminal 24 is not visible from the surface when the DDR-SDRAM 14 is connected to the wiring board 11. When the DDR-SDRAM 14 is not connected to the wiring board 11, the digital broadcasting LSI 12 or the flash memory is connected. It is used as a terminal for 13 operation tests. In the present embodiment, the connection terminal 24 is provided on the back side of the DDR-SDRAM 14, but the connection terminal 24 can also be provided at an available position even when the DDR-SDRAM 14 is disposed. .

  FIG. 2 is a cross-sectional view of the digital broadcast processing apparatus 10. 2A is a diagram showing a cross section taken along line AA ′ shown in FIG. 1, and FIG. 2B is a diagram showing a cross section taken along line BB ′ shown in FIG. is there. The wiring board 11 includes a base material 40 and wiring layers 41 </ b> A to 41 </ b> D formed on both surfaces of the base material 40. As the base material 40, for example, a glass epoxy substrate in which an epoxy resin is impregnated on a laminate of glass cloths can be used. A wiring layer 41B is provided on one surface side (the upper surface side in FIG. 2) of the substrate 40, and a wiring layer 41A (first wiring layer) is provided on the wiring layer 41B via an insulating layer 42. Are stacked. Furthermore, the wiring layer 41A is covered with a coating resin 43. Further, a wiring layer 41C is provided on the other surface side (the lower surface side in FIG. 2) of the base material 40, and a wiring layer 41D is laminated below the wiring layer 41C via an insulating layer 44. . Furthermore, the wiring layer 41D is covered with a coating resin 45. The connection electrode 21 is formed of a solder ball or the like. In the present embodiment, the wiring board 11 has four layers. However, the number of wiring boards 11 is not limited to this and may be two or more.

  As shown in FIG. 2A, the wiring layers 41 </ b> A and 41 </ b> B are electrically connected at predetermined positions via connection portions 46 that penetrate the insulating layer 42. Further, the wiring layers 41C and 41D are electrically connected at a predetermined position by a connecting portion 47 that penetrates the insulating layer 44. Furthermore, the wiring layers 41 </ b> B and 41 </ b> C are electrically connected by a connection portion 48 that penetrates the base material 40.

  Further, a part of the wiring layer 41A is a pad 49 which is an electrical connection region, and the pad 49 is not covered with the coating resin 43 and is subjected to, for example, a gold plating process. Similarly, a part of the wiring layer 41D is a pad 50 which is an electrical connection region, and the pad 50 is not covered with the coating resin 45 and is subjected to, for example, a gold plating process. As shown in FIG. 2A, the terminals of the digital broadcast LSI 12 that is a bare chip are connected to the pads 49 through the fine metal wires 51. Further, the terminal of the chip element 15 which is a bypass capacitor is connected to the pad 50 through a conductive adhesive such as solder. As shown in FIG. 2B, the terminal of the flash memory 13 that is a bare chip is connected to the pad 49 through a thin metal wire 51. In the DDR-SDRAM 14 as a package, the lead 54 connected to the terminal is connected to the pad 50 through a conductive adhesive such as solder.

  Further, as shown in FIGS. 2A and 2B, two pads 50 are provided on both sides of the wiring layer 41 </ b> D, and the connection electrode 21 is connected to each pad 50. The connecting electrode 21 has a core 52 made of resin at the center, and has a conductive member 53 made of a conductive metal layer and a solder layer on the outer periphery of the core 52, and is formed in a substantially spherical shape. Yes. As can be seen from FIG. 2B, the height of the connection electrode 21 protruding from the other surface of the wiring substrate 11 is lower than the height of the connection electrode 21 protruding from the other surface of the wiring substrate 11 of the DDR-SDRAM 14. . That is, the connection electrode 21 is smaller than the thickness of the DDR-SDRAM 14, and the area necessary for disposing one connection electrode 21 on the wiring board 11 can be reduced. In other words, more connection electrodes 21 can be provided without increasing the area of the wiring substrate 11 than when the height of the connection electrodes 21 is made larger than the thickness of the DDR-SDRAM 14.

  Further, as shown in FIG. 2A, the chip element 15 that is a bypass capacitor is disposed almost directly below the terminal of the digital broadcast LSI 12. In the wiring from the terminal (power supply terminal) of the digital broadcast LSI 12 to the terminal of the chip element 15 that is a bypass capacitor, it can be seen that the length of the wiring in each of the layers 41A to 41D is very short. Therefore, the length of the wiring from the power supply terminal of the digital broadcasting LSI 12 to the terminal of the chip element 15 which is a bypass capacitor is very short. For example, from the wiring from the other terminal of the digital broadcasting LSI 12 to the terminal of the DDR-SDRAM 14. Is also shorter.

  That is, even when the terminal interval of the digital broadcast LSI 12 is narrow, the chip that is a bypass capacitor is disposed from the power supply terminal of the digital broadcast LSI 12 by disposing the chip element 15 that is a bypass capacitor almost directly below the terminal of the digital broadcast LSI 12. The distance to the terminal of the element 15 can be shortened. Then, by reducing the length of the wiring from the power supply terminal of the digital broadcast LSI 12 to the terminal of the chip element 15 that is a bypass capacitor, it is possible to effectively suppress the influence of power supply noise.

  FIG. 3 is a diagram showing a wiring pattern in the digital broadcast processing apparatus 10. FIG. 3A is a view of the wiring pattern of the wiring layer 41A as viewed from the side where the sealing resin 20 is provided. FIG. 3B is a view of the wiring pattern of the wiring layer 41D as viewed from the side where the sealing resin 20 is provided.

  As shown in FIG. 3A, the wiring layer 41A forms a wiring 60 and a conductive pattern 61 in addition to the connection portion 46 (46A, 46B, etc.) and the pad 49 (49A, 49B, etc.) described above. The wiring 60 is for connecting between the pad 49 and the connection portion 46 or between the plurality of connection portions 46. The conductive pattern 61 is connected to a predetermined potential such as a power supply potential or a ground potential, for example, and forms a shield layer that absorbs noise generated in the digital broadcast processing apparatus 10. In addition, the formation of the conductive pattern 61 increases the area of the wiring layer 41A made of copper or the like having excellent heat dissipation, and improves the heat dissipation performance in the digital broadcast processing apparatus 10. Furthermore, a plurality of removal portions 62 are provided by removing the conductive pattern 61 in a diamond shape, for example. The removal portions 62 are provided at almost equal intervals throughout the conductive pattern 61. By forming the removal portion 62 on the conductive pattern 61, the thickness of the coating resin 43 covering the wiring layer 41A can be made uniform. Further, by providing the removal portion 62, it is possible to suppress the occurrence of a delamination phenomenon called delamination due to the pressure of moisture contained in the wiring board 11 during heating such as solder reflow. Similarly, as shown in FIG. 3B, the wiring layer 41D includes the wiring 63 and the connection terminals 24, the connection portions 47 (47A, 47B, etc.) and the pads 50 (50A, 50B, 50C, etc.) described above. A conductive pattern 64 is formed. Further, similarly to the conductive pattern 61, a removal portion 65 is provided in the conductive pattern 64.

  Here, for example, the power supply terminal of the digital broadcast LSI 12 is connected to the pad 49A of the wiring layer 41A via the thin metal wire 51. The pad 49A is connected to the connection portion 46A via the wiring 60, and is connected to the connection portion 47A of the wiring layer 41D via the wiring layers 41B and 41C. The connecting portion 47A of the wiring layer 41D is connected to the pad 50A through the wiring 63. Then, by connecting one terminal of the chip element 15 as a bypass capacitor to the pad 50A, the power supply terminal of the digital broadcast LSI 12 and one terminal of the chip element 15 as a bypass capacitor are electrically connected. It becomes. As described above, the pad 50A to which one terminal of the chip element 15 that is a bypass capacitor is connected is provided almost immediately below the pad 49A to which the power supply terminal of the digital broadcast LSI 12 is connected. The length of the wiring up to 50A can be shortened, and the influence of power supply noise can be effectively suppressed.

  Further, for example, one of the data input / output terminals of the digital broadcast LSI 12 is connected to the pad 49B of the wiring layer 41A through the fine metal wire 51. The pad 49B is connected to the connection portion 46B via the wiring 60, and is connected to the connection portion 47B of the wiring layer 41D via the wiring layers 41B and 41C. The connection portion 47B of the wiring layer 41D is connected to the pad 50B through the wiring 63. Then, one of the data input / output terminals of the DDR-SDRAM 14 is connected to the pad 50B, whereby one of the data input / output terminals of the digital broadcast LSI 12 and one of the data input / output terminals of the DDR-SDRAM 14 are electrically connected. The Rukoto. Here, when the DDR-SDRAM 14 is used, in order to suppress the occurrence of skew, it is required as a JEDEC (Joint Election Device Engineering Council) standard to make the lengths of wirings for transmitting and receiving data and strobe signals equal. Therefore, in the digital broadcast processing apparatus 10, the lengths of the plurality of wirings connecting the data and strobe signal input / output terminals of the digital broadcast LSI 12 and the data and strobe signal input / output terminals of the DDR-SDRAM 14 are made equal. Wiring layers 41A to 41D are formed. For example, the equal wiring length is realized by making the wiring 60 of the wiring layer 41A, the wiring 63 of the wiring layer 41D, and the wiring of the wiring layers 41B and 41C into a meander pattern (meandering shape).

  A plurality of pads 50C corresponding to the number of connection electrodes 21 are provided on two opposing sides (upper and lower sides in FIG. 3B) of the wiring layer 41D. The connection electrode 21 connected to the pad 50C is connected to the digital broadcast LSI 12, the flash memory 13, the DDR-SDRAM 14 and the like via wiring provided in the wiring layers 41A to 41D.

  FIG. 4 is a block diagram showing the configuration of the digital broadcast LSI 12. The digital broadcast LSI 12 includes a processor 100, an AD converter (ADC) 101, a demodulation unit 102, a separation unit 103, a video decoding unit 104, an audio decoding unit 105, a character decoding unit 106, a conversion unit 107, a DA converter (DAC) 108, and A digital interface unit (digital I / F unit) 110 is provided. Here, the ADC 101 and the DAC 108 serving as analog signal interfaces correspond to the analog processing device of the present invention, and a demodulating unit 102, a separating unit 103, a video decoding unit 104, an audio decoding unit 105, and a character decoding unit that perform digital signal processing. 106, the conversion unit 107, and the digital I / F unit 110 correspond to the digital processing apparatus of the present invention. Note that the demodulation unit 102, the separation unit 103, the video decoding unit 104, the audio decoding unit 105, the character decoding unit 106, and the conversion unit 107 are realized by the processor 100 executing a program stored in the flash memory 13. Can do.

  The ADC 101 receives a reception signal of a desired channel output from a digital broadcast tuner via a connection electrode 21 for inputting an analog signal. The ADC 101 converts an input received signal (analog signal) into a digital signal and outputs it.

  The demodulator 102 uses a clock having a predetermined frequency generated by the crystal oscillator 18 to convert a digital signal output from the ADC 101 based on, for example, a VSB (Vestigial Side Band) method, a QAM (Quadrature Amplitude Modulation) method, or the like. Demodulate. Further, the demodulator 102 performs error correction on the demodulated digital signal, and generates and outputs, for example, transport stream format data.

  The separation unit 103 extracts video data packets, audio data packets, and character data packets from data such as a transport stream format output from the demodulation unit 102. The video decoding unit 104, the audio decoding unit 105, The data is output to the character decoding unit 106. The packet of character data includes, for example, closed caption data for displaying subtitles and the like.

The video decoding unit 104 performs, for example, MPEG-2 (Moving Picture Experts Group phase 2) demodulation processing on the video data packet output from the separation unit 103 and outputs the result as digital video data.
The audio decoding unit 105 performs, for example, AC-3 (Audio Code number 3) demodulation processing on the audio data packet output from the demultiplexing unit 103, and outputs the result as analog audio data.
The character decoding unit 106 generates and outputs digital video data indicating characters to be displayed on the display from the character data output from the separation unit 105.

  The conversion unit 107 combines the digital video data output from the video decoding unit 104 and the character decoding unit 106 to superimpose characters on the video, and then converts the digital video data into, for example, NTSC (National Television System Committee) format digital video data. Output.

  The DAC 108 converts the digital video data output from the conversion unit 107 into analog video data, and outputs the analog video data via the connection electrode 21 that outputs an analog signal. When the analog video data output from the DAC 108 is in the NTSC format, the video can be displayed by processing performed in a general analog broadcast receiver (analog television).

  The digital I / F unit 110 is an interface for transmitting / receiving digital signals to / from an external microcomputer 115 or the like. The digital signal input / output via the digital I / F 110 is, for example, a clock signal, an interrupt signal, a signal transmitted / received in a UART (Universal Asynchronous Receiver Transmitter) which is serial communication, or the like. These digital signals are transmitted / received between the processor 100 and the microcomputer 115 via the digital I / F unit 110 and used for controlling various processes performed in the digital broadcast LSI 12.

  FIG. 5 is a perspective view showing a state when the digital broadcast processing apparatus 10 is inserted into another wiring board. The wiring board 120 has a wiring layer on at least one surface, and includes a plurality of connection portions 121 formed by a part of the wiring layer. In addition, an opening 122 (removal portion) is provided in a part of the wiring board 120. The opening 122 has a width (length in the left-right direction in FIG. 5) that is narrower than the width of the digital broadcast processing device 10 and an area that is larger than the area of the DDR-SDRAM 14. Then, the DDR-SDRAM 14 is inserted into the opening 122 and stored in the space formed by the opening 122, and each connection electrode 21 is brought into contact with the corresponding connection 121, whereby the digital broadcast processing device 10 is Mounted on the wiring board 120.

  FIG. 6 is a cross-sectional view showing a state in which the digital broadcast processing apparatus 10 is connected to the wiring board 120. As described above, the DDR-SDRAM 14 is inserted into the opening 122 provided in a part of the wiring board 120. The connection electrode 21 is connected to a connection part 121 provided on one surface of the wiring board 120, and the connection part 121 is connected to the other side of the wiring board 120 through a connection part 123 that penetrates the wiring board 120, for example. It is connected to a wiring 124 provided on the surface. In addition, a wiring layer is not provided on both surfaces of the wiring board 120, but a wiring layer may be provided only on the surface connected to the connection electrode 21, or three or more wiring layers are formed. Also good.

  In this embodiment, the DDR-SDRAM 14 is inserted into the opening 122 of the wiring board 120. However, the connection mode between the digital broadcast processing apparatus 10 and the wiring board 120 is not limited to this, and the DDR-SDRAM 14 is It does not have to interfere with one surface of the wiring board 120. For example, for example, a recess (removal portion) that is removed without penetrating from one surface of the wiring substrate 120 toward the other surface is provided, and the connection electrode 21 is brought into contact with the connection portion 121 of the wiring substrate 120. In the state, the digital broadcast processing device 10 and the wiring board 120 may be connected by inserting the DDR-SDRAM 14 into the recess. In addition, for example, a notch (removal part) is provided in a part of the periphery of the wiring board 120, and the digital broadcast processing device 10 and the wiring board 120 are connected by inserting the DDR-SDRAM 14 into the notch. Also good. Further, the connection electrode 21 may be brought into contact with the connection part 121 of the wiring board 120 without providing a cutout part in the wiring board 120, and the DDR-SDRAM 14 may be arranged at a position where it does not interfere with the wiring board 120. Good. For example, the DDR-SDRAM 14 is disposed on one side (for example, the right side of FIG. 6) of the surface of the wiring substrate 11 facing the wiring substrate 120, and the connection electrode 21 is disposed only on the other side (for example, the left side of FIG. 6). The digital broadcast processing device 10 and the wiring board 120 may be connected so that the DDR-SDRAM 14 protrudes from the side of the wiring board 120.

  Next, an embodiment of the digital broadcast receiving apparatus of the present invention will be described. FIG. 7 is a block diagram showing a configuration of the digital broadcast receiving apparatus 130. The digital broadcast receiving apparatus 130 includes a microcomputer 115 that performs overall control, a tuner 131, a digital broadcast processing apparatus 10, an analog video processing apparatus 132, a display 134, a speaker 135, and a power supply device 136 that supplies power to each unit. Has been.

  The tuner 131 extracts a desired channel signal from the digital broadcast signal received via the antenna 140 and outputs the extracted signal. A signal output from the tuner 131 is input to the digital broadcast processing apparatus 10, and analog video data and analog audio data are output by the above-described processing. The analog video processing device 132 outputs video to the display 134 based on, for example, NTSC format analog video data output from the digital broadcast processing device 10. The analog audio data output from the digital broadcast processing apparatus 10 is output as audio from the speaker 135.

  In this way, by combining the digital broadcast processing device 10 and the analog video processing device 132, it is possible to configure a digital broadcast receiving device 130 that can receive a digital broadcast. In the digital broadcast processing apparatus 10, since the height of the connection electrode 21 is lower than the thickness of the DDR-SDRAM 14, it is possible to increase the number of connection electrodes 21 while suppressing an increase in size. That is, the digital broadcast receiving apparatus 130 can suppress an increase in size due to an increase in the number of connection electrodes 21 in the case of supporting full-spec high-vision or the like with a large amount of input / output data.

  The embodiment of the present invention has been described above. As described above, in the digital broadcast processing apparatus 10, the height of the connection electrode 21 is lower than the thickness of the DDR-SDRAM 14, and the area necessary for disposing the connection electrode 21 can be reduced. That is, it is possible to suppress an increase in the size of the digital broadcast processing device 10 with an increase in the number of connection electrodes 21.

  In particular, when the connection electrode 21 has a substantially spherical shape such as a solder ball, the width is likely to be wider than when the connection electrode 21 has a columnar shape. However, in the digital broadcast processing apparatus 10, the height of the connection electrode 21 may be reduced. Since it is possible, it can suppress that an area required for arrangement | positioning of the connection electrode 21 becomes large. That is, even when the connection electrode 21 has a substantially spherical shape such as a solder ball, an increase in the size of the digital broadcast processing apparatus 10 accompanying an increase in the number of connection electrodes 21 can be suppressed.

  In the digital broadcast processing apparatus 10, connection electrodes 21 are disposed on two opposite sides of the wiring board 11. By arranging the connection electrodes 21 on the opposite sides of the wiring board 11 in this way, when the digital broadcasting processing apparatus 10 is mounted on another wiring board 120, the shaking of the digital broadcasting processing apparatus 10 is suppressed. It becomes possible to connect easily and reliably.

  Further, in the digital broadcast processing apparatus 10, the digital broadcast processing apparatus 10 and the wiring board 120 are connected in a state where the DDR-SDRAM 14 is inserted into the cut portion (opening 122) of the wiring board 120. As a result, it is possible to connect the digital broadcast processing device 10 and the wiring substrate 120 in a state where the DDR-SDRAM 14 does not protrude from the side of the wiring substrate 120, and stability in a state where the digital broadcast processing device 10 is connected. The degree can be increased. Then, as illustrated in FIG. 6, the connection electrode 21 is disposed at a position opposite to at least two sides of the DDR-SDRAM 14, so that the digital broadcast processing apparatus 10 is mounted on the wiring board 120. You can reduce the date. In the present embodiment, the connection electrode 21 is disposed at a position facing two opposing sides of the DDR-SDRAM 14, but a position facing the adjacent side of the DDR-SDRAM 14 (for example, The connection electrode 21 may be disposed on the right side and the lower side in FIG.

  The above-described embodiments are for facilitating understanding of the present invention, and are not intended to limit the present invention. The present invention can be changed and improved without departing from the gist thereof, and the present invention includes equivalents thereof.

It is a top view which shows the structure of a digital broadcast processing apparatus. It is sectional drawing of a digital broadcast processing apparatus. It is a figure which shows the wiring pattern in a digital broadcast processing apparatus. It is a block diagram which shows the structure of digital broadcasting LSI. It is a perspective view which shows a mode at the time of inserting a digital broadcast processing apparatus in another wiring board. It is sectional drawing which shows a mode that the digital broadcast receiver was connected to the other wiring board. It is a block diagram which shows the structure of a digital broadcast receiver. It is a figure which shows the structural example of the circuit apparatus comprised using SiP.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Digital broadcast processing apparatus 11 Wiring board 12 Digital broadcast LSI 13 Flash memory 14 DDR-SDRAM 15, 16 Chip element 17, 18 Crystal oscillator 20 Sealing resin 21 Connection electrode 40 Base material 41A-41D Wiring layer 42, 44 Insulating layer 43, 45 Coating resin 46, 47 Connection portion 49, 50 Pad 51 Metal fine wire 52 Core 53 Conductive member 54 Lead 60, 63 Wiring 61, 64 Conductive pattern 62, 65 Cutting portion 100 Processor 101 AD converter 102 Demodulating portion 103 Separating portion 104 Video decoding unit 105 Audio decoding unit 106 Character decoding unit 107 Conversion unit 108 DA converter 110 Digital interface unit 115 Microcomputer 120 Wiring board 121, 123 Connection unit 122 Opening 124 Wiring 130 Digital Broadcast receiver 131 tuner 132 analog image processing apparatus 134 displays 135 the speaker 136 the power supply 140 antenna

Claims (5)

A wiring board having a wiring layer on at least one surface side;
A circuit element disposed on the one surface of the wiring board and connected to the wiring layer;
A plurality of connection electrodes disposed on the one surface of the wiring board and connected to the wiring layer;
With
The height of the plurality of connection electrodes protruding from the one surface of the wiring board is lower than the height of the circuit element protruding from the one surface of the wiring board,
The plurality of connection electrodes are in contact with a plurality of connection portions disposed on one surface of another wiring substrate, and the circuit element is disposed at a position where the circuit element does not interfere with the one surface of the other wiring substrate. Being connectable by being installed,
A circuit device characterized by the above. The circuit device according to claim 1,
Each of the plurality of connection electrodes is formed in a substantially spherical shape;
A circuit device characterized by the above. The circuit device according to claim 1 or 2,
The plurality of connection electrodes are disposed on at least two opposite sides of the one surface of the wiring board;
A circuit device characterized by the above. The circuit device according to any one of claims 1 to 3,
The excision in which the plurality of connection electrodes are brought into contact with the plurality of connection portions of the other wiring substrate and the circuit element is excised from the one surface of the other wiring substrate toward the other surface. Can be connected by being inserted into the part,
A circuit device characterized by the above. A tuner that outputs a digital broadcast signal of a desired channel;
A digital broadcast processing device that outputs an analog video signal based on the digital broadcast signal output from the tuner;
An analog video processing device that performs video display processing based on the analog video signal output from the digital broadcast processing device;
Is a digital broadcast receiving device in which the device including the device is mounted on the first wiring board,
The first wiring board is:
Having a plurality of connecting portions arranged on one side;
The digital broadcast processing device includes:
A second wiring board having a wiring layer on at least one surface side;
A circuit element disposed on the one surface of the second wiring board, connected to the wiring layer, and related to processing based on the digital broadcast signal;
A plurality of connection electrodes disposed on the one surface of the second wiring board and connected to the wiring layer;
With
The height of the plurality of connection electrodes protruding from the one surface of the second wiring board is lower than the height of the circuit element protruding from the one surface of the second wiring board,
The plurality of connection electrodes are in contact with the plurality of connection portions, and the circuit element is disposed at a position where the circuit element does not interfere with the one surface of the first wiring board, thereby connecting to the first wiring board. Being possible,
A digital broadcast receiver characterized by the above.