JP2008141020A - Semiconductor device and manufacturing method of semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device having the external connection terminal where a void does not exist and to provide a method of manufacturing the device. <P>SOLUTION: In the semiconductor device having the external connection terminal which is electrically connected to an electrode installed on a mounting board and in the method of manufacturing the device, the external connection terminal includes metallic posts 17' which are arranged to project from a terminal installation face where the external connection terminal is arranged and with protection coats 18 protecting surfaces of the posts. The protection coats are set to be solder coats, and openings are formed in forming positions of the posts. A resin film 16 where the openings are filled with metals is thinned. Thus, the posts are constituted of the metals in the openings exposed from the resin film. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device, and more particularly to a semiconductor device characterized by an external connection terminal that is electrically connected to an electrode provided on a mounting substrate, and a method for manufacturing the semiconductor device. is there.

  Conventionally, a semiconductor device provided with a solder ball as an external connection terminal that is electrically connected to an electrode provided on a mounting substrate is well known. These semiconductor devices are generally called “BGA (Ball Grid Array)”. As a semiconductor device in which the size of a package is reduced to the size of a semiconductor chip built in such a BGA, A semiconductor device called “CSP (Chip Scale Package)” is known.

  Recently, in order to further reduce the size of the CSP, a semiconductor device called a wafer level CSP has been used due to a demand for further downsizing of the semiconductor device.

  The wafer level CSP (hereinafter referred to as “WL-CSP”) is a semiconductor device in which a structure having a function as a package is formed in a state before the wafer is cut by dicing. After cutting by the above, it becomes a semiconductor device as it is and can be mounted on a mounting substrate (for example, see Patent Document 1).

  Therefore, solder balls serving as external connection terminals are mounted at predetermined positions on the wafer before dicing, and after dicing, the wafers can be shipped as products after being cleaned.

  In such WL-CSP, the pitch between the external connection terminals is about 400 μm, and the solder ball serving as the external connection terminal is about 100 μm in height.

Therefore, when forming the external connection terminal at a predetermined position, a spherical solder ball is arranged at the predetermined position, and the solder ball is melted and mounted, or solder paste is applied to the predetermined position by screen printing or the like. In many cases, solder balls are formed by melting the solder by heating to the melting temperature of the solder paste.
JP 2001-244372 A

  However, when the external connection terminal is formed of a solder ball, the spherical solder ball or solder paste is once melted, so that when the molten solder re-solidifies, air is caught and the solder ball is There was a problem that voids were formed.

  In addition, when mounting a semiconductor device on a mounting board at a customer site, when solder paste is applied to the mounting board side electrode and the mounting board side electrode has a via structure, In this case, a recess is formed in the electrode, and air entrapment occurs between the recess of the electrode and the solder paste when the solder paste is applied. Therefore, the semiconductor in which the spherical solder ball is mounted without melting Even in the device, as the solder ball melts, the air that is bitten between the electrode recess and the solder paste becomes a void and is taken into the solder ball, and a void is formed in the solder ball. Was supposed to be.

  As described above, when voids are generated in the solder balls, there is a problem that voids may burst due to expansion of air in the voids accompanying heating in various processes.

  If the void ruptures, solder splatters due to this rupture, which reduces the volume of the solder ball, which may cause contact failure or fail to ensure sufficient standoff after joining. It was. Alternatively, solder bridging may occur at the point of splattering to cause a short circuit failure.

  Further, even when the void does not rupture, the void may cause a contact failure on the solder ball.

  In view of the present situation, the present inventor has conducted research and development to provide a semiconductor device having an external connection terminal free of voids, and has achieved the present invention.

  In the semiconductor device of the present invention, in the semiconductor device provided with the external connection terminal electrically connected to the electrode provided on the mounting substrate, the external connection terminal is projected from the terminal arrangement surface provided with the external connection terminal. The post made of metal and the protective coating for protecting the surface of the post were provided.

  Further, in the semiconductor device of the present invention, the protective coating is a solder coating, or an opening is provided at the position where the post is formed, and the resin film filled with metal in the opening is thinned. Another feature is that the post is made of metal in the opening exposed from the resin film.

  According to the method for manufacturing a semiconductor device of the present invention, in the method for manufacturing a semiconductor device having an external connection terminal that is electrically connected to an electrode provided on the mounting substrate, the terminal mounting surface on which the external connection terminal is formed is provided. A step of forming a resin film, a step of forming an opening at a position where the external connection terminal of the resin film is formed, a step of filling the opening with metal, and a thin film of the resin film to expose the metal in the opening for external connection The method includes a step of forming a post to be a terminal and a step of forming a protective film on the post surface.

  Further, the semiconductor device manufacturing method of the present invention is characterized in that the protective film is a solder film.

  According to the present invention, the external connection terminal that is electrically connected to the electrode provided on the mounting substrate is protruded from the terminal installation surface provided with the external connection terminal, and the metal post is disposed, By configuring the post with the protective film that protects the surface of the post, a semiconductor device including external connection terminals free from voids can be provided.

  In addition, even if there is a cause of void generation on the mounting substrate side, it is possible to prevent contact failure due to the rupture of the void, or that sufficient tando-off cannot be ensured.

  In particular, the post is provided with an opening at the position where the post is formed, and by forming the resin film in which the metal is filled in the opening into a thin film, the post is configured with the metal in the opening exposed from the resin film. The height of the post can be easily adjusted, the standoff of the semiconductor device can be easily controlled, and the post can be accurately controlled.

  As shown in FIG. 1, the semiconductor device of the present invention is arranged by projecting an external connection terminal electrically connected to an electrode provided on a mounting substrate from a terminal arrangement surface provided with the external connection terminal. The post 17 ′ is made of a metal post 17 ′, and the surface of the post 17 ′ is provided with a protective film 18 for protecting the surface of the post 17 ′ by suppressing oxidation of the surface of the post 17 ′. .

  In FIG. 1, 10 is a wafer which is a substrate of a semiconductor device, 11 is an insulating layer, 12 is a rewiring, 13 is a passivation film, 14 is a buffer film, and 15 is a pad serving as a base of a post 17 'which is an external connection terminal. Reference numeral 16 denotes a photosensitive resin film.

  In this way, by configuring the external connection terminal using the post 17 ', even if there is a cause of void generation on the mounting board side, contact failure occurs due to the rupture of the void, and sufficient tando-off is ensured It can be prevented from becoming impossible.

  Hereinafter, a method for manufacturing the semiconductor device of this embodiment will be described with reference to the drawings. In the following description, the semiconductor device is described as a wafer level CSP, but the semiconductor device is not limited to the wafer level CSP, and may be applied to an appropriate semiconductor device.

  A semiconductor device is manufactured in a wafer state, and a predetermined semiconductor circuit (not shown) is formed by a known semiconductor manufacturing technique in a formation region of each semiconductor chip divided into rectangular shapes by a scribe line on the upper surface of the wafer. Forming.

  After the formation of the semiconductor circuit, as shown in FIG. 2, an insulating layer 11 made of an insulating film such as an oxide film is formed on the upper surface of the wafer 10 on which the semiconductor circuit is formed. The insulating layer 11 is formed to have a predetermined thickness by an appropriate film forming technique such as CVD (Chemical Vapor Deposition). Note that after the insulating layer 11 having a predetermined thickness is formed, the upper surface of the insulating layer 11 may be planarized by a CMP (Chemical Mechanical Polish) technique.

  After the formation of the insulating layer 11, a metal film is formed on the upper surface of the insulating layer 11 by sputtering or the like, and the rewiring 12 is formed by patterning the metal film into a predetermined shape. The rewiring 12 is electrically connected to the electrode formed in the semiconductor chip formation region on the upper surface of the wafer 10, and the rewiring 12 is connected to the semiconductor circuit formed in the semiconductor chip formation region. A required signal can be input and a driving voltage, a ground voltage, and the like can be applied, and a required signal can be extracted from a semiconductor circuit formed in the formation region. In this embodiment, the rewiring 12 is made of aluminum.

  After the rewiring 12 is formed, a passivation film 13 made of a silicon nitride film is formed on the upper surface of the wafer 10 by CVD. The passivation film 13 is not limited to a silicon nitride film, and may be an appropriate insulating film. After the passivation film 13 is formed, the passivation film 13 is patterned to open a part of the rewiring 12 exposed at a portion where the external connection terminal is provided.

  After the passivation film 13 is formed, a buffer film 14 such as a polyimide film is formed on the upper surface of the wafer 10 by spin coating or the like. The buffer film 14 is not limited to a polyimide film, and may be an appropriate insulating film. After the formation of the buffer film 14, the buffer film 14 is patterned to form an opening that communicates with the opening provided in the passivation film 13, and a part of the rewiring 12 is exposed.

  After that, on the upper surface of the wafer 10, a pad 15 serving as a base for the external connection terminal is formed by a metal film in the opening portions of the passivation film 13 and the buffer film.

  The pad 15 may be formed by providing a resist mask (not shown) having an opening in a portion where the pad 15 is formed on the upper surface of the wafer 10 and forming a metal film by electroplating. After forming a metal film by sputtering on the upper surface of the metal 10, this metal film may be formed by patterning, or the pad 15 may be formed by an appropriate means.

  When the pad 15 is formed by electroplating, a metal film is formed on the upper surface of the buffer film 14 before forming the resist mask to form a conductive layer, and the pad 15 can be formed by energizing this conductive layer. For example, as shown in FIG. 3, when the rewiring 12 is formed, a conductive wiring s1 is formed along the scribe line S of the wafer 10 together with the rewiring 12, and the conductive wiring s1 is rewired. By connecting 12, the pad 15 may be formed by energizing the conductive wiring s 1. In the present embodiment, the pad 15 is made of copper.

  After the pad 15 is formed, a photosensitive resin is applied to the upper surface of the wafer 10 to form a photosensitive resin film 16 as shown in FIG. As the photosensitive resin, polyimide, polybenzoxazole, or the like can be used.

  The photosensitive resin film 16 is patterned after applying a photosensitive resin on the wafer 10 to form an opening 16h on the pad 15, and the pad 15 is exposed through the opening 16h. The photosensitive resin can be patterned very easily by being cured based on exposure by a known photolithography technique and removing an unexposed portion by etching.

  After the formation of the photosensitive resin film 16 having the opening 16h, as shown in FIG. 5, the opening 16h is filled with metal to form a metal body to be a post. This metal body to be the post will be referred to as pre-post 17. Filling the opening 16h with metal may be performed by sputtering or by plating. In the present embodiment, the electroplating process is performed, and the pre-post 17 is made of copper.

  After filling the opening 16h with the metal, the wafer 10 is polished by the CMP technique, and the height of the pre-post 17 is adjusted by this polishing. Therefore, the height of the pre-post 17 can be adjusted very easily. In particular, the height adjustment of the pre-post 17 can be made on the micron order, and the pre-post 17 having a uniform height can be formed.

After adjusting the height of the pre-post 17, as shown in FIG. 6, the photosensitive resin film 16 is thinned to expose the pre-post 17 from the photosensitive resin film 16 to form a post 17 ′. In the present embodiment, the photosensitive resin film 16 is composed of a polyimide film, and the polyimide film can be made very thin by O ₂ ashing.

In addition, since the photosensitive resin film 16 is thinned by O ₂ ashing, the protruding amount of the post 17 ′ protruding from the photosensitive resin film 16 can be accurately adjusted. In the present embodiment, the protruding amount of the post 17 ′ is 50 to 80 μm.

  After the thinning of the photosensitive resin film 16, as shown in FIG. 1, a protective film 18 is formed on the surface of the post 17 'to prevent the post 17' from being oxidized. The protective coating 18 may be any coating as long as the post 17 ′ is prevented from being oxidized and can be electrically connected to the electrodes of the mounting substrate, and preferably a gold coating, A solder coating can be used.

  In particular, when the protective coating 18 is formed of a solder coating, it is not necessary to previously apply a solder paste to the electrodes of the mounting board when mounting on the mounting board, and the work process during mounting can be reduced.

  When the protective film 18 is formed, a plating process can be used. Alternatively, when the protective coating 18 is formed of a solder coating, the solder coating is formed not only when the solder coating is formed by solder plating, but also by applying solder to the post 17 'using a jet soldering device. May be.

  After the formation of the protective coating 18, the wafer 10 is divided into individual semiconductor devices by dicing along the scribe lines S.

  As described above, by forming the post 17 ′ by projecting the pre-post 17 by thinning the photosensitive resin film 16, the height of the post 17 ′ and the uniformity of the height can be adjusted with high accuracy. it can.

  Moreover, the photosensitive resin film 16 described above is not only used for forming the post 17 ', but, for example, before the photosensitive resin film 16 is formed, the wafer 10 is half-cut by a dicing device along the scribe line S. Then, the insulating layer 11 is cut along the formation region of the semiconductor chip, and then the photosensitive resin film 16 is formed, and at the time of dicing to divide the wafer 10 into individual semiconductor devices, By forming a cutting groove with a dicing blade in the cutting groove formed at the time of half-cutting, the outer peripheral edge of the insulating layer 11 can be covered with the photosensitive resin film 16 as shown in FIG. The peeling of the insulating layer 11 from the semiconductor substrate to be configured can be suppressed.

It is a principal part cross-sectional schematic diagram of the semiconductor device which concerns on embodiment of this invention. It is manufacturing process explanatory drawing by the principal part cross-sectional schematic diagram of a semiconductor device. It is explanatory drawing of the wiring for electricity supply used for formation of a pad It is manufacturing process explanatory drawing by the principal part cross-sectional schematic diagram of a semiconductor device. It is manufacturing process explanatory drawing by the principal part cross-sectional schematic diagram of a semiconductor device. It is manufacturing process explanatory drawing by the principal part cross-sectional schematic diagram of a semiconductor device. It is explanatory drawing of a modification.

Explanation of symbols

10 Wafer
11 Insulation layer
12 Rewiring
13 Passivation film
14 Buffer membrane
15 pads
16 Photosensitive resin film
17 'post
18 Protective coating

Claims (5)

In a semiconductor device including an external connection terminal that is electrically connected to an electrode provided on a mounting substrate,
The external connection terminal includes a metal post disposed so as to protrude from a terminal disposition surface provided with the external connection terminal, and a protective film for protecting the surface of the post. .   The semiconductor device according to claim 1, wherein the protective film is a solder film.   The post is provided with an opening at a position where the post is formed, and is a metal in the opening exposed from the resin film by thinning a resin film filled with metal in the opening. 3. The semiconductor device according to claim 1, wherein the semiconductor device is characterized. In a manufacturing method of a semiconductor device including an external connection terminal electrically connected to an electrode provided on a mounting substrate,
Forming a resin film on a terminal arrangement surface on which the external connection terminal is formed;
Forming an opening at the formation position of the external connection terminal of the resin film;
Filling the opening with metal;
Thinning the resin film to expose the metal in the opening to form a post to be the external connection terminal;
And a step of forming a protective film on the post surface.   5. The method of manufacturing a semiconductor device according to claim 4, wherein the protective film is a solder film.

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