JP2007128970A - Manufacturing method of multilayer wiring board having cable section - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for inexpensively and stably manufacturing a multilayer wiring board having a cable section with a high integration degree capable of loading narrow pitch CSP. <P>SOLUTION: The manufacturing method of the multilayer flexible wiring board having the cable section on an outer layer includes (a) a process for manufacturing an inner layer core substrate; (b) a process for forming an opening of copper foil in a conduction hole forming part on an outer layer side in a double sided copper clad laminate having flexibility, and forming a circuit pattern comprising an opening of a conduction hole forming part on an inner layer side; (c) a process for forming a cover ray on the circuit pattern to make it to be an outer layer built-up layer, laminating the outer layer built-up layer by turning a side where the cover ray is formed to a side of the inner layer core substrate, and forming the lamination circuit substrate; (d) a process for performing laser processing on the conduction hole forming part of the outer layer side through the opening of copper foil, and forming a conduction hole in the lamination circuit substrate; and (e) a process for performing a conduction processing on the conduction hole, and forming a via hole with electrolytic plating. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a buildup type multilayer wiring board, and more particularly to a method for manufacturing a buildup type multilayer flexible wiring board having a flexible cable portion.

  In recent years, downsizing and higher functionality of electronic devices have been promoted more and more, and therefore, there is an increasing demand for higher density of wiring boards. In view of this, the wiring board is made to be a high-density wiring board by changing the wiring board from one side to both sides or a multilayer wiring board having three or more layers.

  As part of this, a separate flexible wiring board or flexible flat cable that connects multiple wiring boards and hard wiring boards that mount various electronic components via connectors etc. is integrated, mainly in small electronic devices such as mobile phones. A multilayer flexible wiring board having a flexible cable portion is widely used (see Patent Document 1 and FIG. 5).

  In particular, the functionality of mobile phones is remarkable, and the parts mounted on the multilayer flexible wiring board are also replaced by CSP (chip size package), so that high functionality and high density packaging can be achieved without increasing the board size. There is a trend to add functions. The pad pitch of this CSP was originally 0.8 mm, but recently, there is a demand for mounting a narrow pitch of 0.5 mm or less.

The essential requirements for mounting a narrow pitch CSP on a multilayer flexible wiring board are as follows.
(a) There are no through holes in the CSP mounting land.
This is to prevent the solder necessary for mounting from flowing.
(b) Capable of high-density arrangement of conduction parts.
In order to connect directly to the lower wiring layer from the narrow pitch CSP mounting land, the required minimum pitch is the same as the pad pitch of the CSP to be mounted.
(c) Formation of fine wiring This is because it is necessary to route wiring from many pads of 100 pads or more regardless of the outer layer or the inner layer. Further, the number of wirings that can be routed between CSP mounting lands is an important factor that determines the specifications of the CSP that can be mounted. In particular, when a CSP is mounted, it is effective to miniaturize the inner layer wiring below the outer layer wiring where the CSP mounting land exists.
(d) Flatness of the CSP mounting land When flip-chip mounting the CSP on the multilayer flexible wiring board face down, it is necessary to absorb the unevenness of the CSP mounting land with the height of the solder ball on the pad on the CSP side. Because there is. In a multilayer flexible wiring board, it is necessary to fill a step due to the thickness of each conductive layer with an adhesive or the like to ensure flatness.

  A typical structure of a multilayer flexible wiring board has a double-sided or single-sided flexible wiring board as an inner layer, and a flexible or hard-base wiring board as an outer layer is laminated thereon, and through-hole connection is performed by plating or the like to form 4 to 8 layers. It is a structure which makes a multilayer flexible wiring board to the extent (see Patent Document 1 and FIG. 5).

  However, since through-hole connection penetrates all layers, it is difficult to increase the density, and solder will flow if a component mounting land is provided on the through-hole, so that the land cannot be placed on the through-hole. There's a problem. For this reason, the above-mentioned requirements for mounting a narrow pitch CSP are not satisfied, and a narrow pitch CSP cannot be mounted.

  In particular, it is very difficult for a conventional multilayer flexible wiring board to mount a narrow pitch CSP in which CSP pads of 10 pads × 10 pads or more are arranged in a full grid.

  Therefore, in order to realize high-density mounting, a build-up type multilayer flexible wiring board having a multilayer flexible wiring board as a core substrate and having about one or two build-up layers on both sides or one side has been put into practical use.

  However, when build-up is performed on a multilayer flexible core substrate, build-up is difficult because soft constituent materials such as cable portions impair the flatness of the core substrate. In addition, since through-hole plating is performed on the core substrate, the thickness of the conductor layer is increased and it is difficult to form a fine circuit.

  In addition, it is necessary to fill the above-mentioned thick conductor layer with a build-up adhesive to ensure flatness, so the necessary adhesive thickness increases and the build-up layer necessary to ensure connection reliability. It is necessary to increase the thickness of the via hole plating. As a result, it is difficult to form a fine circuit, and the requirement for mounting the narrow pitch CSP is not satisfied, and the narrow pitch CSP cannot be mounted.

  In view of this, there has been proposed a method of further building up the second stage in order to make up for the shortage of the ability to form a fine circuit by increasing the number of layers. However, in order to fabricate a two-stage build-up type multilayer flexible wiring board using this method, since successive lamination is repeated, there is a problem that the process becomes complicated as the number of layers increases and the yield decreases.

  In addition, a method is also conceivable in which a first build-up layer made of conductive protrusions is laminated on the core substrate to ensure flatness, and then a second build-up is performed (Patent Document 2, [0020] to [0020]). [0030]). However, if the conductive protrusions are abutted against a multilayer flexible core substrate made of a soft component material such as a cable portion, the core substrate may be deformed or damage to the through-holes of the core substrate may be repeated. For this reason, as the number of layers increases, the process becomes complicated and the yield decreases, so that the problem cannot be solved.

  For these reasons, a method of manufacturing a multilayer wiring board having a high degree of integration and having a cable portion on which a narrow pitch CSP can be mounted inexpensively and stably is desired.

  10 to 15 are cross-sectional process diagrams showing a conventional method for manufacturing a multilayer wiring board having a cable portion (Patent Documents 4 and 3). First, as shown in FIG. A so-called double-sided copper-clad laminate 134 having conductive layers 132 and 133 such as copper foil on both sides of the flexible insulating base material 131 is prepared.

  Next, as shown in FIG. 10 (2), a circuit pattern 135 such as a cable is formed on the copper foil layers 132 and 133 of the double-sided copper-clad laminate 134 using an etching method using a normal photofabrication method. The inner layer circuit 136 is formed.

  Next, as shown in FIG. 10 (3), a cover 139 is formed by bonding a polyimide film 137 to a circuit pattern 135 such as a cable through an adhesive 138, and a cable portion 140 is formed.

  Subsequently, as shown in FIG. 10 (4), a so-called single-sided copper-clad laminate 143 having a conductive layer 142 such as a copper foil on one side of an insulating base material 141, and this is punched into a desired shape by a mold or the like. An adhesive 144 for bonding to the processed cable part 140 of FIG. 10 (3) is prepared. The thickness of the conductive layer 142 at this time is preferably 50 μm or less, preferably 35 μm or less. Thereafter, as shown in FIG. 10 (5), the single-sided copper-clad laminate 143 and the adhesive material 144 are bonded together and punched into a desired shape using a mold or the like.

  Next, as shown in FIG. 11 (6), the single-sided copper-clad laminate 145 shown in FIG. 10 (5) is laminated on the cable portion 140 shown in FIG. 10 (3) via an adhesive 144. Next, as shown in FIG. 11 (7), a conduction hole 146 is formed with an NC drill or the like. At this time, the polyimide film 137 and the adhesive 138 of the cover 139 of the inner layer cause heat sagging during drilling, and the periphery of the inner layer circuit 136 with the through-hole plating on the copper foil layers 132 and 133 deteriorates, so the desmear treatment is performed. . The diameter of the conduction hole 146 is preferably about 150 to 500 μm.

  However, there is a correlation between the diameter of the hole for conduction and the connection reliability (see Patent Document 5, [0005] to [0008]), and the diameter of the hole for conduction is reduced for the purpose of improving the degree of integration. It is known that, when designed, the plating thickness necessary to ensure reliability increases.

  Subsequently, as shown in FIG. 13 (8), the through hole 146 is subjected to electroless plating or conductive treatment, and then a through hole 147 is formed by electroplating. In this case, the plating thickness of the through hole 147 is preferably about 30 to 50 μm in order to ensure reliability.

  Thereafter, as shown in FIG. 12 (9), a circuit pattern 148 is formed on the through-hole surface by using an etching method based on a normal photofabrication method, and the cable portion of the build-up type multilayer flexible wiring board is formed. The inner-layer core substrate 149 is obtained.

  Next, as shown in FIG. 13 (10), a so-called single-sided copper-clad laminate having a conductive layer 151 such as a copper foil on one side of a low-flow type adhesive insulating resin 150 such as a low-flow type prepreg or bonding sheet. A plate 152 is prepared. As the thickness of the adhesive insulating resin 150, it is necessary to fill the conductor layer including the thickened through-hole plating shown in FIG. 2 (8) to ensure flatness. Here, the thing of thickness 100micrometer was used.

  Next, as shown in FIG. 13 (11), the single-sided copper clad laminate 152 is punched out with a mold or the like. Next, as shown in FIG. 13 (12), the single-sided copper clad laminate 153 obtained by punching is laminated on the inner core substrate 149 obtained in FIG. 12 (9).

  Thereafter, as shown in FIG. 14 (13), a conduction hole 154 is formed by a laser or the like. The diameter of the conduction hole 154 is preferably about 100 to 300 μm in order to mount a narrow pitch CSP having a pitch of 0.5 mm or less. However, as described above, if the diameter of the hole for conduction is designed to be small, the plating thickness necessary to ensure reliability increases. On the other hand, when the hole diameter is designed to be large, not only the degree of integration is lowered, but also the processing time required for laser processing is increased and the productivity is deteriorated.

  Subsequently, as shown in FIG. 14 (14), the electroconductive plating 154 is subjected to electroless plating or conductive treatment, and then via holes 155 are formed by electroplating. Considering the thickness of the adhesive insulating resin 150, the plating thickness of the via hole 155 at this time depends on the diameter of the via hole 155, but is preferably 30 μm or more in order to ensure reliability.

  Thereafter, as shown in FIG. 15 (15), a circuit pattern 156 is formed on the outermost conductive layer including the plated metal layer surface by using an etching method based on a normal photofabrication method. Thereafter, surface treatment such as formation of a photo solder resist layer, solder plating, nickel plating, and gold plating is performed on the surface of the substrate as necessary, and external processing is performed to obtain a multilayer wiring substrate 157 having a cable portion.

  Thus, since it is necessary to thicken the through-hole plating and the via-hole plating, among the six layers, the thickness of the first and second conductor layers from the outside increases, and as a result, the fineness of these layers is increased. This makes wiring formation difficult, leading to a decrease in the degree of integration and the yield. Therefore, there is a problem that a full-grid narrow pitch CSP with a large number of grids cannot be mounted, resulting in a substrate specification with a low degree of freedom.

Although not shown, a two-stage build-up is possible by repeating the processes from FIG. 13 (10), and the degree of freedom of the specification of the narrow pitch CSP on which the multilayer flexible board obtained can be mounted. However, since the thickness of the first and second conductor layers from the outside is also increased, it is difficult to form fine wiring of these layers. In addition to this, as described above, since the sequential lamination is repeated, the process becomes complicated as the number of layers increases, and there arises a problem that the yield decreases.
Japanese Patent No. 2631287 JP 2003-129259 A Japanese Patent No. 3348004 JP 2004-200260 A JP 2002-84069 A

  As described above, as a problem in manufacturing a multilayer wiring board having a cable portion that can be mounted with a high integration density and a narrow pitch CSP using a conventional manufacturing method, it is necessary to perform complicated drilling plating multiple times. In addition, there are problems in productivity and yield, and there are many wiring layers for thickening plating, and it is difficult to form a fine circuit. Therefore, it is necessary to perform multi-stage buildup or to lower the wiring density.

  The present invention has been made in consideration of the above-described points, and an object of the present invention is to provide a method for stably and inexpensively manufacturing a multilayer wiring board having a cable portion with a high degree of integration and capable of mounting a narrow pitch CSP. To do.

  In order to achieve the above object, the present invention provides the following inventions.

According to the first invention,
In the method for producing a multilayer flexible wiring board having a cable portion in at least one quasi-outer layer,
a) manufacturing the inner core substrate,
b) The opening of the copper foil is included in the hole-forming portion on the outer layer side of the flexible double-sided copper-clad laminate, and the opening of the hole-forming portion is provided on the inner layer side of the double-sided copper-clad laminate. Forming a circuit pattern;
c) forming a coverlay on the circuit pattern to form an outer buildup layer;
d) A step of forming a laminated circuit substrate by laminating the outer layer buildup layer on the inner layer core substrate with an adhesive facing the side on which the coverlay is formed toward the inner layer core substrate side,
e) Step of forming a hole for conduction by performing laser processing through the opening of the copper foil toward the hole formation portion for conduction on the outer layer side with respect to the laminated circuit substrate,
f) Laser processing with respect to the laminated circuit substrate using the opening of the copper foil and the opening of the hole for conduction in the circuit pattern as a mask for laser shielding toward the hole formation portion for conduction on the outer layer side. A step of forming a hole for conduction,
g) Conducting the conductive hole, forming a via hole by electrolytic plating,
It is characterized by having.

According to the second invention,
In the method for producing a multilayer flexible wiring board having a cable portion in at least one quasi-outer layer,
a) manufacturing the inner core substrate,
b) a step of forming a circuit pattern including an opening of a hole forming portion for conduction in a copper foil layer of a single-sided copper clad laminate having flexibility;
c) forming a coverlay on the circuit pattern to form an outer buildup layer;
d) A step of forming a laminated circuit substrate by laminating the outer layer buildup layer on the inner layer core substrate with an adhesive facing the side on which the coverlay is formed toward the inner layer core substrate side,
e) A step of performing laser processing on the laminated circuit base material toward the hole forming portion on the outer layer side to form a hole for conduction;
f) Laser processing is performed on the laminated circuit base material using the opening for the conduction hole on the outer layer side and the opening for the conduction hole in the circuit pattern as a mask for shielding the laser to form a conduction hole. Process,
g) Conducting the conductive hole, forming a via hole by electrolytic plating,
It is characterized by having.

And according to the third invention,
In the first or second invention,
The inner core substrate is a double-sided wiring substrate having an interlayer connection with a filled via structure.

  Due to these features, the present invention has the following effects.

  According to the first invention, since the interlayer connection of the multilayer circuit board using the double-sided copper clad laminate is performed by the conductive protrusion, the interlayer connection by the thickness of the plating that causes a decrease in the wiring density becomes unnecessary. And the second layer which is the quasi-outer layer can be arranged at a narrow pitch, the wiring of the quasi-outer layer can be made fine, and reliability can be ensured. In addition, the CSP mounting land has no through hole, and sufficiently flat enough to be CSP mounted.

  Further, according to the second invention, since the interlayer connection of the multilayer circuit board using the single-sided copper-clad laminate is performed by the conductive protrusion, the interlayer connection by the plating thickening which leads to the reduction of the wiring density becomes unnecessary, and the outer layer A circuit pattern can be formed more finely than in the first invention, and a narrow pitch CSP can be mounted with a larger number of grids.

  In addition, the laser shielding mask and inner layer circuit pattern of the inner and outer layers of the outer buildup layer can be processed simultaneously, and after lamination on the inner core substrate, all interlayer conduction holes of the six-layer substrate can be formed by one laser processing. In addition, since the plating process is performed once, the productivity is high and the yield is also high. Moreover, only the outermost layer needs to be plated to lead to a decrease in wiring density, and fine wiring can be formed in all other layers. Further, since the core substrate and the buildup layer can be separately manufactured, the productivity is further increased.

  As a result, according to the present invention, it is possible to provide a method for stably and inexpensively manufacturing a multilayer wiring board having a cable portion that can be mounted with a narrow pitch CSP and has a higher degree of integration than the conventional manufacturing method.

  Hereinafter, an embodiment of the present invention will be described with reference to FIGS.

Embodiment 1

  FIGS. 1 to 5 are sectional process views showing Embodiment 1 of the present invention. First, as shown in FIG. 1A, when manufacturing a double-sided flexible wiring board, a copper foil 1 ( For example, a metal substrate 4 having a three-layer structure of thickness 100 μm) / nickel foil 2 (for example, thickness 2 μm) / copper foil 3 (for example, thickness 12 μm) is prepared.

  Next, as shown in FIG. 1 (2), the conductive protrusions 5 are formed on the copper foil 3 by a selective etching technique. For this etching solution, an etching solution used in a normal copper etching process, for example, an etching solution containing cupric chloride is used to etch about 80 to 90% of the total thickness of the copper foil 1, and then Using an etching solution that is low in corrosiveness to nickel and that selectively etches copper, for example, an alkaline etching solution containing ammonia, the remaining portion of the copper foil 1 is removed by etching to expose the nickel foil. The exposed nickel foil 2 is etched away using an etchant that is low in corrosivity and selectively etches nickel, for example, an etchant containing hydrogen peroxide or nitric acid. As a result, the structure shown in FIG. 1 (2) is obtained.

  Next, as shown in FIG. 1 (3), the prepreg 6 in the B stage state is attached to the surface on which the conductive protrusions are erected by a press, a laminator, or the like. Instead of the prepreg 6, an insulating resin having adhesive properties such as a polyimide film having thermoplastic polyimide on both surfaces can be applied. Then, as shown in FIG. 1 (4), in order to expose the top portion 7 of the conductive protrusion from the prepreg 6, mechanical polishing such as roll polishing or chemical polishing such as CMP is performed. The circuit substrate 8 in which the conductive protrusion 5 penetrates the prepreg 6 is obtained through the steps so far.

  Subsequently, as shown in FIG. 1 (5), a circuit substrate 8 in which the conductive protrusions 5 penetrate the prepreg 6 is laminated on the metal foil 9. Here, the prepreg 6 is completely heat-cured and enters a C stage state. Thereafter, as shown in FIG. 1 (6), the circuit pattern 10 is formed on the laminated copper foil of the base material, and the double-sided core substrate 11 having a filled via structure that becomes the core substrate of the multilayer wiring substrate through the steps so far. Get.

  In the case of a double-sided core substrate having interlayer conduction by conductive protrusions as in the first embodiment, it is not necessary to thicken the plating, and the wiring layer thickness of the core substrate can be reduced. Is possible. Furthermore, since the adhesive used for bonding to the subsequent build-up layer can be filled with a thin one, the flow-out amount is reduced. And since the interlayer connection distance with a buildup layer becomes short, in the case of the same plating thickness, connection reliability improves relatively.

  Filled via structure can be applied to various things, not only metal conductive protrusions formed by etching processing, but also conductive conductive protrusions formed by printing metal conductive protrusions, conductive paste / ink etc. by plating method In addition, the present invention can also be applied to a double-sided core substrate manufactured by via fill plating in which plating deposition on the inner wall is increased during via hole plating, and combinations thereof.

  In addition, since the core substrate has a filled via structure, it is possible to take a structure of stacking on the filled via when it is built up in a later process, which is advantageous for high density. Moreover, the effect of reducing the reflection of the connection part at the time of high-speed signal transmission can also be expected.

  After that, as shown in FIG. 2 (7), so-called double-sided copper-clad having copper foils 13 and 14 having a thickness of 12 μm on both sides of a flexible insulating base material 12 (here, polyimide having a thickness of 25 μm). A laminated plate 15 is prepared. The material and thickness of the flexible insulating base material 12 are not limited to 25 μm polyimide, and can be properly used according to the application. For example, in applications where it is necessary to reduce dielectric loss during high-speed signal transmission, a double-sided copper-clad laminate based on a low dielectric loss tangent liquid crystal polymer or the like can be used. For example, a thin polyimide film having a thickness of 12.5 μm or the like can be selected.

  Subsequently, as shown in FIG. 2 (8), the conformal mask and the copper foil 14 in the laser processing of the copper foil 13 of the double-sided copper-clad laminate 15 include the opening of the conductive hole forming portion. Is formed on both sides of the double-sided copper-clad laminate 15 by using a photofabrication technique. Since the alignment of both surfaces at this time is performed with respect to the solid material, the positional accuracy can be easily secured without being affected by the expansion and contraction of the material. If necessary, it is also possible to use an exposure machine capable of highly accurate alignment.

  Further, the thickness of the copper foils 13 and 14 is preferably about 5 to 12 μm, and if within this thickness range, it is possible to form fine wiring with an inner layer pitch of 100 μm or less necessary for mounting a narrow pitch CSP, and later laser processing It also functions as a laser shading mask at this time. Furthermore, since the coverlay adhesive after this is thin and can be filled after ensuring flatness, the interlayer connection distance with the buildup layer is shortened, and in the case of the same plating thickness Relatively improved connection reliability.

  Next, as shown in FIG. 2 (9), the resist layer 16 is used to form the inner layer circuit pattern 18 including the conformal mask 17 and the opening of the conduction hole forming portion at the time of laser processing by the photofabrication technique. Further, the resist layer is peeled off. If necessary, a roughening treatment is performed to improve adhesion with the build-up adhesive.

  Note that if a blind via hole is formed on the conductive protrusion, blackening treatment or blackening is performed in order to facilitate inspection of a conduction hole formed by a laser or the like after build-up or to reduce the influence of laser heat. Roughening by etching using an acid is preferable to the chemical reduction treatment. Through the steps so far, the build-up layer 19 of the multilayer wiring board is obtained.

  After that, as shown in FIG. 2 (10), a so-called cover lay 22 having an adhesive 21 such as acrylic / epoxy having a thickness of 15 μm on a polyimide film 20 having a thickness of 12 μm is prepared.

  Next, as shown in FIG. 2 (11), a cover lay 22 is attached to the inner layer side of the build-up layer 19 of the multilayer wiring board by a vacuum press, a laminator or the like. The build-up layer 23 with a coverlay is obtained through the steps so far. In addition, the process from FIGS. 2 (7) to (11) can be performed by a roll-to-roll method, and further improvement in productivity can be expected.

  Thereafter, as shown in FIG. 3 (12), the adhesive 24 for building up the build-up layer 23 with coverlay on the double-sided core substrate 11 is previously punched and aligned. The adhesive 24 is preferably a low-flow type prepreg, bonding sheet, or the like that does not flow out. The thickness of the adhesive 24 can be selected as thin as 15 to 20 μm even in consideration of filling properties and flatness.

  Next, as shown in FIG. 3 (13), the buildup layer 23 with a cover lay and the double-sided core substrate 11 are laminated with a vacuum press or the like via an adhesive 24. The multilayer circuit substrate 25 is obtained through the steps so far.

  Subsequently, as shown in FIG. 4 (14), laser processing is performed using a conformal mask 17 for laser processing prepared in advance, and three types of conduction holes 26, 27, and 28 are formed. When the conduction hole 27 is formed, laser processing is performed by using the opening of the portion for forming the conduction hole of the circuit pattern 18 prepared in advance as a laser shading mask at the time of laser processing. For laser processing, a UV-YAG laser, carbonic acid laser, excimer laser, or the like is selected and used.

  The diameter of each conduction hole was set as follows. First, the conduction hole 26 can be manufactured even with a diameter of 50 μm when a 25 μm-thick polyimide is used for the flexible insulating base material 12, and the necessary plating thickness for ensuring reliability is about 10 μm. Then, the diameter was 50 μm.

  The conduction holes 27 and 28 have problems of integration degree and interlayer connection reliability. In the first embodiment, the conductor layer thickness is from the second layer (quasi-outer layer) to the fifth layer among the six conductor layers. There is no need to perform plating, which leads to an increase, and the conductor layer can be made thin. For this reason, the thickness of the adhesive 21 and the adhesive 24 required for filling can be reduced, and reliability can be ensured even with a relatively thin plating thickness. As for the hole diameter for which reliability can be ensured with a plating thickness of about 15 to 20 μm, the hole diameter for the conduction hole 27 is 150 μm, and the upper hole diameter is 200 μm obtained by adding 50 μm to the lower hole diameter in consideration of alignment with the lower hole. In the conduction hole 28, the hole diameter is 150 μm. Thus, the fine wiring can be formed, the degree of integration is improved, and each conduction hole can be formed at a narrow pitch.

  Furthermore, a desmear process and a conductive process are performed for interlayer connection by electrolytic plating. In addition to the processing using the conformal mask as described above, a large window method in which the laser mask is offset and the copper mask is offset in advance can be applied to the laser processing. Of course, a direct laser method in which a copper foil and a resin are directly penetrated with laser light is also applicable.

  The processing using the conformal mask may be combined with a large window method or a direct laser method. In addition, when using a direct laser method, it is preferable that the thickness of copper foil is 20 micrometers or less.

  Subsequently, as shown in FIG. 4 (15), the multilayer circuit substrate 25 having the conduction holes 26, 27, and 28 is subjected to electrolytic plating of about 15 to 20 μm to obtain interlayer conduction. The via 29 obtained by the conduction hole 26, the step via 30 obtained by the conduction hole 27, and the skip via 31 obtained by the conduction hole 26 in the steps so far, that is, one laser processing and plating step. Can be formed at once, and all interlayer conduction from the outer layer to the inner layer can be achieved.

  The multilayer circuit base material 32 in which interlayer conduction is completed is obtained through the steps so far. In addition, when a through-hole for mounting an insertion part or the like is required, it is possible to form a through-hole with an NC drill or the like when forming a hole for conduction and simultaneously form a through-hole when performing the via hole plating. It is.

  Next, as shown in FIG. 5 (16), an outer layer pattern 33 is formed by a normal photofabrication technique. At this time, if there is a plating layer deposited on the cover film 20 located on the inner layer side of the buildup layer 23, this is also removed. Then, if necessary, surface treatment such as solder plating, nickel plating, gold plating, etc. is performed on the substrate surface, forming a photo solder resist layer, and forming a shield layer on the outer layer side of the cable using silver paste, film, etc. And the multilayer wiring board 35 which has the cable part 34 in an outer layer is obtained by performing an external shape process.

  In the multilayer wiring board having the cable portion according to the first embodiment, since the cable is arranged in the second layer which is a quasi-outer layer without a plating layer, vias 29 having a diameter of 50 μm can be arranged with a pitch of 0.3 mm or less. Fine wiring with a pitch of 100 μm or less can be formed. Therefore, it is possible to provide a method for stably and inexpensively manufacturing a multilayer wiring board having a cable portion on which a narrow pitch CSP can be mounted. In addition, the CSP mounting land has no through hole, and sufficiently flat enough to be CSP mounted.

  Furthermore, as described above, most of the wiring from the CSP to the cable can be covered by the first layer and the second layer (quasi-outer layer), so the third layer and the fourth layer are the power source, the ground layer, Become. In the present invention, the third layer and the fourth layer are connected by the conductive protrusion. However, it is easy to arbitrarily change the diameter of the conductive protrusion, for example, securing the current capacity for the power source, matching the characteristic impedance, and the connection portion. In consideration of the optimum diameter and other design factors for suppressing the reflection of the signal at, the selection may be made.

Embodiment 2

  6 to 9 are cross-sectional process diagrams showing Embodiment 2 of the present invention. First, as shown in FIG. 6 (1), when the double-sided flexible wiring board is manufactured, the copper foil 51 ( For example, a metal substrate 54 having a three-layer structure of thickness 100 μm) / nickel foil 52 (for example, 2 μm) / copper foil 53 (for example, 12 μm) is prepared.

  Next, as shown in FIG. 6B, conductive protrusions 55 are formed on the copper foil 53 by a selective etching method. For this etching solution, an etching solution used in a normal copper etching process, for example, an etching solution containing cupric chloride is used to etch about 80 to 90% of the total thickness of the copper foil 1, and then Using an etching solution that is low in corrosiveness to nickel and that selectively etches copper, for example, an alkaline etching solution containing ammonia, the remaining portion of the copper foil 1 is removed by etching to expose the nickel foil. FIG. 6 (2) shows that the exposed nickel foil 2 is removed by etching using an etchant that is low in corrosivity and selectively etches nickel, for example, an etchant containing hydrogen peroxide or nitric acid. Structure.

  Subsequently, as shown in FIG. 6 (3), the prepreg 56 in the B stage state is attached to the surface on which the conductive protrusions are erected with a press, a laminator or the like. Instead of the prepreg 56, it is also possible to apply an insulating resin having adhesive properties such as a polyimide film having thermoplastic polyimide on both sides.

  Next, as shown in FIG. 6 (4), in order to expose the top portions 57 of the conductive protrusions from the prepreg 56, mechanical polishing such as roll polishing or chemical polishing such as CMP is performed.

  The circuit substrate 58 in which the conductive protrusion 55 penetrates the prepreg 56 is obtained through the steps so far.

  Next, as shown in FIG. 6 (5), the circuit base material 58 in which the conductive protrusion 55 penetrates the prepreg 56 is laminated on the metal foil 59. Here, the prepreg 56 is completely heat-cured and enters the C stage state.

  Thereafter, as shown in FIG. 6 (6), the circuit pattern 60 is formed on the laminated copper foil of the base material, and the double-sided core substrate 61 having a filled via structure that becomes the core substrate of the multilayer wiring board in the steps so far is formed. obtain.

  In the case of a double-sided core substrate having interlayer conduction by conductive protrusions as in the second embodiment, it is not necessary to thicken the plating, and the wiring layer thickness of the core substrate can be reduced. Is possible. Furthermore, since the adhesive used for bonding with the subsequent build-up layer can be filled with a thin thickness, the flow-out amount is reduced and the interlayer connection distance with the build-up layer is shortened. In the case of the same plating thickness, connection reliability is relatively improved.

  Filled via structures are not only made of metal conductive protrusions formed by etching, but also metal conductive protrusions by plating, conductive protrusions formed by printing conductive paste / ink, and via hole plating. In particular, the present invention can be applied to a double-sided core substrate manufactured by via fill plating in which plating deposition on the inner wall is increased, and combinations thereof. In addition, since the core substrate has a filled via structure, it is possible to take a structure of stacking on the filled via when it is built up in a later process, which is advantageous for high density. Moreover, the effect of reducing the reflection of the connection part at the time of high-speed signal transmission can also be expected.

  Next, as shown in FIG. 7 (7), a so-called single-sided copper clad laminate 64 having a 12 μm thick copper foil 63 on both sides of a flexible insulating base material 62 (here, 25 μm thick polyimide) is provided. prepare. The material and thickness of the flexible insulating base material 62 are not limited to polyimide having a thickness of 25 μm, and can be properly used depending on the application.

  For example, in applications where it is necessary to reduce dielectric loss during high-speed signal transmission, a double-sided copper-clad laminate based on a low dielectric loss tangent liquid crystal polymer or the like can be used. For example, a thin polyimide film having a thickness of 12.5 μm or the like can be selected.

  Next, as shown in FIG. 7 (8), a resist layer 65 for forming an inner layer circuit pattern on the copper foil 63 of the single-sided copper-clad laminate 64 by a photofabrication technique is used. To form. The thickness of the copper foil 63 is preferably about 5 to 12 μm, and within this thickness range, it is possible to form fine wiring with an inner layer pitch of 100 μm or less necessary for mounting a narrow pitch CSP, and laser shielding during subsequent laser processing. It also functions as a mask.

  Furthermore, since the coverlay adhesive after this is thin and can be filled after ensuring flatness, the interlayer connection distance with the buildup layer is shortened, and in the case of the same plating thickness Relatively improved connection reliability.

  Subsequently, as shown in FIG. 7 (9), using the resist layer 65, a circuit pattern 66 including an opening at a conduction hole forming portion is formed by a photofabrication method, and the resist layer is further peeled off. If necessary, a roughening treatment is performed to improve adhesion with the build-up adhesive.

  Note that if a blind via hole is formed on the conductive protrusion, blackening treatment or blackening is performed in order to facilitate inspection of a conduction hole formed by a laser or the like after build-up or to reduce the influence of laser heat. Roughening by etching using an acid is preferable to the chemical reduction treatment. Through the steps so far, the build-up layer 67 of the multilayer wiring board is obtained.

  Thereafter, as shown in FIG. 7 (10), a so-called cover lay 70 having an adhesive 69 such as acrylic / epoxy having a thickness of 15 μm on a polyimide film 68 having a thickness of 12 μm is prepared.

  Subsequently, as shown in FIG. 11 (11), a coverlay 70 is attached to the inner layer side of the buildup layer 67 of the multilayer wiring board by a vacuum press, a laminator or the like. The build-up layer 71 with a coverlay is obtained through the steps so far. In addition, the process from FIGS. 7 (7) to (11) can be performed by a roll-to-roll method, and further improvement in productivity can be expected.

  Next, as shown in FIG. 8 (12), an adhesive 72 for building up the build-up layer 71 with coverlay on the double-sided core substrate 61 is previously punched and aligned. As the adhesive material 72, a low flow type prepreg, a bonding sheet, or the like with a low flow-out is preferable. The thickness of the adhesive material 72 can be selected as thin as 15 to 20 μm even in consideration of filling properties and flatness.

  Next, as shown in FIG. 8 (13), the buildup layer 71 with a cover lay and the double-sided core substrate 61 are laminated by a vacuum press or the like via an adhesive 72. The multilayer circuit substrate 73 is obtained through the steps so far.

  Thereafter, as shown in FIG. 9 (14), laser processing is performed on the position to be the conduction hole, and three kinds of conduction holes 74, 75, and 76 are formed. When the conduction hole 75 is formed, laser processing is performed using the opening of the conduction hole forming portion of the circuit pattern 66 prepared in advance as a laser shielding mask at the time of laser processing. As the laser processing method, a UV-YAG laser, a carbonic acid laser, an excimer laser, or the like can be selected. The diameter of each conduction hole was set as follows. First, when the flexible insulating base material 62 is made of polyimide having a thickness of 25 μm, the conduction hole 74 can be manufactured even with a diameter of 50 μm, and the necessary plating thickness for ensuring reliability is about 10 μm. Then, the diameter was 50 μm.

  The conduction holes 75 and 76 have a problem of integration degree and interlayer connection reliability, but in the second embodiment, the second to fifth layers of the six conductor layers lead to an increase in the conductor layer thickness. Since the conductor layer can be made thin without performing plating, the thickness of the adhesive 69 and the adhesive 72 necessary for filling can be reduced, and reliability can be ensured even with a relatively thin plating thickness.

  As for the hole diameter that can ensure reliability with a plating thickness of about 15 to 20 μm, the hole diameter for the conduction hole 75 is 150 μm, and the upper hole diameter is 200 μm with 50 μm added to the lower hole diameter in consideration of alignment with the lower hole. In the hole 76 for conduction, the hole diameter was 150 μm. For this reason, while making it possible to form fine wiring, the degree of integration is improved and each conduction hole can be formed at a narrow pitch.

  Furthermore, a desmear process and a conductive process are performed for interlayer connection by electrolytic plating. In addition to the processing using the conformal mask as described above, a direct laser method in which the copper foil and the resin are directly penetrated with laser light can be applied to the laser processing. Further, the processing using the conformal mask and the direct laser method may be combined. In addition, when using a direct laser method, it is preferable that the thickness of copper foil is 20 micrometers or less.

  Subsequently, as shown in FIG. 9 (15), the multilayer circuit substrate 73 having the conduction holes 74, 75, 76 is subjected to electrolytic plating of about 15 to 20 μm to obtain interlayer conduction. Vias 77 obtained by the conduction holes 74, step vias 78 obtained by the conduction holes 75, and skip vias 79 obtained by the conduction holes 76 in the steps up to here, that is, a single laser processing and plating process. It can be formed, and all interlayer conduction from the outer layer to the inner layer can be achieved.

  In addition, when a through-hole for mounting an insertion part or the like is required, it is possible to form a through-hole with an NC drill or the like when forming a hole for conduction and simultaneously form a through-hole when performing the via hole plating. It is.

  After conducting the conductive treatment, a plating resist layer such as a dry film resist is formed by a normal photofabrication method, via holes and outer layer patterns are formed by plating, and the conductive treatment film is removed. In addition, since the circuit pattern 80 can be finely formed, it is possible to mount a narrow pitch CSP with a larger number of grids than in the first embodiment.

  In addition, as a method for forming the outer layer pattern, the above-described via hole plating may be performed by panel plating, and then formed by a normal photofabrication method. At this time, if there is a plating layer deposited on the cover film 68 located on the inner layer side of the buildup layer 71, this is also removed.

  Then, if necessary, surface treatment such as solder plating, nickel plating, gold plating, etc. is performed on the substrate surface, forming a photo solder resist layer, and forming a shield layer on the outer layer side of the cable using silver paste, film, etc. And the multilayer wiring board 82 which has the cable part 81 in the outer layer side is obtained by performing an external shape process.

  In the multilayer wiring board having the cable portion according to the second embodiment, since the cable is arranged in the quasi-outer layer (second layer) having no plating layer, vias can be arranged at a narrow pitch and fine wiring can be formed. Therefore, a multilayer wiring board having a cable portion on which a narrow pitch CSP can be mounted can be manufactured inexpensively and stably. In addition, the CSP mounting land has no through hole, and sufficiently flat enough to be CSP mounted.

  Further, as described above, since most of the wiring from the CSP to the cable can be covered by the first layer and the quasi-outer layer (second layer), the third layer and the fourth layer are the power supply and ground layers. It becomes. In the present invention, the third layer and the fourth layer are connected by the conductive protrusion. However, it is easy to arbitrarily change the diameter of the conductive protrusion, and for example, to secure a current capacity for the power source, and characteristics The optimum diameter for impedance matching and suppression of signal reflection at the connection can be selected in consideration of other design factors.

1 is a conceptual cross-sectional configuration diagram illustrating Embodiment 1 of the present invention. 1 is a conceptual cross-sectional configuration diagram illustrating Embodiment 1 of the present invention. 1 is a conceptual cross-sectional configuration diagram illustrating Embodiment 1 of the present invention. 1 is a conceptual cross-sectional configuration diagram illustrating Embodiment 1 of the present invention. 1 is a conceptual cross-sectional configuration diagram illustrating Embodiment 1 of the present invention. The conceptual cross-sectional block diagram which shows Embodiment 2 of this invention. The conceptual cross-sectional block diagram which shows Embodiment 2 of this invention. The conceptual cross-sectional block diagram which shows Embodiment 2 of this invention. The conceptual cross-sectional block diagram which shows Embodiment 2 of this invention. The conceptual cross-sectional block diagram of the manufacturing method of the multilayer wiring board which has a cable part by a conventional method. The conceptual cross-sectional block diagram of the manufacturing method of the multilayer wiring board which has a cable part by a conventional method. The conceptual cross-sectional block diagram of the manufacturing method of the multilayer wiring board which has a cable part by a conventional method. The conceptual cross-sectional block diagram of the manufacturing method of the multilayer wiring board which has a cable part by a conventional method. Conceptual cross-sectional configuration diagram of a method of manufacturing a multilayer wiring board having a cable portion according to a conventional method The conceptual cross-sectional block diagram of the manufacturing method of the multilayer wiring board which has a cable part by a conventional method.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Copper foil 2 Nickel foil 3 Copper foil 4 Metal base material 5 Conductive protrusion 6 Prepreg 7 Top part of conductive protrusion 8 Circuit base material with conductive protrusion penetrating prepreg 9 Metal foil 10 Circuit pattern 11 Double-sided core substrate 12 Flexible Conductive insulating base material 13 Copper foil 14 Copper foil 15 Double-sided copper-clad laminate 16 Resist layer 17 Conformal mask 18 Inner layer circuit 19 including opening of hole forming portion for conduction 19 Build-up layer 20 Polyimide film 21 Adhesive material 22 Cover lay 23 Cover Lay build-up layer 24 Adhesive 25 Laminated circuit substrate 26 Conductive hole
27 Conduction hole 2
28 Conduction hole 3
29 via hole 30 step via hole 31 skip via hole 32 laminated circuit substrate 33 outer layer circuit pattern 34 quasi-outer layer cable 35 multilayer wiring board 51 having a cable portion according to the present invention copper foil 52 nickel foil 53 copper foil 54 metal substrate 55 conductive Conductive projection 56 prepreg 57 top 58 of conductive projection circuit substrate 59 with conductive projection penetrating prepreg 59 metal foil 60 circuit pattern 61 double-sided core substrate 62 flexible insulating base material 63 copper foil 64 single-sided copper-clad laminate 65 resist Layer 66 Inner layer circuit 67 including opening of hole forming part for conduction 67 Build-up layer 68 Polyimide film 69 Adhesive material 70 Cover lay 71 Build-up layer 72 with cover lay 72 Adhesive material 73 Laminated circuit substrate 74 Conduction hole 1
75 Conduction hole 2
76 hole 3 for conduction
77 via hole 78 step via hole 79 skip via hole 80 outer layer circuit pattern 81 quasi-outer layer cable 82 multilayer wiring board 131 having cable portion according to the present invention flexible insulating base material 132 copper foil layer 133 copper foil layer 134 double-sided copper-clad laminate Board 135 Circuit pattern 136 Inner layer circuit 137 Polyimide film 138 Adhesive 139 Cover 140 Cable portion 141 Flexible insulating base material 142 Copper foil layer 143 Single-sided copper-clad laminate 144 Adhesive 145 Die-cut single-sided copper-clad laminate 146 Through hole 147 Through hole 148 Circuit pattern 149 Inner core substrate 150 Adhesive insulating resin 151 Conductive layer 152 Single-sided copper-clad laminate 153 Perforated single-sided copper-clad laminate 154 Conductive hole 155 Via hole 156 Circuit pattern 157 Multilayer wiring substrate having a Bull part

Claims (3)

In the method for producing a multilayer flexible wiring board having a cable portion in at least one quasi-outer layer,
a) manufacturing the inner core substrate,
b) The opening of the copper foil is included in the hole-forming portion on the outer layer side of the flexible double-sided copper-clad laminate, and the opening of the hole-forming portion is provided on the inner layer side of the double-sided copper-clad laminate. Forming a circuit pattern;
c) forming a coverlay on the circuit pattern to form an outer buildup layer;
d) A step of forming a laminated circuit substrate by laminating the outer layer buildup layer on the inner layer core substrate with an adhesive facing the side on which the coverlay is formed toward the inner layer core substrate side,
e) Step of forming a hole for conduction by performing laser processing through the opening of the copper foil toward the hole formation portion for conduction on the outer layer side with respect to the laminated circuit substrate,
f) Laser processing with respect to the laminated circuit substrate using the opening of the copper foil and the opening of the hole for conduction in the circuit pattern as a mask for laser shielding toward the hole formation portion for conduction on the outer layer side. A step of forming a hole for conduction,
g) Conducting the conductive hole and performing electroplating to form a via hole;
A method for manufacturing a multilayer flexible wiring board having a cable portion in at least one of the quasi-outer layers. In the method for producing a multilayer flexible wiring board having a cable portion in at least one quasi-outer layer,
a) manufacturing the inner core substrate,
b) a step of forming a circuit pattern including an opening of a hole forming portion for conduction in a copper foil layer of a single-sided copper clad laminate having flexibility;
c) forming a coverlay on the circuit pattern to form an outer buildup layer;
d) A step of forming a laminated circuit substrate by laminating the outer layer buildup layer on the inner layer core substrate with an adhesive facing the side on which the coverlay is formed toward the inner layer core substrate side,
e) A step of performing laser processing on the laminated circuit base material toward the hole forming portion on the outer layer side to form a hole for conduction;
f) Laser processing is performed on the laminated circuit base material using the opening for the conduction hole on the outer layer side and the opening for the conduction hole in the circuit pattern as a mask for shielding the laser to form a conduction hole. Process,
g) Conducting the conductive hole, forming a via hole by electrolytic plating,
A method for manufacturing a multilayer flexible wiring board having a cable portion in at least one of the quasi-outer layers. In the manufacturing method of the multilayer flexible wiring board which has a cable part in at least one quasi-outer layer of Claim 1 or 2,
The method for manufacturing a multilayer flexible wiring board having a cable portion in at least one quasi-outer layer, wherein the inner layer core board is a double-sided wiring board having an interlayer connection with a filled via structure.

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