JP2007060588A - PLL circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a PLL circuit for reducing variation in oscillation frequency of a voltage controlled oscillator by suppressing variation in resistance value of a voltage-current conversion circuit.
A voltage-current conversion circuit includes a variable resistance circuit, a limit circuit, and a current ratio adjustment circuit. By incorporating the variable resistor circuit 4, process variations when the resistor is incorporated can be controlled, and by incorporating the resistor, it is not affected by the parasitic capacitance of the external resistor terminal, and is not affected by the PLL loop band. A voltage-current conversion circuit capable of responding in a high band can be realized. By using a CMOS variable resistor for the variable resistor circuit 4, continuous resistance value adjustment is possible.
[Selection] Figure 1

Description

  The present invention relates to a PLL circuit, and more particularly to a PLL circuit including a voltage-controlled oscillator in which a voltage-current conversion circuit that requires a wide oscillation frequency range is used.

Conventionally, a PLL circuit is used as a circuit for drawing a phase into a reference frequency. FIG. 13 is a block diagram showing a basic configuration of a conventional PLL circuit. The PLL circuit 150 includes a phase comparator 101 that compares the phases of the reference signal Fr and the output signal Fv, an LPF 102 that extracts a DC component of the signal output from the phase comparator 101, and a frequency that varies according to the DC voltage. A voltage controlled oscillator (VCO) 103 is provided.
Next, each operation of the PLL circuit 150 will be described. The reference signal Fr and the output signal Fv of the voltage controlled oscillator 103 are input to the phase comparator 101 and an error is output. Thereafter, the DC component of the signal output from the phase comparator 101 is extracted by the LPF 102 and the control voltage VCOIN is output. By repeating these constituent loops, the output signal of the voltage controlled oscillator 103 can be accurately adjusted to the reference signal.
FIG. 14 is a block diagram showing the basic configuration of the voltage controlled oscillator. The voltage controlled oscillator 103 includes a voltage / current conversion circuit 131 that outputs a current according to the control voltage VCOIN input from the LPF 102 and a current controlled oscillator 132 that outputs an oscillation frequency corresponding to the current.
FIG. 15 is a diagram showing a conventional example of the voltage-current conversion circuit 131. The source side of the NMOS transistor M0 to which the control voltage VCOIN input from the LPF 102 is applied to the gate is grounded via the resistor R0, and the drain side is connected to the Pch transistor M1 and the resistor R1. The sum of the current flowing through M0 and the current flowing through R1 flows through the PMOS M1, the gate voltage of M1 is applied to M2, the current flowing through M2 is turned back by a current mirror formed by M3, M4, and M5 MOS transistors, and the current controlled oscillator 132 Control nodes PG and NG are formed.
FIG. 18 is a diagram showing the voltage-current conversion characteristics described above. The vertical axis represents the BIAS current, and the horizontal axis represents the VCOIN voltage. From this graph, it can be seen that ff (symbol 140), typ (symbol 141), and ss (symbol 142) conventionally vary with changes in VCOIN.

FIG. 16 is a diagram showing a conventional voltage-current conversion circuit. The output of the operational amplifier circuit AMP having the VCO control voltage VCOIN input to one input terminal is applied to the gate of the PMOS transistor M0, the drain of the PMOS transistor M0 is grounded through the resistor R0, and the source is supplied to the power supply. It is connected. The connection point between M0 and R0 is connected to the other input terminal of the AMP to form a feedback loop. In this circuit, the same voltage as that applied to the input terminal VCOIN is applied to both ends of the resistor R0 to generate a current at the output terminal. The current Iout flowing through M0 becomes Iout = VCOIN / R0, and a current proportional to the input voltage can be taken out. The POS transistor M1 applies a gate voltage equal to that of the PMOS transistor M0, thereby causing a current equal to the current flowing through M0 to flow.
FIG. 17 is a diagram showing an example of a conventional circuit of a current controlled oscillator constituted by a differential amplifier circuit. The current Iout input from the voltage-current conversion circuit 131 is turned back by a current mirror made up of M3, M4, and M5 MOS transistors to form a Pch control node PG and an Nch control node NG of the current control oscillation circuit 132, and a differential amplifier circuit. The oscillation frequency of the configured ring oscillator 132 is controlled.
The following techniques are disclosed as application examples of the voltage-current conversion circuit 131 as described above. For example, in Patent Document 1, a bias control voltage of an oscillation circuit in a PLL circuit gives an output of an amplifier input to one input terminal to a gate of a transistor grounded through a resistor, and a connection point between the transistor and the resistor is A technique for improving linearity by forming a feedback loop connected to the other input terminal of the amplifier is disclosed.
Patent Document 2 discloses a technique in which fixed resistance elements are placed on a matrix, the resistance value is controlled in accordance with an external control signal, the resistance of the bias circuit is made variable, and resistance process variation is suppressed.
JP 2000-59181 A JP 2002-111490 A

In the prior art, the oscillation frequency of the voltage-controlled oscillator (VCO) of the PLL varies due to process variations, temperature variations, and power supply variations of the voltage-current conversion circuit 131 and the current-controlled oscillator 132, respectively. In particular, fluctuation due to process variations becomes more significant as the required oscillation frequency of the VCO 103 becomes higher. Under the worst conditions of SLOW speed, it becomes difficult to satisfy the lock range required for the specification, while under the worst conditions of HIGH speed, there is a problem of deadlock of the PLL feedback loop due to overrange. In addition, since the optical media write clock generation PLL is CAV compatible, it is necessary to achieve a constant VCO gain from low speed to high speed while satisfying a wide lock range.
That is, as a problem of the circuit of FIG. 15 and FIG. 16 which is a conventional example of the voltage-current conversion circuit 131, when the built-in POLY resistor is used as the resistor to be used, the resistance value is subject to fluctuation due to process variation and fluctuation due to temperature variation. The problem is that it varies by 20% and affects the voltage-current conversion characteristics.
As a solution to the resistance variation due to the use of the built-in POLY resistor, it is conceivable to use an external resistor with little variation, but there is a demerit that the number of parts is increased by using the external resistor, and as shown in FIG. In the case where an external resistor is used in the feedback loop of the differential amplifier circuit, the band of the negative feedback circuit may be lowered due to the parasitic capacitance of the external resistor terminal P, and may be affected by the PLL loop band.
Even if the technique of Patent Document 1 is used, it contributes to the improvement of linearity, but there is a problem that it is affected by variations in internal resistance.
In view of such problems, an object of the present invention is to provide a PLL circuit that reduces variations in the oscillation frequency of a voltage controlled oscillator by suppressing variations in resistance values of the voltage-current converter circuit.

In order to solve this problem, the present invention provides a phase comparator for comparing the phases of a reference signal and an output signal, a filter for extracting a control voltage from the output signal of the phase comparator, and an output from the filter. A voltage-controlled oscillator that oscillates a signal having a frequency based on a control voltage to be generated, wherein the voltage-controlled oscillator includes a voltage-current converter that converts the control voltage into a current, and the voltage-current converter A current-controlled oscillator having a current source corresponding to the output current output from the converter and having one or more differential inverter circuits connected in a ring shape, and the voltage-current converter determines the output current A variable resistance circuit is provided.
The voltage-current conversion circuit of the present invention has a variable resistance circuit that determines an output current, and reduces process variations. By doing so, a control current that is not affected by process variations can be obtained.
According to a second aspect of the present invention, the variable resistance circuit is composed of a CMOS type transistor, and the variable resistance value of the variable resistance circuit is adjusted by adjusting the gate voltage of the CMOS type transistor according to process variations of the CMOS type transistor. It is characterized by doing.
The variable resistance circuit can always make the fluctuation of the MOS resistance value due to process variations constant by adjusting the gate voltage of the MOS constituting the resistance.
According to a third aspect of the present invention, the variable resistance circuit further includes one or more fixed resistors.
By providing the variable resistance circuit MOS resistance and the fixed resistance, it is possible to further increase the dynamic range of the entire variable resistance.
According to a fourth aspect of the present invention, the variable resistance circuit includes a reference circuit that controls a gate voltage of the CMOS transistor in accordance with a change in a reference voltage, and determines a constant resistance value that is not affected by the process variation. Features.
The variable resistance circuit can generate a constant resistance value that is not subject to variations in process variations by a constant voltage source and a constant current source that is linked to the constant voltage source, and as a result, can suppress a variation in the gain of the VCO.

5. The voltage / current converter circuit according to claim 5, wherein the voltage-current converter circuit limits an upper limit of an oscillation frequency of the voltage controlled oscillator when a voltage supplied from the filter exceeds a predetermined value in accordance with the process variation. It is characterized by providing.
A limit voltage is formed by connecting an element in which a MOS transistor is connected to a diode, and the limit voltage is input to a limit input terminal connected in parallel with the control voltage input terminal. As a result, a linear voltage-current conversion characteristic can be obtained when the control voltage is equal to or lower than the limit voltage. However, when the control voltage is equal to or higher than the limit voltage, the input voltage is limited and oscillation corresponding to the limit voltage or higher is not performed.
According to a sixth aspect of the present invention, the limit circuit includes a plurality of MOS transistors connected in parallel with the control voltage input terminal.
By inputting the limit voltage to a limit input terminal connected in parallel with the control voltage input terminal, linear voltage-current conversion characteristics can be obtained when the control voltage is equal to or lower than the limit voltage.
According to a seventh aspect of the present invention, the limit circuit includes a plurality of resistors connected in parallel with an input terminal of the control voltage.
The limit voltage can be formed by an element using a resistor instead of the MOS transistor.
According to an eighth aspect of the present invention, the voltage-current conversion circuit includes a current ratio adjustment circuit that adjusts a current value of the output current to be supplied in accordance with a variation in the process variation by changing a current ratio. .
By adding a current ratio adjustment circuit to the gate location that receives the current controlled by the negative feedback circuit using the reference voltage and the amplifier, the constant current value flowing through the CMOS variable resistor can be changed. Thereby, it is possible to adjust the variable resistance and realize a constant VCO gain regardless of process variations.
According to a ninth aspect of the present invention, the voltage-current conversion circuit adjusts a value of a constant voltage source for determining a resistance value of the variable resistance circuit in order to adjust a current value of the output current supplied in accordance with a variation in the process variation. A constant voltage adjustment circuit for adjustment is provided.
By adding a constant voltage adjustment circuit that can change the reference voltage applied to the reference circuit, it becomes possible to adjust the resistance value of the CMOS variable resistor and realize a constant VCO gain regardless of process variations. .
According to a tenth aspect of the present invention, the constant voltage adjustment circuit includes a plurality of bleeder resistors and a selector that selects a voltage divided by the bleeder resistors.
One or more N resistors are connected in series to a reference voltage, N voltage values are extracted from N connection points of each resistor by resistance voltage division, and a desired constant voltage is obtained by the N constant voltage control selector.

According to the first aspect of the present invention, the voltage-current conversion circuit of the PLL can obtain a control current that is not affected by process variations by using a variable resistor that is not subject to process variations.
According to another aspect of the present invention, the voltage-to-current converter circuit of the PLL includes a CMOS transistor in a PLL circuit including a plurality of CMOS transistors and a plurality of fixed resistors whose resistance values can be adjusted by adjusting a gate voltage according to process variations. In addition, a continuous resistance value can be determined by providing a plurality of fixed resistors, and the resistance value can be determined with a higher resolution than using only the fixed resistors.
According to the third aspect of the present invention, since the voltage-current conversion circuit of the PLL includes one or more plural fixed resistors, accurate control can be performed.
According to another aspect of the present invention, since the voltage-current conversion circuit of the PLL includes a reference circuit that controls the gate voltage of the CMOS transistor in accordance with a change in the reference voltage, a constant resistance value that is not affected by a process variation is determined. Therefore, a control current that is not affected by process variations can be obtained.
According to a fifth aspect of the present invention, there is provided a limit circuit for limiting the upper limit of the oscillation frequency of the voltage controlled oscillator when the voltage supplied from the loop filter exceeds a predetermined value according to process variations. Therefore, it is possible to avoid abnormal oscillation of the PLL, that is, deadlock.

According to a sixth aspect of the present invention, since the voltage-current conversion circuit of the PLL has a plurality of MOS transistors connected in parallel with the input terminal of the control voltage, it has an accurate reference circuit and can perform more accurate control.
According to the seventh aspect of the present invention, since the voltage-to-current converter circuit of the PLL has a plurality of resistors connected in parallel with the input terminal of the control voltage, it has an accurate reference circuit and can perform more accurate control.
According to another aspect of the present invention, the voltage-to-current converter circuit of the PLL has a current ratio adjustment circuit that adjusts the current value of the output current to be supplied according to the variation in process variation by changing the current ratio. In addition to variations, process variations can be suppressed.
According to a ninth aspect of the present invention, the voltage-to-current converter circuit of the PLL changes the value of the constant voltage source that determines the resistance value of the variable resistance circuit in order to adjust the current value of the output current to be supplied in accordance with variations in process variations. Since the circuit for obtaining a predetermined VCO gain by changing the resistance value is provided, it is possible to suppress the process variation in addition to the resistance value variation.
According to a tenth aspect of the present invention, the constant voltage adjusting circuit includes a plurality of bleeder resistors and a selector that selects a voltage divided by the bleeder resistors, so that a desired constant voltage can be easily obtained.

Hereinafter, the present invention will be described in detail with reference to embodiments shown in the drawings. However, the components, types, combinations, shapes, relative arrangements, and the like described in this embodiment are merely illustrative examples and not intended to limit the scope of the present invention only unless otherwise specified. .
FIG. 1 is a block diagram showing the configuration of a voltage / current converter circuit according to an embodiment of the present invention. The voltage-current conversion circuit 50 includes a variable resistance circuit 4, a limit circuit 5, and a current ratio adjustment circuit 6. By incorporating the variable resistor circuit 4, process variations when the resistor is incorporated can be controlled, and by incorporating the resistor, it is not affected by the parasitic capacitance of the external resistor terminal, and is not affected by the PLL loop band. A voltage-current conversion circuit capable of responding in a high band can be realized. By using a CMOS variable resistor for the variable resistor circuit 4, continuous resistance value adjustment is possible. If a constant current source with high accuracy that is not affected by process variations can be used, the resistance value can be adjusted with higher accuracy. Further, by adding the limit circuit 5, it is possible to take out the lock range corresponding to each worst condition. Further, by adding the current ratio adjusting circuit 6, the control current value to be supplied is adjusted by changing the current ratio according to the variation due to the process variation of the VCO ring, and a constant VCO gain is realized regardless of the process variation. be able to.
FIG. 2 is a diagram of an internal circuit of the variable resistance circuit. The variable resistance circuit 4 will be described with reference to FIG. Next, the variable resistance circuit 4 will be described with reference to FIG. The reference voltage VCOIN is input to one input terminal of AMP1, the output of AMP1 is connected to the gate side of the NMOS transistor M0, and the connection point between the transistor M0 and the transistor M7 of the CMOS variable resistance circuit 41 is the other input of the amplifier. A negative feedback loop is formed which is connected to the terminal and has a current value of I0. The circuit for determining the operating point and resistance value of M7 is configured as follows. That is, the reference voltage is input to one input terminal of AMP2, and the output of AMP2 is applied to the gate of the transistor connected to the drain side by the current source generated by the constant current circuit. The connection point of the current source linked to the fluctuation of the AMP2 is connected to the other input terminal of the AMP2, and a constant feedback value is determined according to the fluctuation of the reference voltage by forming a negative feedback loop having the current value I1. Thus, the reference circuit 42 for controlling the gate voltage of the CMOS variable resistor M6 is formed. By monitoring a voltage equal to the gate voltage of M6 and applying it to the gate of the transistor M7 of the CMOS variable resistance circuit 41, the transistor M7 functions as a variable resistance circuit and determines the resistance value. Then, the resistance value of the CMOS variable resistance circuit 41 used in the feedback loop of the bias control voltage is determined. Here, the current source needs to be a constant current source that follows the fluctuation of the reference voltage.

FIG. 3 shows a constant current circuit of a current source that follows the fluctuation of the reference voltage. The constant current circuit of FIG. 3 will be described. The reference voltage Vref is inputted to one input terminal of Amp, the output of Amp is given to the gate of the NMOS transistor M0 grounded through the external resistor R, and the connection point between the source of M0 and the resistor R is the other end of Amp. To form a negative feedback loop. Thereby, the current flowing through M0 is determined by the external resistor R and the reference voltage Vref. Then, M0 is supplied to the reference circuit 42 via PMOS transistors M1 and M2 configured as a current mirror.
FIG. 4 is a circuit diagram showing the configuration of the limit circuit 5 and the differential amplifier input stage. A limit voltage Vlimit is formed by connecting MOS transistors M0, M1, and M2 connected to a diode, and the limit voltage Vlimit is input to a limit input terminal connected in parallel with the input terminal of the control voltage VCOIN. As a result, a linear voltage-current conversion characteristic can be obtained when VCOIN is equal to or lower than the limit voltage Vlimit. However, when VCOIN is equal to or higher than the limit voltage Vlimit, the input voltage is limited, and oscillation corresponding to the limit voltage Vlimit is not performed. At this time, the limit voltage may be formed by an element using resistors R0 and R1 instead of the MOS transistors M0, M1 and M2 (see FIG. 5).

FIG. 6 is a diagram illustrating an example of a variable resistance circuit. FIG. 6 is taken up as another configuration of the CMOS variable resistance circuit 41. The variable resistor can be used in combination with a fixed resistor. You can earn dynamic range by using it together. The source side of the NMOS variable resistors M0 and M1 connected in parallel is grounded, and the drain side is a resistance element connected in series with the fixed POLY resistor R0. The NMOS M5 has the source side grounded, the drain side connected to the gate and drain of the PMOS M6, and the gate side connected to the Amp side. The source of the PMOS M6 is grounded to the power source, and the drain side of the PMOS M7, which is current mirror connected to the PMOS transistor M6, is connected to the source side of the PMOS transistor M4 and the gate side of the variable resistance transistor M0. Like M7, the drain side of M8, which is current-mirror connected from M6, is connected to the source side of PMOS M3, which is diode-connected to the gate of variable resistance transistor M1. The drain of M4 is connected to ground.
The reference voltage VCOIN is inputted to one input terminal of Amp, the output of the amplifier is given to the gate M5 of the transistor, and the connection point between the other end of the resistor R0 connected in series with the CMOS variable resistors M0 and M1 and the constant current source is Connected to the other input terminal of the amplifier to form a feedback loop.
Next, the operation of the configuration of FIG. 6 will be described. The drain of the PMOS transistor M4 is connected to the gate of the variable resistor M0, and the connection point between the gate variable resistor NMOS M0 and the variable resistor NMOS M1 of the M0 and the fixed resistor R0 and the gate of the PMOS transistor M4 are connected, so that the variable resistor and the fixed resistor are connected. By making the voltage-current characteristics of the connection points proportional, the voltage-current characteristics of the entire variable resistance circuit 41 shown in FIG. 2 can be made proportional, and the resistance value can be made constant regardless of process variations.
FIG. 7 shows the voltage-current characteristics of a voltage-current conversion circuit using the variable resistance circuit 41. As shown in FIG. In FIG. 7, it is apparent that ff, typ, and ss change almost without variation.

FIG. 8 is a diagram of the internal circuit of the variable resistance circuit according to the second embodiment of the present invention. By changing the current ratio using the current ratio adjusting circuit 6 in the first embodiment of FIG. 1, the same effect as that of adjusting the control current value to be supplied according to the variation due to the process variation of the VCO ring is as follows. It can be realized by the method.
In the embodiment of the present invention shown in FIG. 8, the resistance values of the CMOS variable resistors R0 and R1 are adjusted by adding a constant voltage adjustment circuit 43 that can change the Vref applied to the reference circuit 42, and this is caused by process variation. A constant VCO gain can be realized.
FIG. 9 is a diagram showing an embodiment of the constant voltage adjustment circuit 43 of FIG. One or more N resistors R0, R1,... RN are connected in series to the constant voltage Vref, and N types of voltage values are extracted from N connection points of each resistor by resistance voltage division. (SELN) 44 obtains a desired constant voltage.
FIG. 10 is a diagram of an internal circuit of the variable resistance circuit according to the third embodiment of the present invention. The same effect as using the current ratio adjusting circuit 6 in the first embodiment of FIG. 1 can be realized by the following method. In the embodiment of the present invention of FIG. 10, the resistance values of the CMOS variable resistors R0 and R1 are adjusted by adding a constant current adjustment circuit 45 that can change the Vref applied to the reference circuit 42, regardless of process variations. A constant VCO gain can be realized.
FIG. 11 is a diagram showing a first embodiment of the constant current adjusting circuit 45 of FIG. In the constant current circuit supplied to the CMOS variable resistor 42 and the reference circuit 41 in FIG. 10, the reference resistor Vref can be changed by the constant voltage adjustment circuit 43 to adjust the supply current.
FIG. 12 is a diagram showing a second embodiment of the constant current adjusting circuit 45 of FIG. In FIG. 12, by adding the current ratio adjusting circuit 6 to the gate portion of M2 that receives the current controlled by the negative feedback circuit using Vref and Amp, the constant current value that flows through the CMOS variable resistance circuit shown in FIG. The variable resistance can be adjusted to achieve a constant VCO gain regardless of process variations.

As described above, according to the present invention, the phase comparator, the loop filter, the voltage-current conversion circuit that converts the control voltage output from the loop filter into current, and the output current output from the voltage-current conversion circuit are supported. In a PLL circuit having a current source and a voltage controlled oscillator having one or more differential inverter circuits connected in a ring shape, the voltage-current conversion circuit has a variable resistance circuit 4 for determining an output current, This is to reduce process variation. By doing so, it is possible to obtain a control current that is not affected by process variations.
At this time, the variable resistance circuit 4 can always make the fluctuation of the MOS resistance value due to process variations constant by adjusting the gate voltage of the MOS constituting the resistance. Further, by providing the variable resistance circuit 4 and the fixed resistance R0, it is possible to further increase the dynamic range of the entire variable resistance.
In addition, the variable resistance circuit 4 can generate a constant resistance value that is not affected by variations in process variations by a constant voltage source and a constant current source that is linked to the constant voltage source, and as a result, suppresses fluctuations in the gain of the VCO. it can.
Furthermore, the voltage-current converter circuit has a current ratio adjustment circuit 6 that adjusts the current value of the output current to be supplied in accordance with variations in process variations by changing the current ratio, so that the VCO ring is constant over a wide lock range. Since the gain can be maintained, a constant VCO gain can be obtained regardless of process variations.

1 is a configuration block diagram of a voltage / current converter circuit according to an embodiment of the present invention. It is a figure of the internal circuit of a variable resistance circuit. It is a constant current circuit of a current source that follows the fluctuation of the reference voltage. It is a circuit diagram which shows the structure of a limit circuit and a differential amplifier input stage. It is a figure which shows an example of a limit circuit. It is a figure which shows an example of a variable resistance circuit. It is a figure which shows the IV characteristic of a voltage current conversion circuit. It is a figure of the internal circuit of the variable resistance circuit which concerns on 2nd embodiment of this invention. It is a figure which shows the Example of the constant voltage adjustment circuit of FIG. It is a figure of the internal circuit of the variable resistance circuit which concerns on 3rd embodiment of this invention. It is a figure which shows the 1st Example of the constant current adjustment circuit of FIG. It is a figure which shows the 2nd Example of the constant current adjustment circuit 45 of FIG. It is a block diagram which shows the basic composition of the conventional PLL circuit. It is a block diagram which shows the basic composition of a voltage controlled oscillator. It is a figure which shows the prior art example of the voltage-current conversion circuit 131. It is a figure which shows the conventional voltage current conversion circuit. It is a figure which shows an example of the conventional circuit of the current control oscillator comprised with the differential amplifier circuit. It is the figure which showed the conventional voltage-current conversion characteristic.

Explanation of symbols

  4 variable resistance circuit, 5 limit circuit, 6 current ratio adjustment circuit, 50 voltage current conversion circuit, 101 phase comparator, 102 LPF, 103 voltage controlled oscillator (VCO), 150 PLL circuit

Claims (10)

A phase comparator that compares the phases of the reference signal and the output signal, a filter that extracts a control voltage from the output signal of the phase comparator, and a voltage control that oscillates a signal having a frequency based on the control voltage output from the filter In a PLL circuit comprising an oscillator,
The voltage-controlled oscillator includes a voltage-current converter that converts the control voltage into a current, and a current source corresponding to an output current output from the voltage-current converter, and one or more differences connected in a ring shape A PLL circuit comprising: a current-controlled oscillator having a dynamic inverter circuit; and the voltage-current converter includes a variable resistance circuit that determines the output current.   The variable resistance circuit is composed of a CMOS transistor, and a variable resistance value of the variable resistance circuit is adjusted by adjusting a gate voltage of the CMOS transistor according to process variations of the CMOS transistor. The PLL circuit according to claim 1.   The PLL circuit according to claim 2, wherein the variable resistance circuit further includes one or more fixed resistors.   The variable resistance circuit includes a reference circuit that controls a gate voltage of the CMOS transistor in accordance with a change in a reference voltage, and determines a constant resistance value that is not affected by the process variation. The PLL circuit according to 2 or 3.   The voltage-current conversion circuit includes a limit circuit that limits an upper limit of an oscillation frequency of the voltage-controlled oscillator when a voltage supplied from the filter exceeds a predetermined value according to the process variation. A PLL circuit according to any one of claims 2 to 4.   6. The PLL circuit according to claim 5, wherein the limit circuit includes a plurality of MOS transistors connected in parallel with an input terminal of the control voltage.   6. The PLL circuit according to claim 5, wherein the limit circuit includes a plurality of resistors connected in parallel with an input terminal of the control voltage.   8. The voltage-current conversion circuit includes a current ratio adjustment circuit that adjusts a current value of the output current supplied in accordance with a variation in the process variation by changing a current ratio. The PLL circuit according to any one of the above.   The voltage-current conversion circuit adjusts a value of a constant voltage source that determines a resistance value of the variable resistance circuit in order to adjust a current value of the output current to be supplied in accordance with a variation in the process variation. The PLL circuit according to claim 5, further comprising a circuit.   The PLL circuit according to claim 9, wherein the constant voltage adjustment circuit includes a plurality of bleeder resistors and a selector that selects a voltage divided by the bleeder resistors.

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