JP2007042761A - Semiconductor device substrate, semiconductor device manufacturing method, and sealing mold - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve the separation rate of individual substrates with respect to a substrate for a semiconductor device, and to reduce the cost of the individual substrates and the production cost by improving the production efficiency. Provided are a substrate for a semiconductor device and a method for manufacturing the semiconductor device.
A semiconductor device substrate 1 having a circuit board region portion 3 formed by arranging a plurality of individual substrates 2 provided with wiring patterns and semiconductor element mounting portions in a matrix form. However, it is characterized in that it is formed up to the outer periphery of the substrate 1 for a semiconductor device and does not have an outer peripheral frame portion that surrounds the circuit board region 2 from the outer periphery and does not have a semiconductor element mounting portion. With this configuration, the effective area used as the individual substrate 2 with respect to the semiconductor device substrate 1 is expanded, and the yield of the individual substrate 2 is improved.
[Selection] Figure 2

Description

  The present invention relates to a semiconductor device substrate, a method of manufacturing a semiconductor device using the semiconductor device substrate, and a sealing mold for resin sealing used in the manufacturing method.

  In recent years, a semiconductor device substrate such as an organic substrate on which a wiring pattern is formed is used. A semiconductor element is mounted on a semiconductor device substrate, and the electrode pattern of the semiconductor element and the wiring pattern on the semiconductor device substrate are bonded by wire bonding or the like. A semiconductor device such as a BGA (Ball Grid Array) in which external connection terminals such as solder balls are formed on a surface opposite to the sealing surface of the semiconductor device substrate after being electrically connected to each other with a sealing resin. Are proposed and produced by each company.

  5 and 6 are plan views of a conventional semiconductor device substrate composed of an organic substrate or the like. As shown in FIG. 5, on a semiconductor device substrate 50, a circuit board region portion 52 in which a plurality of individual substrates 51 provided with wiring patterns and semiconductor element mounting portions are arranged in a matrix, and the circuit substrate. An outer peripheral frame portion 53 is formed so as to surround the region portion 52 from the outer periphery. The outer peripheral frame portion 53 is not provided with a semiconductor element mounting portion.

  Further, in the semiconductor device substrate 50 shown in FIG. 6, the circuit board region portion 52 in which a plurality of individual substrates 51 provided with wiring patterns and semiconductor element mounting portions are arranged in a matrix form as described above is provided for these circuits. A plurality of connecting portions 54 provided between the substrate region portions 52 are connected, and the outer periphery of the circuit board region portion 52 and the connecting portion 54 is integrally supported by the outer peripheral frame portion 53 to form an overall shape in a strip shape. (For example, Patent Document 1). In addition, 58 in FIG. 6 is a slit (through long hole) provided in the connecting portion 54.

  As shown in FIGS. 5, 6, and 7, in the conventional semiconductor device substrate 50, the outer peripheral frame portion 53 is not only a support for connecting the circuit board region portion 52, but will be described later. In order to facilitate removal of the sealing resin in the sealing region 57 formed on the semiconductor device substrate 50 from the molds 61 and 62, a region for forming the outer peripheral end 57a of the sealing region 57 obliquely, It is also used as a region for preventing the resin from leaking out to the periphery of the substrate for a semiconductor device, a formation region for a gate port for introducing the sealing resin into the molds 61 and 62, and the like.

  FIG. 7 shows a cross-sectional structure in a state where a sealing process, which is one of the semiconductor device manufacturing processes, is performed using the semiconductor device substrate 50 and the molds 61 and 62 for resin sealing ( The number of individual substrates 51 on which the semiconductor elements 56 are mounted is actually larger, but is shown in a simplified manner in FIG. In FIG. 7, reference numeral 57 denotes a sealing region formed of a recess formed in the lower surface portion of the upper mold 61, and the sealing region 57 is formed on the semiconductor device substrate 50. The lower mold 62 is formed with a recess in which the semiconductor device substrate 50 is mounted, and the semiconductor device substrate 50 is mounted in the recess. Reference numeral 56 denotes a semiconductor element.

  As shown in FIG. 7, the sealing region 57 formed on the semiconductor device substrate 50 is formed smaller than the semiconductor device substrate 50 placed on the lower mold 62. The conventional semiconductor device substrate 50 has an outer peripheral frame portion 53 without a sealing region 57. As a result, even when the actual thickness of the semiconductor device substrate 50 is thinner than the designed thickness and the sealing resin leaks out of the sealing region 57, the sealing resin leaks only on the outer peripheral frame portion 53. It is possible to prevent the sealing resin from leaking into the molds 61 and 62.

In addition, as described above, as shown in FIG. 7, in order to facilitate removal of the sealing resin in the sealing region 57 formed on the semiconductor device substrate 50 from the molds 61 and 62, There is a case where the outer peripheral edge 57a is formed obliquely. That is, in that case, the presence of the outer peripheral frame portion 53 makes it possible to secure a region for forming the outer peripheral end 57a of the sealing region 57 obliquely.
JP 9-129781 A

  However, in the above-described conventional method for manufacturing a semiconductor device using a substrate for a semiconductor device, the outer peripheral frame portion is provided for the purpose of securing a region for forming the outer peripheral end 57a of the sealing region 57 obliquely as described above. 53, and the area of the outer peripheral frame portion 53 is increased in this way, the effective area to be used as the individual substrate 51 with respect to the semiconductor device substrate 50 is reduced, and the area with respect to the semiconductor device substrate 50 is reduced. There is a problem that the yield of the single substrate 51 is reduced, and as a result, the cost for the single substrate 51 is increased. In addition, since the yield of the individual substrate 51 with respect to the semiconductor device substrate 50 is reduced, the efficiency for producing the semiconductor device is reduced, which increases the production cost of the semiconductor device. This tendency tends to be particularly noticeable as the size of the individual substrate 51 becomes smaller, and is a major obstacle to efforts to reduce the cost of semiconductor devices.

  The present invention solves the above-described conventional problems, can improve the yield of individual substrates relative to the substrate for a semiconductor device, and reduces the production cost by improving the cost and production efficiency of the individual substrates. An object of the present invention is to provide a semiconductor device substrate, a semiconductor device manufacturing method, and a sealing mold that can reduce the cost of the semiconductor device.

  In order to achieve the above object, a substrate for a semiconductor device according to the present invention is for a semiconductor device in which a circuit board region is formed by arranging a plurality of individual substrates provided with wiring patterns and semiconductor element mounting portions in a matrix. A circuit board region portion is formed up to an outer periphery of a substrate for a semiconductor device, and an outer peripheral frame portion having no semiconductor element mounting portion is not formed on the outer periphery of the circuit substrate region portion. .

  With this configuration, the circuit board region portion is formed up to the outer periphery of the semiconductor device substrate, and the outer peripheral frame portion is not formed on the semiconductor device substrate, so that the effective region used as a single substrate within the semiconductor device substrate is expanded. In addition, the yield of the individual substrate is improved.

  Also, the method for manufacturing a semiconductor device according to the present invention provides the circuit as a semiconductor device substrate having a circuit board region formed by arranging a plurality of individual substrates provided with wiring patterns and semiconductor element mounting portions in a matrix. The substrate region portion is formed up to the outer periphery of the semiconductor device substrate, the semiconductor element is mounted on the semiconductor device substrate, and the electrode pads on the semiconductor element and the wiring pattern on the individual substrate are electrically connected. After the connection, the sealing region is formed so as to be larger than the outer peripheral four sides of the semiconductor device substrate when sealing with a sealing resin.

By this method, a semiconductor device can be manufactured satisfactorily and efficiently on the semiconductor device substrate using the semiconductor device substrate.
The semiconductor device manufacturing method includes forming the sealing region larger than the circuit substrate region portion on at least one side of the semiconductor device substrate, or forming the four peripheral sides of the circuit substrate region portion of the semiconductor device substrate. In the semiconductor device, the sealing region is formed to be larger than the circuit board region portion, or the semiconductor device substrate is constituted by a plurality of circuit board region portions and a connecting portion for connecting the circuit substrate regions to each other, and the semiconductor device The sealing region is formed to be larger than the circuit substrate region on at least one side of the circuit substrate region portion of the circuit board.

  In addition, the step of sealing with the sealing resin is performed using a sealing mold including an upper mold and a lower mold, and at this time, between the substrate for the semiconductor device and the lower mold, and above A sealing material for preventing leakage of the sealing resin is interposed between the mold and the lower mold.

By this method, it is possible to prevent the sealing material from coming into close contact with the joint surface between the upper mold and the lower mold in the sealing resin process, and the sealing resin from leaking out of the sealing region.
Moreover, as a sealing mold used in a sealing process for manufacturing a semiconductor device, a sealing region of an upper mold for injecting a sealing resin is mounted on a lower mold for mounting a semiconductor device substrate. A larger one than the region may be used. Further, in this case, the sealing resin is excellent in the sealing region by forming a gate port through which the sealing resin is introduced into the sealing region in the sealing die in the vertical direction. Can be introduced.

  According to the substrate for a semiconductor device of the present invention, in the substrate for a semiconductor device in which a circuit board region portion formed by arranging a plurality of individual substrates provided with wiring patterns and semiconductor element mounting portions in a matrix is formed, The substrate is formed up to the outer periphery of the substrate for a semiconductor device, and the outer peripheral frame portion without the semiconductor element mounting portion is not formed on the outer periphery of the circuit substrate region portion. As a result, the effective area to be used can be expanded, the yield of the individual substrate can be improved, and the cost of the individual substrate can be reduced.

  In addition, when the semiconductor device substrate is used for sealing with a sealing resin, the sealing region is formed to be larger than the outer peripheral four sides of the semiconductor device substrate. The semiconductor device can be manufactured well with a high yield, the production efficiency in the manufacturing process of the semiconductor device is improved, and the production cost of the semiconductor device can be reduced.

  In addition, a sealing material that prevents leakage of the sealing resin is interposed between the semiconductor device substrate and the lower mold and between the upper mold and the lower mold during the sealing process with the sealing resin. By mounting, it is possible to satisfactorily prevent the sealing resin from leaking out of the sealing region even when a semiconductor device substrate having no outer peripheral frame portion is used.

  In addition, by using an upper die that has a gate opening formed in the vertical direction, even when a semiconductor device substrate that does not have an outer peripheral frame portion is used, the sealing resin is satisfactorily introduced into the sealing region. can do.

Hereinafter, a substrate for a semiconductor device according to an embodiment of the present invention and a method for manufacturing a semiconductor device using the substrate for a semiconductor device will be described with reference to the drawings.
1 and 2 are plan views of a substrate for a semiconductor device according to an embodiment of the present invention, respectively.

  In FIG. 1, reference numeral 1 denotes a substrate for a semiconductor device, in which a circuit board region portion 3 is formed in which a plurality of individual substrates 2 provided with wiring patterns and semiconductor element mounting portions are arranged in a matrix. As shown in the figure, in this semiconductor device substrate 1, the circuit board region portion 3 is formed up to the outer periphery of the semiconductor device substrate 1. That is, an outer peripheral frame portion 53 (see FIG. 5) that surrounds the circuit board region portion 52 from the outer periphery and does not have a semiconductor element mounting portion as in the conventional semiconductor device substrate 50 is formed on the semiconductor device substrate 1. Not.

  Further, reference numeral 1 in FIG. 2 shows another example of a semiconductor device substrate. In this semiconductor device substrate 1, a plurality of individual substrates 2 provided with wiring patterns and semiconductor element mounting portions are arranged in a matrix. A plurality of circuit board region portions 3 and a connecting portion 4 for connecting the plurality of circuit board region portions 3 are provided. Also in this semiconductor device substrate 1, the peripheral frame portion 53 (see FIG. 5) on the four outer sides of the semiconductor device substrate is reduced (not provided), and the circuit board region portion 3 is replaced with the outer periphery of the semiconductor device substrate 1. Has formed up to. In addition, 5 in FIG. 2 is a slit (through long hole) provided in the connecting portion 4.

  According to the semiconductor device substrate 1 of the present invention, compared to the conventional semiconductor device substrate 50 shown in FIGS. 5 and 6, the circuit board region portion 3 is formed to the outer periphery of the semiconductor device substrate 1. As shown in FIGS. 1 and 2, it can be seen that the area of the individual substrate 2 with respect to the semiconductor device substrate 1 is enlarged, and the yield of the individual substrate 2 is improved.

Next, a method for manufacturing a semiconductor device using the semiconductor device substrate 1 will be described with reference to the drawings.
FIG. 3A is a cross-sectional view for explaining a process of mounting a semiconductor element on the semiconductor device substrate 1, and FIG. 3B is an electrical diagram showing an electrode pad on the semiconductor element and a wiring pattern on the individual substrate. FIG. 3C is a cross-sectional view for explaining the process of connecting to the semiconductor device substrate. In the semiconductor device substrate, a plurality of mounted semiconductor elements and connection portions between the semiconductor elements and the individual substrates are collectively used as a sealing resin. FIG. 3D is a cross-sectional view illustrating a step of dividing the region sealed with the sealing resin into individual pieces in the substrate for a semiconductor device, and FIG. ) Is a cross-sectional view illustrating a process of dividing the individual substrate 2 and finally forming a semiconductor device. 3A to 3E show a method of manufacturing a semiconductor device using the semiconductor device substrate 1 shown in FIG. 2 along the longitudinal direction (long side direction) of the semiconductor device substrate 1. The state cut | disconnected by is shown schematically.

  As shown in FIG. 3A, first, a conductive or non-conductive paste or film is applied or pasted on the semiconductor element mounting region 3 of the semiconductor device substrate 1, and the semiconductor element 6 is mounted thereon. To do. Note that reference numeral 7 in FIG. 3A denotes a wiring pattern provided on the individual substrate 2.

  Next, as shown in FIG. 3B, the electrode pads on the semiconductor element 6 and the individual substrate of the semiconductor device substrate 1 are formed by using the wire bonding method or the like and using the connection wiring 8 such as gold or aluminum. 2 is electrically connected to the wiring pattern 7 formed on the substrate 2.

  Next, as shown in FIG. 3C, the semiconductor element 6 mounted on the semiconductor device substrate 1 and the wiring pattern on the semiconductor element 6 and the individual substrate 2 using a sealing resin 9 such as an epoxy resin. 7 is sealed.

  This resin sealing step is performed using molds 11 and 12 (upper mold 11 and lower mold 12) as shown in FIG. 4, and the sealing region 13 formed by these molds 11 and 12 is used. The outer peripheral portion has a shape larger than that of the semiconductor device substrate 1. That is, the sealing region 13 of the upper mold 11 into which the sealing resin 9 (see FIG. 3C) is injected is formed larger than the region in which the semiconductor device substrate 1 is mounted in the lower mold 12.

  And the part used as the outer periphery end 11a of the sealing area | region 13 of the upper metal mold | die 11 is formed diagonally in order to make the sealing resin 9 formed in the board | substrate 1 for semiconductor devices from the metal mold | dies 11 and 12 fall easily. However, the obliquely formed portion of the outer peripheral end 11a of the sealing region 13 is formed at a position outside the semiconductor device substrate 1 (that is, the circuit board region portion 3) in plan view. .

  Also, as shown in FIG. 4, when resin sealing, a sealing material 14 having elasticity such as a tape-like sheet is placed under the semiconductor device substrate 1, and when resin is injected, The resin is prevented from leaking outside. Further, the gate port 15 for injecting the sealing resin is formed by being processed so as to penetrate the upper mold 11 in the vertical direction.

  Using these molds 11 and 12, the lower surface of the upper mold 11 is in close contact with the seal material 14 in a state where the semiconductor device substrate 1 is mounted on the lower mold 12 via the seal material 14. As described above, the upper mold 11 is lowered toward the lower mold 12, and then the sealing resin 9 is injected into the sealing region 13 through the gate port 15 and sealed.

  Thereby, the sealing resin 9 is formed in the sealing region 13. In this case, the outer peripheral frame portion 53 as conventionally provided is not formed in the semiconductor device substrate 1, but the semiconductor device substrate 1, that is, outside the circuit substrate region portion 3 in plan view. Since an obliquely formed portion serving as the outer peripheral edge 11a of the sealing region 13 is provided at the position where the sealing resin 13 is formed, the sealing resin 9 formed on the semiconductor device substrate 1 can be easily removed from the molds 11 and 12. Become. In addition, the sealing material 14 placed under the semiconductor device substrate 1 causes the sealing material 14 to be in close contact with the bonding surface between the upper mold 11 and the lower mold 12 during resin sealing. Even though the outer peripheral frame portion 53 as provided in the semiconductor device substrate 50 is not provided, it is possible to satisfactorily prevent the sealing resin 9 from leaking outside from the sealing region 13. Further, in the conventional mold for resin sealing, the gate port is formed so as to be connected to the outer peripheral frame portion 53 in the horizontal direction. However, in the above embodiment, the upper mold 11 to the sealing region 13 from above. Since the gate port 15 is formed so as to be directly connected, the sealing resin is formed in the sealing region 13 even though it does not have the outer peripheral frame portion 53 as provided in the conventional semiconductor device substrate 50. 9 can be introduced satisfactorily.

  Thereafter, after the sealing resin 9 is cured, the resin-sealed semiconductor device substrate 1 is fixed on a fixing table by using a fixing tape or a vacuum suction method, and cutting a blade or the like. Using the blade 16, the sealing resin portion on the outer peripheral portion of the semiconductor device substrate 1 and the boundary portion of the individual substrate 2 are cut into individual pieces. Thereby, the semiconductor device 20 divided into pieces is formed.

If necessary, before the semiconductor device 20 is divided into individual pieces, external connection terminals such as solder balls are formed on the surface opposite to the sealing surface of the semiconductor device substrate 1.
According to the above configuration, the circuit board region portion 3 is formed as the semiconductor device substrate 1 up to the outer periphery of the semiconductor device substrate 1, and the outer peripheral frame portion is not formed on the semiconductor device substrate 1. The effective area used as the individual substrate 2 with respect to the interior of the substrate 1 is expanded, and the yield of the individual substrate is improved. Thereby, the cost of the individual substrate 2 can be reduced.

  Further, when a semiconductor device is manufactured using the semiconductor device substrate 1, the sealing region 13 is made larger than the circuit substrate region portion 3 in the semiconductor device substrate 1 using the molds 11 and 12. Thus, the sealing resin 9 can be easily removed from the molds 11 and 12, and the semiconductor device 20 divided into individual pieces can be manufactured without any trouble.

  Note that the sealing region 13 is formed so that the sealing region 13 is larger than the circuit board region portion 3. In addition, there is an advantage that the sealing resin 9 can be most easily removed. However, the present invention is not limited to this. If the sealing region 13 is formed to be larger than the circuit substrate region 3 on at least one side of the circuit board region portion 3 of the semiconductor device substrate 1, the sealing region 13 and the circuit are formed. When compared with the same substrate substrate portion 3 in plan view, the sealing resin 9 can be easily removed. 3A to 3E, the case where the connecting portion 4 is provided on the semiconductor device substrate 1 as shown in FIG. 2 is illustrated in a simplified manner, but the present invention is not limited to this. As shown, it is needless to say that the same configuration can be applied to the semiconductor device substrate 1 that does not have the connecting portion 4. 3C to 3E show the case where the sealing resin 9 is not introduced into the portion corresponding to the connecting portion 4, the present invention is not limited to this.

  A substrate for a semiconductor device and a method for manufacturing the semiconductor device according to the present invention include a substrate for a semiconductor device in which a circuit board region is formed by arranging a plurality of individual substrates provided with wiring patterns and semiconductor element mounting portions in a matrix, In addition, it is useful as a method for manufacturing a semiconductor device using this substrate for a semiconductor device.

The top view of the board | substrate for semiconductor devices which concerns on embodiment of this invention Plan view of another semiconductor device substrate according to the embodiment Sectional drawing which shows each process of the manufacturing method of the semiconductor device which respectively used the board | substrate for semiconductor devices (The state cut | disconnected by the line along the longitudinal direction (long side direction) of the board | substrate for semiconductor devices is shown roughly) 2A is a cross-sectional view illustrating a process of mounting a semiconductor element on the semiconductor device substrate shown in FIG. 2, and FIG. 2B is an electrode pad on the semiconductor element placed on the semiconductor device substrate and an individual substrate. Sectional drawing explaining the process of electrically connecting with the wiring pattern of (b), (c) is the board | substrate for the same semiconductor device WHEREIN: The several semiconductor element mounted and the connection part of a semiconductor element and an individual board | substrate are collectively shown. Sectional drawing explaining the process sealed with sealing resin, (d) is sectional drawing explaining the process of dividing | segmenting the area | region sealed with sealing resin into the piece in the board | substrate for semiconductor devices, ( e) Divide individual substrates and finally form semiconductor devices Sectional view illustrating was steps Sectional drawing of the metal mold | die used at the sealing process in the manufacturing method of the same semiconductor device (The state cut | disconnected by the line along the short side direction of the board | substrate for semiconductor devices is shown roughly) Plan view of conventional semiconductor device substrate Plan view of another conventional semiconductor device substrate Sectional view of a mold used in a conventional semiconductor device sealing process

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Substrate for semiconductor devices 2 Single piece board 3 Circuit board area | region part 4 Connection part 6 Semiconductor element 7 Wiring pattern 8 Connection wiring 9 Sealing resin 11 Mold (upper mold)
12 Mold (lower mold)
13 Sealing area 14 Sealing material 15 Gate port 16 Cutting blade

Claims (8)

  A substrate for a semiconductor device in which a circuit board region portion is formed by arranging a plurality of individual substrates provided with wiring patterns and semiconductor element mounting portions in a matrix, wherein the circuit substrate region portion is an outer periphery of the semiconductor device substrate. A substrate for a semiconductor device, wherein an outer peripheral frame portion that is formed to have no semiconductor element mounting portion is not formed on an outer periphery of a circuit board region portion. As a substrate for a semiconductor device in which a circuit board region portion is formed by arranging a plurality of individual substrates provided with wiring patterns and semiconductor element mounting portions in a matrix, the circuit board region portion extends to the outer periphery of the semiconductor device substrate. Adopt the formed one,
A semiconductor element is mounted on the semiconductor device substrate,
After electrically connecting the electrode pad on the semiconductor element and the wiring pattern on the individual substrate,
A method for manufacturing a semiconductor device, wherein the sealing region is formed so as to be larger than the outer peripheral four sides of the semiconductor device substrate when sealing with a sealing resin.   The method for manufacturing a semiconductor device according to claim 2, wherein the sealing region is larger than the circuit substrate region portion on at least one side of the semiconductor device substrate.   3. The method of manufacturing a semiconductor device according to claim 2, wherein the sealing region is larger than the circuit substrate region portion at four outer peripheral sides of the circuit substrate region portion of the semiconductor device substrate.   The substrate for a semiconductor device comprises a plurality of circuit board region portions and a connecting portion for connecting the circuit substrate regions, and the sealing region is at least on one side of the circuit substrate region portion of the semiconductor device substrate than the circuit substrate region. The method of manufacturing a semiconductor device according to claim 2, wherein the semiconductor device is large.   The step of sealing with the sealing resin is performed using a sealing mold composed of an upper mold and a lower mold. At this time, between the substrate for the semiconductor device and the lower mold, and the upper mold 6. The method for manufacturing a semiconductor device according to claim 2, wherein a sealing material for preventing leakage of the sealing resin is interposed between the first mold and the lower mold.   A pair of sealing molds used in a sealing process for manufacturing a semiconductor device, in which a sealing region of one mold into which a sealing resin is injected is that of the other mold on which the substrate for a semiconductor device is mounted A sealing mold characterized by being larger than a substrate mounting area for a semiconductor device.   A gate opening for introducing a sealing resin into a sealing region in the sealing mold is formed in the upper mold in the sealing mold including the upper mold and the lower mold so as to penetrate vertically. The sealing mold according to claim 7.

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