JP2006128338A - Semiconductor device and manufacturing method thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device and a method for manufacturing the same, which can improve the strength and the resistance of the connection between a semiconductor chip and a wiring, thereby improving the connection reliability.
A semiconductor device includes a semiconductor chip and a wiring connected to a terminal of the semiconductor chip. The uppermost layer 4c of the terminal 4 of the semiconductor chip 2 is formed of a metal layer having a thickness of 0.1 μm or more and 1.0 μm or less, and the wiring 6 is formed of a sintered body of metal fine particles. The connecting portion is formed such that a part of the wiring 6 is solid-phase diffused in the uppermost layer 4 c of the terminal 4.
[Selection] Figure 1

Description

  The present invention relates to a semiconductor device and a method of manufacturing the same that can improve the strength and reduce the resistance of a connection between a semiconductor chip and a wiring.

In recent years, various electronic devices including card-sized electronic devices have become thinner and lighter. As such electronic devices become thinner and lighter, various devices mounted thereon are also required to be mounted in a thin state.
Taking a silicon IC chip (semiconductor chip) as an example of a device, it has recently become possible to form an extremely thin IC chip having a thickness of 50 μm or less by scraping the back surface in the state of a silicon wafer. .

By the way, conventionally, as a method for drawing a wiring from such a device, a method using an anisotropic conductive material (ACF or ACP) and a method using wire bonding (WB) are known.
In addition, as a technique for improving the reliability of electrical connection in particular, there is also known a method for forming a good solid phase diffusion layer at a joint by applying pressure between electrode pads (see, for example, Reference 1). .
JP 2003-258034 A

However, in the method using an anisotropic conductive material or the method using wire bonding, the semiconductor chip is damaged by the applied pressure or ultrasonic wave at the time of bonding, and the connection reliability is lowered or severely damaged. It may be done.
Also, in the method using these anisotropic conductive materials, the method by wire bonding, and the method of forming a solid phase diffusion layer by applying pressure between the electrode pads, the above-mentioned extremely thin and low mechanical strength IC When applied to the electrical connection of the chip, damage such as cracks occurs due to the applied pressure or ultrasonic waves, thereby reducing the bonding strength or increasing the electrical connection resistance, thereby reducing the connection reliability.

  The present invention has been made in view of the above circumstances, and an object of the present invention is to improve the connection reliability between the semiconductor chip and the wiring by improving the strength and reducing the resistance. And providing a manufacturing method thereof.

In order to achieve the above object, a method of manufacturing a semiconductor device according to the present invention is a method of manufacturing a semiconductor device comprising a semiconductor chip and a wiring connected to a terminal of the semiconductor chip,
As the semiconductor chip, the top layer of the terminal is formed by a metal layer having a thickness of 0.1 μm or more and 1.0 μm or less,
As a material for forming the wiring, a dispersion liquid in which metal fine particles are dispersed is used.
After the dispersion liquid is discharged by a droplet discharge method and disposed on the terminal, the dispersion liquid is fired to sinter the metal fine particles to form the wiring, and a part of the wiring is partly connected to the terminal. The wiring is connected to the terminal by solid-phase diffusion in the uppermost layer.

According to this method for manufacturing a semiconductor device, the uppermost layer of the terminal of the semiconductor chip is formed by a thin metal layer having a thickness of 0.1 μm or more and 1.0 μm or less. Does not grow greatly and has a relatively small particle size. That is, the metal crystal particles have a maximum particle size up to the film thickness, and therefore have only a small particle size. Therefore, since the area of the interface (grain boundary) between the particles becomes large, solid phase diffusion is likely to occur.
Accordingly, when the wiring is formed by baking the dispersion, a part of the wiring is solid-phase diffused into the uppermost layer of the terminal. Therefore, a part of the wiring is solid-phase diffused in the uppermost layer of the terminal, and the wiring and the terminal are connected to each other, thereby applying pressure or ultrasonic vibration between the terminal and the wiring. Without adding, it is possible to improve the bonding strength at the connecting portion and to reduce the resistance. Therefore, connection reliability can be improved.
In addition, since a good bonding strength can be obtained without applying pressure or ultrasonic vibration between the terminal and the wiring in this way, even when an extremely thin semiconductor chip is used, the semiconductor A connection structure with good bonding strength and low resistance can be obtained without damaging the chip, and without causing damage or the like.

In the method for manufacturing a semiconductor device, the uppermost layer of the terminal is formed of a metal layer made of any one of gold, silver, copper, tin, and indium. It is preferable to use a dispersion liquid in which metal fine particles made of any one of gold, silver, and copper are dispersed.
In this way, mutual diffusion easily occurs between the metal forming the uppermost layer of the terminal and the metal as the wiring forming material. As a result, a part of the wiring is solid-phase diffused in the uppermost layer of the terminal. It becomes easy to do.

In the method for manufacturing a semiconductor device, the wiring connected to the terminal may be formed after the semiconductor chip is mounted on a flexible substrate.
In this way, since the semiconductor chip is mounted on the flexible substrate, the resulting semiconductor device has flexibility, and therefore its application is greatly expanded. In addition, since the bonding strength at the connection portion is improved as described above, it is possible to prevent the semiconductor chip from being peeled off even when a bending stress is generated at the bonding portion.

In the method for manufacturing a semiconductor device, the dispersion liquid is preferably baked in a temperature range of 150 ° C. or higher and 250 ° C. or lower.
In this way, damage to the semiconductor chip due to heat can be alleviated, and when a flexible substrate is used, damage to the flexible substrate can also be alleviated.

A semiconductor device of the present invention is a semiconductor device comprising a semiconductor chip and wiring connected to a terminal of the semiconductor chip,
The uppermost layer of the terminal is formed by a metal layer having a thickness of 0.1 μm or more and 1.0 μm or less,
The wiring is formed by a sintered body of metal fine particles,
A connecting portion between the wiring and the terminal is formed in a state where a part of the wiring is solid-phase diffused in the uppermost layer of the terminal.

According to this semiconductor device, since the uppermost layer of the terminal of the semiconductor chip is formed of a thin metal layer having a thickness of 0.1 μm or more and 1.0 μm or less, the metal layer is formed of a metal at the time of formation as described above. The crystal does not grow greatly and has a relatively small particle size. Therefore, since the area of the interface (grain boundary) between the particles becomes large and solid phase diffusion is likely to occur, a part of the connection portion between these actually solid phase diffuses. Therefore, these connecting portions have improved joint strength and reduced resistance, thereby improving connection reliability.
In addition, since a good bonding strength can be obtained between the terminal and the wiring in this way, even when an extremely thin semiconductor chip is used, pressure or ultrasonic vibration is generated between the terminal and the wiring. A connection structure with good bonding strength and low resistance can be obtained without being added, and thus without damaging the semiconductor chip.

In the semiconductor device, the uppermost layer of the terminal is made of any one of gold, silver, copper, tin, and indium, and the wiring is made of any one of gold, silver, and copper. It is preferably formed of a sintered body of metal fine particles.
In this way, mutual diffusion easily occurs between the metal forming the uppermost layer of the terminal and the metal as the wiring forming material. As a result, a part of the wiring is solid-phase diffused in the uppermost layer of the terminal. It becomes easy to do.

In the semiconductor device, the semiconductor chip may be mounted on a flexible substrate face up with the terminals facing upward.
In this way, since the semiconductor chip is mounted on the flexible substrate, the semiconductor device has flexibility, and its application is greatly expanded. In addition, since the bonding strength at the connection portion is improved as described above, it is possible to prevent the semiconductor chip from being peeled off even when a bending stress is generated at the bonding portion.

The present invention will be described in detail below.
1A to 1C are diagrams showing an embodiment of a semiconductor device according to the present invention. In FIG. 1, reference numeral 1 denotes a substrate, and 2 denotes a semiconductor chip mounted on the substrate 1. In the present embodiment, the substrate 1 is made of a flexible substrate made of a resin such as polyimide, and substrates formed in various shapes such as a tape shape or a sheet shape can be used. As shown in FIG. 1C, which is a plan view of the main part of FIG. 1A, a wiring pattern 3 made of copper or the like is formed on the substrate 1 on the substrate 1 side. The wiring pattern 3 has one end connected to the semiconductor chip 2 via a connection wiring as will be described later, and the other end connected to a wiring (not shown) of an external device.

On the mounting surface of the substrate 1, the semiconductor chip 2 is mounted on the side of the wiring pattern 3 via an adhesive layer (not shown) made of an adhesive or the like. The semiconductor chip 2 is composed of, for example, active components formed in an integrated circuit, and passive components such as resistors, capacitors, and inductors. These various components are used as the semiconductor chip 2 in the present invention. In the present embodiment, an active component in which an integrated circuit is formed is used as the semiconductor chip 2. In this embodiment, the semiconductor chip 2 is an extremely thin one formed to a thickness of 50 μm or less, and has a pad (terminal) 4 on one surface side (front surface side). It is mounted in a state facing toward the opposite side, that is, it is face-up bonded. An insulating layer 5 made of SiO ₂ or an insulating resin is formed on the mounting surface of the substrate 1 so as to cover the semiconductor chip 2, and the pad (terminal) 4 is provided on the insulating layer 5. An opening 5a to be exposed is formed.

  The pad 4 of the semiconductor chip 2 has a laminated structure composed of a base layer 4a, an intermediate layer 4b, and an uppermost layer (outermost layer) 4c, as shown in FIG. It has become. That is, a base layer 4a made of aluminum (Al) having a thickness of about 1.5 μm drawn from an integrated circuit (not shown) in the semiconductor chip 2 and plated on the base layer 4a to have a thickness of about 3 μm. The pad 4 is constituted by an intermediate layer 4b made of nickel (Ni) and an uppermost layer 4c made of gold (Au) plated on the intermediate layer 4b to a thickness of about 0.4 μm. .

  Here, in particular, the uppermost layer 4c is a layer that substantially becomes a bonding layer with the bonding wiring 6 as will be described later, and serves as an underlayer for solid-phase diffusion of the metal forming the bonding wiring 6. Is. Therefore, in order to better solid-phase diffuse the metal forming the junction wiring 6, the metal layer serving as the uppermost layer 4c has a large area of the interface (grain boundary) between the metal particles forming the metal layer. It is desirable.

  Therefore, in the present invention, in order to increase the area of the interface (grain boundary) between the metal particles forming the metal layer in this way, the thickness of the uppermost layer 4c of the pad 4 is set to 0.1 μm or more and 1.0 μm or less. I have to. By forming a thin film in this way, the obtained uppermost layer 4c (metal layer) does not grow large in metal crystals at the time of formation, and each metal particle has a relatively small particle size. In other words, the metal crystal particles have a maximum particle size up to the film thickness, and therefore have a small particle size because they are within the range of the film thickness. Therefore, since the area of the interface (grain boundary) between the metal particles is increased, the uppermost layer 4c of the pad 4 is easily formed as a solid phase diffusion by using this as an underlayer.

  Here, the thickness of the uppermost layer 4c is set to 0.1 μm or more and 1.0 μm or less. If the thickness is less than 0.1 μm, it is difficult to form a uniform film, and the formed metal layer (the uppermost layer 4c This is because it is not possible to secure a volume by sufficiently solid-phase diffusing the metal of the bonding wiring 6 at the grain boundaries. On the other hand, if the thickness exceeds 1.0 μm, the formed metal particles grow to a relatively large particle size, and the area of the interface (grain boundary) between the metal particles does not become sufficiently large.

  The configuration of the pad 4 is not limited to the above-described one. In particular, for the uppermost layer 4c which is a substantial bonding layer in the pad 4, for example, silver (Ag), copper (in addition to gold (Au)) It can be formed of any one of Cu), tin (Sn), and indium (In). Moreover, it is good also as a laminated structure which consists of several of these Au, Ag, Cu, Sn, and In, without making it a single layer by Au etc.

  A connection wiring (wiring) 6 is formed on the pad 4 and the wiring pattern 3 of the semiconductor chip 2 as shown in FIG. The connection wiring 6 is formed by a droplet discharge method as will be described later. For example, the connection wiring 6 is formed by sintering metal fine particles made of any one of gold, silver, and copper, and in this embodiment, silver fine particles are sintered. It is a thing. Since the connection wiring 6 is formed between the pad 4 and the wiring pattern 3 in this way, the semiconductor chip 2 is electrically connected to the wiring pattern 3 through the connection wiring 6. (Not shown).

  The connection wiring 6 and the uppermost layer 4c of the pad 4 are in a state in which a part of the connection wiring 6 is solid-phase diffused in the uppermost layer 4c in particular because mutual diffusion occurs at a connection portion formed between them. A connecting portion is formed. That is, as described above, the uppermost layer 4c of the pad 4 has a small film thickness, so that the metal particles (gold particles) forming the upper layer 4c have a small particle size, and therefore the interface (grain boundary) between the metal particles. The area is large, and this facilitates solid-phase diffusion in the uppermost layer 4c. Therefore, as will be described later, by forming the connection wiring 6 on the uppermost layer 4c by the liquid phase method, a part of the metal material that becomes the connection wiring 6 is formed at the interface of the metal particles (gold particles) forming the uppermost layer 4c. Solid phase diffusion. As described above, since a part of the connection wiring 6 is solid-phase diffused in the uppermost layer 4 c, the connection wiring 6 is connected to the uppermost layer 4 c of the pad 4 with good bonding strength and low resistance. It has become.

Here, in the present invention, the metal forming the uppermost layer 4c of the pad 4 of the semiconductor chip 2 is preferably made of any one of gold, silver, copper, tin, and indium. As for, it is preferable that the sintered body forming this is formed of metal fine particles made of any one of gold, silver and copper. By selecting these metals, mutual diffusion easily occurs between the metal forming the uppermost layer 4c and the metal as the material for forming the connection wiring 6, and as a result, the connection wiring is formed in the uppermost layer 4c of the pad 4. This is because a part of 6 becomes easier to solid-phase diffuse.
The connection wiring 6 formed in this way is sealed with an insulating resin or the like covering the connection wiring 6.

Next, a method for manufacturing a semiconductor device having such a configuration will be described.
First, as shown in FIG. 2A, a substrate 1 is prepared, and a semiconductor chip 2 is mounted thereon by bonding or the like. The semiconductor chip 2 has pads 4 formed of base layers 4a, 4b, and 4c.
The base layers 4a, 4b and 4c are formed by depositing Ni on the base layer 4a by plating to form the intermediate layer 4b of the pad 4. Further, Au is deposited on the intermediate layer 4b by plating to form the uppermost layer 4c of the pad 4. Here, as a plating method used for forming the intermediate layer 4b and the uppermost layer 4c, either an electroless plating method or an electrolytic plating method can be employed. Further, a sputtering method can be employed instead of the plating method.

Next, as shown in FIG. 2B, for example, SiO ₂ is formed on the substrate 1 by the CVD method or the like in a state where the semiconductor chip 2 is covered, thereby forming the insulating layer 5. Subsequently, the formed insulating layer 5 is patterned by using a photoresist method and an etching method to form an opening 5a exposing the pad 4 (uppermost layer 4c). Alternatively, a resin layer serving as the insulating layer 5 that exposes the pad 4 (uppermost layer 4c) is formed by a droplet discharge method.
When the pad 4 is formed in this way, especially the uppermost layer 4c of the metal (gold) crystal grows less than the film thickness, so that each metal particle has a relatively small particle size. Therefore, since the area of the interface (grain boundary) between the metal particles becomes large, the uppermost layer 4c of the pad 4 is likely to cause solid phase diffusion by using this as an underlayer.

  Next, in order to connect the uppermost layer 4c of the obtained pad 4 and the wiring pattern 3, a dispersion of metal fine particles is discharged between them by a droplet discharge method as shown in FIG. 2 (c). Arrange. As the droplet discharge method, an inkjet method, a dispenser method, or the like can be adopted. In particular, the inkjet method is preferable because a desired amount of liquid material can be disposed at a desired position. In this embodiment, the inkjet method is used. Shall.

  Here, a liquid droplet ejection head (inkjet head) that is preferably used for performing ejection by the inkjet method will be described. As shown in FIG. 3A, the droplet discharge head 34 includes, for example, a stainless nozzle plate 12 and a vibration plate 13, which are joined via a partition member (reservoir plate) 14. A plurality of spaces 15 and a liquid reservoir 16 are formed between the nozzle plate 12 and the diaphragm 13 by the partition member 14. Each space 15 and the liquid reservoir 16 are filled with a liquid material, and each space 15 and the liquid reservoir 16 communicate with each other via a supply port 17. In addition, a plurality of nozzle holes 18 for injecting the liquid material from the space 15 are formed in the nozzle plate 12 in a state of being aligned vertically and horizontally. On the other hand, a hole 19 for supplying a liquid material to the liquid reservoir 16 is formed in the diaphragm 13.

  Further, a piezoelectric element (piezo element) 20 is joined to the surface of the diaphragm 13 opposite to the surface facing the space 15 as shown in FIG. The piezoelectric element 20 is positioned between a pair of electrodes 21 and is configured to bend so that when it is energized, it projects outward. The diaphragm 13 to which the piezoelectric element 20 is bonded in such a configuration is bent integrally with the piezoelectric element 20 at the same time so that the volume of the space 15 is increased. It is going to increase. Therefore, the liquid material corresponding to the increased volume in the space 15 flows from the liquid reservoir 16 through the supply port 17. Further, when energization to the piezoelectric element 20 is released from such a state, both the piezoelectric element 20 and the diaphragm 13 return to their original shapes. Therefore, since the space 15 also returns to its original volume, the pressure of the liquid material in the space 15 rises, and the liquid material (dispersion liquid) droplet 22 is ejected from the nozzle hole 18 toward the substrate 1.

  As the dispersion liquid to be discharged, for example, a dispersion liquid in which any one kind of metal fine particles of gold, silver, and copper is dispersed in the dispersion liquid is used. In particular, in the present embodiment, as described above, those obtained by dispersing silver fine particles in a dispersion are used. The metal fine particles used in the present invention can be used by coating the surface with an organic substance or the like in order to improve the dispersibility. Examples of the coating material for coating the surface of the metal fine particles include polymers that induce steric hindrance and electrostatic repulsion. The particle size of the metal fine particles is preferably 5 nm or more and 0.1 μm or less. If it is larger than 0.1 μm, the nozzle of the ejection head is likely to be clogged, and it becomes difficult to eject by the ink jet method. On the other hand, if the thickness is smaller than 5 nm, the volume ratio of the coating material to the metal fine particles is increased, and the ratio of the organic matter in the obtained film becomes excessive.

As the dispersion for dispersing the metal fine particles, those having a vapor pressure at room temperature of 0.001 mmHg or more and 200 mmHg or less (about 0.133 Pa or more and 26600 Pa or less) are preferable. This is because when the vapor pressure is higher than 200 mmHg, the dispersion rapidly evaporates after discharge, making it difficult to form a good film (wiring film).
The vapor pressure of the dispersion is more preferably 0.001 mmHg or more and 50 mmHg or less (about 0.133 Pa or more and 6650 Pa or less). This is because when the vapor pressure is higher than 50 mmHg, nozzle clogging due to drying tends to occur when droplets are ejected by the ink jet method (droplet ejection method), and stable ejection becomes difficult. On the other hand, in the case of a dispersion having a vapor pressure lower than 0.001 mmHg at room temperature, the drying is slow and the dispersion tends to remain in the film, and a high-quality conductive film (wiring) is obtained after the heat treatment in the subsequent process. This is because it becomes difficult.

  The dispersion to be used is not particularly limited as long as it can disperse the metal fine particles and does not cause aggregation. In addition to water, alcohols such as methanol, ethanol, propanol and butanol, n-heptane , N-octane, decane, tetradecane, decalin, toluene, xylene, cymene, durene, indene, dipentene, tetrahydronaphthalene, decahydronaphthalene, cyclohexylbenzene and other hydrocarbon compounds, or ethylene glycol dimethyl ether, ethylene glycol diethyl ether, ethylene Glycol methyl ethyl ether, diethylene glycol dimethyl ether, diethylene glycol diethyl ether, diethylene glycol methyl ethyl ether, 1,2-dimethoxyethane, bis (2 Methoxyethyl) ether, p- ether compounds such as dioxane, propylene carbonate, .gamma.-butyrolactone, N- methyl-2-pyrrolidone, dimethylformamide, dimethyl sulfoxide, may be mentioned polar compounds such as cyclohexanone. Of these, water, alcohols, hydrocarbon compounds, and ether compounds are preferred, and further preferred dispersions are preferred in view of dispersibility of the fine particles, stability of the dispersion, and ease of application to the inkjet method. Examples thereof include water and hydrocarbon compounds. These dispersions can be used alone or as a mixture of two or more.

  The dispersoid concentration when the metal fine particles are dispersed in the dispersion, that is, the metal fine particle concentration is 1% by mass or more and 80% by mass or less, and can be adjusted according to the desired film thickness of the connection wiring 6. If it is less than 1% by mass, it will take a long time for the subsequent baking treatment by heating, and if it exceeds 80% by mass, aggregation tends to occur and it becomes difficult to obtain a uniform film.

  The surface tension of the dispersion of the metal fine particles is preferably in the range of 0.02 N / m or more and 0.07 N / m or less. When the liquid material is ejected by the ink jet method, if the surface tension is less than 0.02 N / m, the wettability of the liquid material to the nozzle surface increases, and thus flight bending easily occurs, and 0.07 N / m. This is because if it exceeds, the shape of the meniscus at the tip of the nozzle is not stable, and it becomes difficult to control the discharge amount and the discharge timing.

  The viscosity of the dispersion is preferably 1 mPa · s or more and 50 mPa · s or less. When discharging by the inkjet method, if the viscosity is less than 1 mPa · s, the nozzle periphery of the discharge head is easily contaminated by the outflow of ink (dispersion), and if the viscosity is greater than 50 mPa · s This is because the frequency of clogging at the nozzle holes increases, and it becomes difficult to smoothly discharge droplets.

  In the present embodiment, silver fine particles having an average particle size of 5 nm after coating with a resin having an average particle size of 5 nm are used as metal fine particles, and a dispersion liquid (manufactured by ULVAC) obtained by dispersing this in tetradecane is used. Yes. A droplet 22 of such a dispersion of silver fine particles is ejected from a droplet ejection head 34 as shown in FIG. 3 (b), and is dropped onto a location where the connection wiring 6 on the substrate 1 is to be formed. A precursor 6a of the wiring 6 is formed. At this time, it is necessary to control the overlapping degree of the droplets to be discharged continuously so as not to cause a liquid pool (bulge). Further, it is also possible to employ a discharge method in which a plurality of droplets are discharged so as not to contact each other in the first discharge, and the space is filled by the second and subsequent discharges.

  When the precursor 6a of the connection wiring 6 is formed in this way, it is fired by heat treatment, and the metal fine particles (silver fine particles) are sintered, as shown in FIGS. 1 (a) to 1 (c). Connection wiring 6 is formed. The firing temperature is preferably in the temperature range of 150 ° C. or more and 250 ° C. or less. In particular, in this embodiment in which the connection wiring 6 made of silver fine particles is formed on the pad 4 (uppermost layer 4c) made of gold, about 200 ° C. It is desirable to bake for 2 hours. If the firing temperature is less than 150 ° C., firing may not be sufficient, and solid phase diffusion may not occur satisfactorily. If it exceeds 250 ° C., damage to the semiconductor chip 2 due to heat can be ignored. In addition, when a flexible substrate is used as the substrate 1, damage to the flexible substrate is increased.

  When the heat treatment (baking treatment) is performed in this way, the uppermost layer 4c of the pad 4 is likely to undergo solid phase diffusion as described above, so that the precursor 6a (dispersion liquid) of the connection wiring 6 is formed. Part of the metal fine particles (silver fine particles) is solid-phase diffused at the interface (grain boundary) between the metal particles forming the uppermost layer 4c, and finally sintered in that state.

Here, after the connection wiring 6 is formed as described above, the interface portion between the uppermost layer 4c of the pad 4 and the connection wiring 6 is peeled off to prepare a sample, and the sample is analyzed as follows. Thus, it was confirmed that solid phase diffusion occurred at the interface portion between the uppermost layer 4c and the connection wiring 6.
First, a microtome processing apparatus (manufactured by JEOL; ULTRACUT-J) and a focused ion beam processing apparatus (manufactured by Seiko Instruments Inc .; SMI-9200) were used for the preparation of the samples. And about the obtained sample, the side cross section of the interface part of the uppermost layer 4c and the connection wiring 6 was investigated using the scanning electron microscope (Hitachi Ltd .; S4500), and the SEM image (SEM photograph) was obtained.

  Next, for the same sample, the same location as the location where the SEM image was taken, using Auger electrons generated by irradiating an electron beam, and by AES method (Auger electron spectroscopy) for performing elemental analysis of the surface area, An AES line analysis in the depth direction of the film from the connection wiring 6 toward the uppermost layer 4c side was performed. The AES line analysis was performed using PHI-670 manufactured by PerkinElmer. The obtained results are shown in the graph of FIG.

  In FIG. 4, the horizontal axis indicates the distance (depth) from the surface of the sample, and the vertical axis indicates the element amount. From FIG. 4, from the surface of the sample to about 1.5 μm, most of the silver (Ag) that becomes the connection wiring 6 is formed, but then to a depth of about 2.0 μm, that is, a film thickness of 0.4 μm. In the portion corresponding to the uppermost layer 4c, it can be seen that Ag is present in a relatively large proportion in addition to gold (Au) forming the uppermost layer 4c. Therefore, it was found that a part of the metal forming the connection wiring 6 was solid-phase diffused in a considerable proportion in the uppermost layer 4c.

As described above, according to the manufacturing method of the present embodiment, the uppermost layer 4c of the pad 4 of the semiconductor chip 2 is formed as a thin metal layer having a thickness of 0.1 μm or more and 1.0 μm or less. As a result, when the dispersion liquid is baked to form the connection wiring 6, a part thereof is solid-phase diffused in the uppermost layer 4 c of the pad 4. Therefore, by connecting the connection wiring 6 and the pad 4 in this way, the bonding strength at the connection portion is improved without applying pressure or ultrasonic vibration between the pad 4 and the connection wiring 6. In addition, it is possible to reduce the resistance, thereby improving the connection reliability.
That is, the bonding interface becomes very strong by solid phase diffusion, so that the mechanical connection strength can be remarkably improved and the electrical contact resistance can be reduced.

  Further, since the bonding strength between the pad 4 and the connection wiring 6 can be improved and the resistance can be reduced without applying pressure to the bonding interface (metal interface), for example, it is very thin, for example, 50 μm or less. Even when the semiconductor chip 2 having low mechanical strength is mounted, the wiring can be easily pulled out from the semiconductor chip 2 without damaging the semiconductor chip 2 and without causing destruction. In addition, since the ultra-thin semiconductor chip 2 can be mounted in this way, particularly when this semiconductor chip 2 is mounted on a flexible substrate, even when a bending stress is generated in the joint portion of the semiconductor chip 2, Interfacial peeling of the semiconductor chip 2 with respect to the flexible substrate can be prevented.

Further, in the semiconductor device obtained in this way, as described above, the connection portion between the uppermost layer 4c of the pad 4 of the semiconductor chip 2 and the connection wiring 6 is partially solid-phase diffused. Therefore, the bonding strength at the connection portion is improved and the resistance is lowered, and therefore the connection reliability is improved.
In addition, since a good bonding strength can be obtained between the pad 4 and the connection wiring 6 in this way, even when an extremely thin semiconductor chip 2 is used, the pressure applied between the terminal and the wiring can be reduced. A connection structure with good bonding strength and low resistance can be obtained without applying ultrasonic vibration and therefore without damaging the semiconductor chip 2.

  In addition, since the ultra-thin semiconductor chip 2 is mounted on the flexible substrate, the semiconductor device itself has flexibility, and its application is greatly expanded. Further, since the bonding strength at the connection portion is improved as described above, it is possible to prevent the semiconductor chip 2 from being peeled off even when a bending stress is generated at the bonding portion.

Therefore, the semiconductor device of the present invention is suitably used as a component of electronic equipment such as an electro-optical device such as a liquid crystal device, an organic EL device, a plasma display device (PDP), and a field emission display (FED).
Note that the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the gist of the present invention. For example, a hard substrate such as glass can be used without using a flexible substrate as the substrate.

(A)-(c) is a figure which shows one Embodiment of the semiconductor device of this invention. (A)-(c) is manufacturing process explanatory drawing of the semiconductor device shown in FIG. (A), (b) is explanatory drawing of a droplet discharge head. It is a graph which shows the experimental result for confirming solid phase diffusion.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Board | substrate, 2 ... Semiconductor chip, 3 ... Wiring pattern, 4 ... Pad (terminal),
4c ... uppermost layer, 5 ... insulating layer, 6 ... connection wiring (wiring)

Claims (7)

A method of manufacturing a semiconductor device comprising a semiconductor chip and wiring connected to terminals of the semiconductor chip,
As the semiconductor chip, the top layer of the terminal is formed by a metal layer having a thickness of 0.1 μm or more and 1.0 μm or less,
As a material for forming the wiring, a dispersion liquid in which metal fine particles are dispersed is used.
After the dispersion liquid is discharged by a droplet discharge method and disposed on the terminal, the dispersion liquid is fired to sinter the metal fine particles to form the wiring, and a part of the wiring is partly connected to the terminal. A method of manufacturing a semiconductor device, characterized in that the wiring and the terminal are connected by solid-phase diffusion in the uppermost layer. The uppermost layer of the terminal is formed of a metal layer made of any one of gold, silver, copper, tin, and indium;
2. The method of manufacturing a semiconductor device according to claim 1, wherein a dispersion liquid in which metal fine particles made of any one of gold, silver, and copper are dispersed is used as a material for forming the wiring.   The method of manufacturing a semiconductor device according to claim 1, wherein the wiring connected to the terminal is formed after the semiconductor chip is mounted on a flexible substrate.   The method for manufacturing a semiconductor device according to claim 1, wherein the dispersion is baked in a temperature range of 150 ° C. or more and 250 ° C. or less. A semiconductor device comprising a semiconductor chip and wiring connected to a terminal of the semiconductor chip,
The uppermost layer of the terminal is formed by a metal layer having a thickness of 0.1 μm or more and 1.0 μm or less,
The wiring is formed by a sintered body of metal fine particles,
A connection portion between the wiring and the terminal is formed in a state where a part of the wiring is solid-phase diffused in the uppermost layer of the terminal. The uppermost layer of the terminal is made of any one of gold, silver, copper, tin, and indium,
6. The semiconductor device according to claim 5, wherein the wiring is formed of a sintered body of metal fine particles made of any one of gold, silver, and copper. 7. The semiconductor device according to claim 5, wherein the semiconductor chip is mounted on a flexible substrate face up with the terminals facing upward.

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