JP2006030831A - Liquid crystal display device and driving method thereof - Google Patents

Abstract

Flicker is reduced without increasing power consumption of a liquid crystal display device.
In a scanning period Tsc of the first half of the nth frame, two scanning signal lines corresponding to two adjacent rows in a pixel matrix are referred to as a virtual scanning signal line, and first, an odd-numbered virtual scanning signal line. Are sequentially selected, and then, after a predetermined scanning stop period Tnsc, the even-numbered virtual scanning signal lines are sequentially selected to perform virtual interlaced scanning. Further, in the next (n + 1) th frame, the polarity of each row is inverted and 1-line inversion driving is performed in which the same virtual interlaced scanning is performed. Thereby, without increasing the power consumption by increasing the length of the scanning stop period Tnsc, the average value of the luminances of the two pixel forming portions included in different virtual scanning signal lines and connected to the adjacent scanning signal lines By reducing the change in the flicker, the flicker due to current leakage is spatially reduced.
[Selection] Figure 3

Description

  The present invention relates to a liquid crystal display device and a driving method thereof, and more particularly to alternating drive in an active matrix liquid crystal display device.

  In general, in a liquid crystal display device, AC driving is performed in order to suppress deterioration of the liquid crystal and maintain display quality. However, in an active liquid crystal display device, a voltage is applied to a video signal line (column electrode) of a liquid crystal panel because the characteristics of a switching element such as a TFT (Thin Film Transistor) provided for each pixel are not sufficient. Even if the positive and negative of the video signal output from the video signal line driving circuit (also referred to as “column electrode driving circuit” or “data line driving circuit”), that is, the polarity of the applied voltage with respect to the common electrode potential is symmetric, The transmittance of the liquid crystal layer is not completely symmetrical with respect to positive and negative data voltages. For this reason, in a driving method (frame inversion driving method) in which the polarity of the voltage applied to the liquid crystal is inverted every frame (flicker inversion driving method), flicker occurs in the display by the liquid crystal panel (hereinafter, this flicker is also referred to as “flicker by positive / negative asymmetrical”). ). In recent years, portable information devices such as mobile phones are required to have a high-quality display capability due to improvements in processing performance and advanced use, and thus flicker due to such positive and negative asymmetry becomes a problem. Therefore, as a driving method for alternating current of the liquid crystal module used in the portable information device, a driving method (“1”) that reverses the positive / negative polarity of each applied voltage while inverting the positive / negative polarity of the applied voltage for each horizontal scanning line. This is called a “line inversion drive system”. In addition, a driving method (referred to as “one-dot inversion driving method”) in which the positive / negative polarity of the applied voltage is inverted for each pixel adjacent in the vertical and horizontal directions and the positive / negative polarity is inverted for each frame is also adopted.

  However, if the one-line inversion driving method is employed, the frequency of polarity inversion (inversion frequency) in the video signal to be applied to the liquid crystal panel is increased, and the withstand voltage required for a driving IC (Integrated Circuit) is reduced. In addition, the switching frequency of the potential of the common electrode is increased. As a result, power consumption increases.

Therefore, in recent years, a drive method in which the inversion frequency is lowered as a whole by providing a scanning stop period for preventing the applied voltage from changing only for a predetermined period may be employed (see, for example, Patent Document 1). ). By inserting such a scanning stop period, it is possible to meet the demand for low power consumption in cellular phones and the like.
JP 2002-182619 A

  However, the longer the scan stop period is set, the more the power consumption can be reduced. Current leakage occurs during the period, and the voltage to be held decreases. As a result, the luminance change of the displayed pixel becomes significant according to the applied voltage to be applied next. As a result, this luminance change is visually recognized as flicker (hereinafter, this flicker is also referred to as “flicker due to current leakage”).

  Accordingly, the present invention provides a liquid crystal display device in which the flicker caused by the current leak and the flicker caused by positive / negative asymmetric are reduced without increasing the power consumption, or the power consumption is reduced without increasing these flickers. Objective.

A first invention provides a plurality of pixel forming portions for forming an image to be displayed and a plurality of video signal lines for transmitting a plurality of video signals indicating the image to be displayed to the plurality of pixel forming portions. And a plurality of scanning signal lines intersecting with the plurality of video signal lines, and the plurality of pixel forming portions correspond to intersections of the plurality of video signal lines and the plurality of scanning signal lines, respectively, in a matrix form An active matrix type liquid crystal display device arranged in
The plurality of scanning signal lines are selectively driven by sequentially selecting a predetermined number of virtual scanning signal lines, each of which is defined as a set of two or more adjacent scanning signal lines among the plurality of scanning signal lines. A scanning signal line driving circuit that repeats virtual interlace scanning;
Video transmitted by each video signal line when one of at least one pair of scanning signal lines is selected in each virtual scanning signal line and when the other of the at least one pair of scanning signal lines is selected A video signal line driving circuit that applies the plurality of video signals to the plurality of video signal lines so that the positive and negative polarity of the signals are different from each other;
Each of the pixel forming units outputs a video signal transmitted by the video signal line passing through the corresponding intersection when the scanning signal line passing through the corresponding intersection is selected by the scanning signal line driving circuit. As
The scanning signal line driving circuit is characterized in that all the plurality of scanning signal lines are in a non-selected state for a predetermined period from the end of the virtual interlaced scanning to the start of the next virtual interlaced scanning.

According to a second invention, in the first invention,
In the scanning signal line driving circuit, the number of scanning signal lines selected when a positive video signal is transmitted by an arbitrary video signal line and the negative video signal is transmitted by the arbitrary video signal line. Of the plurality of scanning signal lines, adjacent virtual scanning signal lines are used as one virtual scanning signal line so that the number of scanning signal lines selected at the same time is the same in each virtual scanning signal line. It is characterized by repeating interlaced scanning.

According to a third invention, in the first or second invention,
The scanning signal line driving circuit sequentially selects a virtual scanning signal line group in which a plurality of virtual scanning signal lines are defined as a set of two or more of the plurality of virtual scanning signal lines as a new virtual scanning signal line every predetermined number. The virtual interlaced scanning for selectively driving the plurality of scanning signal lines is repeated, and the plurality of scanning signals for a predetermined period from the end of each new virtual interlaced scanning to the start of the next new virtual interlaced scanning. The line is set in a non-selected state.

According to a fourth invention, in any one of the first to third inventions,
The scanning signal line drive circuit is characterized in that the plurality of scanning signal lines are set in a non-selected state with a period longer than a period required for one virtual interlaced scanning as the predetermined period.

A fifth invention provides a plurality of pixel forming portions for forming an image to be displayed, and a plurality of video signal lines for transmitting a plurality of video signals indicating the image to be displayed to the plurality of pixel forming portions. And a plurality of scanning signal lines intersecting with the plurality of video signal lines, and the plurality of pixel forming portions correspond to intersections of the plurality of video signal lines and the plurality of scanning signal lines, respectively, in a matrix form An active matrix type liquid crystal display device arranged in
A scanning signal line driving circuit that repeats interlaced scanning that is driven by sequentially selecting the plurality of scanning signal lines every predetermined number;
When an arbitrary scanning signal line is selected, the plurality of video signal lines are arranged so that the positive and negative polarities of the video signals transmitted by two video signal lines adjacent to each other or spaced apart from each other are different from each other. A video signal line driving circuit for applying each of the plurality of video signals,
Each of the pixel forming units outputs a video signal transmitted by the video signal line passing through the corresponding intersection when the scanning signal line passing through the corresponding intersection is selected by the scanning signal line driving circuit. As
The scanning signal line drive circuit is characterized in that all of the plurality of scanning signal lines are in a non-selected state for a predetermined period from the end of the interlaced scanning to the start of the next interlaced scanning.

A sixth invention provides a plurality of pixel forming portions for forming an image to be displayed, and a plurality of video signal lines for transmitting a plurality of video signals indicating the image to be displayed to the plurality of pixel forming portions. And a plurality of scanning signal lines intersecting with the plurality of video signal lines, and the plurality of pixel forming portions correspond to intersections of the plurality of video signal lines and the plurality of scanning signal lines, respectively, in a matrix form A method of driving an active matrix type liquid crystal display device arranged in
The plurality of scanning signal lines are selectively driven by sequentially selecting a predetermined number of virtual scanning signal lines, each of which is defined as a set of two or more adjacent scanning signal lines among the plurality of scanning signal lines. A scanning signal line driving step for repeating virtual interlace scanning;
Video transmitted by each video signal line when one of at least one pair of scanning signal lines is selected in each virtual scanning signal line and when the other of the at least one pair of scanning signal lines is selected The scanning signal line driving circuit selects the scanning signal line passing through the corresponding intersection by applying the plurality of video signals to the plurality of video signal lines so that the positive and negative polarity of the signals are different from each other. A video signal line driving step of providing each pixel forming unit with a video signal transmitted by the video signal line passing through the corresponding intersection as a pixel value,
The scanning signal line driving step is characterized in that all of the plurality of scanning signal lines are deselected for a predetermined period from the end of the virtual interlaced scanning to the start of the next virtual interlaced scanning.

According to a seventh aspect of the present invention, a plurality of pixel forming portions for forming an image to be displayed and a plurality of video signal lines for transmitting a plurality of video signals indicating the image to be displayed to the plurality of pixel forming portions. And a plurality of scanning signal lines intersecting with the plurality of video signal lines, and the plurality of pixel forming portions correspond to intersections of the plurality of video signal lines and the plurality of scanning signal lines, respectively, in a matrix form A method of driving an active matrix type liquid crystal display device arranged in
A scanning signal line driving step that repeats interlaced scanning that is driven by sequentially selecting the plurality of scanning signal lines every predetermined number;
When an arbitrary scanning signal line is selected, the plurality of video signal lines are arranged so that the positive and negative polarities of the video signals transmitted by two video signal lines adjacent to each other or spaced apart from each other are different from each other. By applying each of the plurality of video signals, when a scanning signal line passing through the corresponding intersection is selected by the scanning signal line driving circuit, the signal is transmitted by the video signal line passing through the corresponding intersection. A video signal line driving step of giving a video signal as a pixel value to each of the pixel forming units,
The scanning signal line driving step is characterized in that all of the plurality of scanning signal lines are in a non-selected state for a predetermined period from the end of the interlaced scanning to the start of the next interlaced scanning.

  According to the first aspect of the present invention, virtual interlaced scanning in which virtual scanning signal lines including two or more adjacent scanning signal lines are sequentially selected every predetermined number is repeated, and the next virtual interlaced scanning is performed after the end of each virtual interlaced scanning. All scanning signal lines are set in a non-selected state for a predetermined period (scanning stop period) until the start. As a result, it is possible to reduce the change in the average value of the luminance of the two pixel forming portions included in different virtual scanning signal lines and connected to the adjacent scanning signal lines, and thus the conventional scanning stop period having the same length. Compared with this device, flicker due to current leakage can be spatially reduced without increasing power consumption. Further, since both the positive and negative polarities are included in the polarity corresponding to one virtual scanning signal line, flicker due to positive and negative asymmetry can be spatially reduced.

  According to the second invention, since the virtual scanning signal line composed of two or more adjacent scanning signal lines determined so as to include the same number of both predetermined positive and negative polarities is determined, compared with the conventional apparatus. Flicker due to positive and negative asymmetry can be reduced spatially, and flicker due to current leakage can be reduced spatially without increasing power consumption.

  According to the third aspect of the present invention, a virtual interlaced scanning pattern can be arbitrarily set by defining a plurality of virtual scanning signal line groups with two or more of the plurality of virtual scanning signal lines as one set. Flicker due to current leakage can be spatially reduced without increasing power consumption.

  According to the fourth aspect of the present invention, by providing a scan stop period longer than that required for one virtual interlaced scan, flicker can be reduced while suppressing power consumption to half or less compared to a conventional apparatus having no scan stop period. Can be reduced.

  According to the fifth aspect of the invention, the scanning signal lines are sequentially selected every predetermined number so that the positive and negative polarities of the video signals transmitted by the two video signal lines adjacent to each other or spaced apart from each other are different from each other. The interlaced scanning is repeated and all the scanning signal lines are deselected for a predetermined period (scanning stop period) between the end of each interlaced scan and the start of the next interlaced scan. As a result, the change in the average value of the luminance of the two pixel forming portions connected to the adjacent scanning signal lines selected by different interlaced scanning can be reduced, so that the conventional apparatus having the scanning stop period of the same length Compared to the above, it is possible to spatially reduce the flicker caused by current leakage without increasing the power consumption, and the polarity corresponding to one scanning signal line includes both positive and negative polarities. It can be reduced spatially.

  According to the sixth invention, the same effect as the first invention is obtained.

  According to the seventh aspect, the same effect as the fifth aspect is achieved.

Embodiments of the present invention will be described below with reference to the accompanying drawings.
<1. First Embodiment>
<1.1 Overall configuration and operation>
FIG. 1A is a block diagram showing the configuration of the liquid crystal display device according to the first embodiment of the present invention. The liquid crystal display device includes a display control circuit 200, a video signal line driving circuit 300 (also referred to as “column electrode driving circuit” or “data line driving circuit”), and a scanning signal line driving circuit (“row electrode driving circuit”) or 400) (also called a “gate line driver circuit”), a common electrode driver circuit 500, and an active matrix liquid crystal panel 600.

  A liquid crystal panel 600 as a display unit in this liquid crystal display device includes a plurality of scanning signal lines (row electrodes) each corresponding to a horizontal scanning line in an image represented by image data Dv received from a CPU or the like in an external computer. A plurality of video signal lines (column electrodes) intersecting with each of the plurality of scanning signal lines, and a plurality of video signal lines provided corresponding to the intersections of the plurality of scanning signal lines and the plurality of video signal lines, respectively. A pixel formation portion. The configuration of each pixel formation portion is basically the same as that in a conventional active matrix liquid crystal panel (details will be described later). In addition, the liquid crystal panel 600 includes a common electrode that is provided in common to the pixel electrodes included in each pixel formation portion and is disposed to face each pixel electrode with the liquid crystal layer interposed therebetween.

  In the present embodiment, image data (in a narrow sense) representing an image to be displayed on the liquid crystal panel 600 and data for determining the timing of the display operation (for example, data indicating the frequency of the display clock) (hereinafter referred to as “display control data”). Are sent to the display control circuit 200 from a CPU or the like in an external computer (hereinafter, these data Dv sent from the outside are referred to as “broadly defined image data”). That is, an external CPU or the like supplies image data and display control data (in a narrow sense) constituting the image data Dv in a broad sense to the display control circuit 200 as an address signal ADw, and the display described later in the display control circuit 200 is performed. Write to memory and register respectively.

  The display control circuit 200 generates a display clock signal CK, a horizontal synchronization signal HSY, a vertical synchronization signal VSY, and the like based on display control data written in the register. Further, the display control circuit 200 reads out (narrowly defined) image data written in the display memory by an external CPU or the like from the display memory and outputs it as a digital image signal Da. Further, the display control circuit 200 generates a polarity switching control signal φ for AC driving of the liquid crystal panel 600 based on the horizontal synchronization signal HSY and the vertical synchronization signal VSY. Thus, among the signals generated by the display control circuit 200, the clock signal CK is supplied to the video signal line driving circuit 300, and the horizontal synchronizing signal HSY and the vertical synchronizing signal VSY are supplied to the video signal line driving circuit 300 and the scanning signal line driving. In the circuit 400, the digital image signal Da is supplied to the video signal line driving circuit 300, and the polarity switching control signal φ is supplied to the video signal line driving circuit 300 and the common electrode driving circuit 500, respectively.

  As described above, the video signal line driving circuit 300 is supplied with data representing an image to be displayed on the liquid crystal panel 600 as the digital image signal Da in units of pixels, and as a signal indicating the timing, the clock signal CK and the horizontal synchronization signal. A signal HSY, a vertical synchronization signal VSY, and a polarity switching control signal φ are supplied. Based on these signals Da, CK, HSY, VSY, and φ, the video signal line driving circuit 300 is a video signal for driving the liquid crystal panel 600 (hereinafter also referred to as “driving video signal”) D (1), D (2), D (3),... Are generated and applied to the video signal lines of the liquid crystal panel 600. The polarity of the drive video signals D (1), D (2), D (3),... Is inverted in accordance with the polarity switching control signal .phi.

  The scanning signal line drive circuit 400 scans to be applied to each scanning signal line in order to select the scanning signal lines in the liquid crystal panel 600 for each horizontal scanning period in a predetermined order described later based on the horizontal synchronizing signal HSY and the vertical synchronizing signal VSY. The signals G (1), G (2), G (3),... Are generated, and one vertical application of an active scanning signal for selecting each of all scanning signal lines in a predetermined order is performed. The scanning period is repeated as a cycle.

  The common electrode drive circuit 500 generates a common voltage Vcom that is a voltage to be applied to the common electrode of the liquid crystal panel 600. In the present embodiment, in order to suppress the amplitude of the voltage of the video signal line, the potential of the common electrode is also changed according to the AC drive. That is, the common electrode driving circuit 500 generates a voltage that switches between two types of reference voltages in one frame (one vertical scanning period) in accordance with the polarity switching control signal φ from the display control circuit 200, and generates this voltage. The common voltage Vcom is supplied to the common electrode of the liquid crystal panel 600.

  In the liquid crystal panel 600, the video signal lines D (1), D (2), D (3),... For driving based on the digital image signal Da by the video signal line driving circuit 300 are provided on the video signal lines as described above. The scanning signal lines are applied with scanning signals G (1), G (2), G (3),... By the scanning signal line driving circuit 400, and the common electrodes are shared by the common electrode driving circuit 500. A voltage Vcom is applied. Thereby, the liquid crystal panel 600 displays an image represented by the image data Dv received from an external CPU or the like.

<1.2 Display control circuit>
FIG. 1B is a block diagram showing a configuration of the display control circuit 200 in the liquid crystal display device. The display control circuit 200 includes an input control circuit 20, a display memory 21, a register 22, a timing generation circuit 23, a memory control circuit 24, and a polarity switching control circuit 25.

  A signal indicating image data Dv in a broad sense received by the display control circuit 200 from an external CPU or the like (hereinafter, this signal is also denoted by “Dv”) and an address signal ADw are input to the input control circuit 20. . The input control circuit 20 distributes the image data Dv in a broad sense into the image data DA and the display control data Dc based on the address signal ADw. Then, the image data DA is supplied to the display memory 21 together with the address signal AD based on the address signal ADw by supplying a signal representing the image data DA (hereinafter, these signals are also represented by the symbol “DA”). And display control data Dc is written to the register 22. The display control data Dc includes timing information for designating a horizontal scanning period and a vertical scanning period for displaying an image represented by the frequency of the clock signal CK and the image data Dv.

  A timing generation circuit (hereinafter abbreviated as “TG”) 23 generates a clock signal CK, a horizontal synchronization signal HSY, and a vertical synchronization signal VSY based on the display control data held in the register 22. In addition, the TG 23 generates a timing signal for operating the display memory 21 and the memory control circuit 24 in synchronization with the clock signal CK.

  The memory control circuit 24 receives an address signal ADr for reading out data representing an image to be displayed on the liquid crystal panel 600 out of the image data DA input from the outside and stored in the display memory 21 via the input control circuit 20. And a signal for controlling the operation of the display memory 21. These address signal ADr and control signal are applied to the display memory 21, whereby data representing an image to be displayed on the liquid crystal panel 600 is read from the display memory 21 as the digital image signal Da and output from the display control circuit 200. Is done. The digital image signal Da is supplied to the video signal line driving circuit 300 as described above.

  The polarity switching control circuit 25 generates the polarity switching control signal φ based on the horizontal synchronization signal HSY and the vertical synchronization signal VSY generated by the TG 23. This polarity switching control signal φ is a control signal for determining the timing of polarity inversion for the AC drive of the liquid crystal panel 600 and is supplied to the video signal line drive circuit 300 and the common electrode drive circuit 500 as described above. Is done.

<1.3 LCD panel>
FIG. 2A is a schematic diagram showing a configuration of the liquid crystal panel 600 in the present embodiment, and FIG. 2B is an equivalent circuit diagram of a part (a part corresponding to four pixels) 610 of the liquid crystal panel. is there.

  The liquid crystal panel 600 includes a plurality of video signal lines Ls connected to the video signal line driving circuit 300 and a plurality of scanning signal lines Lg connected to the scanning signal line driving circuit 400, and the plurality of video signal lines. Ls and the plurality of scanning signal lines Lg are arranged in a lattice shape so that each video signal line Ls and each scanning signal line Lg intersect each other. A plurality of pixel forming portions Px are provided corresponding to the intersections of the plurality of video signal lines Ls and the plurality of scanning signal lines Lg, respectively. As shown in FIG. 2B, each pixel forming portion Px has a source terminal connected to the video signal line Ls passing through the corresponding intersection and a gate terminal on the scanning signal line Lg passing through the corresponding intersection. The connected TFT 10, the pixel electrode Ep connected to the drain terminal of the TFT 10, the common electrode (also referred to as “counter electrode”) Ec provided in common to the plurality of pixel formation portions Px, the plurality of the plurality The liquid crystal layer is provided in common in the pixel formation portion Px and is sandwiched between the pixel electrode Ep and the common electrode Ec. A pixel capacitor Cp is formed by the pixel electrode Ep, the common electrode Ec, and the liquid crystal layer sandwiched therebetween. Such a configuration of the pixel forming portion Px is the same in each embodiment of the present invention described below. As can be seen from the above configuration, when the scanning signal G (k) applied to one of the scanning signal lines Lg becomes active, the scanning signal line is selected and connected to the scanning signal line (each The TFT 10 (in the pixel formation portion Px) becomes conductive, and the driving video signal D (j) is applied to the pixel electrode Ep connected to the TFT 10 via the video signal line Ls. As a result, the applied voltage of the driving video signal D (j) (voltage based on the potential of the common electrode Ec) is written as a pixel value in the pixel formation portion Px including the pixel electrode Ep.

  The pixel forming portions Px as described above are arranged in a matrix to form a pixel forming matrix. Accordingly, the pixel electrodes Ep included in the pixel forming portions Px are also arranged in a matrix to form a pixel electrode matrix. To do. By the way, the pixel electrode Ep, which is the main part of the pixel forming portion Px, can be viewed in one-to-one correspondence with the pixels of the image displayed on the liquid crystal panel. Therefore, in the following, for convenience of explanation, the pixel formation portion Px or the pixel electrode Ep and the pixel are regarded as the same, and the “pixel formation matrix” or “pixel electrode matrix” is also simply referred to as “pixel matrix”.

  In FIG. 2A, “+” attached to each pixel formation portion Px indicates the pixel liquid crystal constituting the pixel formation portion Px in a certain frame (or the pixel electrode Ep with reference to the common electrode Ec). “−” Means that a positive voltage is applied, and “−” means that a negative voltage is applied to the pixel liquid crystal (or the pixel electrode Ep with reference to the common electrode Ec) constituting the pixel forming portion Px in the frame. This means that the polarity pattern in the pixel matrix is indicated by “+” and “−” attached to each of the pixel forming portions Px. Such a method of expressing a polarity pattern is the same in other embodiments of the present invention described below. As shown in FIG. 2A, in this embodiment, a one-line inversion driving method, which is a driving method that inverts the positive / negative polarity of the voltage applied to the pixel liquid crystal for each row in the pixel matrix and also for every frame. Is adopted.

<1.4 Driving method>
Next, a driving method of the liquid crystal display device according to the present embodiment provided with the liquid crystal panel 600 having the above-described configuration will be described with reference to FIGS. In the following, for convenience of explanation, the number of scanning signal lines Lg in the liquid crystal panel 600 is 8 and the number of video signal lines Ls is 8, and the scanning signal line driving circuit 400 applies the scanning signal G to the 8 scanning signal lines Lg. (1) to G (8) are respectively applied, and driving video signals D (1) to D (8) are respectively applied to the eight video signal lines Ls by the video signal line driving circuit 300. .

  FIG. 3 is a conceptual diagram for explaining a driving method of the liquid crystal display device according to the present embodiment. Each rectangle formed by a row indicates a pixel matrix, and a symbol “+” or a symbol attached to the pixel matrix “-” Indicates the polarity of the voltage applied to the pixel liquid crystal, that is, the voltage of the pixel electrode Ep with respect to the common electrode Ec (hereinafter referred to as “pixel voltage”), and is drawn along each rectangle indicating the pixel matrix. The indicated arrow indicates the scanning direction (the ascending order of the row numbers).

  FIG. 4 is a timing chart for explaining this driving method. That is, FIGS. 4A to 4H show the scanning signals G (1) to G (8). When the scanning signal G (k) is at the H level, the scanning signal G (k) is applied. When the scanning signal line Lg is selected and the scanning signal G (k) is at the L level, the scanning signal line Lg to which the scanning signal G (k) is applied is in a non-selected state (k = 1 to 8). FIG. 4I shows the voltage polarity of the driving video signals D (1) to D (8) applied to the video signal line Ls (referenced to the common electrode Ec) every horizontal scanning period Th. It shows.

  FIG. 3A shows the video signals D (1) to D (8) during the first half of a certain frame (hereinafter referred to as the nth frame and represented by the symbol “F (n)”). The polarity of the pixel voltage corresponding to the rewritten pixel value is shown. In the present driving method, as shown in FIGS. 4A to 4H, in the predetermined scanning period Tsc in the first half period of the nth frame F (n), the first row, the second row, and the fifth row in the pixel matrix. Scanning is performed when scanning signals G (1), G (2), G (5), and G (6) corresponding to the sixth and sixth rows become active in this order. Here, in the present embodiment, the scanning signal G (1) corresponding to the first and second rows, the third and fourth rows, the fifth and sixth rows, the seventh and eighth rows in the pixel matrix. And G (2), G (3) and G (4), G (5) and G (6), and G (7) and G (8) are called “virtual scanning signals”. A set of adjacent scanning signal lines Lg that are scanned by the scanning signal is referred to as a “virtual scanning signal line”. Therefore, for example, the scanning signals G (1) and G (2) corresponding to the first and second rows in the pixel matrix are the first virtual scanning signals, and scanning is performed by the first virtual scanning signals. A pair of adjacent scanning signal lines Lg is the first virtual scanning signal line. Accordingly, here, odd-numbered virtual scanning signal lines are selected in order, thereby performing virtual interlaced scanning (when focusing on the virtual scanning signal lines).

  The voltages corresponding to the pixel values to be written in the pixel formation portions Px in the first row, the second row, the fifth row, and the sixth row in the pixel matrix are the scanning signals G (1), G (2), In the active period of G (5) and G (6), as shown in FIG. 4 (i), positive or negative video signals D (1) to D (8) are applied to the video signal lines Ls. . For example, the polarities of the video signals D (1) to D (8) are positive during the active period of the scanning signal G (1) and are negative during the active period of the scanning signal G (2).

  In this scanning period Tsc, the even-numbered virtual scanning signals G (3), G (4), G (7), and G (8) are inactive, so that the corresponding pixel matrix In the pixel forming portion Px, the pixel voltage applied before the scanning period Tsc is held as a pixel value. In order to show this, in FIG. 3A, the symbols “+” and “−” indicating polarity are attached to the third row, the fourth row, the seventh row, and the eighth row in the pixel matrix. Not. Such a notation method is the same in the following.

  Following the predetermined scanning period Tsc in the first half period of the nth frame F (n) as described above, in this driving method, the predetermined scanning stop period Tnsc in the first half period of the nth frame F (n). Accordingly, all the scanning signals G (1) to G (8) become inactive and the scanning is stopped. In this scanning stop period Tnsc, the state in which the polarity pattern of the pixel matrix is the pattern shown in FIG. Note that the voltage levels of the video signals D (1) to D (8) in the scanning stop period Tnsc are not particularly limited. For example, the voltage immediately before the scanning stop period Tnsc may be maintained, or may be a voltage value that changes at an appropriate period, or the video signals D (1) to D (8) in the video signal line driving circuit 300. The output terminal may be in a high impedance state. The scanning stop period Tnsc here is omitted in FIG. 4 (i), but has a length three times as long as the scanning period Tsc, and is the same in this embodiment. By setting a relatively long scan stop period Tnsc that is equal to or longer than the scan period Tsc in this manner, the power consumption of the present apparatus is significantly increased (here, approximately (1/4) can be reduced.

  FIG. 3B shows the polarity of the pixel voltage corresponding to the pixel value rewritten by the video signals D (1) to D (8) in the second half of the nth frame. In this driving method, as shown in FIGS. 4A to 4H, the third row, the fourth row, and the seventh row in the pixel matrix in the predetermined scanning period Tsc in the second half period of the nth frame F (n). The scanning signals G (3), G (4), G (7), and G (8) corresponding to the 8th and 8th rows are activated in this order, that is, even-numbered virtual scanning signal lines are selected in order. As a result, virtual interlaced scanning is performed. The voltages corresponding to the pixel values to be written in the pixel formation portions Px in the third row, fourth row, seventh row, and eighth row in the pixel matrix are the scanning signals G (3), G (4), In the active period of G (7) and G (8), as shown in FIG. 4 (i), positive or negative video signals D (1) to D (8) are applied to the video signal lines Ls. . Note that in the scanning period Tsc here, the scanning signals G (1), G (2), G (5), and G (6), which are odd-numbered virtual scanning signals, are inactive. In the pixel forming portion Px, the pixel voltage applied before the scanning period Tsc is held as a pixel value.

  Following the predetermined scanning period Tsc in the latter half period of the nth frame F (n) as described above, all scanning signals are transmitted for the predetermined scanning stop period Tnsc in the latter half period of the nth frame F (n). G (1) to G (8) become inactive and scanning stops. In this scanning stop period Tnsc, the state in which the polarity pattern of the pixel matrix is the pattern shown in FIG.

  FIG. 3C shows the polarity of the pixel voltage corresponding to the pixel value rewritten by the video signals D (1) to D (8) in the first half period of the next (n + 1) th frame. In this driving method, the scanning signal G (1) corresponding to the first row, the second row, the fifth row, and the sixth row in the pixel matrix in the scanning period Tsc in the first half period of the (n + 1) th frame F (n + 1). , G (2), G (5), and G (6) are activated in this order, that is, by selecting odd-numbered virtual scanning signal lines in order, virtual interlaced scanning is performed (FIG. 4 (a) to (h)), a voltage corresponding to a pixel value to be written in each pixel formation portion Px in the first row, the second row, the fifth row, and the sixth row in the pixel matrix is the video signal D (1 ) To D (8) are applied to the video signal lines Ls (FIG. 4 (i)). In this scanning period Tsc, the even-numbered virtual scanning signals G (3), G (4), G (7), and G (8) are inactive, so that the corresponding pixel matrix In the pixel forming portion Px, the pixel voltage applied before the scanning period Tsc is held as a pixel value.

  Following the predetermined scanning period Tsc in the first half period of the (n + 1) th frame F (n + 1) as described above, all scanning signals are output during the predetermined scanning stop period Tnsc in the first half period of the (n + 1) th frame F (n + 1). G (1) to G (8) become inactive and scanning stops. In the scanning stop period Tnsc, the state in which the polarity pattern of the pixel matrix is the pattern shown in FIG.

  FIG. 3D shows the polarity of the pixel voltage corresponding to the pixel value rewritten by the video signals D (1) to D (8) in the second half of the (n + 1) th frame. In this driving method, in a predetermined scanning period Tsc in the second half period of the (n + 1) th frame F (n + 1), the scanning signal G (corresponding to the third row, the fourth row, the seventh row, and the eighth row in the pixel matrix. 3), G (4), G (7), G (8) are activated in this order, that is, the virtual interlace scanning is performed by selecting even-numbered virtual scanning signal lines in order. . The voltages corresponding to the pixel values to be written in the pixel formation portions Px in the third row, fourth row, seventh row, and eighth row in the pixel matrix are the scanning signals G (3), G (4), In the active period of G (7) and G (8), as shown in FIG. 4 (i), positive or negative video signals D (1) to D (8) are applied to the video signal lines Ls. . Note that in the scanning period Tsc here, the scanning signals G (1), G (2), G (5), and G (6), which are odd-numbered virtual scanning signals, are inactive. In the pixel forming portion Px, the pixel voltage applied before the scanning period Tsc is held as a pixel value.

  Following the predetermined scanning period Tsc in the latter half period of the (n + 1) th frame F (n + 1) as described above, all scanning signals are output for the predetermined scanning stop period Tnsc in the latter half period of the (n + 1) th frame F (n + 1). G (1) to G (8) become inactive and scanning stops. In the scanning stop period Tnsc, the state in which the polarity pattern of the pixel matrix is the pattern shown in FIG.

  According to the driving method as described above, the polarity pattern of the pixel matrix is a pattern in which the odd-numbered rows in the pixel matrix are positive and the even-numbered rows are negative at the end of the nth frame F (n). At the end of the frame F (n + 1), the odd-numbered row in the pixel matrix has a negative polarity and the even-numbered row has a positive polarity pattern. Thus, one-line inversion driving can be performed by the above driving method.

<1.5 Effect>
In the present embodiment, when one virtual scanning signal line composed of two adjacent scanning signal lines is selected as described above, a pixel forming unit to which a positive voltage is applied from the corresponding video signal line and a negative polarity are applied. Therefore, the number of pixel forming portions to which the voltage is applied is the same, and thus flicker caused by positive and negative asymmetry can be spatially reduced. Further, since the positive / negative polarity of the pixel voltage is inverted in two consecutive frames, flicker due to positive / negative asymmetry can be reduced in terms of time. Further, in this embodiment, line inversion driving having the scanning stop period Tnsc is performed as described above, but the conventional technique has the scanning stop period Tnsc having the same length (here, three times the scanning period Tsc). Compared with line inversion driving, flicker due to current leakage can be spatially reduced without increasing power consumption. This point will be described below with reference to FIG.

  FIG. 5 is a diagram illustrating that flicker due to current leakage is spatially reduced in the present embodiment. 5A, the waveform of the scanning signal G (2) is the same as in FIG. 4B, and in FIG. 5C, the waveform of the scanning signal G (3) is the same as in FIG. 4C. In FIG. 5B, the change of the pixel voltage V (2) applied to the pixel formation portion Px connected to the scanning signal line corresponding to the scanning signal G (2) is shown in FIG. 5B. The graph shows changes in the pixel voltage V (3) applied to the pixel formation portion Px connected to the scanning signal line corresponding to the scanning signal G (3). Note that the pixel voltage shown in FIGS. 5B and 5D gradually decreases because the current from the capacitor for holding the applied voltage provided in the pixel formation portion as described above. This is because a leak occurs. FIG. 5E shows a change in the luminance L (3) of the pixel formation portion Px connected to the scanning signal line corresponding to the scanning signal G (3). Since the change in luminance of the pixel formation portion Px is proportional to the change in the applied pixel voltage, the waveform shown in FIG. 5 (d) is the same as the waveform shown in FIG. 5 (e). Further, in FIG. 5 (g), the voltage polarities of the video signals D (1) to D (8) are shown for each horizontal scanning period Th as in FIG. 4 (i).

  Here, when a pixel forming unit connected to a virtual scanning signal line different from a certain pixel forming unit Px and adjacent in the vertical direction (scanning direction) is a pixel forming unit Pxn, the pixel forming unit The amount of change in the average luminance of Px and the pixel formation portion Pxn is necessarily smaller than the amount of change in the luminance of the pixel formation portion Px (or pixel formation portion Pxn). Because the virtual scanning signal lines corresponding to the pixel formation portions Px and Pxn are different, one pixel formation portion (for example, the pixel formation portion Px) has a pixel voltage in the scanning period Tsc in the first half period of the nth frame F (n). Is applied to the other pixel formation unit (for example, the pixel formation unit Pxn) during the latter half of the nth frame F (n), the luminance difference between the pixel formation units Px and Pxn is maximum. This is because a certain time point (that is, a time point when the minimum luminance is reached to the maximum luminance) is shifted by a period approximately half of one frame.

  In FIG. 5F, a pixel formation portion (here, referred to as a pixel formation portion Px) connected to the scanning signal line corresponding to the scanning signal G (3) and a scanning signal line corresponding to the scanning signal G (2) are connected. A change in the average value Lav of the luminance with the pixel formation portion (here, the pixel formation portion Pxn) is shown. Here, the luminance difference Lg3, which is the difference between the maximum luminance and the minimum luminance of the pixel formation portion Px shown in FIG. 5E, is the pixel formation portion Px and the pixel formation portion Pxn shown in FIG. Is about twice as large as the luminance difference Lgav, which is the difference between the maximum value and the minimum value of the average values. Thus, in the present embodiment, by reducing the change in the average value of the luminance values of the two pixel formation portions included in different virtual scanning signal lines and connected to the adjacent scanning signal lines without increasing the power consumption. Since the change in luminance of the entire pixel forming part connected to the adjacent scanning signal line can be reduced, flicker due to current leakage is spatially reduced (that is, in-plane averaging of the luminance change in the entire display screen is realized) ) Here, attention is focused on two pixel forming portions that are included in different virtual scanning signal lines and connected to adjacent scanning signal lines. However, pixel forming portions that are connected to scanning signal lines included in adjacent virtual scanning signal lines are used. Similarly, even when attention is paid to, it is possible to reduce the luminance change of the pixel forming portion corresponding to each adjacent virtual scanning signal line, so that it can be said that flicker due to current leakage is spatially reduced.

<1.6 Modification>
In the above embodiment, as in the case of the conventional line inversion driving, the power consumption of the apparatus is made the same by setting the length of the scanning stop period Tnsc to three times the scanning period Tsc. The effect of spatially reducing flicker is lost as the total scanning stop period Tnsc per frame is longer. This is because the longer the scanning stop period Tnsc, the larger the current leakage from the capacitive element that holds the pixel voltage, so the difference between the voltage actually held by the capacitive element and the voltage to be held (applied voltage) is large. As a result, the luminance difference Lav between the pixel formation portion Px and the pixel formation portion Pxn increases.

  Therefore, as a modification of the present embodiment, flicker due to current leakage similar to that in the case of the conventional line inversion drive occurs, but by making the length of the scanning stop period Tnsc longer than in the case of the conventional line inversion drive. A configuration is also conceivable in which power consumption is made smaller than in the case of conventional line inversion driving.

  For example, as a modification of the present embodiment, a line inversion driving method is considered in which the length of the scanning stop period Tnsc is twice as long as the scanning period Tsc. Therefore, in this modification, the scanning stop period Tnsc shown in FIG. 4 (i) will be described as having a length twice as long as the scanning period Tsc. Then, the line inversion driving method in this modified example is compared with a conventional line inversion driving method different from the above-described example in which the length of the scanning stop period Tnsc is equal to the length of the scanning period Tsc. The length of the entire scanning stop period Tnsc (here, 16 horizontal scanning periods Th) per frame (frame F (n) shown in FIG. 4 (i)) in the line inversion driving method in the modification of this embodiment is: This is twice the length of the entire scanning stop period Tnsc per frame (here, 8 horizontal scanning periods Th) in the other conventional line inversion driving method. However, the luminance difference Lgav between the pixel formation portion Px and the pixel formation portion Pxn shown in FIG. 5F is about half of the luminance difference Lg3 of the pixel formation portion Px shown in FIG. Referring to this, the flicker caused by the current leak that occurs when the line inversion driving method in the modification of the present embodiment is adopted is the flicker caused by the current leak that occurs when the other conventional line inversion driving method is adopted. It can be said that it is almost the same level. Here, when the power consumption of the (conventional) line inversion driving method having no scanning stop period Tnsc is used as a reference, the length of the scanning stop period Tnsc is equal to the length of the scanning period Tsc. The power consumption in the inversion driving method is ½ thereof, and the power consumption in the line inversion driving method in the modification of the present embodiment is １ ／. Therefore, in this modification, when compared with the case of the other conventional line inversion driving method in which the length of the scanning stop period Tnsc is equal to the length of the scanning period Tsc, the flicker caused by the current leakage is substantially the same. The power consumption can be reduced to 2/3.

  In the above embodiment, each set of scanning signals G (1) and G (2), G (3) and G (4), G (5) and G (6), and G (7) and G (8). Is a virtual scanning signal, and a set of adjacent scanning signal lines Lg scanned by this virtual scanning signal is a virtual scanning signal line. For example, scanning signals G (1) to G (4), G (5) Three or more adjacent scanning signals such that each group of .about.G (8) is a virtual scanning signal and one set of adjacent scanning signal lines Lg scanned by this virtual scanning signal is a virtual scanning signal line. One set of lines may be used as virtual scanning signal lines. In these cases, when one virtual scanning signal line is selected, a pixel forming unit to which a positive voltage is applied from a corresponding video signal line and a pixel forming unit to which a negative voltage is applied are provided. Although it is conceivable that the number is not the same, flicker due to positive and negative asymmetry can be spatially reduced unless these numbers are significantly different.

<2. Second Embodiment>
Next, a liquid crystal display device according to a second embodiment of the present invention will be described. This embodiment is different from the first embodiment in that the driving method shown in FIGS. 6 to 8 is employed instead of the driving method shown in FIGS. Since the overall configuration and the configuration of the liquid crystal panel in the present embodiment are the same as those in the first embodiment, the same or corresponding parts are denoted by the same reference numerals, and description thereof is omitted.

<2.1 Driving method>
Hereinafter, the driving method of the liquid crystal display device according to the present embodiment will be described with reference to FIGS. In this embodiment, for convenience of explanation, the number of scanning signal lines Lg in the liquid crystal panel 600 is 16 and the number of video signal lines Ls is 8, and the 16 scanning signal lines Lg are scanned by the scanning signal line driving circuit 400. The scanning signals G (1) to G (16) are respectively applied, and the driving video signals D (1) to D (8) are respectively applied to the eight video signal lines Ls by the video signal line driving circuit 300. Shall.

  6 and 7 are conceptual diagrams for explaining the driving method of the liquid crystal display device according to the present embodiment, and the expression method in this figure is the same as that employed in FIG. FIG. 8 is a timing chart for explaining this driving method, and the expression method in this figure is the same as that employed in FIG.

  FIG. 6A shows pixels rewritten by the video signals D (1) to D (8) in the first period among the first to fourth periods obtained by equally dividing the nth frame into four. The polarity of the pixel voltage corresponding to the value is shown. In this driving method, as shown in FIGS. 8A to 8P, in the first scanning period Tsc1, which is the scanning period of the first period of the nth frame F (n), 1 in the pixel matrix. Scanning is performed by sequentially activating scanning signals G (1), G (2), G (9), and G (10) corresponding to the second, second, ninth, and tenth rows. . In the liquid crystal display device according to the present embodiment, 16 scanning signal lines are used for convenience of explanation. However, an actual liquid crystal display device is of the QVGA standard and has 240 scanning signal lines. The (4u-3) th virtual scanning signal line (u is 1 to 4 times the total number of scanning signal lines, such as the fifth virtual scanning signal line, the fifth virtual scanning signal line, and the ninth virtual scanning signal line. A virtual interlace scanning is performed by sequentially selecting natural numbers up to 1. The voltages corresponding to the pixel values to be written in the pixel formation portions Px in the first row, the second row, the ninth row, and the tenth row in the pixel matrix are the scanning signals G (1), G (2), In the active period of G (9) and G (10), as shown in FIG. 8 (r), positive or negative video signals D (1) to D (8) are applied to the video signal lines Ls. . The polarities of these video signals D (1) to D (8) are positive during the active period of the scanning signals G (1) and G (9), and the polarity of the scanning signals G (2) and G (10) is active. The period is negative. In the first scanning period Tsc here, scanning signals G (3) to G (8), G (11) to G (8), which are virtual scanning signals from the second to the fourth and the sixth to the eighth. Since G (16) is inactive, the pixel voltage applied before the first scanning period Tsc1 is held as a pixel value in the pixel formation portion Px in the corresponding pixel matrix.

  Following the first scanning period Tsc1 of the nth frame F (n) as described above, in the present driving method, a predetermined first scanning stop period of the first period of the nth frame F (n). All scanning signals G (1) to G (16) are deactivated by Tnsc1 and scanning is stopped. In the first scanning stop period Tnsc1, the state in which the polarity pattern of the pixel matrix is the pattern shown in FIG. 6A continues. Similar to the first embodiment, the voltage levels of the video signals D (1) to D (16) in the first scanning stop period Tnsc1 are not particularly limited.

  FIG. 6B shows pixel values rewritten by the video signals D (1) to D (8) in a second period among predetermined first to fourth periods obtained by equally dividing the nth frame into four. The polarity of the corresponding pixel voltage is shown. In this driving method, as shown in FIGS. 8A to 8P, the third row in the pixel matrix in a predetermined second scanning period Tsc2 in the second period of the nth frame F (n). Scanning is performed by sequentially activating scan signals G (3), G (4), G (11), and G (12) corresponding to the fourth, eleventh, and twelfth rows. Since there are more scanning signal lines in the actual liquid crystal display device, the (4u-2) th, such as the second virtual scanning signal line, the sixth virtual scanning signal line, and the tenth virtual scanning signal line. Virtual interlace scanning is performed by sequentially selecting virtual scanning signal lines. The voltages corresponding to the pixel values to be written in the pixel formation portions Px in the third row, the fourth row, the eleventh row, and the twelfth row in the pixel matrix are the scanning signals G (3) and G (4), respectively. , G (11), and G (12) are applied to each video signal line Ls as positive or negative video signals D (1) to D (8) as shown in FIG. 8 (r). The The polarities of these video signals D (1) to D (8) are positive during the active period of the scanning signals G (3) and G (11), and the polarity of the scanning signals G (4) and G (12) is active. The period is negative. Note that in the second scanning period Tsc2 here, the scanning signals G (1), G (3), G, which are the first, third, fourth, fifth, seventh and eighth virtual scanning signals. Since (4), G (5), G (7), and G (8) are inactive, pixels applied before the second scanning period Tsc2 are applied to the pixel forming portion Px in the corresponding pixel matrix. The voltage is held as a pixel value.

  Following the second scanning period Tsc2 of the nth frame F (n) as described above, all scanning is performed for a predetermined second scanning stop period Tnsc2 in the second period of the nth frame F (n). The signals G (1) to G (16) become inactive and scanning is stopped. In the second scanning stop period Tnsc2, the state in which the polarity pattern of the pixel matrix is the pattern shown in FIG. 6B continues.

  FIG. 6C shows pixel values rewritten by the video signals D (1) to D (8) in a third period among predetermined first to fourth periods obtained by dividing the nth frame into four equal parts. The polarity of the corresponding pixel voltage is shown. In the present driving method, as shown in FIGS. 8A to 8P, in the predetermined third scanning period Tsc2 in the third period of the nth frame F (n), the fifth row in the pixel matrix. The scanning signals G (5), G (6), G (13), and G (14) corresponding to the 6th, 13th, and 14th rows are sequentially activated to perform scanning. In an actual liquid crystal display device, the (4u-1) th virtual scanning signal line is selected in order, such as the third virtual scanning signal line, the seventh virtual scanning signal line, and the eleventh virtual scanning signal line. As a result, virtual interlaced scanning is performed. The voltages corresponding to the pixel values to be written in the pixel formation portions Px in the fifth, sixth, thirteenth, and fourteenth rows in the pixel matrix are the scanning signals G (5) and G (6), respectively. , G (13), and G (14) are applied to each video signal line Ls as positive or negative video signals D (1) to D (8) as shown in FIG. 8 (r). The In the third scanning period Tsc3 here, the scanning signals G (1), G (2), G, which are the first, second, fourth, fifth, sixth and eighth virtual scanning signals. Since (4), G (5), G (6), and G (8) are inactive, pixels applied before the third scanning period Tsc3 are applied to the pixel formation portion Px in the corresponding pixel matrix. The voltage is held as a pixel value.

  Following the third scanning period Tsc3 of the n-th frame F (n) as described above, all scanning is performed for a predetermined third scanning stop period Tnsc3 in the third period of the n-th frame F (n). The signals G (1) to G (16) become inactive and scanning is stopped. In the third scanning stop period Tnsc, the state in which the polarity pattern of the pixel matrix is the pattern shown in FIG. 6C continues.

  FIG. 6D shows pixel values rewritten by the video signals D (1) to D (8) in a fourth period among predetermined first to fourth periods obtained by dividing the nth frame into four equal parts. The polarity of the corresponding pixel voltage is shown. In the present driving method, as shown in FIGS. 8A to 8P, in a predetermined fourth scanning period Tsc2 in the fourth period of the nth frame F (n), the scanning signal G (7) , G (8), G (15), and G (16) are sequentially activated to perform scanning. In an actual liquid crystal display device, the 4u-th virtual scanning signal line is sequentially selected such as the fourth virtual scanning signal line, the eighth virtual scanning signal line, and the twelfth virtual scanning signal line, Virtual interlaced scanning is performed. The voltages corresponding to the pixel values to be written in the pixel formation portions Px in the seventh row, the eighth row, the fifteenth row, and the sixteenth row in the pixel matrix are the scanning signals G (7) and G (8), respectively. , G (15), and G (16) are applied to the video signal lines Ls as positive or negative video signals D (1) to D (8) as shown in FIG. 8G. The Note that in the fourth scanning period Tsc4 here, since the scanning signals G (1) to G (6) and G (9) to G (14) are inactive, the pixel formation portion Px in the corresponding pixel matrix. Includes a pixel voltage applied before the fourth scanning period Tsc4 as a pixel value.

  Subsequent to the fourth scanning period Tsc4 of the nth frame F (n) as described above, all scanning is performed for a predetermined fourth scanning stop period Tnsc4 in the fourth period of the nth frame F (n). The signals G (1) to G (16) become inactive and scanning is stopped. In the fourth scanning stop period Tnsc, the state where the polarity pattern of the pixel matrix is the pattern shown in FIG. 6D continues.

  FIG. 7A shows pixels rewritten by the video signals D (1) to D (8) in a first period among predetermined first to fourth periods obtained by dividing the next n + 1 frame into four equal parts. The polarity of the pixel voltage corresponding to the value is shown. Here, since the polarity of the pixel voltage shown in FIG. 7A is obtained by inverting the polarity shown in FIG. 6A, the video signal D (1) shown in FIG. ) To D (8), except that the polarities are inverted, the same scanning as that shown in FIGS. 8A to 8P is performed. Therefore, since it is the same as that described above in FIG. 6A, detailed description of the corresponding driving method is omitted.

  FIG. 7B shows a second period among predetermined first to fourth periods obtained by equally dividing the (n + 1) th frame into four parts, and FIG. 7C shows the second part of those periods. FIG. 7D shows the polarities of the pixel voltages corresponding to the pixel values rewritten by the video signals D (1) to D (8) in the fourth period among the three periods. ing. These cases are the same as those in FIGS. 6B to 6D except that the polarity of the pixel voltage is inverted, and thus detailed description of the corresponding driving method is omitted.

  According to the driving method as described above, the polarity pattern of the pixel matrix is a pattern in which the odd-numbered rows in the pixel matrix are positive and the even-numbered rows are negative at the end of the nth frame F (n). At the end of the frame F (n + 1), the odd-numbered row in the pixel matrix has a negative polarity and the even-numbered row has a positive polarity pattern. Thus, one-line inversion driving can be performed by the above driving method.

<2.2 Effect>
In this embodiment, as in the first embodiment, when one virtual scanning signal line is selected, a pixel forming unit to which a positive voltage is applied and a negative voltage are applied from the corresponding video signal line. Since the number of pixel forming portions to be processed is the same, flicker due to positive and negative asymmetry can be spatially reduced. In addition, since the positive and negative polarities are inverted between two consecutive frames, flicker due to positive and negative asymmetry can be reduced in terms of time. Furthermore, in the present embodiment, the consumption is higher than in the case of the conventional line inversion driving having the scanning stop period Tnsc having the same length (here, three times the scanning period Tsc) or in the case of the first embodiment. Flicker due to current leakage can be further reduced without increasing power. Similar to the first embodiment, this embodiment is also a pixel formation portion connected to a virtual scanning signal line different from a certain pixel formation portion Px, as described with reference to FIG. 5, and is adjacent along the vertical direction. When the matching pixel formation portion is the pixel formation portion Pxn, the change amount of the average brightness of the pixel formation portion Px and the pixel formation portion Pxn is necessarily smaller than the change amount of the luminance of the pixel formation portion Px. Furthermore, since the length of the scan stop period Tnsc in the present embodiment is half the length of the scan stop period Tnsc in the first embodiment, the time when the maximum luminance of the pixel formation portions Px and Pxn is about 1 is obtained. By shifting by a ¼ period of the frame, the change in the average value of the luminance of the pixel formation portion Px and the pixel formation portion Pxn becomes even smaller than the change in the luminance in the case of the first embodiment. As described above, in the present embodiment, the change in the average value of the luminance values of the two pixel formation portions included in different virtual scanning signal lines and connected to the adjacent scanning signal lines is further reduced without increasing the power consumption. Thus, flicker due to current leakage is spatially reduced.

<2.3 Modification>
In the above embodiment, as in the case of the conventional line inversion driving, the power consumption of the apparatus is made the same by setting the length of the scanning stop period Tnsc to three times the scanning period Tsc. However, similarly to the modification of the first embodiment, the length of the scanning stop period Tnsc is made longer than that in the case of the conventional line inversion driving, thereby causing a current leak similar to that in the case of the conventional line inversion driving. Although flicker occurs, a configuration in which power consumption is made smaller than in the case of the conventional line inversion drive is also conceivable.

  In the above embodiment, virtual interlaced scanning with three virtual scanning signal lines opened (interlaced) is performed in the first through fourth periods of the nth frame F (n). In the first to third periods obtained by dividing (n) into three equal parts, virtual interlaced scanning with two virtual scanning signal lines opened (interlaced) may be performed, or the nth frame F (n ) Is divided into five equal parts or more, virtual interlaced scanning in which four or more virtual scanning signal lines are opened (interlaced) may be performed. In these cases, when one virtual scanning signal line is selected, a pixel forming unit to which a positive voltage is applied from a corresponding video signal line and a pixel forming unit to which a negative voltage is applied are provided. Although it is conceivable that the number is not the same, flicker due to positive and negative asymmetry can be spatially reduced unless these numbers are significantly different.

<3. Third Embodiment>
Next, a liquid crystal display device according to a third embodiment of the present invention will be described. This embodiment is different from the first embodiment in that the driving method shown in FIG. 9 is adopted instead of the driving method shown in FIGS. Since the overall configuration and the configuration of the liquid crystal panel in the present embodiment are the same as those in the first embodiment, the same or corresponding parts are denoted by the same reference numerals, and description thereof is omitted. Note that this embodiment is not the one-line inversion driving method shown in the first embodiment (FIG. 2A), and inverts the positive / negative polarity of the voltage applied to the pixel liquid crystal every two rows in the pixel matrix, and 1 A two-line inversion driving method, which is a driving method for inverting each frame, is employed.

<3.1 Driving method>
Hereinafter, a driving method of the liquid crystal display device according to the present embodiment will be described with reference to FIG. Also in this embodiment, for convenience of explanation, the number of scanning signal lines Lg in the liquid crystal panel 600 is 16, the number of video signal lines Ls is 8, and the eight scanning signal lines Lg are obtained by the scanning signal line driving circuit 400. The scanning signals G (1) to G (16) are respectively applied, and the driving video signals D (1) to D (8) are respectively applied to the eight video signal lines Ls by the video signal line driving circuit 300. Shall.

  FIG. 9 is a conceptual diagram for explaining a driving method of the liquid crystal display device according to the present embodiment, and the expression method in this figure is the same as that employed in FIG. Note that the timing chart for explaining this driving method as shown in FIG. 4 is omitted from the explanation of the first and second embodiments described above and the following explanation.

  FIG. 9A shows the polarity of the pixel voltage corresponding to the pixel value rewritten by the video signals D (1) to D (8) in a predetermined period of the first half period of the nth frame. In this driving method, scanning signals corresponding to the first to fourth rows and the ninth to twelfth rows in the pixel matrix in a predetermined scanning period Tsc in the first half period of the nth frame F (n). Scanning is performed by sequentially activating G (1) to G (4) and G (9) to G (12). In this embodiment, unlike the first embodiment, the first to fourth lines, the fifth to eighth lines, the ninth to twelfth lines, and the thirteenth line in the pixel matrix. Scan signals G (1) to G (4) and G (5) to G (8) corresponding to the first to 16th rows. Each group of G (9) to G (12) and G (13) to G (16) is referred to as a “virtual scanning signal”, and one set of adjacent scanning signal lines that are scanned by this virtual scanning signal. Lg is referred to as a “virtual scanning signal line”. If the scanning is performed as described above, the actual number of scanning signal lines of the liquid crystal display device is considerably larger than 16, so in reality, the odd-numbered virtual scanning signal lines are selected in order, so that the virtual interlace scanning is performed. Is done. The voltages corresponding to the pixel values to be written in the pixel formation portions Px from the first row to the fourth row and from the ninth row to the twelfth row in the pixel matrix are respectively the scanning signals G (1) to G (4 ) And G (9) to G (12) are applied to the video signal lines Ls as positive or negative video signals D (1) to D (8) in the active period. Note that in the scanning period Tsc here, the even-numbered virtual scanning signals G (5) to G (8) and G (13) to G (16) are inactive, and therefore the corresponding pixel matrix. In the pixel forming portion Px, the pixel voltage applied before the scanning period Tsc is held as a pixel value.

  Following the predetermined scanning period Tsc in the first half period of the nth frame F (n) as described above, in this driving method, as in the first embodiment, the first half period of the nth frame F (n). All of the scanning signals G (1) to G (16) are inactive during the predetermined scanning stop period Tnsc, and the scanning is stopped. In this scanning stop period Tnsc, the polarity pattern of the pixel matrix is as shown in FIG. ) Continues to be in the pattern shown in FIG. The scanning stop period Tnsc here has a length three times as long as the scanning period Tsc, as in the first embodiment.

  FIG. 9B shows the polarity of the pixel voltage corresponding to the pixel value rewritten by the video signals D (1) to D (8) in the second half of the nth frame. In this driving method, scanning signals corresponding to the fifth to eighth rows and the thirteenth to sixteenth rows in the pixel matrix in a predetermined scanning period Tsc in the latter half of the nth frame F (n). By making G (5) to G (8) and G (13) to G (16) active in this order, that is, by selecting even-numbered virtual scanning signal lines in order, virtual interlaced scanning is performed. Done. The voltages corresponding to the pixel values to be written in the pixel formation portions Px from the fifth row to the eighth row and from the thirteenth row to the sixteenth row in the pixel matrix are respectively the scanning signals G (5) to G (8 ) And G (13) to G (16) are applied to the video signal lines Ls as positive or negative video signals D (1) to D (8) in the active period. In the scanning period Tsc here, the odd-numbered virtual scanning signals G (1) to G (4) and G (9) to G (12) are inactive, and therefore the corresponding pixel matrix. In the pixel forming portion Px, the pixel voltage applied before the scanning period Tsc is held as a pixel value.

  Following the predetermined scanning period Tsc in the latter half period of the nth frame F (n) as described above, the predetermined scanning in the latter half period of the nth frame F (n) is performed as in the first embodiment. All the scanning signals G (1) to G (16) are inactive during the stop period Tnsc, and scanning is stopped. In this scanning stop period Tnsc, the state where the polarity pattern of the pixel matrix is the pattern shown in FIG. 9B continues.

  9C shows the pixel values rewritten by the video signals D (1) to D (8) in the first half period of the next (n + 1) th frame, and FIG. 9 (d) shows the pixel values rewritten by the video signals D (1) to D (8) in the second half period of the (n + 1) th frame. The polarities of the corresponding pixel voltages are respectively shown. Since these are the same as those in FIGS. 9A and 9B except that the polarity of the pixel voltage is inverted, detailed description of the corresponding driving method is omitted.

  According to the driving method as described above, the polarity pattern of the pixel matrix has the first row, the second row, the fifth row, the sixth row, and the ninth row in the pixel matrix at the end of the nth frame F (n). First, 10th, 13th and 14th lines are positive, 3rd, 4th, 7th, 8th, 11th, 12th, 15th and 16th lines At the end of the (n + 1) th frame F (n + 1), the first row, the second row, the fifth row, the sixth row, the ninth row, the tenth row, and the thirteenth row in the pixel matrix. , And the 14th line have a negative polarity, the 3rd line, the 4th line, the 7th line, the 8th line, the 11th line, the 12th line, the 15th line, and the 16th line have a positive pattern. In this way, two-line inversion driving can be performed by the above driving method.

<3.2 Effects>
In the present embodiment, flicker due to positive and negative asymmetry can be spatially reduced as in the first embodiment. In addition, since the positive and negative polarities are inverted between two consecutive frames, flicker due to positive and negative asymmetry can be reduced in terms of time. Further, in the present embodiment, the current leakage is not increased without increasing the power consumption as compared with the case of the conventional line inversion driving having the scanning stop period Tnsc having the same length (here, three times the scanning period Tsc). Flicker can be reduced. Similar to the first embodiment, this embodiment is also a pixel formation portion connected to a virtual scanning signal line different from a certain pixel formation portion Px, as described with reference to FIG. 5, and is adjacent along the vertical direction. When the matching pixel formation portion is the pixel formation portion Pxn, the change amount of the average brightness of the pixel formation portion Px and the pixel formation portion Pxn is necessarily smaller than the change amount of the luminance of the pixel formation portion Px.

  Furthermore, since the number of scanning signal lines constituting one virtual scanning signal line in this embodiment is twice the number of scanning signal lines in the first embodiment, the number of pixel formation portions Px and Pxn Is half the number of the first embodiment. Since a pixel voltage is applied to these pixel formation portions Px and Pxn at least at a timing longer than the scanning stop period, a capacitive element that holds the pixel voltage is used rather than a pixel formation portion connected to the same virtual scanning signal line. A large luminance difference is caused by current leakage. Therefore, by reducing the number of these pixel forming portions Px and Pxn, the entire screen has fewer portions where the luminance changes than in the case of the first embodiment. Thus, in the present embodiment, by reducing the change in the average value of the luminance values of the two pixel formation portions included in different virtual scanning signal lines and connected to the adjacent scanning signal lines without increasing the power consumption. Flicker due to current leakage is spatially reduced.

<3.3 Modification>
In the above embodiment, as in the case of the conventional line inversion driving, the power consumption of the apparatus is made the same by setting the length of the scanning stop period Tnsc to three times the scanning period Tsc. However, similarly to the modification of the first embodiment, the length of the scanning stop period Tnsc is made longer than that in the case of the conventional line inversion driving, thereby causing a current leak similar to that in the case of the conventional line inversion driving. Although flicker occurs, a configuration in which power consumption is made smaller than in the case of the conventional line inversion drive is also conceivable.

  In the above embodiment, 2-line inversion driving is performed. However, there is a driving method in which the positive / negative polarity of the applied voltage is inverted every frame while the positive / negative polarity of the applied voltage is inverted every three horizontal scanning lines or more. It may be adopted. Further, instead of the line inversion driving such as the two-line inversion driving in the above embodiment and the one-line inversion driving in the first and second embodiments, the positive / negative polarity of the applied voltage for each pixel forming portion along the horizontal scanning line. A driving method (dot inversion driving method) may be employed. When this dot inversion driving method is adopted, the positive and negative polarities corresponding to the pixel forming portions along one horizontal scanning line are alternately reversed for each one (or two or more) pixel forming portions. Flicker due to asymmetry is spatially reduced. In addition, since the positive / negative polarity determined corresponding to each pixel forming portion is inverted for each frame, flicker due to positive / negative asymmetry is also reduced in terms of time. Further, by reducing the change in the average value of the luminance of the two pixel formation portions that are included in different virtual scanning signal lines and connected to the adjacent scanning signal lines, flicker due to current leakage can be reduced without increasing power consumption. Reduced.

<4. Fourth Embodiment>
Next, a liquid crystal display device according to a fourth embodiment of the present invention is described. This embodiment is different from the third embodiment in that the driving method shown in FIG. 10 is adopted instead of the driving method shown in FIG. Since the overall configuration and the configuration of the liquid crystal panel in this embodiment are the same as those in the first and third embodiments, the same or corresponding parts are denoted by the same reference numerals, and description thereof is omitted. In the present embodiment, a one-line inversion driving method is employed as in the first embodiment.

<4.1 Driving method>
Hereinafter, a driving method of the liquid crystal display device according to the present embodiment will be described with reference to FIG. Also in this embodiment, for convenience of explanation, the number of scanning signal lines Lg in the liquid crystal panel 600 is 16, the number of video signal lines Ls is 8, and the eight scanning signal lines Lg are obtained by the scanning signal line driving circuit 400. The scanning signals G (1) to G (16) are respectively applied, and the driving video signals D (1) to D (8) are respectively applied to the eight video signal lines Ls by the video signal line driving circuit 300. Shall.

  FIG. 10 is a conceptual diagram for explaining a driving method of the liquid crystal display device according to the present embodiment, and the expression method in this figure is the same as that employed in FIG. 10A shows the first half period of the nth frame, FIG. 10B shows the second half period of the nth frame, FIG. 10C shows the first half period of the next n + 1 frame, and FIG. The polarities of the pixel voltages corresponding to the pixel values rewritten by the video signals D (1) to D (8) in the second half period of the (n + 1) th frame are shown. Since these are the same as those in FIGS. 3A to 3D except that the polarity of the pixel voltage is inverted, detailed description of the corresponding driving method is omitted, but this embodiment Unlike the third embodiment, the first and second rows, the third and fourth rows, the fifth and sixth rows,..., The 15th row in the pixel matrix, as in the first embodiment. And scanning signals G (1) and G (2), G (3) and G (4), G (5) and G (6),..., G (15) and G (16) corresponding to the 16th row. Each set of is referred to as a “virtual scanning signal”, and one set of adjacent scanning signal lines Lg scanned by this virtual scanning signal is referred to as a “virtual scanning signal line”. Therefore, for example, the scanning signals G (1) and G (2) corresponding to the first and second rows in the pixel matrix are the first virtual scanning signals, and scanning is performed by the first virtual scanning signals. The set of scanning signal lines Lg is the first virtual scanning signal line. Further, in this embodiment, unlike the first embodiment, the first and second, third and fourth, fifth and sixth, and seventh and eighth adjacent virtual scanning signal lines are each set as one set. As a “virtual scanning signal line group”. Here, the virtual interlace scanning is performed by sequentially selecting the odd-numbered virtual scanning signal line groups in the first half period of the nth frame, and the even-numbered virtual scanning signal line groups are sequentially selected in the second half period. As a result, virtual interlaced scanning is performed. According to the driving method as described above, one-line inversion driving can be performed as in the first embodiment.

<4.2 Effects>
In this embodiment, by performing virtual interlaced scanning based on the virtual scanning line group, compared with the case of the first embodiment shown in FIG. ) In-plane averaging of luminance change is performed, that is, flicker due to current leakage is spatially reduced. In the present embodiment, flicker due to positive and negative asymmetry can be reduced spatially and temporally as in the first embodiment. Furthermore, in the present embodiment, as in the third embodiment, the consumption is similar to that in the case of the conventional line inversion driving having the scanning stop period Tnsc having the same length (here, three times the scanning period Tsc). Flicker due to current leakage can be spatially reduced without increasing power.

<4.3 Modification>
In the above embodiment, as in the case of the conventional line inversion driving, the power consumption of the apparatus is made the same by setting the length of the scanning stop period Tnsc to three times the scanning period Tsc. However, similarly to the modification of the first embodiment, the length of the scanning stop period Tnsc is made longer than that in the case of the conventional line inversion driving, thereby causing a current leak similar to that in the case of the conventional line inversion driving. Although flicker occurs, a configuration in which power consumption is made smaller than in the case of the conventional line inversion drive is also conceivable.

  In the above embodiment, the first and second, third and fourth, fifth and sixth, and seventh and eighth virtual scanning signal lines are grouped into a virtual scanning signal line group. There is no particular limitation as to which combination of adjacent scanning signal lines is used as the virtual scanning signal line group, for example, the fourth to fifth virtual scanning signal lines are grouped into a virtual scanning signal line group. . In this case, when one virtual scanning signal line group is selected, the same number of pixel forming portions to which a positive voltage is applied from the corresponding video signal lines and the same number of pixel forming portions to which a negative voltage is applied. However, as long as these numbers do not differ significantly, flicker caused by positive and negative asymmetry can be spatially reduced. Further, a plurality of higher-order virtual scanning signal line groups are defined by grouping a plurality of virtual scanning signal line groups or repeating the grouping, and appropriately selecting these higher-order virtual scanning signal line groups. Thus, virtual interlaced scanning may be performed.

1 is a block diagram illustrating a configuration of a liquid crystal display device according to a first embodiment of the present invention. It is the schematic diagram (a) and equivalent circuit diagram (b) which show the structure of the liquid crystal panel in 1st Embodiment. It is a conceptual diagram for demonstrating the drive method of the liquid crystal display device which concerns on 1st Embodiment. 3 is a timing chart for explaining a driving method of the liquid crystal display device according to the first embodiment. It is a figure explaining flicker by current leak being reduced spatially in a 1st embodiment. It is a conceptual diagram for demonstrating a part of driving method of the liquid crystal display device which concerns on 2nd Embodiment. It is a conceptual diagram for demonstrating another part of the drive method of the liquid crystal display device which concerns on 2nd Embodiment. 6 is a timing chart for explaining a part of the driving method of the liquid crystal display device according to the second embodiment. It is a conceptual diagram for demonstrating the drive method of the liquid crystal display device which concerns on 3rd Embodiment. It is a conceptual diagram for demonstrating the drive method of the liquid crystal display device which concerns on 4th Embodiment.

Explanation of symbols

10 ... TFT (Thin Film Transistor)
DESCRIPTION OF SYMBOLS 200 ... Display control circuit 300 ... Video signal line drive circuit 400 ... Scanning signal line drive circuit 500 ... Common electrode drive circuit 600 ... Liquid crystal panel Ls ... Video signal line (column electrode)
Lg Scanning signal line (row electrode)
Px: Pixel formation part (pixel)
Cp: Pixel capacitance Ep: Pixel electrode Ec: Common electrode (counter electrode)
Vcom ... common voltage CK ... clock signal HSY ... horizontal synchronization signal VSY ... vertical synchronization signal Da ... digital image signal G (k) ... scanning signal (k = 1, 2, 3, ...)
D (j) ... Video signal (j = 1, 2, 3, ...)
F (n) ... nth frame Tsc ... scanning period Tnsc ... scanning stop period Th ... horizontal scanning period Lav ... average value of luminance of predetermined pixels adjacent in the vertical direction

Claims (7)

A plurality of pixel forming portions for forming an image to be displayed, a plurality of video signal lines for transmitting a plurality of video signals indicating the images to be displayed to the plurality of pixel forming portions, and the plurality of images An active matrix comprising a plurality of scanning signal lines intersecting with the signal lines, wherein the plurality of pixel forming portions are arranged in a matrix corresponding to the intersections of the plurality of video signal lines and the plurality of scanning signal lines, respectively. Type liquid crystal display device,
The plurality of scanning signal lines are selectively driven by sequentially selecting a predetermined number of virtual scanning signal lines, each of which is defined as a set of two or more adjacent scanning signal lines among the plurality of scanning signal lines. A scanning signal line driving circuit that repeats virtual interlace scanning;
Video transmitted by each video signal line when one of at least one pair of scanning signal lines is selected in each virtual scanning signal line and when the other of the at least one pair of scanning signal lines is selected A video signal line driving circuit that applies the plurality of video signals to the plurality of video signal lines so that the positive and negative polarity of the signals are different from each other;
Each of the pixel forming units outputs a video signal transmitted by the video signal line passing through the corresponding intersection when the scanning signal line passing through the corresponding intersection is selected by the scanning signal line driving circuit. As
The scanning signal line driving circuit makes all of the plurality of scanning signal lines non-selected for a predetermined period from the end of the virtual interlaced scanning to the start of the next virtual interlaced scanning. Display device.   In the scanning signal line driving circuit, the number of scanning signal lines selected when a positive video signal is transmitted by an arbitrary video signal line and the negative video signal is transmitted by the arbitrary video signal line. Of the plurality of scanning signal lines, adjacent virtual scanning signal lines are used as one virtual scanning signal line so that the number of scanning signal lines selected at the same time is the same in each virtual scanning signal line. The liquid crystal display device according to claim 1, wherein interlace scanning is repeated.   The scanning signal line driving circuit sequentially selects a virtual scanning signal line group in which a plurality of virtual scanning signal lines are defined as a set of two or more of the plurality of virtual scanning signal lines as a new virtual scanning signal line every predetermined number. The virtual interlaced scanning for selectively driving the plurality of scanning signal lines is repeated, and the plurality of scanning signals for a predetermined period from the end of each new virtual interlaced scanning to the start of the next new virtual interlaced scanning. The liquid crystal display device according to claim 1, wherein the line is set in a non-selected state.   The scanning signal line driving circuit sets the plurality of scanning signal lines in a non-selected state with a period longer than a period necessary for one virtual interlaced scanning as the predetermined period. The liquid crystal display device according to any one of the above. A plurality of pixel forming portions for forming an image to be displayed, a plurality of video signal lines for transmitting a plurality of video signals indicating the images to be displayed to the plurality of pixel forming portions, and the plurality of images An active matrix comprising a plurality of scanning signal lines intersecting with the signal lines, wherein the plurality of pixel forming portions are arranged in a matrix corresponding to the intersections of the plurality of video signal lines and the plurality of scanning signal lines, respectively. Type liquid crystal display device,
A scanning signal line driving circuit that repeats interlaced scanning that is driven by sequentially selecting the plurality of scanning signal lines every predetermined number;
When an arbitrary scanning signal line is selected, the plurality of video signal lines are arranged so that the positive and negative polarities of the video signals transmitted by two video signal lines adjacent to each other or spaced apart from each other are different from each other. A video signal line driving circuit for applying each of the plurality of video signals,
Each of the pixel forming units outputs a video signal transmitted by the video signal line passing through the corresponding intersection when the scanning signal line passing through the corresponding intersection is selected by the scanning signal line driving circuit. As
The scanning signal line driving circuit makes all of the plurality of scanning signal lines in a non-selected state for a predetermined period from the end of the interlaced scanning to the start of the next interlaced scanning. . A plurality of pixel forming portions for forming an image to be displayed, a plurality of video signal lines for transmitting a plurality of video signals indicating the images to be displayed to the plurality of pixel forming portions, and the plurality of images An active matrix comprising a plurality of scanning signal lines intersecting with the signal lines, wherein the plurality of pixel forming portions are arranged in a matrix corresponding to the intersections of the plurality of video signal lines and the plurality of scanning signal lines, respectively. A method of driving a liquid crystal display device of type
The plurality of scanning signal lines are selectively driven by sequentially selecting a predetermined number of virtual scanning signal lines, each of which is defined as a set of two or more adjacent scanning signal lines among the plurality of scanning signal lines. A scanning signal line driving step for repeating virtual interlace scanning;
Video transmitted by each video signal line when one of at least one pair of scanning signal lines is selected in each virtual scanning signal line and when the other of the at least one pair of scanning signal lines is selected The scanning signal line driving circuit selects the scanning signal line passing through the corresponding intersection by applying the plurality of video signals to the plurality of video signal lines so that the positive and negative polarity of the signals are different from each other. A video signal line driving step of providing each pixel forming unit with a video signal transmitted by the video signal line passing through the corresponding intersection as a pixel value,
The scanning signal line driving step is characterized in that all of the plurality of scanning signal lines are deselected for a predetermined period from the end of the virtual interlaced scanning to the start of the next virtual interlaced scanning. Method. A plurality of pixel forming portions for forming an image to be displayed, a plurality of video signal lines for transmitting a plurality of video signals indicating the images to be displayed to the plurality of pixel forming portions, and the plurality of images An active matrix comprising a plurality of scanning signal lines intersecting with the signal lines, wherein the plurality of pixel forming portions are arranged in a matrix corresponding to the intersections of the plurality of video signal lines and the plurality of scanning signal lines, respectively. A method of driving a liquid crystal display device of type
A scanning signal line driving step that repeats interlaced scanning that is driven by sequentially selecting the plurality of scanning signal lines every predetermined number;
When an arbitrary scanning signal line is selected, the plurality of video signal lines are arranged so that the positive and negative polarities of the video signals transmitted by two video signal lines adjacent to each other or spaced apart from each other are different from each other. By applying each of the plurality of video signals, when a scanning signal line passing through the corresponding intersection is selected by the scanning signal line driving circuit, the signal is transmitted by the video signal line passing through the corresponding intersection. A video signal line driving step of giving a video signal as a pixel value to each of the pixel forming units,
The scanning signal line driving step is characterized in that all of the plurality of scanning signal lines are deselected for a predetermined period from the end of the interlaced scanning to the start of the next interlaced scanning.

Images