JP2005310884A - Solder joint inspection method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for inspecting a solder joint portion of a semiconductor electronic component having a PN junction soldered and mounted on a printed wiring board without destroying the solder joint portion.
For a semiconductor electronic component having a PN junction soldered and mounted on a printed wiring board, a PN junction forward voltage under a minute current is measured in advance at the PN junction, and then a large current in the same forward direction. Is applied for a preset time to sufficiently heat the semiconductor electronic component, and the PN junction forward voltage at the minute current at the end of the application is measured to measure the difference before and after the power application. To do. Non-destructive evaluation by evaluating the change in the forward voltage before and after power application when the solder joint joining the printed wiring board and the semiconductor electronic component deteriorates due to a crack caused by a reliability test. The solder joints are inspected.
[Selection] Figure 1

Description

  The present invention relates to a method for inspecting a solder joint portion of a semiconductor electronic component soldered and mounted on a printed wiring board.

  Usually, a solder joint portion of an electronic component soldered and mounted on a printed wiring board in an electronic device is subjected to heat stress due to heat generated by the electronic component, environmental temperature around the substrate, and the like. This stress generates a stress in the solder joint, and when this thermal stress is repeatedly applied, the joint becomes fatigued and cracks are formed, leading to an unsatisfactory joining state, such as a final disconnection. A thermal shock test and a reliability test of a temperature cycle test are well known as methods for evaluating the reliability of solder joints by applying such repeated thermal stress. 4A and 4B are cross-sectional views of a solder joint portion in a printed wiring board and an electronic component mounted thereon, where FIG. 4A shows a surface mount type and FIG. 4B shows a lead insertion type electronic component. This is an example in which a crack is generated in a solder joint due to thermal stress applied in an impact test or a temperature cycle test. That is, it shows a state in which the lead 3 of the electronic component 1 and the wiring pattern 6 on the printed circuit board 7 are joined by the solder 5, and it shows that the crack 11 is generated inside the solder due to fatigue due to thermal stress. ing.

  Conventionally, the inspection of the crack has been performed by observing the surface of the solder joint portion using a microscope or the like. However, this method can be inspected when cracks are exposed on the solder surface, but since the cracks inside the solder cannot be detected, the cross section of the solder joint including the lead and the printed circuit board is ground. It is common to use a method of exposing and observing by such a method.

In addition to the method of directly observing the cracks, Japanese Patent Laid-Open No. 10-58129 (Patent Document 1) discloses that the solder joints are impregnated with an impregnating oil and the solder joints before and after vacuum impregnation. There has been proposed a method of measuring a weight and inspecting a crack by a change amount of the weight. In addition, there is a method in which the lead of the electronic component is mechanically separated from the printed circuit board and the crack is indirectly inspected based on the difference between the separation strength values before and after the reliability test.
JP-A-10-58129

  The conventional inspection method has the following drawbacks. Both conventional cross-sectional observation and mechanical pull-out strength measurement inspection methods destroy the sample to be inspected, and are therefore consistent with reliability tests such as thermal shock tests and temperature cycle tests. The sample cannot be provided. That is, since the sample is destroyed as the test progresses, it means that a large number of samples are required for the test in order to reduce the quantity. In the method of inspecting cracks by impregnating the impregnated oil proposed in JP-A-10-58129 and measuring the amount of change, the sample is once immersed in the impregnated oil. It is difficult. In addition, the grinding work, vacuum impregnation of impregnating oil, and measurement work of strength that are required to be performed by these methods require many work processes and time, and thus increase the cost. Furthermore, in the method based on the cross-sectional observation, since the internal crack cannot be specified from the surface observation, the crack may not exist depending on the portion where the cross-section is ground, and there is a problem in inspection accuracy. Further, there is a problem that the work efficiency is poor because the cross section is ground regardless of the presence or absence of cracks in the solder.

  An object of the present invention is to inspect an internal crack generated in a solder portion at a low cost without destroying the solder portion and without going through a complicated work process.

  In order to solve the above problems, the solder joint inspection method of the present invention measures the forward voltage of a PN junction in advance for a semiconductor electronic component having a PN junction soldered and mounted on a printed wiring board. Next, apply a large current in the forward direction and apply sufficient power to heat the electronic component for a preset time, measure the forward voltage of the PN junction at the end of the application, Is to measure. In general, a semiconductor electronic component generates heat when power is applied. In addition to the direct dissipation of the component from the package surface to the surrounding atmosphere, the heat is transferred from the lead to the printed circuit board through the solder joint, which is the subject of the present invention. Heat is dissipated by conduction. Here, if a crack occurs in the solder joint between the lead and the printed circuit board, heat conduction from the electronic component to the printed circuit board is impaired, and heat dissipation is reduced. And the temperature rises compared to the state without cracks.

  The present invention utilizes the fact that the difference in the PN junction forward voltage before and after the temperature rise due to self-heating of the semiconductor electronic component changes when the heat dissipation is reduced as described above, so that solder such as the presence or absence of cracks is generated nondestructively. The joint is inspected.

  According to the inspection method of the present invention, it is possible to continuously inspect the solder joints using the same sample without destroying the sample to be inspected. In addition, since it is possible to find deterioration that is not exposed to the solder surface, such as internal cracks, good results can be expected in inspection accuracy.

  The present invention has been made in view of the above-described problems, and an object of the present invention is to provide a method for performing non-destructive inspection of a solder joint without destroying a sample to be inspected. Embodiments of the present invention will be described below in detail with reference to the drawings.

  FIG. 1 is a cross-sectional view of a state in which a semiconductor electronic component is soldered and mounted on a printed circuit board. The solder 5 that joins the lead 3 of the semiconductor electronic component 1 and the pattern wiring 6 of the printed circuit board 7 is an inspection object. 1 shows a measurement system proposed by the invention. Here, in the semiconductor electronic component 1, a minute current source 8 and a current source 10 for applying electric power are connected between the lead 3 and the lead 4 forming the PN junction, and the PN junction forward voltage VF when the minute current is applied is further obtained. A voltmeter 9 for measurement is provided.

  FIG. 2 shows a timing chart for explaining the measurement process of the present invention. FIG. 2 (a) shows a current that is passed in the forward direction of a PN junction of a semiconductor electronic component having a solder joint to be inspected. FIG. 2B shows the PN junction temperature Tj of the electronic component. FIG. 2C shows the PN junction forward voltage VF of the electronic component. Here, a minute current IM is supplied in advance by the current source 8 in the forward direction of the PN junction between the lead 3 and the lead 4 to measure the PN junction forward voltage, which is defined as VF1. Next, when a large current IT is supplied from the power application current source 10 to the time t0 to t1, and the power is applied, the PN junction temperature Tj of the semiconductor chip 2 from the time t0 to t1 is as shown by the solid line in FIG. It rises from Tj1 and becomes Tj2. It is well known that the forward voltage of a PN junction of a semiconductor electronic component under a minute current condition exhibits temperature dependence having a negative coefficient as shown in FIG. 3, and as a result, the solid line in FIG. As shown, the forward voltage drops from VF1 at time t0 (temperature is Tj1) to voltage value VF2 corresponding to temperature Tj2 at time t1. That is, a difference ΔVF of VF1−VF2 is generated in the PN junction forward voltage before and after the self-temperature rise due to the energization of IT. This difference ΔVF is assumed to be δVF1.

  If the solder joint between the lead and the printed circuit board is deteriorated by a reliability test, the heat conduction is lost between the lead and the printed circuit board. In this case, heat radiation generated in the semiconductor chip 2 is reduced, and the temperature of the semiconductor chip becomes higher than that in the case where there is no deterioration of the solder joint. That is, when a large current IT from time t0 to t1 is applied and electric power is applied in the same manner as described above, the temperature Tj of the semiconductor chip 2 becomes Tj2 'indicated by the dotted line in FIG. 2B, which is a temperature value higher than Tj2. Indicates. Therefore, the forward voltage VF at time t1 becomes VF2 ′ as shown by the dotted line in FIG. 2C due to the temperature dependence of the PN junction, and shows a smaller value than VF2. In this case, the difference ΔVF of the PN junction forward voltage before and after the self-temperature rise due to the energization of IT is VF1−VF2 ′, and when this is δVF2, the relationship of δVF1 <δVF2 compared with δVF1 without the crack. Indicates.

  That is, in a reliability test such as a thermal shock test or a temperature cycle test, if the ΔVF after the test is larger than the ΔVF before the test, it can be determined that the solder joint has deteriorated, and cracks have occurred. Degradation such as presence or absence can be inspected. Here, it is desirable to select the time t1 to t0 during which a large current is applied from the power application current source 10 so that the temperature of the semiconductor chip sufficiently rises and the semiconductor and its vicinity reach a thermal equilibrium state. Further, when the PN junction temperature at the time t0 is the same before and after the reliability test as described above, it is possible to similarly inspect by not comparing the ΔVF but comparing the PN forward voltage at the time t1.

  In the present invention, in addition to the inspection method in the reliability test as described above, the ΔVF of the normal solder joint state is determined in advance, and the solder joint portion after the soldering mounting is compared by comparing whether or not it is higher than this value. It can also be applied to performance inspection.

  Note that the present invention can be applied to a modified or modified embodiment without departing from the spirit of the present invention.

1 shows a semiconductor electronic component soldered and mounted on a printed circuit board to be inspected in Example 1 and a measurement circuit proposed by the present invention. 3 is a timing chart illustrating an inspection method according to the first embodiment. It is a graph which shows the temperature dependence of the PN junction forward voltage VF on a microcurrent condition in the semiconductor which has a PN junction. It is sectional drawing which showed the printed wiring board which produced the crack in the solder joint part.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor electronic component 2 Semiconductor chip 3, 4 Lead 5 Solder 6 Wiring pattern 7 Printed circuit board 8 Microcurrent source 9 Voltmeter 10 Current source 11 for power application 11 Crack

Claims (1)

  In a method for inspecting a solder joint part of a semiconductor electronic component having a PN junction mounted by soldering on a printed wiring board, a large current is applied in the forward direction of the PN junction of the semiconductor electronic component, A method for inspecting a solder joint, wherein a difference between before and after application of the large current is measured with respect to a PN junction forward voltage during energization.

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