JP2005341014A - High frequency amplifier - Google Patents

Abstract

Cost is reduced by reducing wasteful current while the high-frequency amplifier circuit is in a non-selected state and in a pinch-off state, and reducing the number of switching transistors even when the number of high-frequency amplifier circuits is large. Go down.
When a high-frequency amplifier circuit group is selected and operated by coupling the output terminals of HEMTs 4 of the high-frequency amplifier circuit group in which each output is connected at one place in a high-frequency and direct-current manner, A selection voltage, which is a power supply voltage corresponding to the selection signal, is applied to the emitter of the transistor 12 and the output terminal of the HEMT 4 in the selected high-frequency amplifier circuit 1, and the selection voltage is not applied when not selected. Further, the drain voltage of the HEMT 4 of the selected high-frequency amplifier circuit 1 is applied to the drain of the HEMT 4 of the non-selected high-frequency amplifier circuit 1, and a pinch-off voltage is applied to the gate of the non-selected HEMT 4.
[Selection] Figure 1

Description

  The present invention is used in a receiver that receives a high-frequency signal such as a microwave or a millimeter wave, and switches the operating state (on / off) of a plurality of high-frequency amplifier circuits using HEMTs, FETs, etc. The present invention relates to a configuration of a high frequency amplifier having a function of selecting an input signal.

  Conventionally, as shown in FIG. 2A, a high-frequency amplifier circuit 80 incorporating a switching circuit is used for amplifying HEMTs, FETs, etc. via DC-cut capacitors 82, 84 between an input terminal 81 and an output terminal 85. An element (hereinafter simply referred to as FET) 83 is provided. As an auto-bias circuit, resistors 87 to 90 and a biasing transistor (hereinafter simply referred to as a transistor) 91 are disposed as shown in the figure, and the collector of the transistor 91 is connected to the gate of the FET 83 via the resistor 95. The emitter of the transistor 91 is connected to the drain of the FET 83.

  Further, a negative power source (Vgg) 93 is connected to the gate of the FET 83 and the collector side of the transistor 91, and a positive power source (VDD) 94 is connected to the drain of the FET 83 and the emitter side of the transistor 91. That is, a negative voltage equal to or lower than the pinch-off voltage Vp (eg, -2V) of the FET 83 is applied to the negative power source 93, and a voltage VDD equal to or higher than a desired drain voltage VD (eg, + 2V) is applied to the positive power source 94. If the desired drain current is ID, the resistor 88 is R8, the resistor 89 is R9, the resistor 90 is R10, and the barrier potential of the transistor 91 is Vz, VDD-R8.times.ID = VD, {R10 / (R10 + R9). )} × VDD = VD−Vz If the above resistance values are set, the FET 83 operates stably with a constant drain current ID.

  A switch 93 comprising a resistor 93 and a bipolar transistor is connected in series between the drain of the FET 83 and the emitter of the transistor 91 and the ground (ground potential). That is, these elements are connected in parallel to the path of the bias current for the FET 83 of the auto bias circuit, and the switch element 92 is turned on / off by an on / off control signal (selection signal) from the outside.

  With such a configuration, the transistor 91 can be controlled to be turned on / off by the on / off operation of the switch element 92, and the FET 83 can be switched to an on / off state by changing the gate voltage VG of the FET 83. Even when the FET 83 is turned off because the gate voltage becomes equal to or lower than the pinch-off voltage, a required positive voltage (for example, +2 V) from the positive power supply 94 can be applied to the drain of the FET 83. By giving this pinch-off state, that is, bias conditions of VG = Vp, VD = + 2V, input signal leakage from the gate to the drain terminal of the FET 83 is reduced, that is, the isolation characteristic is improved.

  Next, the operation will be briefly described. In FIG. 2A, when the switch element 92 is turned on, the current ID2 flowing from the positive power supply 94 through the resistor 88 is the sum of the drain current ID1 of the FET 83 and the current Ix of the resistor 93 (ID2 = ID1 + Ix). If a current that causes the base-emitter voltage VBE of the transistor 11 to be equal to or lower than the barrier potential Vz (for example, VBE <0.6 V) flows by only the current Ix due to the voltage drop in the resistor 88, the transistor As a result, the FET 83 is turned off, so that the negative voltage Vgg is applied to the gate of the FET 83 from the negative power source 93 as it is, and the pinch off state is established.

  At this time, the drain current ID1 of the FET 83 becomes 0. Even in this state, a current corresponding to the current Ix flows through the resistor 93. If the resistance value of the resistor 93 is set to a required value, As the drain voltage VD of the FET 83, substantially the same voltage (for example, +2 V) as that at the time of ON is applied. That is, even when the FET 83 is turned off, a positive voltage is applied to the drain to improve the isolation characteristics during the off operation.

  On the other hand, in the state where the switch element 92 is turned off in FIG. 2A, the current ID2 flowing through the resistor 88 is substantially equal to the drain current ID1, and the resistor 93 and the switch element 92 are connected in parallel with the auto bias circuit. Therefore, the existence can be ignored. Therefore, the bias by the auto bias circuit is supplied to the FET 83. Then, the value of the emitter voltage VE with respect to the base voltage VB of the transistor 91 becomes larger than about 0.6 V, and the transistor 91 is turned on. In the FET 83, the gate voltage Vg changes to the positive side and becomes conductive, the drain current ID1 increases, thereby the emitter voltage VE of the transistor 91 decreases, and the collector-emitter voltage VBE matches the junction barrier potential Vz. At this point, an equilibrium state is obtained (see, for example, Patent Document 1).

Next, a description will be given of an example in which a high-frequency amplifier for receiving satellite broadcasting for selecting, for example, two groups of high-frequency amplifier circuits shown in FIG. 2B is configured using the high-frequency amplifier circuit 80 incorporating this switching circuit. .
Input signals A and B received by two antennas (not shown) are input to a high-frequency amplifier circuit group A and a high-frequency amplifier circuit group B that amplify dedicated frequency bands, respectively.

  For example, when an input signal to be received is determined by a user operation, a corresponding selection signal is output from a circuit (not shown). Since this selection signal is input to the high-frequency amplifier circuit group A via the inverter 95 and directly to the high-frequency amplifier circuit group B, 0V (selects the input signal A) or 5V (input signal B One high-frequency amplifier circuit group is configured to operate in accordance with one of the selection voltages.

  However, in the circuit of FIG. 2A, while the high-frequency amplifier circuit 80 is in the non-selected state, current flows wastefully from VDD through the resistor 88 and the resistor 93 to the ground. The power consumption increased in proportion to the number of circuits 80. Further, one switch element 92 is required for one high-frequency amplifier circuit 80, and when the number of high-frequency amplifier circuits 80 is large, the cost increases.

Japanese Patent Laid-Open No. 10-341142 (page 3-4, FIG. 1)

  The present invention solves the above-described problems, reduces wasteful current while the high-frequency amplifier circuit is in a non-selected state and in a pinch-off state, and can switch even when the number of high-frequency amplifier circuits is large. The purpose is to reduce the number of transistors for use and to reduce the cost.

In order to solve the above-described problems, the present invention provides a high-frequency amplifier circuit including an auto-bias circuit that stabilizes the operation state of an amplifier element that amplifies a high-frequency signal by using a bias amplifier element. It is configured as a high frequency amplifier circuit group provided corresponding to each signal, and each output of the high frequency amplifier circuit group is connected at one place, and the high frequency amplifier circuit group is alternatively selected by an external selection signal. In the high-frequency amplifier that is selectively switched,
The output ends of the high-frequency amplifier circuit group in which the respective outputs are connected at one place are coupled to each other in a high-frequency and direct-current manner,
When selecting and operating the high-frequency amplifier circuit group, a selection voltage that is a power supply voltage corresponding to the selection signal is applied to the auto-bias circuit and the output terminal of the amplification element in the selected high-frequency amplifier circuit. The circuit is applied and does not apply the selection voltage when not selected.

  The selection voltage is supplied in parallel to the high-frequency amplifier circuits in the high-frequency amplifier circuit group.

By using the above means, according to the high frequency amplifier of the present invention, the invention according to claim 1
The output ends of the high-frequency amplifier circuit group in which the respective outputs are connected at one place are coupled to each other in a high-frequency and direct-current manner,
When selecting and operating a high-frequency amplifier circuit group, a selection voltage corresponding to a power supply voltage corresponding to the selection signal is applied to the auto-bias circuit and the output terminal of the amplification element in the selected high-frequency amplifier circuit, and the selection is not performed. Sometimes, by using a circuit that does not apply the selection voltage, the power consumption can be made lower than that of a conventional high-frequency amplifier circuit.
Furthermore, since the outputs of a plurality of high-frequency circuit groups are each connected in a direct current manner at one location, only one wiring is required for applying a selection voltage to the auto-bias circuit. Thus, the degree of freedom in design increases and the mounting board can be reduced in size.

The invention according to claim 2 is configured to supply the selection voltage in parallel to the high-frequency amplifier circuits in the high-frequency amplifier circuit group, so that the number of amplification stages in one high-frequency amplifier circuit group can be controlled regardless of the number of amplification stages. Since only one transistor is required per system, the cost can be reduced compared to the conventional case.
In addition, since the selection voltage generation circuit is provided at an arbitrary position on the substrate constituting the high frequency amplifier and only the wiring pattern for the selection voltage needs to be wired to each high frequency amplification circuit, the circuit pattern design becomes easy.

  DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described in detail as examples based on the attached drawings.

  As shown in the circuit diagram of FIG. 1A, a high-frequency amplifier circuit 1 according to the present invention has an input terminal 2 for inputting a high-frequency signal, an output terminal 3 for outputting an amplified signal, and selection of the high-frequency amplifier circuit 1 A selection voltage input terminal 15 for inputting a selection voltage for controlling non-selection.

  The input terminal 2 is connected to the gate terminal of a HEMT (High Electron Mobility Transistor) 4 which is an amplifying element for high frequency via a DC cut capacitor 41, and the output terminal 3 is connected to the drain terminal of the HEMT 4. The source terminals of the HEMT 4 are connected to the earth (ground).

  Further, the inductor 16, the resistor 5 and the capacitor 8 are connected in series to the gate terminal of the HEMT 4, the other end of the capacitor 8 is connected to the ground, and one end of the capacitor 18 is connected to the connection point between the inductor 16 and the resistor 5. The other end of the capacitor 18 is connected to the ground, and the drain terminal of the HEMT 4 is connected to the inductor 17, the resistor 7 and the capacitor 9, and the other end of the capacitor 9 is connected to the ground. One end of the capacitor 19 is connected to the connection point with the resistor 7, and the other end of the capacitor 19 is connected to the ground.

  These inductors and capacitors are provided to prevent high-frequency signals from leaking to the bias circuit side, and the same effect can be obtained by using either a lumped constant or a distributed constant.

  On the other hand, the selection voltage input terminal 15 is connected to the input of the amplifying element which is an auto-bias circuit via the resistor 14, that is, the emitter of the PNP transistor 12 and the connection point of the resistor 7 and the capacitor 9. Is connected to the connection point of the resistor 11 and the resistor 13 connected in series from + 5V to the ground. The collector of the transistor 12 is connected via a resistor 10 to a negative voltage power supply Vgg that makes the HEMT 4 in a pinch-off state, and the resistor 5 and the capacitor 8 are connected via a resistor 6 from the connection point of the collector of the transistor 12 and the resistor 10. Connected to a point.

  FIG. 1B is a block diagram of a high-frequency amplifier, which includes four high-frequency amplifier circuits 1 and two high-frequency amplifier circuit groups A and B, each having two stages of amplifier circuits. The outputs of each high-frequency amplifier circuit group are connected at one place (point C in FIG. 1B) and output to the next stage circuit, for example, a frequency conversion circuit, etc., via a DC cut capacitor 40. ing. Whether to operate or stop each high-frequency amplifier circuit group is determined by a selection voltage input to each high-frequency amplifier circuit 1, and the selection voltage of the high-frequency amplifier circuit group A is supplied from the selection voltage generation circuit 30 or from the high-frequency amplifier. The selection voltage of the circuit group B is output from the selection voltage generation circuit 20, respectively.

  Each selection voltage generation circuit outputs a selection voltage (+5 V) corresponding to the selection signal. The selection voltage is generated from the selection voltage generation circuit 30 when the selection signal is at a low level and from the selection voltage generation circuit 20 when the selection signal is at a high level. Is output. When the selection voltage is output from one selection voltage generation circuit, the selection voltage is not output from the other selection voltage generation circuit.

  Each selection voltage generating circuit is configured to switch a + 5V power supply using a PNP transistor 21, with the emitter of the transistor 21 being connected to the + 5V power supply and the collector being an output terminal of the selection voltage. Also, a pull-up resistor 22 to the power source and a base current limiting resistor 23 are connected to the base of the transistor 21.

  The other terminal of the resistor 23 of the selection voltage generating circuit 30 is directly connected to input a selection signal, and the other terminal of the resistor 23 of the selection voltage generating circuit 20 is connected to the output terminal of the inverter 95. The input terminal of the inverter 95 is connected to input a selection signal.

  Next, the operation will be described in detail. Detailed description of the operation described in the background art is omitted, and the features of the present invention are described with reference to the circuit diagram of the high-frequency amplifier circuit in FIG. 1A and the block diagram of the high-frequency amplifier in FIG. To do.

The feature of the present invention is that when the high-frequency amplifier circuit is in a non-selected state, the drain voltage for setting the HEMT 4 in the pinch-off state is individually created in each high-frequency amplifier circuit as described with reference to FIG. Instead, the drain voltage of another selected high-frequency amplifier circuit is used.
For this reason, the drain terminal of the HEMT 4 of the high-frequency amplifier circuit 1 in the non-selected state according to the present invention and the selection voltage generation circuit that makes the transistor 12 DC high impedance state are provided. Almost no current consumption can be eliminated.

  In FIG. 1B, when the selection signal becomes low level, the base potential of the transistor 21 of the selection voltage generation circuit 30 becomes lower than + 5V of the power supply, the transistor 21 is turned on, and the selection voltage of + 5V from the collector of the transistor 21 is turned on. Is supplied to each high frequency amplifier circuit 1 of the high frequency amplifier circuit group A.

  In FIG. 1A, when a selection voltage of + 5V is applied to the selection voltage input terminal 15, a predetermined voltage, for example, + 2V is supplied to the drain terminal of the HEMT 4 via the resistor 14, the resistor 7 and the inductor 17. This is because a selection voltage of +5 V is supplied to the emitter of the transistor 12 via the resistor 14, and the base voltage of the transistor 12 is slightly lower than +2 V due to the voltage dividing ratio of the resistors 11 and 13, for example, between the base and emitter of the transistor 12. This is because the values of the resistor 11 and the resistor 13 are determined in advance so that the voltage is lower by 0.6V, that is, 1.4V.

  A predetermined bias voltage is supplied to the gate terminal of the HEMT 4 via the collector of the transistor 12, the resistor 6, the resistor 5, and the inductor 16, and the HEMT 4 amplifies the signal input from the input terminal 2 and outputs it. Output from terminal 3. Note that the auto bias operation by the constant current operation of the transistor 12 is the same as that in FIG.

  On the other hand, the low level selection signal is inverted by the inverter 95 to become high level, and is input to the selection voltage generation circuit 20. In the selection voltage generation circuit 20, since the selection signal is at a high level, the base of the transistor 21 is pulled up to + 5V, and the transistor 21 is turned off.

  Accordingly, in the high frequency amplifier circuit 1 of the high frequency amplifier circuit group B, the transistor 12 is turned off, and the negative pinch-off voltage Vgg is supplied to the gate of the HEMT 4 via the resistor 6, the resistor 5, and the inductor 16. On the other hand, the drain terminal of the HEMT 4 is DC high impedance, but the output terminal 3 is connected to the output terminal 3 of the high-frequency amplifier circuit 1 of the active high-frequency amplifier circuit group A. A voltage supplied to the drain terminal, for example +2 V, is also applied to the drain terminal of the high-frequency amplifier circuit 1 of the high-frequency amplifier circuit group B, and this voltage is further passed through the inductor 17, resistor 7 and resistor 14. B is applied to the other high-frequency amplifier circuit 1.

  Note that the distance between the output terminal of the final stage FET of each of the high-frequency amplifier circuit groups A and B and the connection point C of the high-frequency amplifier circuit groups A and B is, for example, in the off state by switching the selection signal. When the high-frequency amplifier circuit group B is in the on state or vice versa, when the high-frequency amplifier circuit group in the off state is viewed from the connection point C, the input impedance for the high-frequency signal to be amplified is on. The predetermined distance is set so as to be large enough not to affect the amplification characteristics of the amplifier circuit group.

  According to the selection signal, all the high-frequency amplifier circuits 1 of the high-frequency amplifier circuit group B are in a stopped state, the transistor 12 is also turned off, and the base potential of the transistor 12 is also fixed at 1.4V. In addition, no current flows from the emitter to the base of the transistor 12, almost no current flows through the high-frequency amplifier circuit group B, and power consumption can be reduced as compared with FIG. Further, the HEMT 4 of the high-frequency amplifier circuit 1 of the high-frequency amplifier circuit group B can be brought into a pinch-off state (VG = Vp, VD = + 2V) without affecting the operation of the high-frequency amplifier circuit group A in operation. Isolation characteristics similar to those in FIG. 2A can be maintained.

  In addition, since the outputs of the plurality of high-frequency circuit groups are connected in a direct current at one place (connection point C), only one wiring for applying the selection voltage to the auto bias circuit is required. This makes it easy to design the pattern, increasing the degree of freedom in design, and reducing the size of the mounting board.

  In addition, as shown in FIG. 1B, the selection voltage output from the selection voltage generation circuit is supplied in parallel to the high-frequency amplification circuit 1 in one amplification circuit group. The number of necessary transistors, for example, the transistor 92 in FIG. 2A and the number of transistors 21 in FIG. 1A can be reduced.

  Specifically, in FIG. 2B, four high-frequency amplifier circuits 80 each need four transistors 92, but a total of four transistors 92 are required, but in FIG. 1B, the number of transistors 21 is two. Can do. Further, when the number of amplification stages is further increased, the number of transistors increases in proportion to the number of stages in FIG. 2B, but in FIG. 1B, the number of transistors does not increase regardless of the number of amplification stages. Therefore, the cost can be further reduced.

  Further, when the high-frequency amplifier circuit has a plurality of stages, in the circuit of FIG. 1A, the switch element 92 must be disposed close to the FET 83 in order to shorten the wiring. 20 and 30 need only be provided at arbitrary locations on a pattern substrate (not shown) constituting the high-frequency amplifier, and only the wiring pattern for the selection voltage needs to be wired to each high-frequency amplifier circuit 1. Become.

In this embodiment, since there are two high-frequency circuit groups, the selection signal is inverted by an inverter. However, when there are three or more high-frequency circuit groups, a logic circuit such as a decoder circuit is appropriately used. It may be used to select a selection voltage generation circuit.
Further, the high-frequency circuit group is not limited to two stages, and may be one stage or three or more stages.

1 shows an embodiment of a high-frequency amplifier according to the present invention, (A) is a circuit diagram of a high-frequency amplifier circuit, and (B) is a block diagram of the high-frequency amplifier. A conventional high-frequency amplifier is shown, (A) is a circuit diagram of a high-frequency amplifier circuit, and (B) is a block diagram of the high-frequency amplifier.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 High frequency amplifier circuit 2 Input terminal 3 Output terminal 4 HEMT (amplifier element)
DESCRIPTION OF SYMBOLS 5 Resistance 6 Resistance 7 Resistance 8 Capacitor 9 Capacitor 10 Resistance 11 Resistance 12 Transistor 13 Resistance 14 Resistance 15 Selection voltage input terminal 16 Inductor 17 Inductor 18 Capacitor 19 Capacitor 20 Selection voltage generation circuit 21 Transistor 22 Resistance 23 Resistance 30 Selection voltage generation circuit 40 , 41 Capacitor 95 Inverter

Claims (2)

A high-frequency amplifier circuit provided with a high-frequency amplifier circuit equipped with an auto-bias circuit that stabilizes the operating state of the amplifier element that amplifies a high-frequency signal using a bias amplifier element, corresponding to the input signals of a plurality of systems to be amplified. In a high-frequency amplifier configured as a group, each output of the same high-frequency amplifier circuit group is connected at one place, and the high-frequency amplifier circuit group is selectively switched by a selection signal from the outside,
The output ends of the high-frequency amplifier circuit group in which the respective outputs are connected at one place are coupled to each other in a high-frequency and direct-current manner,
When selecting and operating the high-frequency amplifier circuit group, a selection voltage that is a power supply voltage corresponding to the selection signal is applied to the auto-bias circuit and the output terminal of the amplification element in the selected high-frequency amplifier circuit. A high-frequency amplifier, which is a circuit that is applied and does not apply the selection voltage when not selected.   The high-frequency amplifier according to claim 1, wherein the selection voltage is supplied in parallel to the high-frequency amplifier circuits in the high-frequency amplifier circuit group.

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