JP2005260068A - Semiconductor substrate, semiconductor device, manufacturing method thereof, and inspection method thereof - Google Patents

Abstract

A semiconductor substrate, a semiconductor device, a manufacturing method thereof, and a measuring method having a structure capable of forming an electrode pad formed on a scribe line so as not to remain after dicing are provided.
An electrode pad formed on a scribe line formed on a semiconductor substrate, and an opening formed on the scribe line and wider than the electrode pad in the width direction of the scribe line. Part 3 is formed. For example, the opening 3 is formed so that a part of the electrode pad 2 exists at the center of the opening 3, and the electrode pad 2 is formed so as to be positioned at the approximate center in the width direction of the scribe line 1.
[Selection] Figure 1

Description

  The present invention relates to a structure of an electrical contact portion for measuring a semiconductor device formed on a scribe line, a manufacturing method thereof, and a measuring method, and more particularly to a semiconductor substrate, a semiconductor device, a manufacturing method of the semiconductor substrate, and a measuring method thereof.

  A scribe line formed on a semiconductor substrate includes a transistor, a resistor, and the like, and an electrode pad for measuring it. Since the electrode pad is generally formed to be large to some extent for reliable measurement, it occupies a relatively large area in the semiconductor substrate. Thus, measurement electrode pads are often formed in a scribe line for separating a semiconductor device as a product. Here, the scribe line is a region for cutting with a dicing blade when the device formed on the semiconductor substrate is chipped. Therefore, if the inspection electrode pad is formed on the scribe line, the area of the semiconductor substrate for forming the product is not consumed.

  FIG. 7 shows a plan view of an electrode pad formed on a conventional scribe line. An electrode pad 2 is formed on the scribe line 1, and an opening 3 is provided in a region smaller than a region where the electrode pad 2 is formed. This is to ensure electrical measurement if the probe needle is adjusted to an arbitrary position on the opening 3. Further, even if the probe needle is slightly displaced due to wear or the like, the measurement can be performed if the probe needle contacts somewhere in the opening 3.

  When the semiconductor device is made into chips, the electrode pads 2 formed on the scribe line 1 are also diced by a dicing blade. As described above, in order to reduce the contact failure of the probe needle, it is better to form the electrode pad 2 and its opening 3 larger. However, if the electrode pad 2 is formed large, a part of the electrode pad 2 formed on the scribe line 1 is likely to remain after the semiconductor device is made into a chip, and a chip in a subsequent process is formed, for example, by TAB (Tape Automated Bonding). There is a high possibility that an inspection failure occurs when the remaining electrode pad 2 and the TAB lead wire come into contact with each other and short-circuit when mounted by the technology.

  Therefore, for example, in Patent Document 1, the electrode pad formed on the scribe line is processed into a special shape so that cutting waste is hardly generated when the semiconductor substrate is cut.

JP-A-7-302773

  However, for example, when the shape of the electrode pad 2 formed on the scribe line 1 is processed as in Patent Document 1, it is difficult to generate cutting waste, and for example, there is an effect of reducing defects after mounting using the TAB technology. There is a possibility that the electrode pad 2 formed on the scribe line 1 still remains on the chip. Therefore, it is desirable that the electrode pad 2 formed on the scribe line is completely cut off by the dicing blade at the time of dicing.

  An object of the present invention is to provide a semiconductor substrate, a semiconductor device, a manufacturing method thereof, and a measuring method having a structure capable of forming electrode pads formed on a scribe line so as not to remain after dicing.

  In order to solve the above-described problems, the present invention provides an electrode pad formed on a scribe line formed on a semiconductor substrate, and is formed on the scribe line and is wider in the width direction of the scribe line than the electrode pad. The gist of the invention is that it has an opening.

  According to this configuration, the opening can be formed larger than the electrode pad formed on the scribe line. Therefore, when this opening is formed in a normal size, the electrode pad can be made relatively small. Thereby, if a dicing blade having a width larger than the size of the electrode pad in the line direction of the scribe line is used, the electrode pad can be completely cut off. Also, by reducing the electrode pad, the electrode pad can be cut off using a dicing blade having a narrower width than the conventional one, and as a result, the scribe area can be reduced. Thereby, since the area which can be used as a product in a semiconductor substrate increases, the effect that the number of chips which can be manufactured per semiconductor substrate increases is acquired.

  Further, the gist of the present invention is that a part of the electrode pad is formed so as to exist in the center of the opening.

  According to this configuration, since the electrode pad exists at least at a part of the center of the opening, the tip of the probe needle has a certain size if the probe needle is aligned with the center of the opening at the time of inspection. Therefore, the measurement can be performed even if the position of the probe needle is slightly deviated.

  Further, in the invention, the opening is formed such that a part of the electrode pad exists within a range of a probe needle tip diameter for measuring the electrode pad from a side wall surface of the opening. It is a summary.

  According to this configuration, if the position is adjusted so that the entire tip of the probe needle used for measuring the electrode pad enters an arbitrary position within the opening, the electrode pad exists within the probe needle tip diameter range. Therefore, the electrical characteristics of the semiconductor device formed on the semiconductor substrate can be measured more reliably.

  The gist of the present invention is that the width of the electrode pad is shorter than the width of the opening in the width direction of the scribe line.

  According to this configuration, by forming the electrode pad shorter than the width of the opening with respect to the width direction of the scribe line, the electrode pad can be formed smaller with respect to the line direction of the scribe line. As a result, the electrode pad can be cut off by using a dicing blade having a narrower width than before when dicing.

  In addition, the gist of the present invention is that the electrode pad is formed so as to be positioned substantially at the center in the width direction of the scribe line.

  According to this configuration, the electrode pad can be cut off by using a dicing blade having a narrower width than the conventional one at the time of dicing by forming the electrode pad so as to be positioned approximately at the center in the width direction of the scribe line.

  In addition, the gist of the present invention is that the electrode pad is formed so as to be positioned substantially at the center in the width direction of the opening.

  According to this configuration, since the electrode pad is formed at the center of the opening with respect to the width direction of the scribe line, the probe needle can more reliably contact the electrode pad during measurement. Thereby, measurement failure can be reduced.

  The gist of the present invention is that the electrode pad is formed over substantially the entire region in the direction of the scribe line in the opening.

  According to this configuration, for example, electrical connection with a semiconductor device such as a transistor can be established from an electrode pad region in which no opening is formed. Since there are electrode pad regions in which no two openings are formed in the scribe line direction, electrical connection with the semiconductor device can be established from either of them.

  Further, the gist of the present invention is that the bottom surface of the opening where the electrode pad is not formed is formed below the height of the surface of the electrode pad.

  According to this configuration, if the electrode pad surface formed in the opening is the same as the bottom surface of the opening, the probe needle comes into contact with the electrode pad, and thus does not affect the electrical measurement. If the bottom surface of the opening is formed lower than the electrode pad surface, when the probe needle enters the opening region at the time of electrical measurement, the electrode pad first comes into contact. Therefore, electrical measurement of the semiconductor device can be reliably performed.

  Further, the gist of the present invention is that a polycrystalline silicon layer or a silicon nitride layer is formed below a region where the opening is formed.

  According to this configuration, when the opening of the electrode pad is formed, a dry etching method is often used as the opening method. When an insulator other than the electrode pad is dry-etched, there is no problem because the electrode pad itself serves as a dry etching stopper layer if the structure is a normal electrode pad. Therefore, over-etching occurs in which the insulating layer formed further below the layer in which the electrode pad is formed is etched. However, extreme over-etching can be prevented if a polycrystalline silicon layer or a silicon nitride layer is formed below the electrode pad.

  Further, the present invention is a semiconductor substrate on which an insulating layer having a scribe line is formed, and an etching stop layer forming step of forming a polycrystalline silicon layer or a silicon nitride layer as an etching stop layer on the insulating layer; A first insulating layer forming step of forming a first insulating layer on the etching stop layer, a metal layer forming step of forming a metal layer for an electrode pad on the first insulating layer, and the metal layer Forming an electrode pad by patterning; forming a second insulating layer on the semiconductor substrate on which the electrode pad is formed; and forming a second insulating layer on the second insulating layer. Forming a third insulating layer on the substrate, and forming an opening by removing the third insulating layer and the second insulating layer in a region including at least a portion where the electrode pad is formed That has an opening forming step, the opening forming step, and summarized in that the electrode pad is not formed region in the opening to form the opening such that there.

  According to this method, the protective effect of the semiconductor surface other than the electrode pad opening can be enhanced by having the third insulating layer. In addition, the opening can be formed larger than the electrode pad formed in the scribe region. Therefore, when this opening is formed in a normal size, the electrode pad can be formed relatively small. Thus, if a dicing blade having a width larger than the size of the electrode pad in the dicing direction is used, the electrode pad can be completely cut off. Also, by reducing the electrode pad, the electrode pad can be cut off using a dicing blade having a narrower width than the conventional one, and as a result, the scribe area can be reduced. Therefore, since the area that can be used as a product in the semiconductor substrate increases, an effect of increasing the number of chips that can be manufactured per semiconductor substrate is obtained. In addition, since a part of the electrode pad is opened, the opening can be formed at an arbitrary position within the conditions.

  Further, according to the present invention, the opening forming step is formed so that a region where the electrode pad is not formed exists in the opening, and a part of the electrode pad exists in the center of the opening. The gist is to form the opening as described above.

  According to this method, the protective effect of the semiconductor surface other than the electrode pad opening can be enhanced by having the third insulating layer. Further, in forming the opening of the electrode pad, the probe needle is formed so that at least a part of the electrode pad exists at the center of the opening so that the probe needle is aligned with the center of the opening at the time of inspection. Since the tip of the probe also has a certain size, it can be measured even if the position of the probe needle is slightly deviated.

  Further, in the present invention, the opening forming step is performed so that a part of the electrode pad exists within a range of a probe needle tip diameter for measuring the electrode pad from a side wall surface of the opening. The gist is to form the opening.

  According to this method, the protective effect of the semiconductor surface other than the electrode pad opening can be enhanced by having the third insulating layer. Also, if the position is adjusted so that the entire tip of the probe needle used to measure the electrode pad enters an arbitrary position within the opening, the electrode pad exists within the probe needle tip diameter range, so the semiconductor substrate The electrical characteristics of the semiconductor device formed in the above can be measured almost certainly.

  In addition, the present invention is a measurement method of a semiconductor device that performs electrical measurement using an electrode pad formed on a scribe line, and the opening formed to measure the electrode pad has the electrode pad The opening is formed so that there is a region that is not formed, and the electrode pad is formed in the center of the opening, and the electrode pad that exists in the opening is connected to a probe needle. The gist is to measure with.

  According to this method, if the probe needle is aligned with the center of the opening at the time of inspection, the tip of the probe needle has a certain size, so that measurement can be performed even if the position of the probe needle is slightly shifted. .

  In addition, the present invention is a measurement method of a semiconductor device that performs electrical measurement using an electrode pad formed on a scribe line, and the opening formed to measure the electrode pad has the electrode pad The opening is formed so that there is a region that is not formed, and a part of the electrode pad is within the range of the probe needle tip diameter for measuring the electrode pad from the side wall surface of the opening. The gist is to measure the electrode pad with a probe needle having a diameter equal to or greater than the tip diameter of the probe needle.

  According to this method, if the position is adjusted so that the entire tip of the probe needle used for measuring the electrode pad enters an arbitrary position within the opening, the electrode pad exists within the area of the tip of the probe needle. Therefore, the electrical characteristics of the semiconductor device formed on the semiconductor substrate can be measured more reliably.

  Further, the present invention is characterized in that the probe needle is set in a positional relationship in which the probe needle can come into contact with the electrode pad when the probe needle is in contact with either side surface of the opening in the width direction of the scribe line. And

  According to this method, when the probe needle enters the region of the opening, electrical connection can be established with the electrode pad in the opening, so that measurement can be performed more reliably.

  The best embodiment of the present invention will be described with reference to FIGS. FIGS. 1A to 1D are schematic plan views showing examples of different measurement units with respect to the positional relationship between electrode pads and openings as the measurement unit of the present embodiment. The planar structure of the measurement unit 4 in FIG. Here, the measurement unit 4 refers to a region constituted by the electrode pad 2 and the opening 3. On the semiconductor substrate 11, scribe lines 1 are formed in the horizontal direction. An electrode pad 2 is formed so as to be positioned at the center in the width direction of the scribe line 1. The electrode pad 2 is formed in a rectangle whose longitudinal direction is the scribe line 1. The electrode pad 2 is formed so as to be parallel to the line direction of the scribe line 1. On the semiconductor substrate 11 including the electrode pads 2, an insulating layer or the like for protecting a semiconductor device or the like is formed. This cross-sectional structure will be described with reference to FIG. The opening 3 is formed by removing the insulating layer or the like until at least the surface of the electrode pad 2 appears. The opening 3 has a rectangular shape and is smaller than the length of the electrode pad 2 in the longitudinal direction. The opening 3 is formed to be parallel to the line direction of the scribe line 1. On the other hand, the electrode pad 2 is opened larger than the short side direction. The opening 3 is formed such that the electrode pad 2 exists in the center of the opening 3.

  The planar structure of the measurement unit 4 in FIG. The electrode pad 2 is formed in a rectangular shape near the square at the center in the width direction of the scribe line 1. The electrode pad 2 is formed in parallel to the line direction of the scribe line 1. The opening 3 is parallel to the line direction of the scribe line 1 and is formed larger than the entire electrode pad 2. The opening 3 is rectangular and is formed so that the electrode pad 2 exists in the center of the opening 3.

  The planar structure of the measurement unit 4 in FIG. As in FIG. 1A, the electrode pad 2 is formed at the center of the scribe line 1 in the width direction. The opening 3 is rectangular and is formed so that a part of the lower left part of the electrode pad 2 appears. The opening 3 is parallel to the line direction of the scribe line 1 and is formed so that a part of the electrode pad 2 is included in a range including the central portion.

  The planar structure of the measurement unit 4 in FIG. As in FIG. 1A, the electrode pad 2 is formed at the center of the scribe line 1 in the width direction. The electrode pad 2 has a rectangular shape in which the direction of the scribe line 1 is long. The opening 3 is parallel to the line direction of the scribe line 1, is rectangular, and is shorter than the length of the electrode pad 2. The opening 3 is formed such that the electrode pad 2 is disposed on the entire lower side of the opening region. The opening 3 is formed such that the electrode pad 2 is positioned so as to include the central portion of the opening 3.

  In the structures of FIGS. 1A, 1C, and 1D, there is a region where the electrode pad 2 is larger than the opening 3, so that measurement is desired using the electrode pad 2, for example, a transistor Such electrical connection with the semiconductor device can be made two-dimensionally, that is, electrical wiring for making electrical connection can be made in the same layer as the electrode pad 2. On the other hand, in the case of a structure in which the electrode pad 2 is surrounded by the opening 3 as shown in FIG. This can be achieved by forming a wiring (not shown) or a semiconductor device and a contact plug (not shown).

  However, in general, it is more convenient in the inspection or the like to perform wiring that performs two-dimensional electrical connection. Therefore, if possible, within the region of the opening 3 as shown in FIG. A structure in which the electrode pad 2 is formed over the entire region in the scribe line direction is desirable.

  As shown in FIGS. 1A to 1D, in the measurement unit 4, the opening 3 can be formed regardless of the position and shape of the electrode pad 2. 1A to 1D are examples of the present invention, and can be formed in various other variations. For example, the electrode pad 2 may have a circular shape or a polygonal shape. Similarly, the shape of the opening 3 may be circular or polygonal, for example.

  FIG. 2 shows a schematic cross-sectional view taken along line AA of FIG. There is a semiconductor substrate 11 on which elements such as transistors are formed. First, the structure of the region where the measurement unit 4 is not formed will be described.

  A polycrystalline silicon layer or a silicon nitride layer 12 is formed on the semiconductor substrate 11. A first insulating layer 13 is formed on the polycrystalline silicon layer 12. A second insulating layer 15 is formed on the first insulating layer 13, and a third insulating layer 16 is formed thereon.

  Next, the structure of the measurement unit 4 will be described. First, the electrode pad 2 is formed near the central portion on the first insulating layer 13. The opening 3 is opened larger than the electrode pad 2, and the first insulating layer 13 is formed below the surface on which the electrode pad 2 is formed. A desired semiconductor device or the like is measured by bringing the probe needle 5 into contact with the electrode pad 2 as shown in FIG. Since the tip diameter of the probe needle 5 is larger than the width of the opening 3, the position accuracy of the probe needle can be measured with the conventional technique.

  Next, the manufacturing process of the structure of the measuring unit 4 in the present invention will be described with reference to FIGS. FIG. 3A shows a silicon substrate 11 having an insulating layer 11 a in the region of the scribe line 1.

  FIG. 3B shows an etching stop layer forming step. Polycrystalline silicon is formed as the etching stop layer 12. The polycrystalline silicon layer 12 is formed by a thermal CVD (Chemical Vapor Deposition) method. After the formation of the polycrystalline silicon layer 12, a pattern is formed by the photolithography method and the dry etching method so that the polycrystalline silicon layer 12 remains below the measurement unit 4. Here, when the etching stop layer 12 is formed of a polycrystalline silicon layer, it can be used as an electrical wiring.

  A silicon nitride layer can be formed as the etching stop layer 12. The silicon nitride layer 12 is formed by PECVD (Plasma Enhanced Chemical Vapor Deposition). Therefore, when the etching stop layer 12 is formed of a silicon nitride layer, since high temperature heat is not applied in the formation process, there is an advantage that there is no possibility of deterioration even if an electrical wiring made of aluminum is formed below the insulating layer 11a. is there.

  FIG. 3C shows the first insulating layer forming step. In the present embodiment, a silicon oxide layer is used as the first insulating layer 13. The first silicon oxide layer 13 is formed by PECVD.

  FIG. 4A shows a metal layer forming step. The metal layer 14 is a layer for forming the electrode pad 2, and aluminum is used in this embodiment. The aluminum layer 14 is formed by a sputtering method. The aluminum layer 14 is formed with a thickness of about 800 nm.

  FIG. 4B shows an electrode pad forming process. Formation of the electrode pad 2 is performed as follows. First, a photoresist (not shown) is formed on the aluminum layer 14 to be the electrode pad 2 shown in FIG. Next, a photoresist pattern is formed by a photolithography method, and a photoresist is left in a portion to be left as the electrode pad 2. Next, the aluminum layer 14 is removed by a dry etching method. The photoresist serves as a mask, the metal layer 14 formed under the photoresist remains, and the remaining metal layer 14 serves as the electrode pad 2. Here, a wiring layer different from the electrode pad 2 may exist. However, the width of the wiring layer must not exceed the width of the electrode pad 2 with respect to the width direction of the scribe line.

  FIG. 4C shows a second insulating layer forming step. In the present embodiment, a silicon oxide layer is used as the second insulating layer 15. The first silicon dioxide layer 15 is formed by PECVD. The thickness of the first silicon dioxide layer 15 is about 500 to 1000 nm.

  FIG. 5A shows a third insulating layer forming step. In the present embodiment, a silicon nitride layer is used as the third insulating layer 16. The silicon nitride layer 16 is formed by PECVD. The silicon nitride layer 16 is formed with a thickness of about 400 nm.

  The silicon dioxide layer 15 as the second insulating layer and the silicon nitride layer 16 as the third insulating layer function as a surface protective layer of the silicon substrate 11. The silicon nitride layer 16 is a material excellent in moisture resistance, but its adhesion to other materials is not so strong because the stress in the layer is strong. Therefore, there is a concern that it is easy to peel off. On the other hand, the silicon dioxide layer 15 has relatively good adhesion, but the moisture resistance is slightly inferior to the silicon nitride layer 16. Therefore, the surface protection layer has a double structure of the silicon dioxide layer 15 and the silicon nitride layer 16 to improve the functions of adhesion and moisture resistance.

  FIG. 5B shows a photoresist pattern forming process. The pattern formation of the photoresist 17 is performed as follows. First, a photoresist 17 is formed on the silicon nitride layer 16. Next, a pattern of the photoresist 17 is formed by photolithography. The pattern of the photoresist 17 is formed by removing the portion of the photoresist where the opening 3 is to be formed. The opening 17a of the photoresist is formed above the electrode pad 2 at a desired position, here, larger than the short side of the electrode pad 2.

  FIG. 5C shows the opening forming step. The opening 3 is formed using a dry etching method. In accordance with the shape of the opening 17a of the photoresist 17, the silicon nitride layer 16 and the silicon dioxide layer 15 are removed. At this time, the electrode pad 2 is not removed under the dry etching conditions of the silicon dioxide layer 15, but a part of the first silicon oxide layer 13 is removed. If the bottom surface of the opening 3 is formed to such an extent that the surface of the electrode pad 2 appears, it is possible to make contact with the probe needle 5 to be used later when performing electrical measurement. Therefore, the etching may be originally stopped at the silicon dioxide layer 15. However, since the second insulating layer 15 and the first insulating layer 13 are the same silicon oxide layer, it is difficult to stop the etching with the second insulating layer 15. That is, not a few over-etching phenomena occur up to the first insulating layer 13. Therefore, the polycrystalline silicon or silicon nitride etching stop layer 12 formed at the beginning serves to prevent the silicon substrate from being exposed by overetching. Since the etching can be prevented from proceeding to the polycrystalline silicon or silicon nitride layer in a normal etching state, the cross-sectional shape as shown in FIG.

  However, the formation of the cross-sectional shape as shown in the figure has the following advantages in performing electrical measurement of the semiconductor device. That is, when the probe needle 5 enters the region of the opening 3, it is the electrode pad 2 that contacts the probe needle 5 first. This provides the same effect as when the electrode pad 2 is entirely formed on the bottom surface of the opening 3 which is the structure of the conventional measurement unit 4 as shown in FIG. Therefore, the electrical measurement of the semiconductor device can be performed almost certainly.

  FIG. 6 illustrates a probe method using the measurement unit 4. FIGS. 2A and 2B are sectional views of the measurement unit 4 shown in FIG. In FIG. 2A, the probe needle 5 for measuring is in contact with the left side surface of the opening 3. In FIG. 2B, the probe needle 5 is in contact with the right side surface of the opening 3. Thus, even if the probe needle 5 is displaced to the maximum in the opening 3, the probe needle 5 is in contact with the electrode pad 2, so electrical measurement of the semiconductor device or the like through the electrode pad 2 is performed. It can be carried out. As shown in FIGS. 6 (a) and 6 (b), in order to ensure measurement even if the probe needle 5 is displaced to the maximum extent within the region of the opening 3, the opening 3 It is necessary to consider the size of the region and the diameter of the tip of the probe needle 5. First, the diameter of the tip of the probe needle 5 is determined. The opening 3 is formed so that the electrode pad 2 falls within the range including the central portion thereof. Further, the size of the opening 3 is formed so as to be in contact with the electrode pad 2 even when the probe needle 5 is in contact with the side surface of the opening 3.

  For example, the initial value of the diameter of the tip of the probe needle 5 is 30 μm. Note that the diameter of the tip of the probe needle 5 is worn by use and becomes about 40 μm. The width of the scribe line 1 is about 150 μm. The structure of the measurement part 4 formed on the scribe line 1 is the structure of FIG. The length of the opening 3 in the width direction of the scribe line 1 is formed at 60 μm. The electrode pad 2 is formed with a length of 30 μm in the width direction of the scribe line 1. When the measurement unit 4 is formed with such a structure and size, the electrode pad 2 and the probe needle 5 can be reliably brought into contact with each other if the entire tip of the probe needle 5 enters the region of the opening 3.

  When the diameter of the tip of the probe needle 5 is 30 μm and the length of the opening 3 in the width direction of the scribe line 1 is 60 μm, the length of the electrode pad 2 in the width direction of the scribe line 1 is further reduced. For example, it can be formed at 20 μm. Theoretically, the electrode pad 2 can be measured if it has a finite size in the direction.

  Therefore, when dicing the silicon substrate 11 to make a semiconductor device into chips, the electrode pad 2 formed on the scribe line 1 can be formed smaller in the width direction of the scribe line 1, so that dicing is performed during dicing. The electrode pad 2 can be cut off almost completely by the blade. Further, a dicing blade used for dicing the silicon substrate 11 can be used with a thin blade thickness. The dicing blade can be diced more neatly when a thin one is used. Therefore, defects due to the dicing process such as chip chipping can be reduced.

  In addition, since the size of the electrode pad 2 in the width direction of the scribe line 1 can be reduced, the width of the scribe line 1 can be reduced. By forming the scribe line 1 with a small width, the effective area of the silicon substrate 11 on which the semiconductor device is formed can be increased. As a result, the number of chips taken per silicon substrate can be improved.

  The size of the electrode pad 2 in the width direction of the scribe line 1 is actually 10 μm or more and 60 μm or less. The thickness is desirably 15 μm or more and 50 μm or less, and more desirably 20 μm or more and 40 μm or less. If the size of the electrode pad 2 is less than 10 μm, the electrode pad 2 is too small, and contact failure with the probe needle 5 is liable to occur. In addition, if it is larger than 60 μm, it is necessary to make the opening 3 larger correspondingly. Therefore, the scribe line 1 must be formed wide, resulting in a reduction in the effective area of the chip as a product.

  The size of the opening 3 in the width direction of the scribe line 1 is 40 μm or more and 100 μm or less in length. Desirably, it is 45 μm or more and 80 μm or less, and more desirably 50 μm or more and 70 μm or less. When the opening 3 is less than 50 μm, it is difficult to adjust the position of the probe needle 5 within the region of the opening 3. Further, as the probe needle 5 continues to be used, the tip of the probe needle 5 is worn out and becomes larger, so that there is a high possibility that alignment of the opening 3 and the probe needle 5 becomes difficult. If the size of the opening 3 is larger than 100 μm, the width of the scribe line 1 must be increased accordingly. This is not so preferable because the effective area of the chip as a product in the silicon substrate 11 is reduced.

  When the positional deviation of the probe needle 5 is small, the diameter of the probe needle 5 and the size and positional relationship of the electrode pad 2 and the opening 3 in the measurement unit 4 can be relaxed as in the above example. One example of relatively mitigating the displacement of the probe needle 5 is to increase the diameter of the tip of the probe needle 5. In this way, if a part of the electrode pad 2 exists in the opening 3, measurement is possible by adjusting the position of the probe needle 5 aiming at the position. To explain with a simple example, it is assumed that the opening 3 has a square shape and the length of one side thereof is 50 μm. And when the diameter of the tip part of the probe needle 5 is 30 μm, the measurement failure is usually difficult to occur. If a probe needle 5 having a larger diameter at the tip is used, measurement errors can be further reduced.

  In the above case, if the electrode pad 2 is formed in the region of the opening 3 within the range of the diameter of the tip of the probe needle 5 in a state where the probe needle 5 is in contact with the side wall of the opening 3, Measurement can be performed reliably. Therefore, measurement defects can be reduced.

  Accordingly, the electrode pad 2 can be formed small even with the measuring unit 4 shown in FIGS. 1B to 1D, and thus defects due to the residue of the electrode pad 2 are reduced after mounting. be able to.

The effect of this embodiment is described below.
(1) By forming the opening 3 larger than the electrode pad 2 in the width direction of the scribe line 1, the electrode pad 2 can be formed smaller than the width direction of the scribe line 1. Therefore, the residue of the electrode pad 2 can be reduced during dicing.
(2) Since the electrode pad 2 can be formed small, the scribe line 1 can be made small. As a result, the effective area of the chip can be increased. Therefore, it is possible to increase the yield rate of chips per silicon substrate.
(3) The degree of freedom of the position where the opening 3 is formed in the measurement unit 4 is increased. Thereby, the freedom degree of design of the measurement part formed on the scribe line 1 increases.
(4) Since the polycrystalline silicon layer or the silicon nitride layer is formed as the etching stop layer 12 on the base, the silicon substrate 11 is prevented from being exposed by overetching by dry etching in the step of forming the opening 3. Can do.
(5) When the probe needle 5 enters the region of the opening 3 at the time of electrical measurement by forming the bottom surface of the opening 3 where the electrode pad 2 is not formed so that the electrode pad 2 appears to the side surface, Since the electrode pad 2 is in contact with the semiconductor device, electrical measurement of the semiconductor device can be reliably performed.
(6) A dicing blade having a thin blade thickness used for dicing can be used. When the dicing blade is thin, the silicon substrate can be diced cleanly. Therefore, defects due to the dicing process such as chip chipping can be reduced.
(7) If the diameter of the probe needle 5 is made large enough to enter the opening 3, the measurement can be performed more reliably and measurement defects can be reduced.
(8) Since the electrode pad 2 is formed in the region of the opening 3 within the range of the diameter of the tip of the probe needle 5, the measurement can be performed more reliably.
(9) The opening 3 is formed so that the electrode pad 2 falls within the range including the center thereof, and the size of the opening 3 is the same as that of the electrode pad 2 even when the probe needle 5 is in contact with the side surface of the opening 3. The measurement can be performed more reliably by forming the size so as to be in contact. Thereby, measurement defects can be reduced.
(10) The size of the electrode pad 2 with respect to the width direction of the scribe line 1 is actually 10 μm or more and 60 μm or less, so that the electrode pad 2 can be cut off almost surely during dicing, and defects after mounting are reduced. Can be reduced.
(11) By setting the length of the opening 3 in the width direction of the scribe line 1 to a length of 40 μm or more and 100 μm or less, it is possible to have an opening area enough for the probe needle 5 to enter. Further, the area of the scribe line 1 can be prevented from increasing.

  The embodiment of the present invention is not limited to the above, and may be modified as follows.

  (Modification 1) Although the third insulating layer is formed in the method for forming the measurement part of this embodiment, the third insulating layer may not be formed. Depending on the method of use of the device formed on the semiconductor substrate, etc., the environmental resistance may be sufficiently compensated by only one layer of the second insulating layer, for example, only the silicon oxide layer. Further, by using other useful materials, it may be possible to further guarantee the environmental resistance.

  (Modification 2) In the present embodiment, the electrode pad is formed in a range including the central portion in the width direction of the scribe line, but the present invention is not limited thereto. That is, even if it is not the center part of a scribe line, the electrode pad and opening part which are the measurement parts of this invention can be formed. Further, by adjusting the thickness of the dicing blade and the position of dicing when dicing, the electrode pad can be cut off when forming a chip.

  (Modification 3) In this embodiment, the electrode pad is formed of the uppermost metal layer, but the same function can be realized by a metal layer that is not the uppermost layer. Therefore, the electrode pad of the present invention is not limited to the uppermost metal layer.

  (Modification 4) In the present embodiment, the electrode pad is formed of a single layer of metal. However, since the same function can be realized even in a shape in which a plurality of layers of metal are connected by via holes, there are a plurality of electrode pads of the present invention. It may be formed of a metal layer.

  The technical idea derived from the above embodiment will be described below.

  (1) The semiconductor substrate according to any one of claims 1 to 6, wherein a size of the opening in a width direction of the scribe line is 40 μm or more and 100 μm or less.

  According to this configuration, when the size of the opening in the width direction of the scribe line is less than 40 μm, it is difficult to align the position of the probe needle within the opening. Further, as the probe needle continues to be used, the tip of the probe needle wears and the tip diameter increases, so that there is a high possibility that alignment of the opening and the probe needle becomes difficult. Further, when the size of the opening in the width direction of the scribe line is larger than 100 μm, the scribe region must be widened accordingly. This is not preferable because the effective area of the chip as a product in the semiconductor substrate is reduced.

  (2) The semiconductor substrate according to any one of claims 1 to 6, wherein a length of a scribe line in the electrode pad in a width direction is 10 μm or more and 60 μm or less.

  According to this configuration, if the length of the scribe line in the width direction of the electrode pad is less than 10 μm, the electrode pad is too small, and contact failure with the probe needle is likely to occur. In addition, when the length of the scribe line in the width direction of the electrode pad is larger than 60 μm, the opening must be formed correspondingly. Therefore, the scribe region must be formed widely, and as a result, the effective area of the chip as a product is reduced.

  (3) An etching stop layer forming step of forming a polycrystalline silicon layer or a silicon nitride layer as an etching stop layer on the insulating layer, which is a semiconductor substrate on which an insulating layer having a scribe line is formed, and the etching A first insulating layer forming step of forming a first insulating layer on the stop layer; a metal layer forming step of forming a metal layer for an electrode pad on the first insulating layer; and patterning the metal layer. Forming an electrode pad, forming a second insulating layer on the semiconductor substrate on which the electrode pad is formed, and at least one forming the electrode pad. An opening forming step of forming an opening by removing the third insulating layer and the second insulating layer in the region including the opening, and the opening forming step includes the electrode in the opening The method of manufacturing a semiconductor device region head is not formed is formed such that there.

  According to this method, the opening can be formed larger than the electrode pad formed in the scribe region. Therefore, when this opening is formed in a normal size, the electrode pad can be formed relatively small. Thus, if a dicing blade having a width larger than the size of the electrode pad in the dicing direction is used, the electrode pad can be completely cut off. Further, the scribe region can be formed small by reducing the electrode pad. Therefore, since the area that can be used as a product in the semiconductor substrate increases, an effect of increasing the number of chips that can be manufactured per semiconductor substrate is obtained. Further, since it is not necessary to form the opening in accordance with the shape of the electrode pad as in the prior art, the opening can be formed at an arbitrary position within the conditions. Therefore, there is an effect that the degree of freedom in layout design of the opening is increased.

  (4) In the method of manufacturing a semiconductor device according to (3), the opening forming step is performed so that a region where the electrode pad is not formed exists in the opening, and the electrode pad is formed. A method for manufacturing a semiconductor substrate, wherein a part of the semiconductor substrate is formed so as to exist in the center of the opening.

  According to this method, in the formation of the opening of the electrode pad, the probe needle can be aligned with the center of the opening during inspection by forming the opening so that at least a part of the electrode pad exists at the center of the opening. For example, since the tip of the probe needle has a certain size, measurement can be performed even if the position of the probe needle is slightly deviated.

  (5) The method for manufacturing a semiconductor device according to (3) or (4), wherein the opening forming step includes a tip diameter of a probe needle for measuring the electrode pad from a side wall surface of the opening. A method for manufacturing a semiconductor device, wherein a part of the electrode pad is present within the range.

  According to this method, if the position is adjusted so that the entire tip of the probe needle used for measuring the electrode pad enters an arbitrary position in the opening, the electrode pad exists within the range of the probe needle tip diameter. Therefore, the electrical characteristics of the semiconductor device formed on the semiconductor substrate can be measured more reliably.

  (6) The semiconductor device according to any one of claims 1 to 7, wherein the opening is rectangular.

  (7) The semiconductor device according to any one of claims 1 to 7, wherein the electrode pad is rectangular.

(A)-(d) is a plane structure figure of an electrode pad in an embodiment of the present invention. The structure sectional view of the electrode pad in this embodiment. (A)-(c) is process sectional drawing which shows the manufacturing process of the electrode pad of this embodiment. (A)-(c) is process sectional drawing which shows the manufacturing process of the electrode pad of this embodiment. (A)-(c) is process sectional drawing which shows the manufacturing process of the electrode pad of this embodiment. (A), (b) is sectional drawing which shows an example of the measuring method in this embodiment. FIG. 6 is a plan view of a conventional electrode pad.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Scribe line, 2 ... Electrode pad, 3 ... Opening part, 4 ... Measuring part, 5 ... Probe needle, 11 ... Semiconductor substrate in which the insulating layer which has a scribe line was formed, 11a ... Insulating layer, 12 ... Etching stop layer DESCRIPTION OF SYMBOLS 13 ... Silicon oxide layer as a 1st insulating layer, 14 ... Aluminum layer as a metal layer, 15 ... Silicon oxide layer as a 2nd insulating layer, 16 ... Silicon nitride layer as a 3rd insulating layer, 17 ... Photoresist .

Claims (16)

An electrode pad formed on a scribe line formed on a semiconductor substrate;
A semiconductor substrate comprising: an opening formed in the scribe line and overlying the previous electrode pad and having a wider opening in the width direction of the scribe line than the electrode pad. The semiconductor substrate according to claim 1,
A semiconductor substrate formed such that a part of the electrode pad exists in the center of the opening. A semiconductor substrate according to claim 1 or 2,
The opening is a semiconductor substrate formed such that a part of the electrode pad exists within a range of a probe needle tip diameter for measuring the electrode pad from a side wall surface of the opening. A semiconductor substrate according to any one of claims 1 to 3,
A semiconductor substrate formed such that a width of the electrode pad is shorter than a width of the opening in the width direction of the scribe line. A semiconductor substrate according to any one of claims 1 to 4,
The semiconductor substrate is formed so that the electrode pad is positioned substantially at the center in the width direction of the scribe line. A semiconductor substrate according to any one of claims 1 to 5,
The semiconductor substrate, wherein the electrode pad is formed so as to be positioned substantially at the center in the width direction of the opening. A semiconductor substrate according to any one of claims 1 to 6,
The electrode pad is a semiconductor substrate formed over substantially the entire region in the line direction of the scribe line in the opening. A semiconductor substrate according to any one of claims 1 to 7,
A semiconductor substrate in which a bottom surface of the opening in which the electrode pad is not formed is formed below a height of a surface of the electrode pad. A semiconductor substrate according to any one of claims 1 to 8,
A semiconductor substrate in which a polycrystalline silicon layer or a silicon nitride layer is formed below a region for forming the opening.   A semiconductor device manufactured from the semiconductor substrate according to claim 1. A semiconductor substrate on which an insulating layer having a scribe line is formed,
An etching stop layer forming step of forming a polycrystalline silicon layer or a silicon nitride layer as an etching stop layer on the insulating layer;
A first insulating layer forming step of forming a first insulating layer on the etching stop layer;
Forming a metal layer for the electrode pad on the first insulating layer; and
Forming an electrode pad by patterning the metal layer; and
A second insulating layer forming step of forming a second insulating layer on the semiconductor substrate on which the electrode pads are formed;
A third insulating layer forming step of forming a third insulating layer on the second insulating layer;
An opening forming step of forming an opening by removing the third insulating layer and the second insulating layer in a region including at least a part where the electrode pad is formed;
Have
The opening forming step is a method of manufacturing a semiconductor substrate, wherein the opening is formed so that a region where the electrode pad is not formed exists in the opening. A method for manufacturing a semiconductor device according to claim 11, comprising:
In the opening forming step, the opening is formed so that a region where the electrode pad is not formed exists in the opening, and a part of the electrode pad exists in the center of the opening. A method for manufacturing a semiconductor substrate. A method of manufacturing a semiconductor device according to claim 11 or 12,
The opening forming step includes forming the opening so that a part of the electrode pad exists within a range of a probe needle tip diameter for measuring the electrode pad from a side wall surface of the opening. A method for manufacturing a substrate. A measurement method of a semiconductor device that performs electrical measurement using an electrode pad formed on a scribe line,
The opening that is opened to measure the electrode pad is formed so that there is a region where the electrode pad is not formed, and the electrode pad is present at the center of the opening. Is formed,
A measurement method of a semiconductor device, wherein the electrode pad existing in the opening is measured with a probe needle. A measurement method of a semiconductor device that performs electrical measurement using an electrode pad formed on a scribe line,
The opening formed to measure the electrode pad is formed so that there is a region where the electrode pad is not formed, and the electrode pad is measured from the side wall surface of the opening. Is formed so that a part of the electrode pad exists within the range of the probe needle tip diameter for
A method for measuring a semiconductor device, wherein the electrode pad is measured with a probe needle having a diameter equal to or greater than the diameter of the tip of the probe needle. 16. The semiconductor device according to claim 14 or 15, wherein the probe needle can come into contact with the electrode pad when the probe needle abuts on either side of the opening in the width direction of the scribe line. A method for measuring a semiconductor device set to 1.

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