JP2005079991A - Radio receiving circuit and radio apparatus including the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a low-cost and small-sized radio receiving circuit and a radio apparatus including the same, which satisfy reception sensitivity and anti-jamming characteristics without using an RF filter.
A radio reception circuit in a radio apparatus includes a first RF amplifier circuit having low noise characteristics and a second RF amplifier circuit having anti-intermodulation distortion characteristics. The signal level of the received signal received by the antenna 10 is detected by the RSSI circuit included in the FSK demodulation circuit 42. When the level of the received signal is equal to or lower than the predetermined level, the first RF amplifier circuit 30 is selected by the selection switches 34 and 36. When the level of the received signal is higher than the predetermined level, the selection switches 34 and 36 The second RF amplifier circuit 32 is selected.
[Selection] Figure 1

Description

  The present invention relates to a radio reception circuit and a radio apparatus including the same, and more particularly to a radio reception circuit in a 400 MHz band specific low power radio and a radio apparatus including the radio reception circuit.

  The 400 MHz band specific low-power radio has received high evaluation in terms of reach and reliability in the field of low-speed data communication, while being low-power, and has a radio wave usage fee and basic requirements for other wireless communication systems. Since there is no running cost such as a usage fee, it is used in various fields taking advantage of these advantages.

  FIG. 12 is a functional block diagram showing a configuration of a main part of a conventional radio receiving circuit 100 used in a 400 MHz band specific low power radio apparatus.

  Referring to FIG. 12, radio receiving circuit 100 includes an RF (Radio Frequency) filter 104, an RF amplifier circuit 106, a voltage controlled oscillator (hereinafter also referred to as “VCO”) 108, and a mixer 110. IF (Intermediate Frequency) filter 112 and FSK (Frequency Shift Keying) demodulation circuit 114.

  In this wireless receiving circuit 100, the received signal in the 400 MHz band received by the antenna 102 is subjected to removal of unnecessary frequency band signals by an RF filter 104 such as a SAW (Surface Acoustic Wave) filter having narrow band characteristics. The signal is amplified by the RF amplifier circuit 106 with low noise. Thereafter, the signal output from the RF amplifier circuit 106 is mixed with the local oscillation signal output from the VCO 108 by the mixer 110, and frequency-converted to an intermediate frequency. The signal output from the mixer 110 is filtered by the IF filter 112, demodulated into a baseband signal by the FSK demodulation circuit 114, and output as received data.

  In the 400MHz band specific low power radio, there is an amateur radio band (430MHz ~) in the vicinity, so a general BPF (Band Pass Filter) composed of an LC circuit or the like cannot be used as the RF filter 104. A SAW filter having a narrow band characteristic, which is more excellent in anti-jamming characteristics, has been conventionally used as the RF filter 104. The SAW filter is a filter that uses surface acoustic waves that propagate on the surface of the piezoelectric body.

  Here, an RF filter having a narrow band characteristic such as a SAW filter has a large loss in spite of its characteristic. Since the reception sensitivity of the radio reception circuit is substantially determined by a noise figure (NF: Noise Figure) in the RF stage (before being converted to the IF frequency by the mixer 110), the reception sensitivity is placed in front of the RF amplification circuit 106 having low noise characteristics. If a SAW filter with a large loss is provided, the loss due to the SAW filter is added to the noise figure. Since the loss of the pass band in the SAW filter is generally several dB (decibel), the reception sensitivity is greatly deteriorated in the radio reception circuit 100 shown in FIG. Therefore, a radio receiving circuit as shown in FIG. 13 is also generally known.

  FIG. 13 is a functional block diagram showing another configuration of the main part of the conventional radio receiving circuit 100A used in the 400 MHz band specific low-power radio apparatus.

  Referring to FIG. 13, radio receiving circuit 100A has a configuration in which RF filter 104 and RF amplifying circuit 106 are replaced in the configuration of radio receiving circuit 100 shown in FIG. Other configurations of the wireless reception circuit 100A are the same as those of the wireless reception circuit 100.

  In this radio reception circuit 100A, by providing the RF filter 104 at the subsequent stage of the RF amplifier circuit 106 having low noise characteristics, it is possible to ensure a certain level of anti-jamming characteristics without greatly reducing the reception sensitivity.

  However, in this radio reception circuit 100A, since an RF filter is not provided in the previous stage of the RF amplification circuit 106 having nonlinearity, when the level of the reception signal is high, the signal of the intermodulation distortion component is generated in the RF amplification circuit 106. It occurs remarkably. Intermodulation distortion means that when two signals having different frequencies are input to a non-linear circuit such as an amplifier circuit, a signal of a non-harmonic component of the input signal (generally referred to as “intermodulation product”) is output. A phenomenon included in a signal.

  When the frequencies of the two input signals are close to each other, a third-order intermodulation product having a frequency close to the frequency of the input signal is generated, so that the intermodulation product can no longer be removed by the subsequent RF filter 104. In the 400 MHz band specific low power radio, radio stations are densely populated and, as described above, there is an amateur radio band in the vicinity, so a non-target signal having a frequency band close to the target signal is received together with the target signal. By doing so, an interference wave due to an intermodulation product very close to the frequency band of the target signal is likely to be generated.

  On the other hand, a non-patent document 1 discloses a radio receiving circuit obtained by improving the radio receiving circuits 100 and 100A.

  FIG. 14 is a functional block diagram illustrating a configuration of a main part in the wireless reception circuit 100B used in the 400 MHz band specific low-power wireless device described in Non-Patent Document 1.

  Referring to FIG. 14, this radio reception circuit 100 </ b> B includes a first RF filter 104 </ b> A provided in the previous stage of the RF amplification circuit 106 and a second RF filter 104 </ b> B provided in the subsequent stage of the RF amplification circuit 106. As the first and second RF filters 104 </ b> A and 104 </ b> B, SAW filters having a narrow band characteristic are used similarly to the RF filter 104 described above. Other configurations of the radio reception circuit 100B are the same as those of the radio reception circuit 100 illustrated in FIG.

  This radio reception circuit 100B includes a SAW filter divided into two parts before and after the RF amplification circuit 106, and the first RF filter 104A in the previous stage of the RF amplification circuit 106 has interference waves such as the image frequency and the above-described amateur radio band. And the image frequency noise at the output of the RF amplifier circuit 106 is removed by the second RF filter 104B subsequent to the RF amplifier circuit 106. As a result, it is possible to achieve reception sensitivity and anti-jamming characteristics equal to or higher than those of the radio reception circuits 100 and 100A shown in FIGS.

As a radio reception circuit used for specific low-power radio, a double conversion type and a direct conversion type are also disclosed in Patent Document 1 (see, for example, Patent Document 1).
JP-A-8-8775 Yoshikawa Yoshimo, two others, “Micro RF Unit”, Matsushita Technical Journal, Matsushita Electric Industrial Co., Ltd., February 2001, Volume 47, Volume 1, p. 84-90

  In the radio reception circuit 100 shown in FIG. 12, since an RF filter such as a SAW filter is provided in front of the RF amplifier circuit 106 in order to improve the anti-jamming characteristics, the reception sensitivity is greatly deteriorated as described above.

  On the other hand, in the radio reception circuit 100A shown in FIG. 13, an RF filter is provided at the subsequent stage of the RF amplification circuit 106 in order to ensure reception sensitivity, but no filter is provided at the previous stage of the RF amplification circuit 106. When the level of the target signal is high, an interfering product interference wave appears remarkably in the RF amplifier circuit 106. The third-order intermodulation product included in the frequency band of the target signal can no longer be removed even if a SAW filter having a narrow band characteristic is provided in the subsequent stage.

  The radio reception circuit 100B shown in FIG. 14 is useful because it has improved the problems of the radio reception circuits 100 and 100A, but the SAW filter is expensive and cannot be built in an IC. Therefore, this circuit including two SAW filters increases the cost and hinders downsizing of the radio reception circuit and the radio apparatus including the radio reception circuit. Furthermore, even if a sufficient attenuation characteristic is obtained with one SAW filter, the attenuation characteristic may be deteriorated if sufficient isolation between the two SAW filters cannot be obtained.

  Even in the conventional radio reception circuit using the double conversion method or the direct conversion method described above, a filter having a narrow band characteristic such as a SAW filter is used for the RF filter in order to have sufficient anti-jamming characteristics. It occurs in the same way.

  Accordingly, the present invention has been made to solve the above-described problems, and an object of the present invention is to satisfy a reception sensitivity and an anti-jamming characteristic without using an RF filter, and to achieve a low-cost and small-sized radio reception circuit. Is to provide.

  Another object of the present invention is to provide a wireless device that satisfies reception sensitivity and anti-jamming characteristics without using an RF filter, and includes a small-sized wireless receiving circuit at low cost.

  According to the present invention, the radio reception circuit includes the first radio frequency amplification circuit that amplifies the reception signal in the radio frequency band with low noise when the level of the reception signal is equal to or lower than the predetermined level, and the level of the reception signal is predetermined. A second radio frequency amplification circuit that amplifies the reception signal in the radio frequency band while suppressing intermodulation distortion between the target signal and the non-target signal included in the reception signal.

  Preferably, the first radio frequency amplifier circuit is inactivated when the level of the received signal is higher than a predetermined level, and the second radio frequency amplifier circuit is set when the level of the received signal is equal to or lower than the predetermined level. Is inactivated.

  Preferably, the radio reception circuit further includes a level detection circuit for detecting a level of the reception signal, and a comparison circuit for comparing the detected level with a predetermined level, and each of the first and second radio frequency amplification circuits. Is selected according to the comparison result by the comparison circuit.

  Preferably, the level detection circuit is an RSSI circuit.

  Preferably, the radio reception circuit converts the signal output from the first or second radio frequency amplification circuit to a predetermined intermediate frequency, and amplifies the signal output from the frequency conversion circuit to detect the level. An intermediate frequency amplifying circuit for outputting to the circuit; and a connection switch provided in parallel to the intermediate frequency amplifying circuit, and when the smaller one of the first and second radio frequency amplifying circuits is selected, the intermediate frequency When the amplifier circuit is activated and the larger one of the first and second radio frequency amplifier circuits is selected, the connection switch connects the input node of the intermediate frequency amplifier circuit to the output node of the intermediate frequency amplifier circuit. The intermediate frequency amplifier circuit is deactivated.

  Preferably, the intermediate frequency amplifier circuit has a gain composed of an absolute value of a gain difference between the first and second radio frequency amplifier circuits.

  Preferably, the radio reception circuit further includes a switching circuit that selects one of the first and second radio frequency amplifier circuits according to a comparison result by the comparison circuit.

  Preferably, the radio reception circuit further includes a switching circuit that selects either the first or second radio frequency amplifier circuit according to a control signal received from the outside.

  Preferably, the first radio frequency amplifier circuit includes a first differential amplifier circuit having a first emitter feedback resistor, and the second radio frequency amplifier circuit has a second emitter feedback resistor having a second emitter feedback resistor. A differential amplifier circuit is included, and the first emitter feedback resistor is smaller than the second emitter feedback resistor.

  Further, according to the present invention, when the level of the received signal is equal to or lower than the predetermined level, the wireless receiving circuit amplifies the received signal in the radio frequency band with low noise, and the received signal level is higher than the predetermined level. And a radio frequency amplifier circuit that amplifies the received signal in the radio frequency band while suppressing intermodulation distortion between the target signal and the non-target signal included in the received signal.

  Preferably, the radio frequency amplifier circuit includes a differential amplifier circuit, and the differential amplifier circuit includes an emitter feedback resistor and a connection switch provided in parallel to the emitter feedback resistor, and the connection switch has a level of a received signal. When below a predetermined level, one end of the emitter feedback resistor is connected to the other end.

  Preferably, the connection switch includes a field effect transistor.

  According to the present invention, a wireless device includes any of the wireless reception circuits described above and a wireless transmission circuit that transmits a signal from an antenna during a transmission operation.

  According to the present invention, the first radio frequency amplifier circuit having low noise characteristics and the second radio frequency amplifier circuit having anti-intermodulation distortion characteristics are switched and used in accordance with the level of the received signal. In addition, it is possible to realize a low-cost and small-sized radio receiving circuit and a radio apparatus including the same, without receiving an RF filter such as a SAW filter, and satisfying reception sensitivity and anti-jamming characteristics.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In the drawings, the same or corresponding parts are denoted by the same reference numerals and description thereof will not be repeated.

[Embodiment 1]
FIG. 1 is a functional block diagram showing an overall configuration of a radio apparatus 1 according to Embodiment 1 of the present invention.

  Referring to FIG. 1, the wireless device 1 includes an antenna 10, selection switches 12 and 20, a wireless reception circuit 14, a PLL circuit 16, a VCO 18, a power amplifier 22, and a controller 24. The wireless receiver circuit 14 includes a first RF amplifier circuit 30, a second RF amplifier circuit 32, selection switches 34 and 36, a mixer 38, an IF filter 40, an FSK demodulator circuit 42, and a reference variable voltage generator. A circuit 44 and a comparator 46 are included.

  The antenna 10 receives a 400 MHz band radio frequency signal and outputs the received signal to the selection switch 12 during the receiving operation. The antenna 10 transmits a transmission signal received from the selection switch 12 to the outside during a transmission operation.

  The selection switch 12 operates in response to an instruction from the controller 24, outputs a reception signal received from the antenna 10 to the radio reception circuit 14 during a reception operation, and transmits a transmission signal received from the power amplifier 22 to the antenna during a transmission operation. 10 is output.

  The selection switch 34 operates in response to the signal output from the comparator 46. When the output signal from the comparator 46 is at the L (logic low) level, the selection switch 34 receives the reception signal output from the selection switch 12 and receives the first RF signal. When output to the amplifier circuit 30 and the output signal from the comparator 46 is at the H (logic high) level, the reception signal output from the selection switch 12 is received and output to the second RF amplifier circuit 32.

  The first RF amplifier circuit 30 is a radio frequency amplifier circuit having low noise characteristics. The first RF amplifier circuit 30 receives the reception signal output from the selection switch 34 and amplifies the reception signal with low noise, and outputs the amplified reception signal to the selection switch 36.

  The second RF amplifier circuit 32 is a radio frequency amplifier circuit having anti-intermodulation distortion characteristics. The second RF amplifier circuit 32 receives the reception signal output from the selection switch 34, amplifies the received signal with the same gain as the first RF amplifier circuit 30 while suppressing the occurrence of intermodulation products, The amplified received signal is output to the selection switch 36.

  The selection switch 36 operates in conjunction with the selection switch 34 according to the signal output from the comparator 46. When the output signal from the comparator 46 is at L level, the selection switch 36 outputs the signal output from the first RF amplifier circuit 30. When the output signal from the comparator 46 is at H level, the signal output from the second RF amplifier circuit 32 is received and output to the mixer 38.

  The mixer 38 mixes the signal output from the selection switch 36 with the local oscillation signal output from the selection switch 20 and converts the received signal to a predetermined intermediate frequency. The IF filter 40 limits the band of the signal output from the mixer 38 and outputs it.

  The FSK demodulating circuit 42 receives the signal output from the IF filter 40, demodulates the FSK-modulated received signal into a baseband signal, and outputs the demodulated signal to the controller 24 as received data. The FSK demodulation circuit 42 includes an RSSI (Received Signal Strength Indicator) circuit (not shown), detects the level of the output signal from the IF filter 40, and outputs an RSSI signal having a voltage corresponding to the level. To do.

  The reference variable voltage generation circuit 44 generates a reference voltage that serves as a reference when the selection switches 34 and 36 are switched in accordance with the level of the received signal. That is, as will be described later, the first RF amplifier circuit 30 is used when the level of the received signal is equal to or lower than a predetermined level, and the second RF amplifier circuit 32 is used when the level of the received signal is lower than the predetermined level. The reference variable voltage generation circuit 44 generates a reference voltage corresponding to the RSSI voltage when the level of the received signal is the predetermined level.

  The comparator 46 receives the RSSI voltage output from the FSK demodulation circuit 42 and the reference voltage output from the reference variable voltage generation circuit 44, compares the RSSI voltage with the reference voltage, and outputs the comparison result. Specifically, when the RSSI voltage is larger than the reference voltage, the comparator 46 outputs an H level signal, and when the RSSI voltage is lower than the reference voltage, the comparator 46 outputs an L level signal.

  The PLL circuit 16 controls the frequency of the local oscillation signal output from the VCO 18 to a predetermined frequency during the receiving operation. The VCO 18 oscillates and outputs a local oscillation signal having a frequency corresponding to an instruction from the PLL circuit 16. The selection switch 20 operates in accordance with an instruction from the controller 24. During the reception operation, the selection switch 20 receives a local oscillation signal output from the VCO 18 and outputs the local oscillation signal to the mixer 38 of the wireless reception circuit 14.

  On the other hand, during the transmission operation, the PLL circuit 16 receives transmission data from the controller 24 and performs FSK modulation on the transmission data including the baseband signal. The VCO 18 oscillates and outputs a radio frequency transmission signal based on the FSK-modulated transmission data. In response to an instruction from the controller 24, the selection switch 20 receives a transmission signal output from the VCO 18 and outputs it to the power amplifier 22 during a transmission operation.

  During the transmission operation, the power amplifier 22 receives the transmission signal output from the selection switch 20, amplifies the transmission signal, and outputs it. Then, as described above, the selection switch 12 receives the transmission signal output from the power amplifier 22 and outputs it to the antenna 10 in response to an instruction from the controller 24.

  The controller 24 controls the operations of the selection switches 12 and 20 according to the reception operation and the transmission operation. Further, the controller 24 outputs transmission data to the PLL circuit 16 in accordance with the transmission timing during the transmission operation.

  As described above, the PLL circuit 16 and the VCO 18 oscillate a local oscillation signal during the reception operation and output the local oscillation signal to the wireless reception circuit 14, and constitute a “wireless transmission circuit” together with the power amplifier 22 during the transmission operation. The selection switches 34 and 36 constitute a “switching circuit”, and the comparator 46 constitutes a “comparison circuit”.

  The radio apparatus 1 includes a first RF amplifier circuit 30 having low noise characteristics and a second RF amplifier circuit 32 having anti-intermodulation distortion characteristics, and the level of a received signal received by the antenna 10 Is equal to or lower than a predetermined level, the first RF amplifier circuit 30 is selected. When the level of the received signal is higher than the predetermined level, the second RF amplifier circuit 32 is selected. The level determination of the received signal is performed as follows.

  FIG. 2 is a diagram illustrating the voltage level of the RSSI signal with respect to the level of the received signal at the antenna input end.

  Referring to FIG. 2, the horizontal axis represents the level of the received signal at the antenna input terminal, and the vertical axis represents the voltage level (RSSI voltage) of the RSSI signal output from FSK demodulation circuit 42. Using the relationship shown in FIG. 2, the level of the received signal can be detected from the RSSI voltage. The received signal level P1 represents a signal level for switching the first and second RF amplifier circuits 30 and 32, and the voltage V1 is an RSSI voltage corresponding to the received signal level P1.

  Referring again to FIG. 1, the received signal received by the antenna 10 is amplified by one of the first and second RF amplification circuits 30 and 32, and the FSK demodulation circuit 42 is passed through the mixer 38 and the IF filter 40. Is input. The FSK demodulating circuit 42 detects a signal level by an RSSI circuit included therein, and outputs an RSSI voltage corresponding to the signal level to the comparator 46.

  Here, the reference variable voltage generation circuit 44 generates the reference voltage V1 corresponding to the reception signal level P1 that is the switching level of the first and second RF amplifier circuits 30 and 32. The comparator 46 receives the RSSI voltage and the reference voltage V1 output from the FSK demodulation circuit 42 and the reference variable voltage generation circuit 44, respectively, compares the received RSSI voltage with the reference voltage V1, and the RSSI voltage is the reference voltage V1. In the following cases, an L level signal is output, and when the RSSI voltage is higher than the reference voltage V1, an H level signal is output.

  The selection switches 34 and 36 select the first RF amplifier circuit 30 when the signal output from the comparator 46 is at L level, that is, when the level of the received signal is P1 or less. Therefore, when the level of the received signal is equal to or lower than the predetermined level, the reception sensitivity can be ensured by the operation of the first RF amplifier circuit 30 having low noise characteristics.

  On the other hand, when the signal output from the comparator 46 is at the H level, that is, when the level of the received signal is higher than P1, the second RF amplifier circuit 32 is selected. Therefore, when the level of the received signal is higher than a predetermined level, the anti-jamming characteristic can be ensured by the operation of the second RF amplifier circuit 32 having the anti-intermodulation distortion characteristic. When the level of the received signal is high, a sufficient S / N ratio necessary for demodulating the received signal can be ensured, so that low noise characteristics are not required.

  FIG. 3 is a circuit diagram showing a configuration of first and second RF amplifier circuits 30 and 32 shown in FIG.

  Referring to FIG. 3, first RF amplifier circuit 30 includes collector resistors 72 and 74, NPN bipolar transistors 76 and 78, constant current circuits 80 and 82, emitter feedback resistor 84, and input node 92.1. 92.2 and output nodes 94.1, 94.2. Collector resistor 72 is connected between power supply voltage line 88 to which power supply voltage Vcc is applied and node ND1, and collector resistor 74 is connected between power supply voltage line 88 and node ND2. NPN bipolar transistor 76 has a collector, an emitter, and a base connected to node ND1, node ND3, and input node 92.1, respectively. NPN bipolar transistor 78 has a collector, an emitter, and a base connected to node ND2, node ND4, and input node 92.2, respectively. Constant current circuit 80 is connected between node ND3 and ground node 90 to which ground voltage GND is applied, and constant current circuit 82 is connected between node ND4 and ground node 90. The emitter feedback resistor 84 is connected between the node ND3 and the node ND4. Output nodes 94.1 and 94.2 are connected to nodes ND1 and ND2, respectively.

  The second RF amplifier circuit 32 includes an emitter feedback resistor 86 instead of the emitter feedback resistor 84 in the configuration of the first RF amplifier circuit 30. Since the other configuration of second RF amplifier circuit 32 is the same as that of first RF amplifier circuit 30, the description thereof will not be repeated.

  The first and second RF amplifier circuits 30 and 32 are differential amplifier circuits. That is, the voltage difference between the input voltages Vi1 and Vi2 applied to the input nodes 92.1 and 92.2 is amplified, and the output voltages Vo1 and Vo2 formed by the amplified voltage differences are output to the output nodes 94.1, 94., respectively. Output to 2.

  The difference between the first RF amplifier circuit 30 having low noise characteristics and the second RF amplifier circuit 32 having anti-intermodulation distortion characteristics is the resistance values of the emitter feedback resistors 84 and 86. That is, the resistance value of the emitter feedback resistor 84 in the first RF amplifier circuit 30 having low noise characteristics is smaller than the resistance value of the emitter feedback resistor 86 in the second RF amplifier circuit 32 having anti-intermodulation distortion characteristics. Is set to

  In general, the noise figure of a transistor and the collector current are in an inversely proportional relationship, and the noise figure decreases as the collector current is increased. Therefore, in order to reduce the noise figure in the amplifier circuit as shown in FIG. 3, it is necessary to increase the collector current or reduce the emitter feedback resistance. However, since there are various restrictions to increase the collector current, in the first RF amplifier circuit 30 having low noise characteristics, the emitter feedback resistor 84 is made as small as possible and an appropriate collector current flows. Designed as such.

  On the other hand, the anti-modulation distortion characteristic of the amplifier circuit is determined by the product of the collector current and the emitter feedback resistance. The larger the product value, the higher the input intercept point and the better the intermodulation distortion resistance. Therefore, in order to improve the anti-intermodulation distortion characteristic of the amplifier circuit as shown in FIG. 3, it is necessary to increase the collector current or increase the emitter feedback resistance. Here, as described above, since there are various restrictions to increase the collector current, in the second RF amplifier circuit 32 having anti-intermodulation distortion characteristics, the emitter feedback resistor 86 is increased, and It is designed so that an appropriate collector current flows.

  Thus, it is difficult to satisfy the low noise characteristic and the anti-intermodulation distortion characteristic at the same time in the amplifier circuit. However, in the radio reception circuit 14 in the radio apparatus 1, the emitter feedback resistor 84 having a small resistance value is provided. The first RF amplifier circuit 30 having a low noise characteristic including the first RF amplifier circuit 30 and the second RF amplifier circuit 32 having an anti-intermodulation distortion characteristic including the emitter feedback resistor 86 having a large resistance value are selected according to the level of the received signal. By using them, both reception sensitivity and anti-jamming characteristics are achieved.

  In the first RF amplifier circuit 30 described above, the emitter feedback resistor 84 having a small resistance value is provided. However, the nodes ND3 and ND4 may be short-circuited without providing the emitter feedback resistor 84.

  In the above, the RSSI circuit included in the FSK demodulator circuit 42 is used to detect the level of the received signal necessary for switching between the first and second RF amplifier circuits. This RSSI circuit is originally provided for the purpose of carrier sense, but by using the RSSI circuit in this way, it is not necessary to provide a separate level detection circuit. On the other hand, the demodulation circuit may not include an RSSI circuit, and a level detection circuit that detects the level of the received signal may be provided separately.

  As described above, according to the radio apparatus 1 according to the first embodiment, the first and second RF amplifier circuits having appropriate amplification characteristics are selectively switched according to the level of the received signal. Therefore, one of reception sensitivity and anti-jamming characteristics is not hindered. And since this radio | wireless apparatus 1 is not provided with RF filters, such as a SAW filter, it is low-cost and can implement | achieve size reduction.

[Embodiment 2]
The radio apparatus according to the second embodiment includes a radio reception circuit 14A instead of the radio reception circuit 14 in the configuration of the radio apparatus 1 according to the first embodiment shown in FIG. Since other configurations of the radio apparatus according to the second embodiment are the same as those of radio apparatus 1 according to the first embodiment, description thereof will not be repeated.

  FIG. 4 is a functional block diagram showing a configuration of radio reception circuit 14A in the radio apparatus according to Embodiment 2 of the present invention.

  Referring to FIG. 4, radio reception circuit 14 </ b> A includes first and second RF amplification circuits in place of first and second RF amplification circuits 30 and 32 in the configuration of radio reception circuit 14 in the first embodiment. 30A and 32A, and further includes an inverter 48 that outputs a signal obtained by inverting the output signal from the comparator 46 to the first RF amplifier circuit 30A. Since the other configuration of radio reception circuit 14A is the same as that of radio reception circuit 14, the description thereof will not be repeated.

  The first RF amplifier circuit 30A is a radio frequency amplifier circuit having low noise characteristics, similar to the first RF amplifier circuit 30 in the first embodiment. The first RF amplifier circuit 30A is activated when the output signal S1 from the inverter 48 is at H level, that is, when the output signal from the comparator 46 is at L level, and is received from the selection switch 34. The signal is amplified with low noise and output to the selection switch 36. On the other hand, the first RF amplifier circuit 30A is inactivated when the output signal S1 from the inverter 48 is at L level, that is, when the output signal from the comparator 46 is at H level.

  Similar to the second RF amplifier circuit 32 in the first embodiment, the second RF amplifier circuit 32A is a radio frequency amplifier circuit having anti-intermodulation distortion characteristics. When the signal S2 received from the comparator 46 is at the H level, the second RF amplifier circuit 32A is activated, and the reception signal output from the selection switch 34 is reduced to the first RF with the occurrence of intermodulation products suppressed. Amplification is performed with the same gain as that of the amplification circuit 30 </ b> A, and the amplified reception signal is output to the selection switch 36. On the other hand, the second RF amplifier circuit 32A is inactivated when the signal S2 received from the comparator 46 is at L level.

  In the wireless reception circuit 14A, when the level of the reception signal is equal to or lower than the level P1 shown in FIG. 2, the output signal of the comparator 46 becomes L level, so that the first RF amplification circuit 30 is activated. At this time, the second RF amplifier circuit 32 is inactivated. On the other hand, when the level of the received signal is higher than P1, the output signal of the comparator 46 becomes H level, so that the second RF amplifier circuit 32 is activated. At this time, the first RF amplifier circuit 30 is inactivated.

  FIG. 5 is a circuit diagram showing a configuration of first and second RF amplifier circuits 30A and 32A shown in FIG.

  Referring to FIG. 5, first RF amplifier circuit 30A is an NPN bipolar transistor in place of constant current circuits 80 and 82 in the configuration of first RF amplifier circuit 30 in the first embodiment shown in FIG. 95, 96, and further includes a constant current circuit 97, a connection switch 98, and an NPN bipolar transistor 99.

  NPN bipolar transistor 95 has a collector and an emitter connected to node ND3 and ground node 90, respectively, and a base connected to node ND5. NPN bipolar transistor 96 has a collector and an emitter connected to node ND4 and ground node 90, respectively, and a base connected to node ND5.

  Constant current circuit 97 and connection switch 98 are connected in series between power supply voltage line 88 and NPN bipolar transistor 99. The connection switch 98 receives the signal S1 output from the inverter 48 (not shown), and is turned on when the signal S1 is at the H level and turned off when the signal S1 is at the L level. NPN bipolar transistor 99 has a collector and an emitter connected to connection switch 98 and ground node 90, respectively, and a base connected to node ND5.

  The second RF amplifier circuit 32A includes an emitter feedback resistor 86 in place of the emitter feedback resistor 84 in the configuration of the first RF amplifier circuit 30A. In the second RF amplifier circuit 32A, the connection switch 98 receives the signal S2 output from the comparator 46 (not shown), and is turned on when the signal S2 is at the H level and turned off when the signal S2 is at the L level. . . Since the other configuration of second RF amplifier circuit 32A is the same as that of first RF amplifier circuit 30A, description thereof will not be repeated.

  The first and second RF amplifier circuits 30A and 32A constitute a current mirror circuit. That is, the collector and base of NPN bipolar transistor 99 are connected, and the bases of NPN bipolar transistors 95, 96, and 99 are connected to common node ND5. When the connection switch 98 is turned on, the constant current circuit 97 causes a constant current I to flow. The constant current I flowing by the constant current circuit 97 serves as a reference current, and the constant current I flows to the NPN bipolar transistors 95 and 96. .

  In the first RF amplifier circuit 30A, when the signal S1 is at the H level, the connection switch 98 is turned ON, the constant current I is passed through the NPN bipolar transistors 95 and 96, and the first RF amplifier circuit 30A is activated. The On the other hand, when the signal S1 is at the L level, the connection switch 98 is turned off, and the base current is not supplied to the NPN bipolar transistors 95 and 96. Therefore, the NPN bipolar transistors 95 and 96 are turned off, and the first RF amplifier circuit 30A is Inactivated. Therefore, when the signal S1 becomes L level, that is, when the level of the received signal is higher than P1, no through current flows in the unused first RF amplifier circuit 30A, and power consumption is reduced.

  Similarly, in the second RF amplifier circuit 32A, when the signal S2 is at the H level, the connection switch 98 is turned on, and the constant current I is supplied to the NPN bipolar transistors 95 and 96, so that the second RF amplifier circuit is turned on. 32A is activated. On the other hand, when the signal S2 is at the L level, the connection switch 98 is turned off, and the base current is not supplied to the NPN bipolar transistors 95 and 96. Therefore, the NPN bipolar transistors 95 and 96 are turned off, and the second RF amplifier circuit 32A is Inactivated. Therefore, when the signal S2 becomes L level, that is, when the level of the received signal is equal to or lower than P1, no through current flows in the unused second RF amplifier circuit 32A, and power consumption is reduced.

  As described above, according to the second embodiment, since the RF amplifier circuit that is not selected according to the level of the received signal is deactivated, the same effect as in the first embodiment can be obtained. In addition, power consumption is further reduced.

[Embodiment 3]
In the first embodiment, the first and second RF amplifier circuits 30 and 32 have the same gain. In the second embodiment, the first and second RF amplifier circuits 30A and 32A have a gain. Although the same, the first RF amplifier circuits 30 and 30A and the second RF amplifier circuits 32 and 32A have different characteristics as described above, and in order to optimize the characteristics, Often the gain is not the same.

  If there is a difference in gain between the first RF amplifier circuit 30, 30A and the second RF amplifier circuit 32, 32A, the signal is output from the FSK demodulator circuit 42 when the RF amplifier circuit is switched according to the level of the received signal. There is a concern that the RSSI voltage changes in a step-like manner and the operation becomes unstable. Therefore, in the third embodiment, measures are taken so that the gain of the entire radio receiving circuit does not change when the RF amplifier circuit is switched.

  The radio apparatus according to the third embodiment includes a radio reception circuit 14B instead of the radio reception circuit 14 in the configuration of the radio apparatus 1 according to the first embodiment illustrated in FIG. Since the other configuration of the radio apparatus according to the third embodiment is the same as that of radio apparatus 1 according to the first embodiment, description thereof will not be repeated.

  FIG. 6 is a functional block diagram showing a configuration of radio reception circuit 14B in the radio apparatus according to Embodiment 3 of the present invention.

  Referring to FIG. 6, radio reception circuit 14B further includes IF amplification circuit 50, connection switch 52, and inverter 54 in the configuration of radio reception circuit 14A in the second embodiment. In the radio receiving circuit 14B, the gains of the first and second RF amplifier circuits 30A and 32A are Grf1 and Grf2, respectively, and the characteristics of the first and second RF amplifier circuits 30A and 32A are optimized. As a result, the gain Grf1 is larger than the gain Grf2. Since the other configuration of radio reception circuit 14B is the same as that of radio reception circuit 14A, description thereof will not be repeated.

  The IF amplifier circuit 50 receives the IF signal output from the IF filter 40 and the output signal from the comparator 46. When the output signal from the comparator 46 is at the H level, the IF signal is amplified with a gain Gif and the FSK demodulator circuit 42 is supplied. Output to. On the other hand, when the output signal from the comparator 46 is at L level, the IF amplifier circuit 50 is inactivated. Here, the gain Gif of the IF amplifier circuit 50 is adjusted in advance to a value of the following expression.

Gif = Grf1-Grf2 (1)
The inverter 54 outputs a signal obtained by inverting the output signal from the comparator 46 to the connection switch 52. The connection switch 52 receives an output signal from the inverter 54 and is turned on when the received signal is at the H level, and turned off when the signal is at the L level.

  In the wireless reception circuit 14B, when the level of the reception signal is equal to or lower than the level P1 shown in FIG. 2, the output signal of the comparator 46 is at the L level, so the first RF amplification circuit 30A is selected. Further, the IF amplifier circuit 50 is inactivated and the connection switch 52 is turned ON. Therefore, the total gain from when the reception signal is input to the radio reception circuit 14B until it reaches the FSK demodulation circuit 42 is Grf1.

  On the other hand, when the level of the received signal is higher than P1, the output signal of the comparator 46 becomes H level, so the second RF amplifier circuit 32A is selected. The IF amplifier circuit 50 is activated and the connection switch 52 is turned off. Therefore, the total gain from when the reception signal is input to the radio reception circuit 14B until reaching the FSK demodulation circuit 42 is Grf2 + Gif = Grf1. That is, in this radio reception circuit 14B, fluctuations in total gain due to switching between the first and second RF amplifier circuits 30A and 32A do not occur.

  In the above description, the radio reception circuit 14A in the second embodiment including the first and second RF amplifier circuits 30A and 32A has been described. However, the first and second RF amplifier circuits 30 and 32 are included. The radio reception circuit 14 according to the first embodiment may further include an IF amplifier circuit 50, a connection switch 52, and an inverter 54.

  As described above, according to the third embodiment, the RSSI voltage fluctuation caused by switching between the first and second RF amplifier circuits each having a different gain is prevented from occurring. Is stabilized.

[Modification of Embodiment 3]
In the third embodiment, the configuration of the wireless reception circuit when the gain Grf1 of the first RF amplifier circuit 30A is larger than the gain Grf2 of the second RF amplifier circuit 32A is shown. The configuration of the wireless reception circuit when the gain Grf1 is smaller than the gain Grf2 is shown.

  FIG. 7 is a functional block diagram showing a configuration of radio reception circuit 14C in the radio apparatus according to the modification of the third embodiment of the present invention.

  Referring to FIG. 7, radio reception circuit 14 </ b> C is not provided with inverter 54 in the configuration of radio reception circuit 14 </ b> B in the third embodiment, and inverter 56 is provided between comparator 46 and IF amplification circuit 50. The inverter 56 outputs a signal obtained by inverting the output signal from the comparator 46 to the IF amplifier circuit 50. Further, in the wireless reception circuit 14C, as a result of optimizing the characteristics of the first and second RF amplification circuits 30A and 32A, the gain Grf1 of the first RF amplification circuit 30A is set to the second RF amplification circuit 32A. Is smaller than the gain Grf2. Here, the gain Gif of the IF amplifier circuit 50 is adjusted in advance to a value of the following expression.

Gif = Grf2-Grf1 (2)
Since the other configuration of radio reception circuit 14C is the same as that of radio reception circuit 14B, description thereof will not be repeated.

  In this wireless reception circuit 14C, when the level of the reception signal is equal to or lower than the level P1 shown in FIG. 2, the output signal of the comparator 46 becomes L level, so the first RF amplifier circuit 30A is selected. The IF amplifier circuit 50 is activated and the connection switch 52 is turned off. Therefore, the total gain from when the reception signal is input to the radio reception circuit 14C until it reaches the FSK demodulation circuit 42 is Grf1 + Gif = Grf2.

  On the other hand, when the level of the received signal is higher than P1, the output signal of the comparator 46 becomes H level, so the second RF amplifier circuit 32A is selected. Further, the IF amplifier circuit 50 is inactivated and the connection switch 52 is turned ON. Therefore, the total gain from when the reception signal is input to the radio reception circuit 14C until it reaches the FSK demodulation circuit 42 is Grf2. That is, in this wireless reception circuit 14C, as in the wireless reception circuit 14B in the third embodiment, fluctuations in the total gain due to switching between the first and second RF amplification circuits 30A and 32A do not occur.

  In the above description, the description has been made based on the radio reception circuit 14A in the second embodiment including the first and second RF amplification circuits 30A and 32A. However, the first and second RF amplification circuits 30 and 32 are included. The wireless reception circuit 14 according to the first embodiment may further include an IF amplifier circuit 50, a connection switch 52, and an inverter 56.

  As described above, the modification of the third embodiment also stabilizes the operation of the radio reception circuit as in the third embodiment.

[Embodiment 4]
In the first to third embodiments described above, the level of the received signal is detected in the radio reception circuit, and the detection result is fed back to select the first or second RF amplifier circuit. In the fourth embodiment, Selection of the first or second RF amplifier circuit can be instructed from the outside of the wireless reception circuit.

  FIG. 8 is a functional block diagram showing an overall configuration of a radio apparatus 1D according to Embodiment 4 of the present invention.

  Referring to FIG. 8, radio apparatus 1D includes radio reception circuit 14D and controller 24A in place of radio reception circuit 14 and controller 24 in the configuration of radio apparatus 1 according to the first embodiment. The wireless reception circuit 14D is configured not to include the reference variable voltage generation circuit 44 and the comparator 46 in the configuration of the wireless reception circuit 14 in the first embodiment. Since other configuration of radio apparatus 1D is the same as that of radio apparatus 1 according to the first embodiment, description thereof will not be repeated.

  The controller 24A outputs a switching signal to the selection switches 34 and 36 in addition to the function of the controller 24 shown in FIG. The selection switches 34 and 36 of the radio reception circuit 14D operate in response to the switching signal output from the controller 24A. When the output signal from the controller 24A is at the L level, the first RF amplification circuit 30 is selected. When the output signal from the controller 24A is at the H level, the second RF amplifier circuit 32 is selected.

  In general, in mobile communication, the level of a reception signal received by a wireless device varies depending on surrounding radio wave conditions, but in communication between fixed devices, the level of a reception signal does not change that much. For example, in communication between a wireless device installed indoors and a wireless device installed at a close distance outdoors, reception sensitivity is not so much required. Therefore, in such a case, in this radio apparatus 1D, the controller 24A fixes the switching signal for selecting the second RF amplifier circuit 32 having the anti-intermodulation distortion characteristic in order to improve the anti-jamming characteristic. Output to the selection switches 34 and 36.

  On the other hand, when the distance between the two wireless devices that exchange signals is large, the controller 24A selects the first RF amplifier circuit 30 having low noise characteristics in order to improve the reception sensitivity. Is output to the selection switches 34 and 36 in a fixed manner.

  In the above description, the selection switches 34 and 36 are switched using the controller 24A. However, the selection switches 34 and 36 switched from the outside of the wireless reception circuit are switched using the controller 24A. It is not limited to. For example, one of the first and second RF amplifier circuits may be selected directly from the operation unit of the wireless device without using the controller 24A.

  In the above description, the first and second RF amplifier circuits 30 and 32 are provided. However, instead of the first and second RF amplifier circuits 30 and 32, the first and second RF amplifier circuits 30A and 30A are provided. 32A may be provided so that when one RF amplifier circuit is selected, the other RF amplifier circuit is inactivated.

  As described above, according to the fourth embodiment, it is assumed that the radio wave condition does not vary so much, such as when the radio apparatus is fixed and used, and the first and second radio waves are changed according to the radio wave condition. Since any one of the RF amplifier circuits can be fixedly selected, there is no feedback loop in the radio reception circuit, and the operation of the radio reception circuit is further stabilized.

[Embodiment 5]
In Embodiments 1 to 4 described above, the first RF amplifier circuit having low noise characteristics and the second RF amplifier circuit having anti-intermodulation distortion characteristics are provided in the radio reception circuit. 5, one RF amplifying circuit capable of switching the characteristic to either the low noise characteristic or the anti-intermodulation distortion characteristic is provided.

  The radio apparatus according to the fifth embodiment includes a radio reception circuit 14E in place of the radio reception circuit 14 in the configuration of the radio apparatus 1 according to the first embodiment shown in FIG. Since the other configuration of the radio apparatus according to the fifth embodiment is the same as that of radio apparatus 1 according to the first embodiment, description thereof will not be repeated.

  FIG. 9 is a functional block diagram showing a configuration of radio reception circuit 14E in the radio apparatus according to Embodiment 5 of the present invention.

  Referring to FIG. 9, radio receiving circuit 14E does not include first and second RF amplifying circuits 30 and 32 and selection switches 34 and 36 in the configuration of radio receiving circuit 14 in the first embodiment, and RF The amplifier circuit 33 further includes an inverter 58 that outputs a signal obtained by inverting the output signal from the comparator 46 to the RF amplifier circuit 33. The other configuration of radio receiving circuit 14E is the same as that of radio receiving circuit 14, and therefore description thereof will not be repeated.

  When the output signal S3 from the inverter 58 is at the H level, the RF amplifier circuit 33 receives the reception signal output from the selection switch 12 (not shown) and amplifies the reception signal with low noise, and outputs the amplified reception signal to the mixer 38. . On the other hand, when the output signal S3 from the inverter 58 is at the L level, the RF amplifier circuit 33 receives the reception signal output from the selection switch 12, amplifies the received signal by suppressing the generation of intermodulation products, The amplified received signal is output to mixer 38.

  FIG. 10 is a circuit diagram showing a configuration of the RF amplifier circuit 33 shown in FIG.

  Referring to FIG. 10, RF amplifier circuit 33 further includes a connection switch 92 in the configuration of second RF amplifier circuit 32 in the first embodiment shown in FIG. The connection switch 92 is connected in parallel with the emitter feedback resistor 86 between the node ND6 and the node ND7. Connection switch 92 receives signal S3 output from inverter 58 (not shown), and is turned on when signal S3 is at the H level and turned off when signal S3 is at the L level. Since other configurations of RF amplifier circuit 33 are the same as those of second RF amplifier circuit 32 in the first embodiment, description thereof will not be repeated.

  In the RF amplifier circuit 33, when the signal S3 is at the H level, the connection switch 92 is turned ON, and the emitters of the NPN bipolar transistors 76 and 78 are short-circuited. Therefore, the RF amplifier circuit 33 functions as an amplifier circuit having low noise characteristics. On the other hand, when the signal S3 is at the L level, the connection switch 92 is turned OFF and functions as an amplifier circuit having an emitter feedback resistance 86 between the emitters of the NPN bipolar transistors 76 and 78 and having excellent anti-intermodulation distortion characteristics.

  FIG. 11 is a circuit diagram showing a configuration of the RF amplifier circuit 33 when a field effect transistor is used for the connection switch 92 shown in FIG.

  Referring to FIG. 11, RF amplifier circuit 33 includes an N channel MOS transistor 92A connected between nodes ND6 and ND7 and receiving at its gate a signal S3 output from inverter 58 (not shown). Other circuit configurations are the same as those shown in FIG.

  Here, when the signal S3 output from the inverter 58 (not shown) is at the H level, the N-channel MOS transistor 92A shorts the emitters of the NPN bipolar transistors 76 and 78, and the RF amplifier circuit 33 serves as an amplifier circuit having low noise characteristics. The on-resistance is designed to be as small as possible.

  In the above description, the N channel MOS transistor 92A is used as the connection switch 92. However, a P channel MOS transistor may be used as the connection switch 92. When a P-channel MOS transistor is used, the inverter 58 shown in FIG. 9 is not necessary, and the output signal from the comparator 46 is directly input to the gate of the P-channel MOS transistor.

  Referring to FIG. 9 again, when the level of the received signal is equal to or lower than P1, the output signal of comparator 46 is at L level and signal S3 is at H level. Therefore, RF amplification circuit 33 amplifies the received signal with low noise. And output to the mixer 38. On the other hand, when the level of the received signal is higher than P1, the output signal of the comparator 46 is at the H level and the signal S3 is at the L level. Therefore, the RF amplifier circuit 33 suppresses the generation of the intermodulation product and outputs the received signal. The signal is amplified and the amplified reception signal is output to the mixer 38.

  As described above, according to the fifth embodiment, since there is one RF amplification circuit in the wireless reception circuit, the wireless device can be further reduced in size.

  Note that the radio receiving circuits in the above embodiments are all of the single conversion method, but this method of selectively switching the characteristics of the RF stage amplifier circuit according to the level of the received signal is a double conversion method or direct conversion method. The method can be similarly applied.

  In the first to third embodiments described above, the level of the IF signal is detected by the RSSI circuit included in the FSK demodulation circuit 42. However, a level detection circuit is provided in the RF stage to detect the level of the RF signal. The characteristics of the RF amplifier circuit may be switched according to the signal level.

  The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is shown not by the above description of the embodiments but by the scope of claims for patent, and is intended to include meanings equivalent to the scope of claims for patent and all modifications within the scope.

It is a functional block diagram which shows the whole structure of the radio | wireless apparatus by Embodiment 1 of this invention. It is a figure which shows the voltage level of the RSSI signal with respect to the signal level in the antenna input terminal of the received signal received by the antenna. FIG. 2 is a circuit diagram showing a configuration of first and second RF amplifier circuits shown in FIG. 1. It is a functional block diagram which shows the structure of the radio | wireless receiving circuit in the radio | wireless apparatus by Embodiment 2 of this invention. FIG. 5 is a circuit diagram showing a configuration of first and second RF amplifier circuits shown in FIG. 4. It is a functional block diagram which shows the structure of the radio | wireless receiving circuit in the radio | wireless apparatus by Embodiment 3 of this invention. It is a functional block diagram which shows the structure of the radio | wireless receiving circuit in the radio | wireless apparatus by the modification of Embodiment 3 of this invention. It is a functional block diagram which shows the whole structure of the radio | wireless apparatus by Embodiment 4 of this invention. It is a functional block diagram which shows the structure of the radio | wireless receiving circuit in the radio | wireless apparatus by Embodiment 5 of this invention. FIG. 10 is a circuit diagram showing a configuration of an RF amplifier circuit shown in FIG. 9. FIG. 11 is a circuit diagram showing a configuration of an RF amplifier circuit when a field effect transistor is used for the connection switch shown in FIG. 10. It is a functional block diagram which shows the structure of the principal part in the conventional radio | wireless receiving circuit used for the 400 MHz band specific low power radio | wireless apparatus. It is a functional block diagram which shows the other structure of the principal part in the conventional radio | wireless receiving circuit used for the 400 MHz band specific low power radio | wireless apparatus. It is a functional block diagram which shows the further another structure of the principal part in the conventional radio | wireless receiving circuit used for the 400 MHz band specific low power radio | wireless apparatus.

Explanation of symbols

  1, 1D wireless device, 10, 102 antenna, 12, 20, 34, 36 selection switch, 14, 14A-14E, 100, 100A, 100B wireless reception circuit, 16 PLL circuit, 18, 108 VCO, 22 power amplifier, 24 , 24A controller, 30, 30A first RF amplifier circuit, 32, 32A second RF amplifier circuit, 33, 106 RF amplifier circuit, 38, 110 mixer, 40, 112 IF filter, 42, 114 FSK demodulator circuit, 44 Reference variable voltage generation circuit, 46 comparator, 48, 54 to 58 inverter, 50 IF amplifier circuit, 52, 92, 98 connection switch, 72, 74 collector resistance, 76, 78, 95, 96, 99 NPN bipolar transistor, 80, 82,97 constant current circuit, 84,86 emitter feedback resistor Anti-88 power supply voltage line, 90 ground node, 92.1, 92.2 input node, 92A N-channel MOS transistor, 94.1, 94.2 output node, 104 RF filter, 104A first RF filter, 104B second 2 RF filters.

Claims (13)

A first radio frequency amplifier circuit that amplifies the received signal in a radio frequency band with low noise when the level of the received signal is equal to or lower than a predetermined level;
A second radio frequency that amplifies the received signal in the radio frequency band while suppressing intermodulation distortion between the target signal and the non-target signal included in the received signal when the level of the received signal is higher than the predetermined level; A radio receiving circuit comprising an amplifier circuit. The first radio frequency amplifier circuit is inactivated when the level of the received signal is higher than the predetermined level;
2. The radio reception circuit according to claim 1, wherein the second radio frequency amplification circuit is inactivated when a level of the reception signal is equal to or lower than the predetermined level. A level detection circuit for detecting the level of the received signal;
A comparison circuit for comparing the detected level with the predetermined level;
3. The radio reception circuit according to claim 1, wherein each of the first and second radio frequency amplifier circuits is selected according to a comparison result by the comparison circuit.   The radio reception circuit according to claim 3, wherein the level detection circuit is an RSSI circuit. A frequency conversion circuit for converting a signal output from the first or second radio frequency amplifier circuit into a predetermined intermediate frequency;
An intermediate frequency amplification circuit that amplifies the signal output from the frequency conversion circuit and outputs the amplified signal to the level detection circuit;
A connection switch provided in parallel to the intermediate frequency amplifier circuit;
When the smaller gain of the first and second radio frequency amplifier circuits is selected,
The intermediate frequency amplifier circuit is activated;
When the larger gain of the first and second radio frequency amplifier circuits is selected,
The connection switch connects an input node of the intermediate frequency amplifier circuit to an output node of the intermediate frequency amplifier circuit,
The wireless reception circuit according to claim 3, wherein the intermediate frequency amplifier circuit is inactivated.   The radio reception circuit according to claim 5, wherein the intermediate frequency amplifier circuit has a gain composed of an absolute value of a gain difference between the first and second radio frequency amplifier circuits.   7. The radio reception circuit according to claim 3, further comprising a switching circuit that selects one of the first and second radio frequency amplifier circuits according to a comparison result by the comparison circuit. .   The radio reception circuit according to claim 1, further comprising a switching circuit that selects one of the first and second radio frequency amplifier circuits according to a control signal received from outside. The first radio frequency amplifier circuit includes a first differential amplifier circuit having a first emitter feedback resistor;
The second radio frequency amplifier circuit includes a second differential amplifier circuit having a second emitter feedback resistor,
9. The wireless receiver circuit according to claim 1, wherein the first emitter feedback resistor is smaller than the second emitter feedback resistor. 10.   When the received signal level is equal to or lower than a predetermined level, the received signal in a radio frequency band is amplified with low noise, and when the received signal level is higher than the predetermined level, a target signal included in the received signal and A radio reception circuit including a radio frequency amplifier circuit that amplifies a reception signal in the radio frequency band while suppressing intermodulation distortion with a non-target signal. The radio frequency amplifier circuit includes a differential amplifier circuit,
The differential amplifier circuit is:
An emitter feedback resistor;
A connection switch provided in parallel with the emitter feedback resistor,
The wireless reception circuit according to claim 10, wherein the connection switch connects one end of the emitter feedback resistor to the other end when a level of the reception signal is equal to or lower than the predetermined level.   The wireless receiving circuit according to claim 11, wherein the connection switch includes a field effect transistor. A radio reception circuit according to any one of claims 1 to 12,
A radio apparatus comprising: a radio transmission circuit that transmits a signal from an antenna during a transmission operation.

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