JP2004112533A - Image forming device - Google Patents

Abstract

An object of the present invention is to manage resource acquisition and release for obtaining maximum utilization efficiency according to the processing capacity of a storage device, and to efficiently control processing of a data transfer operation.
A data transfer capability between a reading unit, a primary storage unit (image memory), and a secondary storage unit (HD) at the time of data input / output is measured and stored. The processing capability of the data input / output operation of the image forming apparatus is controlled using the measured data transfer capability. When an image input / output unit whose data transfer capability fluctuates is connected, the control load is reduced by prohibiting the measurement of the data transfer capability, and the maximum utilization efficiency according to the processing capability of the storage device is obtained.
[Selection diagram] Fig. 4

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention is applied to an image input / output device such as a digital copying machine, a facsimile, a printer, a scanner, a network file server, or a digital multifunction peripheral having a plurality of functions among them, and reads an image of an original or the like, In an image forming apparatus that stores image data on a hard disk or the like via a memory and reuses image data, in particular, efficiently manages a timing of starting data transfer of an image signal and a timing of occupying resources of a semiconductor memory and a mass storage device. And an image forming apparatus that can be controlled.
[0002]
[Prior art]
2. Description of the Related Art In recent years, digitalization of copiers has been advanced, and processing and editing using an image memory have become active. Among them, there is provided a function called an electronic sort which stores a plurality of document image data in a memory to copy and output a designated number of copies at a time to eliminate a sorting operation. At this time, in order to store a plurality of image data, storing the image data as it is in the semiconductor memory requires a memory corresponding to the data amount of the number of stored images, and the memory cost becomes enormous. Are generally used.
[0003]
1. A configuration of a semiconductor memory and a storage memory is used, and a secondary storage device such as a hard disk which is less expensive than the semiconductor memory is used as the storage memory.
2. A semiconductor memory is used as a storage memory, image data is compressed using a compression process, and the total amount of memory is reduced by reducing the amount of data per sheet.
3. A plurality of image input / output units (image scanner, printer controller, file server, FAX controller, etc.) share the same image memory.
[0004]
In order to execute input / output of image data to / from an image memory, a memory controller (hereinafter, DMA controller) using a DMA (Direct Memory Access) data transfer method is often used. The DMA controller transfers data to a specific area of the image memory based on memory area management information called a descriptor. It is also possible to transfer data by dividing a memory area where one image is stored into a plurality of descriptors. For example, by using an image memory in the form of a ring buffer, a memory capacity smaller than the capacity of image data can be obtained. In some cases, input / output of image data is executed.
[0005]
Patent Document 1 relates to a DMA controller related to application of a memory control technique using a DMA for inputting and outputting data to and from a semiconductor memory, and provides a highly versatile memory control technique and a control algorithm. Patent Literature 2 relates to an image processing apparatus that supplies intermediate code image data generated for each band to a hardware rendering mechanism at high speed and improves the use efficiency of a memory.
[0006]
In the memory control using the DMA controller, the progress (start and end) of data transfer specified by each descriptor and the execution timing control of data transfer (interruption and restart of data transfer in the middle of the image memory area, etc.) Therefore, the degree of freedom in controlling the timing of data transfer of a semiconductor memory connected to a DMA controller or a large-capacity secondary storage device is high, and the range of application is wide.
[0007]
As described above, when a secondary storage device such as a hard disk, which is less expensive than a semiconductor memory, is used as a storage memory, a plurality of data transfers (data write / read operations) cannot normally be performed on a single storage device. Therefore, the data transfer unit to the secondary storage device is divided by using the descriptor of the DMA controller, and the data transfer unit is executed in a time-division manner, so that a plurality of data transfer operations are performed as if they were being executed in parallel. Is common.
[0008]
However, when such time-division processing is used, the time required for data transfer is not shortened. Therefore, when the time required for input / output of image data affects the productivity of the apparatus as in an image forming apparatus, the time-division processing is not performed. On the contrary, there is a case where productivity is reduced. Therefore, a configuration is adopted in which the amount of data transfer is reduced by compressing image data, or the time required for data transfer to the secondary storage device is shortened by mounting a secondary storage device having a high data transfer speed.
[0009]
Conventionally, from the viewpoint of simplifying memory control, time-division transfer is not actively performed, but is occupied as a resource of the secondary storage device substantially in synchronization with the image data input / output operation using the image input / output means. Means for performing data transfer has been used.
[0010]
In a conventional secondary storage device, the speed at which image data in the semiconductor memory is transferred to the secondary storage device is lower than the speed at which image data is transferred to the image input / output means and the semiconductor memory. Even if the data processing capacity of the secondary storage device is reduced by performing compression, there is no difference in the data processing speed between the image input / output means and the semiconductor memory. Even if the transfer timing control (including data conversion processing such as data compression) is independently and optimally controlled, the productivity of the image forming apparatus cannot be immediately improved.
[0011]
The transfer processing speed of a secondary storage device such as a hard disk has been improving year by year, and the degree of improvement in productivity has been increased by performing optimal control. 2. Description of the Related Art In recent years, a high-speed device of an apparatus has been able to simultaneously read a front and back of a document, and the processing capability of an image input / output unit has been improved. In order to achieve productivity in such a situation, there is a model in which a mechanical constraint occurs that productivity cannot be realized unless the document feeding process of the image input apparatus is operated at non-interval.
[0012]
In this case, not only the memory timing control after the data transfer from the image input unit but also a preliminary prediction notifying unit for the image input unit is provided, and the condition of the current state of the memory control, the characteristics of the storage device, etc. A function of notifying the document conveyance non-interval control availability determination and performing switching processing of document conveyance interval and non-interval control on the image input apparatus side is required.
[0013]
[Patent Document 1]
JP-A-6-103225
[Patent Document 2]
JP 2000-158724 A
[0014]
[Problems to be solved by the invention]
With the advance of technology in recent years, the data transfer speed of a large-capacity storage device such as a hard disk, and the data compression rate and processing speed of a data compression unit have been remarkably improved. In a storage device to which such a large-capacity storage device can be connected as a secondary storage device, the data transfer speed to the secondary storage device is faster than the data input and output speed of the connected image input / output means. The case is conceivable.
[0015]
For this reason, in the case where the apparatus has a configuration in which input and output of a plurality of image signals can be simultaneously performed in parallel, how efficiently the processing of inputting (saving) and outputting (reading) image signal data to and from the secondary storage device is performed. This is a problem in improving the productivity of the image forming apparatus. In the current situation where the image input / output means connected to the image forming apparatus is diversified, it is difficult to secure the productivity by maximizing the capacity of the storage device and the data compression means in the conventional memory control. ing.
[0016]
SUMMARY OF THE INVENTION The present invention solves the problems of the prior art described above, and manages resource acquisition and release for obtaining maximum utilization efficiency according to the processing capacity of a storage device, and efficiently controls processing of data transfer operations. It is an object of the present invention to provide an image forming apparatus capable of performing the above.
[0017]
[Means for Solving the Problems]
In order to solve the above-described problems and achieve the object, an image forming apparatus according to claim 1 includes an image input unit to which an image signal is input, and at least one image input to the image input unit. Storage means including a primary storage unit for storing signals, and a secondary storage unit for storing image signals in the primary storage unit, and an image signal stored in the secondary storage unit when an image is output Control means for reading out and storing the data in the primary storage section and outputting the readout data from the image output means, wherein the control means measures a data transfer capability of the image signal between the image input means and the storage means. Measuring means, and storage means for storing the data transfer ability measured by the measuring means, wherein the data transfer of the image signal is controlled based on the obtained data transfer ability.
[0018]
In the image forming apparatus according to a second aspect of the present invention, in the first aspect, the measuring unit measures a data transfer capability of the image signal between the image output unit and the storage unit. It is characterized by the following.
[0019]
According to a third aspect of the present invention, in the image forming apparatus according to any one of the first and second aspects, the measuring means may include a data amount of an image signal, the primary storage unit, and the second storage unit. The data transfer capability is calculated based on a data transfer time between the next storage units.
[0020]
According to a fourth aspect of the present invention, in the image forming apparatus according to any one of the first to third aspects, the control unit does not execute the measurement by the measuring unit based on the data transfer capability. It is characterized by having a measurement prohibiting means.
[0021]
According to a fifth aspect of the present invention, in the image forming apparatus according to the fourth aspect, it is preferable that the measurement prohibition unit can select the presence or absence of a prohibition setting based on a setting of an operation unit that receives an input operation. Features.
[0022]
According to a sixth aspect of the present invention, in the image forming apparatus according to the fourth aspect, the measurement prohibiting unit determines that a measurement result of a data transfer capability of the image signal measured by the measuring unit is lower than a predetermined value. In this case, the measurement is automatically made non-executable.
[0023]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, preferred embodiments of an image forming apparatus according to the present invention will be described in detail with reference to the accompanying drawings. FIG. 1 is a block diagram showing an image forming apparatus of the present invention. FIG. 1 shows a configuration example of a digital copying machine. First, an outline of a reading process of the reading unit 1 and an image forming process of the image forming unit 2 will be described.
[0024]
The original 3 is placed on an original table 4, scan exposure is performed by an exposure lamp 5 movable along the original table 4, and reflected light is photoelectrically converted by a CCD (image sensor) 7 via a reflection mirror 6. An electric signal corresponding to the intensity of light is used. An IPU (image processing unit) 8 subjects the electric signal to processing such as shading correction, A / D-converts it into an 8-bit digital signal, and further performs image processing such as scaling processing and dither processing. At the same time, the image signal is sent to the image forming unit 2.
[0025]
FIG. 2 is a top view of the document table 4. The scanner control unit 9 detects various sensors, controls a drive motor and the like, and sets various parameters in the image processing unit 8 in order to execute the above process. The above is the reading process.
[0026]
In the image forming unit 2, the photoreceptor 12, which is uniformly charged by the charging charger 11 and rotates at a constant speed, is exposed to laser light modulated by image data from the writing unit 13. An electrostatic latent image is formed on the photoreceptor 12, and is developed into a visible toner image by developing it with toner by the developing device 14. The transfer paper 18 that has been fed in advance from the paper feed tray 16 by the paper feed roller 15 and has been waiting at the registration rollers 17 is transported with the rotation of the photoconductor 12 at a proper timing, and is transferred onto the photoconductor 12 by the transfer charger 19. The toner is electrostatically transferred to the transfer paper 18, and the transfer paper 18 is separated from the photoconductor 12 by the separation charger 20.
[0027]
Thereafter, the toner image on the transfer paper 18 is heated and fixed by the fixing device 21, and is discharged to the discharge tray 23 by the discharge roller 22. On the other hand, the toner image remaining on the photoconductor 12 after the electrostatic transfer is removed by being pressed against the photoconductor 12 by the cleaning device 24, and the photoconductor 12 is discharged by the discharging charger 25. The plotter control unit 26 detects various sensors and controls a drive motor and the like in order to execute the above process. The above is the image forming process.
[0028]
FIG. 3 is a timing chart illustrating an image synchronization signal output from the image processing unit 8 of the reading unit 1. (B) The frame gate signal (/ FGATE) is a signal indicating an image effective range for an image area in the sub-scanning direction, and image data is valid while this signal is at a low level (low active). This / FGATE is asserted or negated at the falling edge of the line synchronization signal (/ LSYNC). / LSYNC is asserted for a predetermined number of clocks at the rising edge of (a) the pixel synchronization signal (PCLK), and after the rising of this signal, the image data in the main scanning direction becomes valid after a predetermined clock.
[0029]
The transmitted image data (d) is one for one period of PCLK, and is divided into 400 DPI equivalent from the arrow P shown in FIG. The image data is sent out as raster data with the arrow P at the top. The effective sub-scanning range of image data is usually determined by the size of the transfer paper 18.
[0030]
The system control unit 31 shown in FIG. 1 detects an input state of the operator to the operation unit 32, and sets various parameters to the reading unit 1, the storage unit 33, the image forming unit 2, and the FAX unit 34, and issues a process execution instruction. Perform by communication. Further, the status of the entire system is displayed on the operation unit 32. An instruction to the system control unit 31 can be made by an operator by performing a key input operation on the operation unit 32.
[0031]
In accordance with an instruction from the system control unit 31, the FAX unit 34 performs binary compression on the transmitted image data based on, for example, G3 and G4 FAX data transfer rules, and transfers the image data to a telephone line. The data transferred from the telephone line to the FAX unit 34 is restored to binary image data, sent to the writing unit 13 of the image forming unit 2, and visualized.
[0032]
The selector unit 35 changes the state of the selector in accordance with an instruction from the system control unit 31 and selects a source of image data for forming an image from any one of the reading unit 1, the storage unit 33, and the FAX unit.
[0033]
The storage unit 33 stores image data of the document 3 normally input from the image processing unit 8, and is used for copy applications such as repeat (plural) copies and rotational copies. It is also used as a buffer memory for temporarily storing the binary image data from the FAX unit 34. Further, it is also used as a means for storing information on data transfer capability (details will be described later). These data storage instructions are given by the system control unit 31.
[0034]
FIG. 4 is a block diagram illustrating a configuration of the storage unit 33. Hereinafter, the configuration of each unit of the storage unit 33 will be described.
[0035]
Image input / output DMAC41
The image input / output DMAC 41 is configured by a CPU and a logic circuit, communicates with the system control unit 31, receives a command, and performs an operation setting according to the command. Also, status information is transmitted to notify the state of the image input / output DMAC 41. When an image input command is received, the input image data is packed as 8-pixel memory data according to the input image synchronization signal, and is output to the system control unit 31 together with the memory access signal as needed. When an image output command is received, image data from the system control unit 31 is output in synchronization with an output image synchronization signal.
[0036]
Image memory 42
The image memory 42 includes a semiconductor storage element such as a DRAM for storing image data. For example, the total amount of memory is 4 Mbytes of 400 DPI, A3 size of binary image data, and 4 Mbytes of memory for electronic sort storage, for a total of 8 MB. Reading and writing are controlled by the system control unit 31.
[0037]
Memory control unit 43
The memory control unit 43 includes a CPU and a logic circuit. The memory control unit 43 communicates with the system control unit 31 to receive a command, performs an operation setting according to the command, and reports status information for notifying a state of the storage unit 33. Send as The operation commands from the system control unit 31 include image input, image output, compression, decompression, and the like. Commands for image input and image output are transmitted to the image input / output DMAC 41, and compression-related commands are transmitted to the image transfer DMAC 44, code The data is transmitted to the transfer DMAC 45 and the compression / expansion unit 46.
[0038]
Image transfer DMAC44
The image transfer DMAC 44 includes a CPU and a logic circuit, communicates with the memory control unit 43, receives a command, performs an operation setting according to the command, and transmits status information to notify a state. When a compression command is received, a memory access request signal is output to the memory control unit 43. When the memory access permission signal is active, image data is received and transferred to the compression / expansion unit 46. Further, it incorporates an address counter that counts up in response to a memory access request signal, and outputs a 22-bit memory address indicating a storage location where image data is stored.
[0039]
Code transfer DMAC45
The code transfer DMAC 45 is configured by a CPU and a logic circuit, communicates with the memory control unit 43, receives a command, sets an operation according to the command, and transmits status information to notify a state. When a decompression command is received, a memory access request signal is output to the memory control unit 43, and when the memory access permission signal is active, image data is received and transferred to the compression / decompression unit 46. Further, it incorporates an address counter that counts up in response to a memory access request signal, and outputs a 22-bit memory address indicating a storage location where image data is stored. The descriptor access operation of each of the DMACs 41, 44, 45 will be described later.
[0040]
Compression / expansion device 46
It is composed of a CPU and a logic circuit, communicates with the memory control unit 43 to receive a command, performs an operation setting according to the command, and transmits status information to notify a state. For example, binary data is processed by the MH encoding method.
[0041]
HDD controller 47
It is composed of a CPU and a logic circuit, communicates with the memory control unit 43 to receive a command, performs an operation setting according to the command, and transmits status information to notify a state. The status of the hard disk (HD) 48 as a secondary storage device is read and data is transferred.
[0042]
FIG. 5 is a block diagram showing the configuration of the memory control unit 43. Hereinafter, the configuration of each unit of the memory control unit 43 will be described.
[0043]
Input / output image address counter 51
An address counter that counts up in response to an input / output memory access request signal, and outputs a 22-bit memory address indicating a storage location where input / output image data is stored. At the start of memory access, the address is temporarily initialized.
[0044]
Transfer image address counter 52
This is an address counter that counts up in response to a transfer memory access permission signal, and outputs a 22-bit memory address indicating a storage location where transfer image data is stored. At the start of memory access, the address is initialized once.
[0045]
Line setting unit 53
When a semiconductor memory is used as a buffer at the time of image input, a value supplied to the difference comparing unit 55 is set from the system control unit 31. Any value can be set.
[0046]
Difference calculation unit 54
When an image is input, the number of input / output processing lines output by the image input / output DMAC 41 is subtracted from the number of transfer processing lines output by the compression / expansion unit 46, and the result is output to the difference comparison unit 55.
[0047]
Difference comparison unit 55
At the time of image input, the number of difference lines output by the difference calculation unit 54 is compared with the set value output by the line setting unit 53, and an error signal is output if the number of difference lines = set value. When the number of difference lines becomes 0, the transfer request mask signal of the comparison result output to the arbiter 57 is activated. Otherwise, or when the input / output image is not operating, no active signal is output.
[0048]
Address selector 56
The selector is selected by the arbiter 57, and selects either the address of the input image or the address of the transfer image.
[0049]
Arbiter 57
A memory access permission signal for accessing the compression / expansion unit 46 is output. The memory access permission signal is output under the condition that the address comparison signal is active and the input / output memory access signal is inactive.
[0050]
Request mask 58
The transfer memory access request signal for accessing the compression / expansion unit 46 is masked (disabled) based on the comparison result from the difference comparison unit 55 for comparing the number of processing lines, and the transfer process is stopped.
[0051]
Access control circuit 59
The input physical address is divided into a row address and a column address corresponding to the DRAM which is the image memory 42, and is output to an 11-bit address bus. In addition, according to the access start signal from the arbiter 57, it outputs a DRAM control signal (RAS, CAS, WE).
[0052]
The memory control unit 43 is initialized by an image input instruction from the system control unit 31 and enters a waiting state for image data. The image data is input to the storage unit 33 by the operation of the reading unit 1. The input image data is temporarily written to the image memory 42. The number of processing lines of the written image data is counted by the image input / output DMAC 41 and input to the memory control unit 43. The compression / expansion unit 46 outputs a transfer memory access request signal in response to the image transfer command. However, the request signal is masked by the request mask unit of the memory control unit 43, and actual memory access is not performed.
[0053]
When one line of input data from the image input / output DMAC 41 is completed, the mask of the transfer memory access request signal is released, the image memory 42 is read, and the operation of transferring the image data to the compression / expansion unit 46 is started. . Also, during operation, the difference calculation unit 54 calculates the difference between the two processing line numbers, and when it becomes 0, masks the transfer memory access request signal so that the address is not overtaken.
[0054]
The storage unit 33 shown in FIG. 4 writes (or reads) image data in a predetermined image area of the image memory 42 by the image transfer DMAC 44 in accordance with an instruction from the system control unit 31 when inputting and storing data. At this time, the image transfer DMAC 44 counts the number of image lines.
[0055]
Next, FIG. 6 is a diagram for explaining the descriptor access operation and the data transfer operation of the DMAC shown in FIG. The input DMAC of the image input / output DMAC 41 will be described as an example, but the invention is not limited to this, and the input DMACs of the image transfer DMAC 44 and the code transfer DMAC 45 also operate similarly and can be applied. The image data in the figure is divided into four bands, and the data transfer control unit 62 transfers the image data of the number of lines set in each band.
[0056]
{Circle around (1)} When the input DMAC 60 receives the transfer command, the DMA starts, and the descriptor 1 is read-accessed to the chain destination address (address a) set by the CPU in the internal descriptor storage register 61 in advance. The contents of the descriptor 1 are loaded into the descriptor storage register 61.
[0057]
The loaded content is composed of four words, a chain destination address ca indicating the storage address of the next descriptor 2, (3) a data storage destination address da indicating the start address of the transfer data, and a data amount of the data to be transferred. Is indicated by the number of data transfer lines dl, and the format information fi indicating whether or not a CPU interrupt is to be generated when the set number of lines has been transferred. In the least significant bit of the format information fi, a bit indicating whether or not to generate a CPU interrupt when the set number of lines has been transferred is arranged. 0 generates a CPU interrupt, 1 masks the CPU interrupt.
[0058]
In the example shown in FIG. 6, the image is divided into four bands, and the least significant bit of the format information fi of each descriptor is 0, 0, 0, 0 in order from 1 to 4. When the transfer of the image data of each band is completed, a CPU interrupt is generated, and by the generation of the interrupt, the transfer can be performed while detecting the transfer end timing and the number of lines by adding the number of lines set in each descriptor.
[0059]
Similarly, when data is transferred from the image memory 42 to the HD 48 through the compression / expansion unit 46 (primary storage unit → secondary storage unit), the descriptor transfer of the image transfer DMAC 44 is performed in one band. The number is set as the number of image lines and transferred. At that time, the transfer destination of the code transfer DMAC 45 is set to the HDD controller 47. A storage address is set in the HDD controller 47, and image data can be transferred through a path of the image memory 42, the image transfer DMAC 44, the compression / expansion unit 46, the code transfer DMAC 45, the HDD controller 47, and the HD 48.
[0060]
After the data transfer is completed, the HDD controller 47 notifies the HDD controller 47 of the amount of data used when the data is stored in the HD 48, and the HDD management area in which the address stored in the HD 48 and the amount of data used are secured in the primary storage unit (image memory 42). Remember. Further, the memory control unit 43 masks the transfer memory access request so that the transfer of the image data to the compression / expansion unit 46 does not overtake the transfer from the image input / output DMAC 41. That is, the data transfer to the secondary storage (HD) 48 is controlled so as not to overtake the data transfer for image input.
[0061]
Conversely, when data is transferred from the HD 48 to the image memory 42 through the compression / expansion unit 46 (secondary storage unit → primary storage unit), the data is transferred to the HD 48 stored in the HDD management area secured in the primary storage unit. The storage address and the used data amount at the time of accumulation are acquired, the storage address is set in the HDD controller 47, the used data amount is set in the code transfer DMAC 45, and the number of expanded lines is set in the image transfer DMAC 44. The image data can be transferred through the path of the HDD controller 47, the code transfer DMAC 45, the compression / expansion unit 46, the image transfer DMAC 44, and the image memory 42.
[0062]
Next, a configuration for measuring the transfer capability (transfer time) from the start of data transfer from the reading unit 1 to the end of accumulation of data from the data to the HD 48 as the secondary storage unit will be described. The setting of the input DMAC 60 in FIG. 6 is performed based on the document 3 size set by the system control unit 31. By setting the number of lines of the first descriptor to 1, and setting the number of lines of the other descriptors to the number of lines obtained by dividing the remainder into three, it is possible to know the start of data transfer when the first CPU interrupt occurs.
[0063]
When data is transferred from the image memory 42 to the HD 48 through the compression / expansion unit 46 (the primary storage unit 42 → the secondary storage unit 48), the setting of the descriptor of the image transfer DMAC 44 is transferred in one band. The number of lines of the descriptor is set as the number of image lines and transferred. The start of the transfer starts the DMA at the first interrupt of the image input, and the end of the transfer can be known by the CPU interrupt in the same manner, and the first of the image input by the transfer from the reading unit 1 to the image memory 42 as the primary storage unit. The transfer capability can be measured by measuring the time from the interruption of the image transfer to the transfer end interrupt in the image transfer to the HD 48 as the secondary storage unit using the timer function of the CPU of the system unit.
[0064]
Then, the data amount of the document 3 size set by the system control unit 31 is measured as D1 (byte), the transfer time is set as S1 (sec), and the transfer capacity is set as Nin = D1 (byte) / S1 (sec). It is stored in the primary storage (image memory) 42 as capability-specific data.
[0065]
Next, a configuration for measuring a transfer capability (transfer time) when outputting an image from the secondary storage unit (HD) 48 via the primary storage unit (image memory) 42 will be described. There may be a difference between the transfer capability of the secondary storage unit (HD) 48 -the primary storage unit (image memory) 42 and the transfer capability of the primary storage unit 42-the image output unit (image forming unit 2). If the transfer capability of the primary storage unit 42-image output unit is higher than the transfer capability of the secondary storage unit 48-primary storage unit 42, the transfer of the secondary storage unit 48-primary storage unit 42 cannot be completed in time. For this purpose, the transfer to the image output unit is performed after the transfer from the secondary storage unit 48 to the primary storage unit 42 is completed, and then to the primary storage unit 42 to the image output unit.
[0066]
The storage address and the amount of data used when stored in the HD 48 stored in the HDD management area secured in the primary storage unit (image memory 42) are acquired, the storage address is set in the HDD controller 47, and the code transfer DMAC 45 is set. Sets the used data amount, and sets the number of expanded lines in the image transfer DMAC 44. The time from the start of DMA transfer of the image transfer DMAC 44 to the transfer end interrupt can be measured by the timer function of the CPU. The output DMAC is set in the same manner as the input DMAC 60, and the time between CPU interrupts can be measured.
[0067]
The data amount of the document 3 size set by the system control unit 31 is measured by D2 (byte), and the transfer time between the secondary storage unit (HD) 48 and the primary storage unit (image memory) 42 is S2 (sec). , The transfer time between the primary storage unit 42 and the image output unit is set to S3 (sec), the transfer capability Nout = D2 (byte) / (S2 + S3) (sec), and stored in the primary storage unit 42 as output capability unique data. Keep it.
[0068]
Whether or not to measure the transfer capability can be set by the operation unit 32, and the system control unit 31 determines whether or not to execute measurement based on the information, and controls the measurement operation. If the data transfer is very slow during the measurement, only the CPU is disabled for the measurement, which is not useful for preparing for the next transfer. If the transfer capability is lower than a certain standard after the previous measurement, the measurement is automatically stopped, so that useless measurement can be avoided. In the next data transfer, the data transfer can be performed by an operation capable of surely transferring the data.
[0069]
FIG. 7 is a flowchart showing a process of measuring the read transfer capability described above. First, it is determined whether or not to measure the transfer capability (whether or not to execute the transfer capability measurement mode) (step S1). If the transfer capability measurement mode is not to be executed (step S1: No), the process ends without performing the subsequent processes related to the transfer capability measurement. When execution of the transfer capability measurement mode is set by the operation unit 32 (step S1: Yes), the previous measurement result is compared with a reference value (step S2).
[0070]
If the previous measurement result is lower than the reference value (step S2: Yes), the process ends without performing the subsequent processes related to the transfer capability measurement. If the previous measurement result is higher than the reference value (Step S2: No), then the CPU waits for the first CPU interrupt to be generated by the input DMAC 60 (Step S3), and transfers due to the interrupt (Step S3: Yes). The counter for time measurement is initialized and counting by the timer is started (step S4).
[0071]
Next, it waits for the occurrence of a transfer interrupt to the secondary storage unit (HD) 48 (step S5). When a transfer interrupt occurs (Step S5: Yes), the transfer time S1 is calculated from the value of the counter (Step S6). Next, the transfer capacity N is calculated based on the data amount D1 of the document and the transfer speed S1, stored in the primary storage unit (image memory) 42 (step S7), and the processing ends.
[0072]
By measuring and storing the input / output transfer capability as described above, if the reading process of the next document occurs during the reading operation, if it can be determined that the data input operation is possible by the end of the input image transfer The reading process of the next document can be shifted without interrupting the reading operation. That is, it is possible to efficiently manage the acquisition and release of resources for obtaining the maximum utilization efficiency according to the processing capacity of the storage device, and efficiently control the data transfer operation.
[0073]
In the image forming apparatus of the present invention, when the image input / output unit and the storage unit are configured as separate units due to the configuration of the multifunction peripheral or the like, the image signal data transfer capability between these units is measured and stored and managed. Thus, the control of the storage unit can be shared regardless of the image input / output unit and its configuration. Further, even when a change such as a change or addition of the image input / output unit occurs, the image signal data transfer (input / output) can be controlled based on the measurement result at the time of the change, so that the versatility is improved. High data transfer control can be performed.
[0074]
By the way, when an image input / output unit whose image signal data transfer capability fluctuates is connected, the image input / output unit is used to control the priority and order of the image data operation of the storage unit based on the measurement result of the image signal data transfer capability. However, there is a concern that the reliability of the measurement result is low and the load on the control means (CPU) of the storage device required for the measurement also increases. However, by prohibiting the measurement of the image data transfer capability as necessary, the redundant processing is not executed depending on the configuration of the image forming apparatus, and the load for controlling the storage unit and the image forming apparatus is optimized. It becomes possible to do.
[0075]
For example, in a connection configuration in which the data transfer capability fluctuates (for example, when the image signal input / output path is a network or a universal data bus), the measurement of the data transfer capability is prohibited to optimize the data transfer control. It can be operated in the state.
[0076]
In addition, by enabling the user of the image forming apparatus to arbitrarily select whether or not to prohibit the measurement of the image data transfer capability using the operation unit, for example, when the state of the network can be managed, the measurement is performed. In this way, it is possible to make a selection that gives priority to the utilization efficiency of the image forming apparatus.
[0077]
Further, the storage unit prohibits (interrupts) the automatic image signal data transfer capability due to a condition such as a case where the measurement result of the image signal data transfer capability for a plurality of the same image signal transfer operations greatly fluctuates. Can automatically disable redundant processing, so that when the image signal input / output path of the image forming apparatus is not managed, the load on the control means (CPU) of the image forming apparatus can be reduced and image formation can be reduced. It is possible to optimize the utilization efficiency (productivity, etc.) of the device.
[0078]
In particular, there is a case where a device having a different capacity and processing speed of the storage unit is selected according to the type of the image forming apparatus (the level and function of productivity, the number and performance of connected image input / output units, the price, etc.). At this time, if it becomes necessary to execute a unique control (software) for each configuration of the selected storage device, the image forming apparatus has a basic configuration in which a common storage device is mounted. Control means must be individually designed for each type, which hinders improvement in development efficiency of the image forming apparatus. However, according to the present invention, it is possible to provide a means for performing common control for a storage device having a common configuration regardless of the configuration of the image forming apparatus, and to provide an image processing apparatus connected to the image forming apparatus. Image signal processing with the input / output means can be managed by a common characteristic value called image signal data transfer capability.
[0079]
It should be noted that the method relating to the transfer capability measurement described in the present embodiment can be realized by executing a prepared program on a computer such as a personal computer or a workstation. This program is recorded on a computer-readable recording medium such as a hard disk, a flexible disk, a CD-ROM, an MO, and a DVD, and is executed by being read from the recording medium by the computer. The program may be a transmission medium that can be distributed via a network such as the Internet.
[0080]
【The invention's effect】
As described above, according to the present invention, the device configuration on the image signal data transfer path is measured by measuring, storing, and controlling the data transfer capability of the image signal between the image input / output unit and the storage device. Even if a change such as a change or addition occurs, the data transfer control can always be operated efficiently and optimally based on the measurement result at the time of the change, and depending on the processing capacity of the storage device. There is an effect that resources acquisition and release management for obtaining maximum utilization efficiency can be managed, and processing of data transfer operation can be efficiently controlled.
[0081]
In addition, there is an effect that the control of the storage device can be shared irrespective of the image input / output means and its configuration. When the data transfer speed is low, the measurement operation is prohibited, the control load on the image forming apparatus is reduced, and the utilization efficiency of the apparatus can be optimized.
[Brief description of the drawings]
FIG. 1 is a block diagram illustrating an image forming apparatus of the present invention.
FIG. 2 is a top view of the document table 4;
FIG. 3 is a timing chart showing an image synchronization signal output from an image processing unit 8 of the reading unit 1.
FIG. 4 is a block diagram illustrating a configuration of a storage unit 33.
FIG. 5 is a block diagram showing a configuration of a memory control unit 43.
FIG. 6 is a diagram illustrating a descriptor access operation and a data transfer operation of the DMAC illustrated in FIG. 4;
FIG. 7 is a flowchart illustrating a process of measuring a reading transfer capability.
[Explanation of symbols]
1 Reading unit
2 Image forming unit
31 System control unit
32 Operation unit
33 storage unit
41 Image input / output DMAC
42 Image memory (primary storage unit)
43 Memory control unit
44 Image transfer DMAC
45 Code transfer DMAC
46 Compression / expansion device
47 HDD controller
48 HD (secondary storage unit)

Claims (6)

Image input means for inputting an image signal,
A storage unit comprising a primary storage unit for storing at least one or more image signals input to the image input unit, and a secondary storage unit for storing image signals of the primary storage unit;
Control means for reading out the image signal stored in the secondary storage unit at the time of image output, storing the image signal in the primary storage unit, and outputting from the image output unit,
The control means includes:
Measuring means for measuring the data transfer capability of the image signal between the image input means and the storage means,
An image forming apparatus comprising: a storage unit for storing the data transfer capability measured by the measurement unit; and controlling data transfer of the image signal based on the obtained data transfer capability. The measuring means,
The image forming apparatus according to claim 1, wherein a data transfer capability of the image signal between the image output unit and the storage unit is measured. 2. The data transfer capability according to claim 1, wherein the measuring unit calculates the data transfer capability based on a data amount of the image signal and a data transfer time between the primary storage unit and the secondary storage unit. The image forming apparatus according to any one of the above. The image forming apparatus according to claim 1, wherein the control unit includes a measurement prohibition unit that disables measurement by the measurement unit based on the data transfer capability. 5. The image forming apparatus according to claim 4, wherein the measurement prohibition unit can select whether or not to prohibit the setting based on a setting of an operation unit that receives an input operation. 6. The image according to claim 4, wherein the measurement prohibiting unit automatically disables the measurement when the measurement result of the data transfer capability of the image signal measured by the measuring unit is lower than a predetermined value. Forming equipment.

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