JP2002140288A - Information processing apparatus and DMA transfer method - Google Patents

Abstract

(57) [Problem] To enable DMA transfer even with a small storage capacity of an image memory, greatly reduce a preparation period required for executing image editing, and improve productivity. SOLUTION: The format information 57 of the descriptor information includes a CPU of a system control unit after completion of DMA transfer of image data based on one piece of descriptor information.
Instruction bit 58 for instructing whether an interrupt signal is transmitted or not
And a transfer instruction bit 59 for instructing whether to DMA-transfer the image data from the image memory or, instead, DMA-transfer predetermined white data. Interrupt instruction bit 58
When "1" is "1", an interrupt signal is transmitted to the CPU of the system control unit, and when "0" is not transmitted. Transfer instruction bit 5
When 9 is "0", the image data is transferred from the image memory to the DMA.
When the value is "0", the R
The white data stored in the OM is DMA-transferred.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] The present invention relates to an information processing apparatus and a DMA transfer method.

[0002]

2. Description of the Related Art In recent years, digitalization of copiers has progressed, and various techniques for processing and editing using an image memory have been proposed. As one of such techniques, there is a function called an electronic sort in which a specified number of copies are collectively output by storing image data of a plurality of documents in an image memory, thereby eliminating a sorting operation.

In this case, if the image data is stored in the semiconductor memory as it is in order to hold a plurality of image data, a memory corresponding to the data amount of the stored number is required, and the memory cost is reduced. The following means are generally used for the reason that the number becomes large.

[0004] A semiconductor memory and a storage memory are used in combination, and a secondary storage device such as a hard disk which is lower in cost than the semiconductor memory is used as the storage memory.

[0005] A semiconductor memory is used as a storage memory, and image data is compressed using a compression process to reduce the amount of data per image, thereby reducing the total memory amount.

[0006] Multiple image input / output means (image scanner, printer controller, file server, fax
Controller, etc.) to share the same image memory.

In order to execute input / output of image data to / from an image memory, a DMA (Direct Memory Acces
s) A memory controller (DMA controller) using a data transfer method is often used. DM
In the A data transfer method, there is a technique for transferring data to a specific area of an image memory based on memory area management information called descriptor information (see Japanese Patent Application Laid-Open No. 6-103225).

[0008]

In the above-described DMA data transfer method using descriptor information, image data of one image is divided into a plurality of pieces of image data, and each divided portion is divided by using different pieces of descriptor information. It is also possible to perform data transfer, for example, by using an image memory in the form of a ring buffer, it is possible to execute input / output of image data with a memory capacity smaller than the capacity of the target image data. it can.

By the way, image data input from image input means (image scanner, printer controller, file server, facsimile controller, etc.) is centered (transfer paper of a larger size than image data input by the image scanner). For example, when forming an image, an image based on the image data is placed at the center of the transfer paper and printed out), or the image is input to the image memory after adding a margin such as a binding margin. Conventionally, when such image editing / processing functions are realized, image editing is performed by securing a margin area to be added or a memory area larger than the input image data (corresponding to the transfer paper size).

In this case, by performing image editing, the memory capacity required for processing increases, and preprocessing (memory data clearing outside the input image data area or initial processing) for using the increased memory area is further performed. ) Occurs and the processing time is lengthened, resulting in a problem that the productivity of the copying machine is reduced.

As a result of the image moving process, even if there is unnecessary input image data (not output to the printer or stored in the image memory), the unnecessary memory area is retained. It is conceivable that the processing is performed as it is.

Further, a plurality of image input / output means (image scanner, printer controller, file server, FA
In an image forming apparatus such as a digital multi-function peripheral having an X controller, etc., a plurality of image data input / output requests may be simultaneously made to a single image memory.
Taking the operation of outputting the image data input from the image scanner to the image memory to the printer as an example, the following series of requests 1 to 5 is performed.

Requirement 1. Input image 1 from image scanner to image memory (scanner input) Request 2. 2. A binding margin is added to image 1 and output to the printer (requested during execution of request 1). 3. Input image 2 from image scanner to image memory (request during execution of request 2) 4. Output to the printer with image 2 binding margin added (required during execution of request 3). An image 3 having a binding margin is input from the image scanner to the image memory (requested during execution of the request 4). In such a case, in the operation control of the image memory,
If a plurality of data transfer requests can be processed simultaneously in parallel based on a plurality of data transfer requests so as to minimize the idle time for the execution, the productivity of the digital multi-function peripheral is improved.

That is, in the above example, if the same memory area of the image memory is read during the image data transfer of the request 1 (input to the image memory) and the request 2 is output to the printer, the processing time Is greatly reduced.

Similarly, during the data transfer of the request 2 (output from the first storage device to the printer), if another memory area is secured and the data transfer of the request 3 (input to the image memory) is executed, The time to process the entire request is greatly reduced.

Further, the same memory area used in the request 2 is selected as the memory area for the data transfer in the request 3, and an operation of overwriting a portion of the memory area where the data transfer of the image 1 has been completed is performed. By performing the control, the required capacity of the image memory can be reduced, and the manufacturing cost of the apparatus can be reduced.

However, when such processing is performed, the state of image data transfer including image processing processing for adding a binding margin is recognized, control of image data transfer execution timing, and image memory transfer are performed. It is necessary to secure the storage area and hold the image data in the image memory.

Specifically, when image data is output from the image memory, margin data is added to the leading end of the image in the sub-scanning direction, and then image output operation (image transfer) (output) is performed. When the image data is requested to be output from the image memory, the image data is held without being output, and the margin at the leading end in the sub-scanning direction is requested. Start outputting data. From the start to the end of the output of the margin data, the timing at which the output of the margin data is completed is detected while holding the image data, and the output of the image data is started. The switching of the output data transfer from the margin data to the image data needs to be completed almost instantaneously.

An object of the present invention is to enable DMA transfer with a small storage capacity of an image memory.

An object of the present invention is to significantly reduce the preparation period (preprocessing such as securing of a memory area and initialization) required for executing image editing and to improve productivity.

An object of the present invention is to eliminate the need for periodic monitoring of the data transfer state and unnecessary data transfer end determination.
The object is to reduce the processing load on the CPU.

[0022]

According to a first aspect of the present invention, there is provided an information processing apparatus in which a CPU performs information processing, a first storage device storing target data to be processed, and A plurality of pieces of descriptor information respectively corresponding to each of the divided parts for outputting the target data from one storage device into a plurality of image data of one image and sequentially performing the DMA transfer independently of the CPU. Descriptor information creating means for creating, a second storage device for storing the created plurality of descriptor information,
A DMA controller that sequentially executes the DMA transfer based on the stored plurality of descriptor information; and a third storage device that stores specific image data.
The descriptor information creating means transfers the image data stored in the first storage device as it is at the time of the DMA transfer or uses the image data stored in the third storage device as the descriptor information. An output instruction data for instructing the DMA controller whether to output uniform image data.

Therefore, even when performing image editing and processing operations such as image movement, the first storage device used for adding margin data to image data should have a minimum storage capacity excluding margin data. Can be. In addition, the period of preparation (preprocessing such as securing and initializing a memory area) required for executing image editing is significantly reduced, and the productivity of the information processing apparatus can be improved.

According to a second aspect of the present invention, the information processing is performed by a CP.
U, a first storage device for storing target data to be subjected to the information processing,
The output of the target data from the storage device is divided into a plurality of pieces of image data of one image, and the image data is sequentially output independently of the CPU.
A descriptor information creating means for creating a plurality of pieces of descriptor information corresponding to each of the divided parts for performing the MA transfer, a second storage device for storing the created plurality of pieces of descriptor information, A DMA controller for sequentially executing the DMA transfer based on the descriptor information, wherein the descriptor information creating means transfers the image data stored in the first storage device as it is to the respective descriptor information during the DMA transfer An output instruction data for instructing the DMA controller whether to perform image data transfer or not to perform image data transfer.

Therefore, even when performing image editing and processing operations such as image movement, the first storage device used for adding margin data to image data should have a minimum storage capacity excluding margin data. Can be. In addition, the period of preparation (preprocessing such as securing and initializing a memory area) required for executing image editing is significantly reduced, and the productivity of the information processing apparatus can be improved.

The third aspect of the present invention is the first or second aspect.
In the information processing apparatus described in the above, the descriptor information creation means may assign the descriptor information to the CPU after the end of the DMA transfer based on the descriptor information and before the start of the DMA transfer based on the next descriptor information. Interrupt instruction data for instructing the DMA controller whether or not to output an interrupt signal.

Therefore, the interrupt signal to the CPU causes
Since the end of the data transfer operation of the DMA controller can be determined, it is not necessary to periodically monitor the data transfer state (polling processing) or to judge the unnecessary end of the data transfer.
The processing load on the PU can be reduced.

According to a fourth aspect of the present invention, in the information processing apparatus according to any one of the first to third aspects, an image scanner for reading an image of a document and outputting image data is provided. A printer engine for forming an image on a sheet, wherein the first storage device inputs and outputs image data between the image scanner and the printer engine.

Therefore, in the case where the information processing apparatus is an image forming apparatus that reads an image of a document and forms an image on paper, the same operation as the invention according to any one of claims 1 to 3,
The effect can be achieved.

According to a fifth aspect of the present invention, the information processing is performed by a CP.
U, wherein the input and output of the image data to and from the first storage device for storing the image data to be processed is performed by DMA transfer independently of the CPU.
In the MA transfer method, output of the image data from the first storage device is performed by dividing the image data of one image into a plurality of pieces and sequentially performing the DMA transfer. A descriptor information creating step of creating the descriptor information and storing the descriptor information in a second storage device, and a DMA transfer step of sequentially executing the DMA transfer based on the stored plurality of descriptor information by a DMA controller, In the descriptor information creating step, the image data stored in the first storage device may be directly transferred to the respective descriptor information during the DMA transfer, or the specific image data stored in the third storage device may be used. Output instruction data for instructing the DMA controller whether to output uniform image data using Which is a DMA transfer method, characterized in that inclusion.

Therefore, even when performing image editing and processing operations such as image movement, the first storage device used for adding margin data to image data should have a minimum storage capacity excluding margin data. Can be. In addition, the period of preparation (preprocessing such as securing and initializing a memory area) required for executing image editing is significantly reduced, and the productivity of the information processing apparatus can be improved.

According to a sixth aspect of the present invention, the information processing is performed by a CP.
U, wherein the input and output of the image data to and from the first storage device for storing the image data to be processed is performed by DMA transfer independently of the CPU.
In the MA transfer method, output of the image data from the first storage device is performed by dividing the image data of one image into a plurality of pieces and sequentially performing the DMA transfer. A descriptor information creating step of creating the descriptor information and storing the descriptor information in a second storage device, and a DMA transfer step of sequentially executing the DMA transfer based on the stored plurality of descriptor information by a DMA controller, The descriptor information creating step instructs the DMA controller to transfer the image data stored in the first storage device as it is or not to transfer the image data in the DMA transfer to the respective descriptor information. This is a DMA transfer method characterized by including output instruction data.

Therefore, even when performing image editing and processing operations such as image movement, the first storage device used for adding margin data to image data should have a minimum storage capacity excluding margin data. Can be. In addition, the period of preparation (preprocessing such as securing and initializing a memory area) required for executing image editing is significantly reduced, and the productivity of the information processing apparatus can be improved.

[0034]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described.

FIG. 1 is a conceptual diagram illustrating a schematic configuration of a digital copying machine 1 according to an embodiment of the present invention. The digital copying machine 1 implements the information processing apparatus of the present invention, and includes an image reading unit 2, an image forming unit 3,
AX unit 4, selector unit 5, storage unit 6, operation unit 7
And a system control unit 8.

The image reading unit 2 scans the original G by exposing and scanning it along an original table 11 with a movable exposure lamp 12, and receives the reflected light by a CCD image sensor 16 via an optical system such as mirrors 13 to 15. Thus, the image scanner reads the image of the document G. Then, in an IPU (image processing unit) 17, processing such as shading correction is performed on the image signal output from the CCD image sensor 16, A / D converted to an 8-bit digital signal, and scaling processing is performed. Image processing such as dither processing is performed. The processed image data is output together with the image synchronization signal. The scanner control unit 18 captures detection signals of various sensors and outputs control signals to actuators such as various drive motors in order to execute the process of the image reading unit 2 described above. Also, IP
Various parameters are set in U17.

Here, the image synchronizing signal output from the IPU 17 of the image reading section 2 will be described with reference to the timing chart shown in FIG. That is, the frame gate signal (/ FGATE) is a signal indicating an image effective range for the image area in the sub-scanning direction, and image data is valid while this signal is at the L level (low active). The frame gate signal (/ FGATE) is asserted at the falling edge of the line synchronization signal (/ LSYNC), or
Negated. The line synchronization signal (/ LSYNC) is asserted for a predetermined number of clocks at the rising edge of the pixel synchronization signal (PCLK), and after the rising of this signal, the image data in the main scanning direction becomes valid after a predetermined clock. The transmitted image data is one for one cycle of the pixel synchronization signal (PCLK). The image data is sent out as raster format data starting from the arrow. The effective sub-scanning range of image data is usually determined by the size of the transfer paper.

As shown in FIG. 1, in the image forming section 3 which is a printer engine, the photosensitive member 22 is uniformly charged by the charging charger 21 and the image is read from the charged photosensitive member 22 which rotates at a constant speed. Exposure is performed with laser light modulated by the optical writing unit 23 based on the image data output from the unit 2 to form an electrostatic latent image. The electrostatic latent image on the photoreceptor 22 becomes a visible toner image by being developed with toner by the developing device 24. Then, the transfer paper, which has been fed in advance from the paper feed tray 26 by the paper feed roller 25 and is kept on standby by the registration roller 27, is transported at a timing with the photoconductor 22, and is transferred by the transfer charger 28. The upper toner image is electrostatically transferred to transfer paper. Thereafter, the transfer paper is separated from the photoconductor 22 by the separation charger 29, and the toner image on the transfer paper is fixed to the fixing device 30.
Is fixed by heating, and the discharge tray 31 is driven by the discharge roller 31.
2 is discharged. On the other hand, the toner remaining on the photoconductor 22 after the electrostatic transfer is removed by the cleaning device 33.
The photoconductor 22 is neutralized by the neutralization charger 34. The plotter control unit 35 captures detection signals of various sensors and outputs control signals to actuators such as various drive motors in order to execute the process of the image forming unit 3 described above. The image forming unit 3 can use not only the electrophotographic method as described above but also various printing formats such as an ink jet method.

The operation unit 7 includes various keys for receiving various operations from the user, an LCD display for displaying various messages to the user, and the like.

The system control unit 8 includes a CPU and performs various information processing. That is, an input from the user to the operation unit 7 is detected, and the image reading unit 2, the storage unit 6, the image forming unit 3,
The setting of various parameters to the FAX unit 4 and the instruction to execute a process are performed by communication.

The FAX unit 4 converts the image data read by the image reading unit 2 into G
(3) Binary compression is performed based on the G4 facsimile data transfer rules and transferred to an external destination via a telephone line.
Also, receiving image data from outside via a telephone line,
This image data is restored to binary image data,
The image is formed in the image forming unit 3.

The selector section 5 changes the state of the selector in accordance with an instruction from the system control section 8 and changes the state of the selector.
The source of the image data for forming the image is switched to an image signal output from any one of the image reading unit 2, the storage unit 6, and the FAX unit 4.

The storage unit 6 stores image data of the document G normally input from the IPU 17 and is used for copy applications such as repeat copy and rotation copy. It is also used as a buffer memory for temporarily storing the binary image data from the FAX unit 4. These data storage instructions are given by the system control unit 8.

Next, the detailed configuration of the storage unit 6 will be described with reference to FIG. As shown in FIG. 3, the image input / output DMAC (in the description of the embodiment of the present invention,
“DMA controller” is simply called “DMAC”.
Reference numeral 1 denotes a CPU and a logic LSI, which communicates with the memory control unit 42 to receive a command, performs an operation setting in accordance with the command, and performs image input / output DMAC.
41 to transmit status information to inform the status of itself. When an image input command is received, the input image data is packed as 8-pixel memory data according to the input image synchronization signal, and output to the memory control unit 42 together with the memory access signal as needed. When receiving an image output command, it outputs image data from the memory control unit 42 in synchronization with an output image synchronization signal.

The image memory 43, which is the first storage device,
A memory for storing image data, which is composed of a semiconductor storage element such as a DRAM. In this example, the total amount of memory is 400 dpi, which is four times the A3 size of binary image data.
A total of 8 Mbytes and 4Mbytes for storage of electronic sorts
MB. The image memory 43 includes a memory control unit 42
And read and write control.

The memory control section 42 is composed of a CPU and a logic LSI, communicates with the system control section 8 to receive a command, sets an operation according to the command, and informs the state of the storage section 6. Send status information.

The operation commands from the system control unit 8 include image input, image output, compression, decompression, and the like. Commands such as image input and image output include the image input / output DMAC 41.
Sent to. Commands such as compression and decompression are transmitted to the image transfer DMAC 44, code transfer DMAC 45, and compression / decompression unit 46, respectively.

FIG. 4 is a block diagram showing a detailed configuration of the memory control unit 42. As shown in FIG.
Reference numeral 7 denotes an image input / output DMAC 41 and an image transfer DMAC 4
4. Arbitrate the memory access request signal from the code transfer DMAC 45 and output an access permission signal. Arbiter 4
7 has a built-in refresh control circuit, the priority order is the refresh control circuit, the image input / output DMAC 41, the image transfer DMAC 44, and the code transfer DMAC 45. Actively output the access permission signal. Further, it outputs an enable signal and selects an address of the image memory 43, and outputs a trigger signal indicating the start of memory access to the access control circuit 48.

The input physical address is determined by a signal from the access control circuit 48.
Are divided into a row address and a column address corresponding to the image memory 43 constituted by the image memory 43, and output to an 11-bit address bus. In accordance with the access start signal from the arbiter 47, the DRAM control signals (RAS, CAS, W
E) is output to the image memory 43.

The image transfer DMAC 44 is composed of a CPU and a logic LSI, communicates with the memory control unit 42 to receive a command, sets an operation according to the command, and sets a state as shown in FIG. Is transmitted as status information to inform the user. When a compression command is received, a memory access request signal is output to the memory control unit 42. When the memory access permission signal is active, image data is received and transferred to the compression / expansion unit 46. Further, it incorporates an address counter that counts up in response to a memory access request signal, and outputs a 22-bit memory address indicating a storage location where image data is stored.

The code transfer DMAC 45 is constituted by a CPU and a logic LSI, communicates with the memory control unit 42, receives a command, performs an operation setting according to the command, and transmits as status information to notify a state. I do. When a decompression command is received, a memory access request signal is output to the memory control unit 42, and when the memory access permission signal is active, image data is received and transferred to the compression / decompression unit 46. Further, it incorporates an address counter that counts up in response to a memory access request signal, and outputs a 22-bit memory address indicating a storage location where image data is stored.

The compression / expansion unit 46 includes a CPU and a logic L
It is configured with an SI, communicates with the memory control unit 42, receives a command, performs operation setting according to the command,
Also, it is transmitted as status information to inform the state. The compression / expansion unit 46 compresses the binary image data by the MH encoding method.

FIG. 5 is a schematic diagram of the internal configuration of the image memory 43. As shown in FIG. 5, the image memory 43 stores a second descriptor information 53 (see FIG. 6) described later.
Is divided into a descriptor area 51, which is a storage device, and an image area 52, which is a first storage device for storing image data.

FIG. 6 is a block diagram showing the data structure of the descriptor information 53 used in the DMA transfer processing using the image memory 43. In this DMA transfer processing, 1
In order to divide the image data of a single image into a plurality of pieces, prepare descriptor information 53 for each of the divided portions, and transfer the image data of one image by DMA, a plurality of pieces of descriptor information 53 are created. The descriptor information 53 described below is used by the image input / output DMAC 41.

As shown in FIG. 6, chain destination address 5
4 is address data in which the next descriptor information 53 is stored. Also, the next descriptor information 5
If there is no 3, a numerical value indicating the end is stored.
The data storage destination address 55 is address data in which image data to be subjected to DMA transfer is stored. The data transfer word number 56 indicates the capacity of the data to be transferred by the number of words. The format information 57 indicates the format of the image data to be DMA-transferred.

As shown in FIG. 7, format information 57
After the completion of the DMA transfer of the image data based on one piece of descriptor information 53, the CPU of the system control unit 8
, An interrupt instruction bit 58 which is interrupt instruction data for instructing whether or not an interrupt signal is transmitted, and a transfer instruction for instructing whether image data is to be DMA-transferred from the image memory 43 or predetermined white data is to be DMA-transferred. Data transfer instruction bit 5
9 is included. When the interrupt instruction bit 58 is "1", an interrupt signal is transmitted to the CPU of the system control unit 8,
When it is "0", it instructs not to transmit. When the transfer instruction bit 59 is "0", the image data is DMA-transferred from the image memory 43. When the transfer instruction bit 59 is "1", the white data stored as fixed data in the ROM of the input / output DMAC 41 as the third storage device is read. Instruct each to perform DMA transfer.

Next, the DMA transfer processing of image data performed using the image memory 43 will be described. The example described below is for the case of performing DMA transfer of image data from the image reading unit 2 to the image memory 43.

First, as shown in FIG. 8, when there is a request to transfer image data from the image reading unit 2 to the image memory 43 (Y in step S1), the system control unit 8 .. Are generated.

That is, from the image reading unit 2 to the image memory 4
It is determined whether there is a request to create a margin as a margin at the leading end in the sub-scanning direction for one image to be transferred to No. 3 (step S2). When there is a request to create a binding margin at the leading end of the image in the sub-scanning direction (Y in step S2), the leading descriptor information 53 of the plurality of descriptor information 53 to be created is replaced with the leading end. And the transfer instruction bit 59 is set to "1" and the interrupt instruction bit 58, which is the interrupt instruction data, is set to "1". (Step S3).

Next, it is determined whether there is a request to create a binding margin at the rear end in the sub-scanning direction for one image to be transferred from the image reading unit 2 to the image memory 43. (Step S4). When there is a request to create a binding margin at the rear end portion (Y in step S4), one or a plurality of pieces of descriptor information 53 other than the last descriptor information 53 (if N in step S2, the first descriptor information 53) (Including information 53) are sequentially created (step S5). At this time, the transfer instruction bit 59 is created as “0” and the interrupt instruction bit 58 is created as “1”.
Then, the last descriptor information 53 is made to correspond to the number of lines of the binding margin at the rear end portion (the number of data transfer words 56), the transfer instruction bit 59 is set to "1", and the interrupt instruction data. The interrupt instruction bit 58 is created as "1" (step S6), and the process ends.

If there is no request to create a binding margin at the trailing end (N in step S4), one or more remaining descriptor information 53 (if N in step S2, the first descriptor information 53 is also included) Are sequentially created (step S7), and the process ends. At this time, the transfer instruction bit 59 is created as “0” and the interrupt instruction bit 58 is created as “1”. Steps S3, S5 to S7 implement a descriptor information creation unit and a descriptor information creation step.

Next, the DMA transfer processing performed using the descriptor information 53 will be described. When the memory control unit 42 receives the command output in step S7, it activates the image input / output DMAC 41 and
The MAC 41 performs the processing shown in FIG.

That is, the image input / output DMAC 41 transfers the descriptor information 53, 53,... Stored in the descriptor area 51 of the image memory 43 to the image input / output D
It is stored in a register (descriptor storage register) prepared in the MAC 41 (step S11). And
.. Are processed in order from the first one. First, the value of the transfer instruction bit 59 is determined (step S12). If this value is "0" (Y in step S12), the image data is DMA-transferred to the image area 52 of the image memory 43 as it is (step S12). S1
3) If it is "1" (N in step S12), uniform white data is DMA-transferred using the white data stored in the ROM of the image input / output DMAC 41 (step S14). The steps S13 and S14 implement the DMA transfer process. After the processing in steps S13 and S14, the value of the interrupt instruction bit 58 is determined (step S1).
5) When this value is "1" (Y in step S15), an interrupt signal is transmitted to the CPU of the system control unit 8 (step S16). The processing of the above steps S12 to S16 is sequentially performed from the first descriptor information 53 to the last descriptor information 53 (N in step S17). When the processing of the last descriptor information 53 is completed (Y in step S17), the processing is performed. To end.

According to the digital copying machine 1 described above,
Even when performing image editing and processing operations such as image movement, the image memory 43 used to add margin data to image data only needs to store image data excluding margin data, so that a minimum storage capacity is required. Can be In addition, the period of preparation (pre-processing such as securing memory area and initialization) required to execute image editing is significantly reduced,
The productivity of the digital copying machine 1 can be improved.

Further, the end of the data transfer operation of the input / output DMAC 41 can be determined by the interrupt signal to the CPU of the system control unit 8, so that the data transfer state is periodically monitored (polling processing) and unnecessary data transfer is performed. It is not necessary to determine the end, and the processing load on the CPU of the system control unit 8 can be reduced.

In the above-described example, an example has been described in which the specific white data is output when the value of the transfer instruction bit 59 is “1”. However, when the value of the transfer instruction bit 59 is “1”, The same object can be achieved even in the idle period in which no image data is transferred.

The storage section 6 can compress and decompress the image data stored in the image memory 43 using the compression / decompression device 46. In this case, the transfer of the image data from the image memory 43 to the compression / expansion unit 46 is performed by the image transfer DM.
When the code data after compression and decompression is returned from the compression / decompression device 46 to the image memory 43 using the AC 44, the code transfer DMAC 45 is used. Image transfer DMAC 44,
The operation of the code transfer DMAC 45 can also be performed according to the descriptor information.

Although the embodiment of the present invention has been described by way of an example in which the present invention is applied to a digital copying machine, it goes without saying that the information processing apparatus of the present invention can be applied to various information processing apparatuses such as a PC.

[0069]

According to the first aspect of the present invention, the first storage device used for adding margin data to the image data does not remove the margin data even when performing an image editing / processing operation such as image movement. Minimum storage capacity.
In addition, the period of preparation (preprocessing such as securing and initializing a memory area) required for executing image editing is significantly reduced, and the productivity of the information processing apparatus can be improved.

According to the second aspect of the present invention, even when performing an image editing / processing operation such as image movement, the first storage device used for adding margin data to the image data is a minimum storage device excluding the margin data. Storage capacity. In addition, the period of preparation (pre-processing such as securing memory area and initialization) required to execute image editing is significantly reduced,
The productivity of the information processing device can be improved.

The invention described in claim 3 is the invention according to claim 1 or 2
In the information processing apparatus described in (1), the end of the data transfer operation of the DMA controller can be determined by the interrupt signal to the CPU, so that the data transfer state is periodically monitored (polling processing) and unnecessary data transfer end is determined. Becomes unnecessary, and the processing load on the CPU can be reduced.

According to a fourth aspect of the present invention, in the information processing apparatus according to any one of the first to third aspects, the information processing apparatus reads an image of a document and forms an image on a sheet. In this case, the same operation and effect as the invention according to any one of claims 1 to 3 can be obtained.

According to the fifth aspect of the present invention, even when an image editing / processing operation such as image movement is performed, the first storage device used for adding margin data to the image data is a minimum storage device excluding the margin data. Storage capacity. In addition, the period of preparation (pre-processing such as securing memory area and initialization) required to execute image editing is significantly reduced,
The productivity of the information processing device can be improved.

According to a sixth aspect of the present invention, even when performing an image editing / processing operation such as image movement, the first storage device used for adding margin data to the image data is a minimum storage device excluding the margin data. Storage capacity. In addition, the period of preparation (pre-processing such as securing memory area and initialization) required to execute image editing is significantly reduced,
The productivity of the information processing device can be improved.

[Brief description of the drawings]

FIG. 1 is a conceptual diagram illustrating a schematic configuration of a digital copying machine according to an embodiment of the present invention.

FIG. 2 is a timing chart illustrating an image synchronization signal output from an IPU of the digital copying machine.

FIG. 3 is a block diagram illustrating a detailed configuration of a storage unit of the digital copying machine.

FIG. 4 is a block diagram illustrating a detailed configuration of a memory control unit of the storage unit.

FIG. 5 is a block diagram illustrating an image memory of the storage unit.

FIG. 6 is a block diagram illustrating descriptor information used in DMA transfer of the digital copying machine.

FIG. 7 is a block diagram illustrating a configuration of format information of the descriptor information.

FIG. 8 is a flowchart illustrating a process of creating the descriptor information.

FIG. 9 is a flowchart illustrating a DMA transfer process of image data to an image memory using the descriptor information.

[Explanation of symbols]

 Reference Signs List 1 information processing device 2 image scanner 3 printer engine 41 DMA controller, third storage device 51 second storage device 52 first storage device 53 descriptor information 58 interrupt instruction data 59 transfer instruction data

Continued on the front page (72) Inventor Yasuhiro Hattori 1-3-6 Nakamagome, Ota-ku, Tokyo Inside Ricoh Company (72) Inventor Yasumitsu Shimizu 1-3-6 Nakamagome, Ota-ku, Tokyo Inside Ricoh Company (72) Inventor Takao Okamura 1-3-6 Nakamagome, Ota-ku, Tokyo F-term in Ricoh Co., Ltd. (reference) 5B047 EA05 EB06 EB15 EB17 5B061 BA02 BA03 CC09 DD04 DD11 PP05 5C073 AA06 BB07 BD02 5C076 AA03 AA37 BA03 BA04

Claims (6)

[Claims] 1. An information processing apparatus in which a CPU performs information processing, comprising: a first storage device for storing target data to be processed, and an output of the target data from the first storage device being one of Descriptor information creating means for creating a plurality of pieces of descriptor information corresponding to each of the divided portions for dividing the image data of the image into a plurality of pieces and sequentially performing the DMA transfer independently of the CPU; Second to store descriptor information
, A DMA controller that sequentially executes the DMA transfer based on the stored plurality of descriptor information, and a third storage device that stores specific image data. In each of the descriptor information, the image data stored in the first storage device is transferred as it is in the DMA transfer, or uniform image data is stored using the image data stored in the third storage device. An information processing apparatus comprising output instruction data for instructing the DMA controller whether to output. 2. An information processing apparatus in which a CPU performs information processing, comprising: a first storage device for storing target data to be processed, and an output of the target data from the first storage device being one of Descriptor information creating means for creating a plurality of pieces of descriptor information corresponding to each of the divided portions for dividing the image data of the image into a plurality of pieces and sequentially performing the DMA transfer independently of the CPU; Second to store descriptor information
And a DMA controller for sequentially executing the DMA transfer based on the stored plurality of pieces of descriptor information. The descriptor information creation means stores the first storage in the descriptor information in the DMA transfer. An information processing apparatus comprising output instruction data for instructing the DMA controller whether to directly transfer image data stored in the apparatus or not to transfer the image data. 3. The descriptor information creating means includes an interrupt signal to the CPU after the completion of the DMA transfer based on the descriptor information and before the start of the DMA transfer based on the next descriptor information. 2. An apparatus according to claim 1, further comprising interrupt instruction data for instructing the DMA controller whether to output the data.
Or the information processing device according to 2. 4. An image scanner that reads an image of a document and outputs image data, and a printer engine that forms an image on paper based on the image data, wherein the first storage device includes the image scanner and The information processing apparatus according to claim 1, wherein input / output of image data is performed with the printer engine. 5. An information processing device in which a CPU performs information processing, and inputs and outputs the image data to and from a first storage device that stores the image data to be processed.
In the DMA transfer method of performing the DMA transfer independently of the PU, the output for outputting the image data from the first storage device is performed by dividing the image data of one image into a plurality of image data and sequentially performing the DMA transfer. A descriptor information creating step of creating a plurality of the descriptor information corresponding to each part and storing the descriptor information in the second storage device, and a DMA controller for sequentially executing the DMA transfer based on the stored plurality of descriptor information by a DMA controller
A transfer step, wherein the descriptor information creating step includes transferring the image data stored in the first storage device as it is at the time of the DMA transfer to the respective descriptor information, or transferring the image data to the third storage device. A DMA transfer method comprising: output instruction data for instructing the DMA controller whether to output uniform image data by using stored specific image data. 6. An information processing apparatus in which a CPU performs information processing, and inputs and outputs the image data to and from a first storage device that stores the image data to be processed.
In the DMA transfer method of performing the DMA transfer independently of the PU, the output for outputting the image data from the first storage device is performed by dividing the image data of one image into a plurality of image data and sequentially performing the DMA transfer. A descriptor information creating step of creating a plurality of the descriptor information corresponding to each part and storing the descriptor information in the second storage device, and a DMA controller for sequentially executing the DMA transfer based on the stored plurality of descriptor information by a DMA controller
The descriptor information creating step is to transfer the image data stored in the first storage device as it is at the time of the DMA transfer to the respective descriptor information or to perform the transfer of the image data. A DMA transfer method including output instruction data for instructing the DMA controller whether or not the DMA transfer is present.