JP2004014599A - Semiconductor device and method of manufacturing the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device that is high in performance and reliability by connecting a semiconductor chip, an insulation substrate and a heat sink without using a solder. <P>SOLUTION: The outermost surface film 41a of a rear electrode of a semiconductor chip 11 and the outermost surface film 41b of a circuit pattern 15a are made of the same material, and they are faced each other while they are pressurized and vibrated by an ultrasonic frequency. Thus, the same metals formed on the outermost surfaces (boundary) are diffused each other, so that they can be directly connected with each other in a solderless way. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a semiconductor device such as an IGBT (insulated gate bipolar transistor) module.
[0002]
[Prior art]
As a package structure of a semiconductor device such as an IGBT module, a case structure as shown in FIG. 6 is mainly used. In the case structure, a heat sink 16 as a cooling body, a Direct Bonding Cupper substrate, an insulating substrate 15 having a circuit pattern of copper foil formed on a ceramic substrate made of alumina or aluminum nitride, and a semiconductor chip 11 are joined by solder 12. Is bonded to a resin-molded case 17. The case 17 is filled with a gel 18 for the purpose of protecting the semiconductor chip 11, the wires 13, and the insulating substrate 15 from moisture, moisture, and dust. For electrical connection, a wire is bonded to the front surface of the semiconductor chip 11 and the back surface of the semiconductor chip 11 is soldered to a circuit pattern copper film (not shown) formed on the insulating substrate 15.
[0003]
FIG. 7 is a sectional view of a main part of the semiconductor chip. This figure shows a 1/2 cell. On the side of the surface electrode 20 of the semiconductor chip 11, a gate oxide film 22, a gate electrode 23 formed of polysilicon, an interlayer insulating film 24, a surface electrode film 25, and a semiconductor substrate 21 (for example, silicon) are illustrated. A protection film is formed, and the step shape (cell) is repeated a plurality of times to form a semiconductor chip. On the other hand, on the back electrode 30 side, an Al layer 31, a Ti layer 32, a Ni layer 33, and an Au layer 34 are stacked in a solid film state in order to secure solder bonding. Note that the Au layer 34 is the outermost surface film. Also, the dotted lines in the figure indicate the emitter region, well region, drift region, and collector region formed in the semiconductor substrate 21 in the case of an IGBT cell.
[0004]
In the conventional semiconductor device, the back electrode 30 of the semiconductor chip 11 is soldered to a circuit pattern formed on the surface of the insulating substrate 15, and the back copper foil of the insulating substrate 15 is soldered to a heat sink 16 as a cooling body. I have. For this reason, in a reliability test in which heat (temperature) changes, such as in a power cycle, a crack may be generated in a solder joint due to a thermal stress generated due to a difference in linear expansion coefficient between components.
[0005]
Recently, the size of the semiconductor chip 11 has been increased, and the distortion to the solder joint due to thermal stress has been further increased. In such a situation, using solder bonding as a bonding method may provide a power module with low reliability. Further, the wire 13 connected to the surface electrode of the semiconductor chip 11 has a large wiring resistance and inductance, and may not sufficiently exhibit the characteristics of the semiconductor device.
[0006]
[Problems to be solved by the invention]
In a conventional semiconductor device using solder bonding, a distortion occurs in the solder bonding layer due to thermal stress in actual use, and cracks are formed in the solder bonding layer according to the Coffin-Manson rule (a law indicating the relationship between strain and fatigue life). Elongate (the greater the strain, the faster the cracks develop and the shorter the fatigue life).
[0007]
In addition, semiconductor chips have been increased in size, and it has become difficult for wiring methods based on wire bonding to make full use of the performance of semiconductor devices.
Therefore, it is a problem how the back electrode of the semiconductor chip can be joined to the circuit pattern formed on the insulating substrate by a method without using solder, and how stable electrical connection to the front electrode can be ensured. .
[0008]
SUMMARY OF THE INVENTION The object of the present invention is to solve the above-mentioned problems and to provide a bonding between the back surface of a semiconductor chip and an insulating substrate, a bonding between a front surface of a semiconductor chip and an external conductor, and a bonding between an insulating substrate and a cooling body (heat sink). It is an object of the present invention to provide a high-performance and high-reliability semiconductor device by performing bonding without using solder.
[0009]
[Means for Solving the Problems]
In order to achieve the above object, in a semiconductor device in which a back electrode formed on a back surface of a semiconductor chip and a circuit pattern conductive plate formed on an insulating substrate are connected, the back electrode and each surface of the circuit pattern conductive plate are provided. Are made of the same material, and their surfaces are brought into direct contact with each other for direct metal bonding.
[0010]
Further, in a semiconductor device in which a surface electrode formed on the surface of a semiconductor chip and a conductor are connected to each other, the surfaces of the surface electrode and the conductor are made of the same material, and the surfaces are brought into direct contact with each other for direct metal bonding.
Further, in a semiconductor device in which a conductive plate formed on the back surface of an insulating substrate on which a circuit pattern conductive plate is formed and a radiator are connected, the surfaces of the conductive plate and the radiator are made of the same material, and the surfaces of the conductive plate and the radiator are directly connected to each other. It is configured to be brought into contact and directly joined to the metal.
[0011]
In a semiconductor device in which a back electrode formed on a back surface of a semiconductor chip is connected to a circuit pattern conductive plate formed on an insulating substrate, the back electrode and each surface of the circuit pattern conductive plate are flattened to a predetermined roughness. Metallization by directly contacting the flattened surface.
In a semiconductor device in which a surface electrode formed on a surface of a semiconductor chip is connected to a conductor, the surfaces of the surface electrode and the conductor are flattened with a predetermined roughness, and the flattened surfaces are brought into direct contact. Metal bonding directly.
[0012]
Further, in a semiconductor device in which a conductive plate formed on the back surface of an insulating substrate on which a circuit pattern conductive plate is formed and a radiator are connected, the surfaces of the conductive plate and the radiator are flattened with a predetermined roughness, and The metallized surface is brought into direct contact with the metal directly.
Further, the predetermined roughness is preferably 10 nm or less.
Further, in the method of manufacturing a semiconductor device, in order to obtain the predetermined roughness, each surface which is a processing surface is subjected to a CMP (Chemical Mechanical Polishing) process and a cleaning process by activation in an inert atmosphere which is not oxidized. Manufacturing method.
[0013]
In the method of manufacturing a semiconductor device, the surfaces may be pressurized and subjected to at least one of ultrasonic vibration and heating to perform direct metal bonding.
As described above, direct metal joining can be performed by applying the ultrasonic vibration while applying the same material to the surfaces of the members to be joined together. Heating further facilitates direct metal bonding. Further, by making the surface roughness of the members to be joined to each other a flat surface of the order of nanometers, an intermolecular force acts and direct metal joining can be performed by applying ultrasonic vibration while applying pressure or heating.
[0014]
BEST MODE FOR CARRYING OUT THE INVENTION
FIG. 1 is a sectional view of a main part of a semiconductor device according to a first embodiment of the present invention. This figure corresponds to the semiconductor chip 11, the insulating substrate 15, and the heat sink 16 in FIG. 6, and the case 17 and the terminals 14 are omitted. The same parts as those in FIG. 6 are denoted by the same reference numerals.
[0015]
The outermost surface film 41a of the back electrode 30 (see FIG. 7) of the semiconductor chip 11 is formed by depositing a Ni layer, a Cu layer, an Al layer, or a noble metal layer (Au layer) by vapor deposition, sputtering, or plating. On the other hand, the outermost surface film 41b of the circuit pattern 15a on the insulating substrate 15 for joining the semiconductor chip 11 is also made of the same material as the outermost surface film 41a of the back electrode 30 of the semiconductor chip 11, such as a Ni layer, a Cu layer, an Al layer, or a noble metal. A layer (such as an Au layer) is formed by vapor deposition, sputtering, or plating. Then, the back electrode 30 of the semiconductor chip covered with the outermost films 41a and 41b and the circuit pattern 15a formed on the insulating substrate 15 are arranged facing each other, and ultrasonic vibration is performed while applying pressure. By heating, the same metal formed on the outermost surface (interface) is diffused with each other and directly metal-joined without solder. The conditions for direct metal bonding by ultrasonic vibration are, for example, when the size of the semiconductor chip is 5 mm □ to 10 mm □, the ultrasonic vibration frequency is about 20 kHz to 40 kHz, and the pressing force is 10 kg (9.8 × 10 N) to 40 kg. (9.8 × 40N), and the time is about 0.3 sec to 0.6 sec. When the area of the semiconductor chip 11 increases, the pressing force is increased according to the chip size. The temperature for heating may be about 150 ° C. or less. The roughness of the outermost surfaces 41a and 41b is preferably as small as possible, but may be on the order of μm or less.
[0016]
In order to reduce thermal stress due to a difference in linear expansion coefficient between the semiconductor chip 11 and the circuit pattern 15a, the circuit pattern 15a is annealed or provided with a groove 42 in the circuit pattern 15a so as to surround the semiconductor chip 11.
Further, the direct metal bonding means that the metals to be bonded are directly brought into contact with each other without any intervention between the metals to be bonded.
[0017]
FIG. 2 is a sectional view showing a main part of a semiconductor device according to a second embodiment of the present invention. The back electrode 30 of the semiconductor chip 11 is formed by forming a Si substrate or a Ti film or a Cr film. Next, the circuit pattern 15a formed on the back electrode 30 of the semiconductor chip 11 and the surface of the insulating substrate 15 is flattened to a surface roughness of 100 nm or less by a CMP (chemical mechanical polishing) apparatus or the like. Further, using a dry etching device, Ar or the like is sputtered and activated in an inert atmosphere (N ₂ reduced pressure atmosphere or vacuum atmosphere) so as not to oxidize the processed flat surface, and the surface roughness is reduced. Is flattened to 10 nm or less, and the back electrode 30 of the semiconductor chip 11 and the circuit pattern 15a on the insulating substrate 15 are superposed and pressurized to perform direct metal bonding. Depending on the state of the flat surface, heat-pressing or ultrasonic vibration while pressurizing allows direct metal bonding without the use of solder due to the force between atoms (molecules). In order to reduce thermal stress due to a difference in linear expansion coefficient between the semiconductor chip 11 and the circuit pattern 15a, the circuit pattern 15a is annealed or provided with a groove 42 in the circuit pattern 15a so as to surround the semiconductor chip 11. Further, it is preferable that the outermost surface of the back electrode 30 and the outermost surface of the circuit pattern 15a be the same metal.
[0018]
FIG. 3 is a sectional view showing a main part of a semiconductor device according to a third embodiment of the present invention. The front end portion 44 of the lead frame 43 that is directly metal-bonded to the surface electrode film 25 of the semiconductor chip 11 is processed into a convex shape so that the lead frame 43 does not contact the guard ring portion. Direct contact and direct metal bonding to each other. In addition, as shown in FIG. 4, the surface electrode film 25 of the semiconductor chip 11 is deposited higher than the guard ring portion so that the lead frame 43 can be in direct contact with the metal, so that direct metal bonding is performed. The joint of the lead frame 43 with the semiconductor chip 11 is annealed or provided with a groove 42 shown in FIG. 3 for thermal stress relaxation. Since the surface area is increased by the groove 42 of the lead frame 43, the groove 42 also has a function of improving heat dissipation. The method of direct metal bonding is the same as in the first and second embodiments.
[0019]
FIG. 5 is a sectional view showing a main part of a semiconductor device according to a fourth embodiment of the present invention. The surface of the back surface conductive film 15c of the insulating substrate and the surface of the heat sink 16 are directly overlapped, and are directly metal-bonded. A groove 42 is provided on the surface of the heat sink 16 so as to surround the back surface conductive film 15c of the insulating substrate outside the back surface conductive film 15c of the insulating substrate. The method of direct metal joining is the same as the method of the first and second embodiments.
[0020]
As described in the first to fourth embodiments, the outermost surface film 41a of the back surface electrode of the semiconductor chip 11, the outermost surface film 41b of the circuit pattern 15a of the insulating substrate 15, the surface electrode film 25 of the semiconductor chip 11, and the lead. By forming the film and the back surface conductive film 15c of the insulating substrate 15 and the heat sink 16 with the same metal, respectively, or by processing at the nano-order level, soldering and wire bonding work in the assembling process become unnecessary. Since the thermal resistance of the solder bonding layer can be eliminated, a high-performance semiconductor device can be provided.
[0021]
Note that these embodiments are common to power semiconductor devices (IGBTs, diodes, thyristors, transistors, MOSFETs, and the like) that use a semiconductor chip joined to a circuit pattern.
[0022]
【The invention's effect】
According to the present invention, since the outermost metal films of the back electrode film of the semiconductor chip and the circuit pattern on the insulating substrate are made of the same metal, it is possible to directly join them, and even in actual use, the solder layer Is removed, the junction temperature of the semiconductor element is reduced, and a highly reliable semiconductor device with a stable junction state can be supplied.
[0023]
Also, by bonding the back electrode film of the semiconductor chip and the circuit pattern on the insulating substrate in parallel and flat at the nano-order level and bonding, direct bonding is performed by the force between atoms (molecules). A highly reliable semiconductor device in a stable state can be supplied.
In addition, by using a lead frame as the electrical wiring to the surface electrode film of the semiconductor chip and using a direct metal bonding as the bonding method, it is possible to supply a semiconductor device with stable electrical connection up to a large capacity class.
[0024]
Further, by using direct metal bonding as the bonding method between the insulating substrate and the heat sink, the thermal resistance of the solder layer can be eliminated, and a stable semiconductor device can be supplied to mechanical loads.
[Brief description of the drawings]
FIG. 1 is a sectional view of a principal part of a semiconductor device according to a first embodiment of the present invention; FIG. 2 is a sectional view of a principal part of a semiconductor device according to a second embodiment of the present invention; FIG. 4 is a cross-sectional view of a main part of a semiconductor device according to a modification of the third embodiment. FIG. 5 is a cross-sectional view of a main part of a semiconductor device according to a fourth embodiment of the present invention. FIG. 7 is a sectional view of a main part showing a half cell of the IGBT.
DESCRIPTION OF SYMBOLS 11 Semiconductor chip 12 Solder 13 Wire 14 Terminal 15 Insulating substrate 15a Circuit pattern 15b Insulating plate 15c Back conductive film 16 Heat sink 20 Surface electrode 21 Semiconductor substrate 22 Gate oxide film 23 Gate electrode 24 Interlayer insulating film 25 Surface electrode film 30 Back electrode 31 Al Film 32 Ti film 33 Ni film 34 Au film 41 a Top surface film (semiconductor chip side)
41b Top surface film (circuit pattern side)
43 Lead frame 44 Tip 45 Guard ring

Claims (9)

In a semiconductor device in which a back electrode formed on the back surface of a semiconductor chip and each surface of a circuit pattern conductive plate formed on an insulating substrate are connected, the back electrode and the circuit pattern conductive plate are made of the same material, and the surfaces of each other are formed. A semiconductor device characterized in that it is brought into contact with and directly joined to a metal. In a semiconductor device in which a surface electrode formed on a surface of a semiconductor chip is connected to a conductor, the surfaces of the surface electrode and the conductor are made of the same material, and the surfaces are brought into contact with each other for direct metal bonding. Semiconductor device. In a semiconductor device in which a conductive plate formed on the back surface of an insulating substrate on which a circuit pattern conductive plate is formed and a radiator are connected, the surfaces of the conductive plate and the radiator are made of the same material, and the surfaces are brought into contact with each other to directly A semiconductor device characterized by metal bonding. In a semiconductor device in which a back electrode formed on a back surface of a semiconductor chip and a circuit pattern conductive plate formed on an insulating substrate are connected, the surfaces of the back electrode and the circuit pattern conductive plate are flattened to a predetermined roughness. A semiconductor device, wherein a flattened surface is brought into contact with the metal to directly join the metal. In a semiconductor device in which a surface electrode formed on the surface of a semiconductor chip is connected to a conductor, the surfaces of the surface electrode and the conductor are flattened with a predetermined roughness, and the flattened surfaces are brought into contact with each other for direct metal bonding. A semiconductor device characterized in that: In a semiconductor device in which a conductive plate formed on the back surface of an insulating substrate on which a circuit pattern conductive plate is formed and a radiator are connected, the surfaces of the conductive plate and the radiator are flattened with a predetermined roughness and flattened. A semiconductor device characterized in that the surfaces are brought into contact and directly metal-joined. The semiconductor device according to claim 4, wherein the predetermined roughness is 10 nm or less. 8. The method for manufacturing a semiconductor device according to claim 7, wherein each of the processing surfaces is subjected to a CMP (Chemical Mechanical Polishing) process and a cleaning process by activation in an inert atmosphere that is not oxidized in order to obtain the predetermined roughness. And a method of manufacturing a semiconductor device. The method for manufacturing a semiconductor device according to claim 1, wherein the bonding is performed by pressing the surfaces of each other and performing at least one of ultrasonic vibration and heating. Semiconductor device manufacturing method.

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