JP2003018037A - Signal receiving circuit and signal receiving device - Google Patents

Abstract

(57) [Problem] To provide a signal receiving circuit with less demodulation error even when noise or spurious is generated at a stage preceding an A / D converter when an input signal is digitally converted by an A / D converter and demodulated. . SOLUTION: A filter circuit section having a band-pass filter and a high-pass filter is arranged between an input signal terminal (IF signal output terminal) and an analog-to-digital conversion circuit, and the high-pass filter performs analog-to-digital conversion. It is located immediately before the circuit, and the cut-off frequency of the high-pass filter is set to be equal to or lower than the lower cut-off frequency of the band-pass filter.

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention relates to terrestrial broadcasting, CA.
The present invention relates to a signal receiving circuit and a signal receiving apparatus mainly used for receiving digitally modulated signals (OFDM, 8VSB, 64QAM, QPSK, etc.) in TV broadcasting, satellite broadcasting, and the like.

[0002]

2. Description of the Related Art In recent years, digital broadcasting by satellite waves, terrestrial waves, cables, etc. is being implemented. FIG. 8 is a block diagram of a conventional receiving circuit that selects and demodulates a digitally modulated high frequency signal.

In FIG. 8, a digitally modulated high frequency signal (hereinafter referred to as an RF signal) is input to an input terminal 1 of a tuner section 20. The RF signal input to the input terminal 1 is
Gain control circuit 2, amplifier 3, and bandpass filter 4
Is supplied to a mixer 5 through the mixer 5, mixed with a local oscillation signal from a local oscillator 6 and converted into an intermediate frequency signal.

The intermediate frequency signal (IF signal) from the mixer 5 is supplied to the demodulation section 30 via the bandpass filter 7 and the amplifier 8. The demodulation unit 30 has an analog / digital conversion circuit 9 (A / D converter 9) and a digital demodulation circuit 10. After the A / D converter 9 converts the IF signal into a digital signal, the demodulation circuit 10 performs digital demodulation. An error correction circuit (not shown) corrects the error and outputs it as a transport stream (TS) to the output terminal 11.

Further, the digital signal from the A / D converter 9 is input to the level detection circuit 12. Since the level detection circuit 12 controls the gain of the input RF signal, it outputs control voltage data for setting the level attenuation amount according to the input level. This control voltage data is converted into an analog signal by the digital / analog conversion circuit 13 (D / A converter 13) and output to the AGC voltage generation circuit 14. AGC
The voltage generation circuit 14 controls the gain control circuit 2 based on the control voltage data converted into the analog signal A.
Generate a GC voltage V _AGC .

In such a conventional signal receiving circuit,
A SAW filter (surface acoustic wave filter) is generally used as the bandpass filter 7 to remove signals in an unnecessary frequency band.

[0007]

In such a conventional signal receiving circuit, the SAW filter forming the bandpass filter 7 is effective for removing the frequency signal in the unnecessary band, but its filter characteristic is It has the characteristics as shown in FIG. 9, and although the suppression ratio near the desired band is large, the suppression ratio cannot be increased over a wide band.

Therefore, when noise, spurious, or the like having a frequency lower than the pass band of the SAW filter is mixed in the subsequent stage of the SAW filter, the demodulation section 30 causes a demodulation error. Further, noise may be generated in the amplifier 8 or the like between the bandpass filter 7 and the A / D converter 9,
It was a factor of demodulation error.

Further, Japanese Patent Laid-Open No. 10-285067 discloses a circuit for inputting a signal converted into an IF signal in a tuner section to a detection circuit via a SAW filter and a low pass filter. The cut-off frequency is set to twice the IF frequency or less to prevent the high-order frequency components passing through the SAW filter from leaking to the detection circuit, thereby improving the deterioration of the bit error rate.

However, even if the low-pass filter is inserted in the subsequent stage of the SAW filter in this way, noise and spurious at a frequency lower than the cut-off frequency of the low-pass filter or the pass band of the SAW filter are generated in the subsequent stage of the SAW filter. If it is mixed in with, it may cause a demodulation error.

In view of the above problems, it is an object of the present invention to eliminate a factor causing a demodulation error and provide a receiving circuit having a small bit error rate.

[0012]

The invention according to claim 1 is
In a signal receiving circuit for digitally converting an input signal by an analog / digital conversion circuit to perform demodulation processing, a filter circuit unit including a series circuit of a band pass filter and a high pass filter, and an input terminal to which the input signal is supplied. The high-pass filter is arranged between the analog-digital conversion circuit and the analog-digital conversion circuit so that the high-pass filter is located immediately before the analog-digital conversion circuit, and the cutoff frequency of the high-pass filter is set to the low-pass band of the band-pass filter. The signal receiving circuit is characterized in that it is set to be equal to or lower than the side cutoff frequency.

According to a sixth aspect of the present invention, in a signal receiving circuit for performing a demodulation process by digitally converting an input signal by an analog / digital conversion circuit, a series circuit of a first bandpass filter and a second bandpass filter. And a filter circuit section including a second bandpass filter between the input terminal to which the input signal is supplied and the analog / digital conversion circuit, the second bandpass filter being located immediately in front of the analog / digital conversion circuit. Then, the low-side cutoff frequency of the second bandpass filter is set to be equal to or lower than the low-side cutoff frequency of the first bandpass filter, and the highpass-side cutoff frequency of the second bandpass filter is The signal receiving circuit is characterized in that it is set to be equal to or higher than a high frequency cutoff frequency of the first bandpass filter.

Further, in the signal receiving circuit for carrying out demodulation processing by converting an input signal into a digital signal by an analog-to-digital conversion circuit, a balanced output type first band pass filter, a balanced amplifier, and a balanced amplifier are provided. The second band-pass filter includes the analog-digital converter between the input terminal to which the input signal is supplied and the analog-digital conversion circuit. It is arranged so as to be located immediately before the conversion circuit, and the low-side cutoff frequency of the second bandpass filter is set to be equal to or lower than the low-side cutoff frequency of the first bandpass filter. The signal receiving circuit is characterized in that the high-frequency cutoff frequency of the pass filter is set to be higher than the high-frequency cut-off frequency of the first bandpass filter.

According to such a signal receiving circuit, the influence of noise or spurious can be suppressed by the filter circuit section.

The invention according to claim 12 is composed of a tuner section for mixing an input high frequency signal and a local oscillation signal and converting it into an intermediate frequency signal, and a series circuit including a band pass filter, an amplifier and a high pass filter. A filter circuit section for filtering the intermediate frequency signal from the tuner section to extract a signal in a required band, and a demodulation section for digitally converting and demodulating the signal from the filter circuit section by an analog-digital conversion circuit. The filter circuit unit is arranged such that the high-pass filter is located immediately before the analog-digital conversion circuit, and the cut-off frequency of the high-pass filter is set to the low-pass side of the band-pass filter. The signal receiving device is characterized in that the cutoff frequency is set to be equal to or lower than the cutoff frequency.

According to a seventeenth aspect of the present invention, there is provided a tuner section for mixing an input high frequency signal and a local oscillation signal to convert into an intermediate frequency signal, a first band pass filter, an amplifier and a second band pass filter. A series circuit including a filter circuit section for filtering the intermediate frequency signal from the tuner section to extract a signal in a required band, and a signal from the filter circuit section for digital conversion by an analog / digital conversion circuit. And a demodulation section for demodulating, wherein the filter circuit section is arranged such that the second bandpass filter is located immediately before the analog-digital conversion circuit, and the low-pass filter of the second bandpass filter is provided. The side cutoff frequency is set to be equal to or lower than the low side cutoff frequency of the first band pass filter, and the high side cutoff frequency of the second band pass filter is set to A signal receiving apparatus, characterized in that set in the above serial high-side cutoff frequency of the first band-pass filter.

Also in the signal receiving apparatus as described above, the influence of noise and spurious can be suppressed by the filter circuit section.

[0019]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of the signal receiving circuit of the present invention. In FIG.
The filter circuit section 40 between the output end of the F signal and the A / D converter 9 is characterized. In the following description, the same parts as those in FIG.

In FIG. 1, a digitally modulated high frequency signal (hereinafter referred to as an RF signal) is input to an input terminal 1 of a tuner section 20. The RF signal input to the input terminal 1 is
Gain control circuit 2, amplifier 3, and bandpass filter 4
Is supplied to a mixer 5 through the mixer 5, mixed with a local oscillation signal from a local oscillator 6 and converted into an intermediate frequency signal.

The intermediate frequency signal (IF signal) from the mixer 5 is supplied to the filter circuit section 40. The filter circuit unit 40 includes a bandpass filter 41 (BPF4).
1), amplifier 42, and high-pass filter 42 (HPF)
42), and the output of the high-pass filter 42 is supplied to the demodulation unit 30.

The demodulation section 30 has an analog / digital conversion circuit 9 (A / D converter 9) and a digital demodulation circuit 10. The A / D converter 9 converts the IF signal into a digital signal, and the demodulation circuit 10 digitally converts it. After demodulation, the error is corrected by an error correction circuit (not shown) and output to the output terminal 11 as a transport stream (TS).

The digital signal from the A / D converter 9 is input to the level detection circuit 12. Since the level detection circuit 12 controls the gain of the input RF signal, it outputs control voltage data for setting the level attenuation amount according to the input level. The control voltage data is converted into an analog signal by the digital / analog conversion circuit 13 (D / A converter 13) and output to the AGC voltage generation circuit 14. AGC
The voltage generation circuit 14 controls the gain control circuit 2 based on the control voltage data converted into the analog signal A.
Generate a GC voltage V _AGC .

In such a signal receiving circuit of the present invention, the BPF 41 and HPF 4 of the filter circuit section 40 are
The frequency characteristic of No. 3 is as shown in FIG. In FIG. 2, A indicates the passage characteristic of the BPF 41, and B indicates the HPF 43.
Shows the passage characteristics of.

In FIG. 2, the frequency fc is HPF4.
3, fsL is the lower cutoff frequency of the BPF 41, fsH is the higher cutoff frequency of the BPF 41, and fsbw is B
The passband width (= fsH-fsL) of the PF41 is shown, and the cutoff frequency fc of the HPF43 is fb to f in FIG.
It is set to (X) during sL.

Regarding the frequency fb, the occupied bandwidth frequency width of the transmission signal is fbw, and the pass frequency bandwidth of the BPF 41 is f.
When sbw is set, the higher one of those ½ frequencies (fbw / 2 or fsbw / 2) is set to fb. For example, the occupied band frequency width fbw of a certain channel signal transmitted is 6 MHz, and the pass band width fsbw of the BPF 41 is 6.
If it is 5 MHz, fb becomes (6.5 / 2) MHz.

By making the frequency characteristics of the BPF 41 and the HPF 43 of the filter circuit section 40 as shown in FIG. 2, noise is temporarily generated from the amplifier 42 or the amplifier 4 is used.
Even if spurious due to a jump or sneak of a sampling signal generated when digitally demodulating by the demodulation unit 30 is superimposed on the signal 2, it can be suppressed below the cutoff frequency fc of the HPF 43.

As a result, when digital coding is performed by the A / D converter 9, noise addition at the time of sampling can be reduced, and reception processing with a small bit error rate and less deterioration can be performed.

The frequency fb is set to 1/2 of the occupied bandwidth frequency width fbw of the transmission signal or 1/2 of the pass frequency bandwidth fsbw of the BPF 41 because the demodulation output bandwidth of the digital demodulation circuit 10 is set. The width is the bandwidth fbw or f
This is because it becomes about 1/2 of sbw, and when the demodulated output component leaks to the amplifier 42, it can be suppressed by the HPF 43.

In the case of receiving a signal in which data of a plurality of channels are multiplexed and transmitted by frequency division within one frequency bandwidth as in data broadcasting, the HPF4 is used.
The cut-off frequency fc of 3 may be set as shown in FIG. That is, in FIG. 3, ftbw indicates the frequency bandwidth per channel in the frequency division method, and BPF41
2 has a pass characteristic covering this bandwidth ftbw, and the cutoff frequency fc of the HPF 43 is set to (X) between fb and fsL in FIG.

When the frequency bandwidth of each channel is set to fcbw1 to fcbwn, the frequency fb is ½ of those frequencies (fcbw1 / 2, fcbw2 / 2 ... fcbwn /).
The highest frequency of 2) is set to fb. That is, when the frequency bandwidth per channel is different depending on each channel as in data broadcasting, 1 /
The frequency of 2 is fb.

Next, a second embodiment of the present invention will be described with reference to FIG. In this embodiment, the filter circuit unit 40 includes a band pass filter 411 (BPF 411).
And amplifier 421 and high-pass filter 431 (HPF41
3), and these BPF 411 and amplifier 42
1, the HPF 431 is a balanced type circuit.

That is, the IF frequency signal from the mixer 5 in FIG. 1 is limited to the required bandwidth by the BPF 411,
Balanced output. This balanced output signal is a balanced amplifier 421.
Is amplified to a desired voltage or power and input to the balanced HPF 431. The signal from which unnecessary noise and spurious are removed by the balanced HPF 431 is balanced-input to the A / D converter 9 and encoded into a digital signal.

The pass characteristics of the BPF 411 and HPF 431 are similar to those described with reference to FIG. 2 or 3. A SAW filter is suitable for the balanced bandpass filter 411, and a differential amplifier is suitable for the balanced amplifier 421.

As described above, by configuring the filter circuit section 40 as a balanced type, in-phase noise occurs in the balanced amplifier 421, or the sampling signal jumps or sneak occurs when the demodulation section 30 performs digital demodulation. Since the in-phase component can be canceled out as a characteristic of the balanced two-terminal circuit even if the in-phase spurious noise due to is superimposed, noise addition at the time of sampling can be reduced when encoding by the A / D converter 9. it can.

Further, regarding the third embodiment of the present invention,
This will be described with reference to FIG. In this embodiment, the filter circuit unit 40 is replaced with the band pass filter 412 (BPF 41).
2), amplifier 422, band pass filter 432 (BPF)
432), and is characterized in that the BPF 412 is composed of a SAW filter.

In FIG. 5, the frequency characteristics of the BPF 412 and BPF 432 of the filter circuit section 40 are as shown in FIG. In FIG. 6, A1 indicates the pass characteristic of the BPF 412, and B1 indicates the pass characteristic of the BPF 432.

In FIG. 6, fsL is the lower cutoff frequency of the BPF 412, fsH is the higher cutoff frequency of the BPF 412, and fsbw is the passband width of the BPF 412 (= fsH-fs
L) are shown respectively. The frequency fcL is BPF4.
The low cutoff frequency of 32 and the frequency fcH are the high cutoff frequencies of the BPF 432.

Further, fb is the same as in FIG. 2, where the occupied bandwidth frequency width of the transmission signal is fbw and the pass frequency bandwidth of the BPF 412 is fsbw, half of those frequencies (fbw / 2 or fsbw / The higher of 2) is defined as fb,
The low cutoff frequency fcL of the BPF 432 is from fb to fs in FIG.
It is set to (X1) during L.

When receiving a signal in which data of a plurality of channels are multiplexed and transmitted by frequency division within one frequency bandwidth like data broadcasting, the BPF 43 is used.
The lower cutoff frequency fcL of 2 may be set in the same manner as in FIG. That is, the frequency bandwidth of each channel is fcb
When w1 to fcbwn, half of those frequencies (fcb
The highest frequency of w1 / 2, fcbw2 / 2 ... fcbwn / 2) is set to fb, and the low cutoff frequency fcL of the BPF 432 may be set between this fb and fsL.

By making the frequency characteristics of the BPF 412 and BPF 432 of the filter circuit section 40 as shown in FIG. 6, noise is temporarily generated from the amplifier 422 or generated when the amplifier 422 is digitally demodulated by the demodulation section 30. Even if spurious due to jumping or sneaking of the sampling signal is superimposed, it can be suppressed at the low cutoff frequency fcL of the BPF 432 or below and the high cutoff frequency fcH or above.

As a result, when digital coding is performed by the A / D converter 9, noise addition at the time of sampling can be reduced, and a reception process with a small bit error rate and less deterioration can be performed.

Next, a fourth embodiment of the present invention will be described with reference to FIG. In this embodiment, the filter circuit unit 40 includes a band pass filter 413 (BPF 413).
And amplifier 423 and band pass filter 433 (BPF43
3), and these BPF 413 and amplifier 42
3, BPF433 is composed of a balanced type circuit, and BPF413
Is characterized in that it is composed of a SAW filter.

That is, the configuration of FIG.
The F frequency signal is limited to a required bandwidth by the BPF 413 composed of a SAW filter, balanced output, amplified by the balanced amplifier 423 in the next stage to a desired voltage or power, and then input to the balanced BPF 433. . The signal from which unnecessary noise and spurious are removed by the balanced BPF 433 is balanced-input to the A / D converter 9 and encoded into a digital signal.

The pass characteristics of the BPF 413 and BPF 433 are the same as those described with reference to FIG. Thus, by configuring the filter circuit unit 40 as a balanced type, in-phase noise is generated in the balanced amplifier 423,
Alternatively, even if the in-phase spurious due to the jump or sneak of the sampling signal generated at the time of digital demodulation in the demodulation unit 30 is superimposed, the in-phase component can be canceled as a characteristic of the balanced two-terminal circuit, and therefore the A / D converter. When encoding with 9, it is possible to reduce noise addition during sampling.

In the above description, the example in which the single conversion tuner 20 for converting the frequency of the input high frequency signal to obtain the intermediate frequency signal is used is described. However, the double conversion for converting the frequency of the high frequency signal by the up / down converter circuit is performed. It goes without saying that it can also be applied to a system using a conversion-type tuner.

[0047]

As described above, according to the present invention, by disposing the high-pass filter or the band-pass filter in the preceding stage of the A / D converter 9, noise is generated in the amplifier or the demodulation section is generated in the amplifier. Even if the spurious of is superimposed, it can be suppressed by the high pass filter or the band pass filter. Therefore, when digital coding is performed by the A / D converter 9, noise addition at the time of sampling can be reduced, and reception processing with a small bit error rate and less deterioration can be performed.

[Brief description of drawings]

FIG. 1 is a block diagram showing a signal receiving circuit according to an embodiment of the present invention.

FIG. 2 is a frequency characteristic diagram illustrating the characteristic of the filter circuit unit 40 of FIG.

FIG. 3 is a frequency characteristic diagram illustrating another characteristic of the filter circuit unit 40 of FIG.

FIG. 4 is a block diagram showing a signal receiving circuit according to a second embodiment of the present invention.

FIG. 5 is a block diagram showing a signal receiving circuit according to a third embodiment of the present invention.

6 is a frequency characteristic diagram for explaining the characteristic of the filter circuit section 40 of FIG.

FIG. 7 is a block diagram showing a signal receiving circuit according to a fourth embodiment of the present invention.

FIG. 8 is a block diagram showing a conventional signal receiving circuit.

FIG. 9 is a frequency characteristic diagram for explaining the characteristic of the conventional BPF 7.

[Description of Codes] 9 ... A / D converter 20 ... Tuner section 30 ... Demodulation section 40 ... Filter circuit section 41, 411, 412, 413 ... Band pass filter (B
PF) 42, 421, 422, 423 ... Amplifier 43, 431 ... High-pass filter (HPF) 432, 433 ... Band-pass filter (BPF)

Claims (21)

[Claims] 1. A signal receiving circuit for digitally converting an input signal by an analog / digital conversion circuit to perform demodulation processing, wherein the input signal supplies a filter circuit section including a series circuit of a band pass filter and a high pass filter. Between the input terminal and the analog-digital conversion circuit, the high-pass filter is arranged immediately before the analog-digital conversion circuit, the cut-off frequency of the high-pass filter, A signal receiving circuit characterized in that the cutoff frequency is set to be equal to or lower than the lower cutoff frequency of the pass filter. 2. The cutoff frequency fc of the high pass filter
Is equal to or lower than the low-side cutoff frequency fsL of the band pass filter and is 1/2 the frequency of the occupied band frequency width of the transmission signal or 1 / of the pass frequency band width of the band pass filter.
2. The signal receiving circuit according to claim 1, wherein the frequency is set to be higher than the higher frequency fb of the two frequencies. 3. The signal receiving circuit according to claim 1, wherein an amplifier is arranged between the band pass filter and the high pass filter. 4. The signal receiving circuit according to claim 1, wherein at least the high-pass filter of the filter circuit section is of a balanced output type. Signal receiving circuit. 5. The signal receiving circuit according to claim 3, wherein the band-pass filter, the amplifier, and the high-pass filter are constituted by a balanced type circuit. 6. A signal receiving circuit for digitally converting an input signal by an analog-digital conversion circuit to perform demodulation processing, comprising a filter circuit section including a series circuit of a first band-pass filter and a second band-pass filter, The second bandpass filter is arranged between the input terminal to which the input signal is supplied and the analog-digital conversion circuit so that the second band-pass filter is located immediately before the analog-digital conversion circuit. The low side cutoff frequency of the pass filter is set to be equal to or lower than the low side cutoff frequency of the first band pass filter, and the high side cutoff frequency of the second band pass filter is set to the first band pass filter. The signal receiving circuit is characterized in that it is set to be equal to or higher than the high-side cutoff frequency of. 7. The low-side cut-off frequency fcL of the second band-pass filter is equal to or lower than the low-side cut-off frequency fsL of the first band-pass filter and is 1 / of the occupied band frequency width of the transmission signal. 7. The frequency of 2 or the frequency of 1/2 of the pass frequency bandwidth of the first band pass filter, whichever is higher, which is higher than the frequency fb.
The signal receiving circuit described. 8. The signal receiving circuit according to claim 6, wherein an amplifier is arranged between the first band-pass filter and the second band-pass filter of the filter circuit unit. 9. The signal receiving circuit according to claim 6, wherein the first band-pass filter is a surface acoustic wave filter. 10. A signal receiving circuit for performing demodulation processing by converting an input signal into a digital signal by an analog-digital conversion circuit, wherein a balanced output type first band pass filter, a balanced amplifier and a second balanced band pass filter are provided. A filter circuit unit including a series circuit is arranged such that the second band-pass filter is located immediately before the analog-digital conversion circuit between the input terminal to which the input signal is supplied and the analog-digital conversion circuit. The lower band cutoff frequency of the second bandpass filter is set to be equal to or lower than the lower band cutoff frequency of the first bandpass filter, and the higher band cutoff frequency of the second bandpass filter is arranged. Is set to be equal to or higher than the high-side cutoff frequency of the first bandpass filter. 11. The surface acoustic wave filter as the first bandpass filter.
The signal receiving circuit described. 12. A tuner section for mixing an input high frequency signal and a local oscillation signal to convert it into an intermediate frequency signal, and a series circuit including a band pass filter, an amplifier and a high pass filter, the intermediate frequency from the tuner section. A filter circuit unit for filtering a signal to extract a signal in a required band, and a demodulation unit for digitally demodulating a signal from the filter circuit unit by analog-digital conversion, and the filter circuit unit, The high-pass filter is arranged so as to be located immediately before the analog-digital conversion circuit, and the cutoff frequency of the high-pass filter is
A signal receiving device, characterized in that it is set to a lower cut-off frequency of the band pass filter or lower. 13. A cutoff frequency f of the high pass filter.
c is equal to or lower than the low-side cutoff frequency fsL of the bandpass filter and is 1/2 the frequency of the occupied band frequency width of the transmission signal or 1 of the pass frequency band width of the bandpass filter.
13. The signal receiving device according to claim 12, wherein the frequency is set to be higher than a frequency fb which is the higher one of the frequencies of / 2. 14. The signal receiving apparatus according to claim 12, wherein the band pass filter is a surface acoustic wave filter. 15. The signal receiving apparatus according to claim 12, wherein at least the high-pass filter of the filter circuit unit is a balanced output type. 16. The signal receiving apparatus according to claim 12, wherein the band pass filter, the amplifier, and the high pass filter of the filter circuit unit are configured by a balanced circuit. 17. A tuner unit which mixes an input high frequency signal and a local oscillation signal and converts it into an intermediate frequency signal, a series circuit including a first band pass filter, an amplifier and a second band pass filter. A filter circuit unit for filtering the intermediate frequency signal from the unit to extract a signal in a required band, and a demodulation unit for digitally converting the signal from the filter circuit unit by an analog / digital conversion circuit to demodulate, The filter circuit unit is arranged such that the second bandpass filter is positioned immediately before the analog-digital conversion circuit, and the low-pass cutoff frequency of the second bandpass filter is set to the first bandpass filter. The lower band cutoff frequency of the bandpass filter is set to be equal to or lower than the lower band cutoff frequency, and the higher band cutoff frequency of the second bandpass filter is set to The signal receiving device is characterized in that it is set to be equal to or higher than the cutoff frequency on the high frequency side of. 18. The low-side cut-off frequency fcL of the second band-pass filter is equal to or lower than the low-side cut-off frequency fsL of the first band-pass filter and is 1 / of the occupied band frequency width of the transmission signal. 18. The signal receiving apparatus according to claim 17, wherein the frequency is set to be equal to or higher than the frequency fb which is the higher of the frequency of 2 or the frequency of 1/2 of the pass frequency bandwidth of the first band pass filter. 19. The surface acoustic wave filter as the first bandpass filter.
The signal receiving device described. 20. The signal receiving apparatus according to claim 17, wherein at least the second band pass filter of the filter circuit unit is of a balanced output type. 21. The signal receiving apparatus according to claim 17, wherein the first band-pass filter, the amplifier, and the second band-pass filter of the filter circuit unit are configured by a balanced circuit. .