JP2003069032A - Thin film transistor and method of manufacturing thin film transistor - Google Patents

Abstract

(57) Abstract: In a thin film transistor formed on an insulating substrate, a gate electrode-drain current characteristic can be accurately shifted by controlling a dopant concentration of an active layer of the thin film transistor. SOLUTION: A voltage shift amount of a gate voltage-drain current characteristic of a thin film transistor is controlled by a dopant concentration in an active layer. The dopant concentration of the active layer is set to N _d (cm
^-3 ), and the thin film transistor is designed with the voltage shift amount of the gate voltage-drain current characteristic being approximately 1.37 × 10 ⁻¹⁷ · N _d (V).

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film transistor, and more particularly to a thin film transistor in which a voltage shift amount of a gate voltage-drain current characteristic is controlled by a dopant concentration in an active layer and a manufacturing method thereof.

[0002]

2. Description of the Related Art Thin film transistors are electronic devices widely used for display devices and image sensors.

However, a thin film transistor is likely to have many structural defects such as dislocations and electrical defects such as fixed charges in the active layer, the gate insulating film, the substrate insulating film, or their interfaces, and these imperfections are incomplete. There is a problem that a voltage shift (ΔV _g ) in the gate voltage-drain current characteristic is likely to occur due to the above.

When such a voltage shift of the gate voltage-drain current characteristic occurs, it is necessary to cancel it by a voltage corresponding to -ΔV _g to restore the normal state. There is known a method of doping a dopant into the active layer at a predetermined concentration.

For example, a gate in a bulk transistor
The voltage shift amount of the
When theoretically obtained based on the poor approximation, the dopa in the active layer is
Concentration is N_d(Cm^-3) Voltage shift
The amount is 2φ_F+ (4ε_s・ Q ・ N_d・ Φ_F)^1/2/ C_OX (Φ_F= KT / q · ln (N_d/ N_i), Ε_s: Active layer
Dielectric constant, q: elementary charge, k: Boltzmann coefficient, T: absolute
Temperature, n_i: Intrinsic carrier concentration, C_OX: Gate oxidation
It is given by the capacitance of the film (for example, Mitsumasa Koyanagi and Kishino)
Seigo, VLSI device physics, Maruzen).

[0006]

However, since the thin film transistor has a structure different from that of the bulk transistor, the above-mentioned theoretical formula of voltage shift cannot be applied.

First, the thin film transistor is formed on an insulating substrate. Therefore, there is no so-called substrate potential in the thin film transistor. The above-mentioned theoretical formula regarding the voltage shift amount of the gate voltage-drain current characteristic is obtained on the assumption that the substrate potential exists, and therefore cannot be applied to the thin film transistor.

Second, the thin film transistor is a fully depleted type transistor. That is, in the thin film transistor, the free carrier density that carries the conductivity in the entire active layer in the ON state is higher than the free carrier density that does not contribute to the conductivity. The above-described theoretical formula of the voltage shift amount of the gate voltage-drain current characteristic for the bulk transistor cannot be applied to the thin film transistor which is a fully depleted type transistor because it assumes partial depletion.

In addition to the structural difference between the thin film transistor and the bulk transistor, the gate voltage-
The depletion approximation assumed in the theoretical formula of the voltage shift amount of the drain current characteristic is a rough approximation of the state caused in the actual transistor, and accurately represents the state in the actual transistor. Not a thing. As a result, there is also a problem that the voltage shift amount obtained based on the theoretical formula is insufficient in accuracy.

An object of the present invention is to obtain the gate voltage-drain current characteristics of a thin film transistor, in order to accurately calculate the voltage shift amount, obtain the dependency of the voltage shift amount on the dopant concentration of the active layer, and based on this, determine the gate voltage-drain It is to obtain a thin film transistor whose current characteristics are restored to a normal state.

[0011]

[Means for Solving the Problems]
Therefore, the thin film transistor of the present invention is formed on an insulating substrate.
In a fully depleted thin film transistor,
Dopant concentration is N_d(Cm^-3) As the gate voltage −
Drain current characteristic is approximately 1.37 × 10^-17・ N
_dIt is characterized in that the voltage is shifted by (V).

With this structure, the gate voltage-drain current characteristic can be normally restored by controlling the dopant concentration in the active layer.

Further, in the thin film transistor of the present invention, in the thin film transistor formed on the insulating substrate, the gate voltage-drain current characteristic is 2φ _F + (4ε _s · 2) with the dopant concentration in the active layer being N _d (cm ⁻³ ). q ・ Nd ・
φ _F ) ^1/2 / C _OX (φ _F = kT / q · ln (N _d /
n _i ), ε _s : dielectric constant of active layer, q: elementary charge, k: Boltzmann coefficient, T: absolute temperature, n _i : intrinsic carrier concentration, C _OX : gate oxide film capacitance) It is characterized by shifting only.

With such a structure, the gate voltage-drain current characteristic can be recovered more accurately as compared with the case where the gate voltage-drain current characteristic is restored to a normal state based on the theoretical formula for the bulk transistor. Is possible.

Preferably, the thin film transistor is a fully depleted thin film transistor.

Preferably, the thickness of the semiconductor layer of the thin film transistor is 100 nm or less, or 50 nm or less. This makes it possible to increase the thickness of the active layer and make it more fully depleted.

Further, the method of manufacturing a thin film transistor of the present invention is characterized in that, in the method of manufacturing a thin film transistor, the active layer is doped with an impurity by an ion doping method without mass spectrometry or an ion implantation method with mass spectrometry. To do.

With such a structure, it is possible to accurately shift the gate voltage-drain current characteristic.

In particular, when the ion doping method without mass spectrometry is adopted, the active layer formed by ion doping,
It is possible to reduce structural defects such as dislocations existing at the gate insulating film, the substrate insulating film, or their interfaces, and electrical defects such as fixed charges, while adopting the ion implantation method with mass spectrometry. In this case, it is possible to suppress structural defects such as dislocations and electrical defects such as fixed charges induced in the active layer, the gate insulating film, the substrate insulating film, or their interfaces by extra ion bombardment. Become.

Furthermore, the method of manufacturing a thin film transistor of the present invention is the method of manufacturing a thin film transistor described above, characterized in that the dopant activation in the active layer is performed by a thermal activation method or a laser activation method.

With this structure, it is possible to accurately shift the gate voltage-drain current characteristic.

In particular, when the thermal activation method is adopted, the dopant can be activated with a simple apparatus, and the thin film transistor can be manufactured at low cost. On the other hand, the laser activation method is adopted. In that case, since the activation can be realized with high efficiency, the activated dopant concentration can be made close to the device design value, so that more accurate voltage shift is possible.

[0023]

BEST MODE FOR CARRYING OUT THE INVENTION The thin film transistor and the method for manufacturing the same according to the present invention will be described below in detail with reference to the drawings. (Relationship Between Dopant Concentration of Active Layer and Voltage Shift Amount) In order to keep the voltage shift of the gate voltage-drain current characteristics to be considered in manufacturing a thin film transistor in a specified state (design state) by adjusting the dopant concentration in the active layer. As its premise, it is necessary to know the dependency of the voltage shift amount on the dopant concentration of the active layer in the gate voltage-drain current characteristic in the fully depleted type thin film transistor.
Here, the “fully depleted” transistor means a transistor in which the free carrier density which carries conductivity in the entire active layer in the ON state is larger than the free carrier density which does not contribute to conductivity. Therefore, the inventor of the present invention analyzed the dependence of the gate voltage-drain current characteristics of the fully depleted thin film transistor on the dopant concentration of the active layer, using a two-dimensional device simulator (Atlas, Silvaco). FIG. 2 shows the dependence of the gate voltage-drain current characteristics thus obtained on the dopant concentration of the active layer.

It can be seen that the drain current of the thin film transistor increases as the applied gate voltage increases, but its behavior varies depending on the dopant concentration in the active layer. For example, the drain current flowing when a gate voltage of 5 V is applied to a thin film transistor having a dopant concentration of 0 cm ⁻³ (that is, a thin film transistor without doping) is about 5 × 10 ⁻⁸ A, whereas the dopant concentration is 3.0 ×. The drain current corresponding to a gate voltage of 5 V for a thin film transistor of 10 ¹⁷ cm ⁻³ is only about 5 × 1.
It is only ^0-14A . About 5x for this thin film transistor
The gate voltage required to pass a drain current of 10 ⁻⁸ A is about 8 V, which means that it is necessary to apply a voltage higher by about 3 V as compared with a thin film transistor without doping. Thus, the gate voltage that gives the same drain current increases with the dopant concentration in the active layer,
A so-called voltage shift occurs. This fact means that it is possible to control the voltage shift amount of the gate voltage-drain current characteristic by a desired amount by appropriately selecting the dopant concentration in the active layer.

FIG. 1 is a result of obtaining the relationship between the dopant concentration of the active layer and the voltage shift of the gate voltage-drain current characteristic based on the result of FIG. For comparison, the result of theoretical analysis based on the depletion approximation is also shown for the bulk silicon transistor described above.

From the results of the two-dimensional device simulator shown in FIG. 1, the voltage shift amount of the gate voltage-drain current characteristic can be expressed as a linear function of the dopant concentration in the active layer, and the dopant concentration in the active layer is N _d (cm ⁻³ )
As approximately 1.37 × ^{10 -} it can be read given by 17 · _N d (V). That is, the dopant concentration in the active layer of the fully depleted type thin film transistor formed on an insulating substrate N _{d (cm} - ³⁾ and is set, the gate voltage -
The drain current characteristic is approximately 1.37 × 10 ⁻¹⁷ · N
_The voltage is shifted by _d (V). Therefore, by controlling the dopant concentration in the active layer to an appropriate value,
It is possible to cancel the voltage shift of the gate voltage-drain current characteristic caused by the structural defect or the electrical defect, and it is possible to recover the normal state.

On the other hand, the theoretical formula applying the depletion approximation is
The dopant concentration in the layer is N_d(Cm ^-3) In case of
Shift amount 2φ_F+ (4ε_s・ Q ・ N_d・ Φ_F)^1/2/ C_OX (Φ_F= KT / q · ln (N_d/ N_i), Ε_s: Active layer
Dielectric constant, q: elementary charge, k: Boltzmann coefficient, T: absolute
Temperature, n_i: Intrinsic carrier concentration, C_OX: Gate oxidation
The capacitance of the film).

Comparing the voltage shift amount thus calculated and the voltage shift amount calculated by the two-dimensional device simulator, the voltage shift amount calculated from the theoretical formula to which the depletion approximation is applied is the two-dimensional device simulator. It can be read that a shift amount higher than the calculated voltage shift amount is given.

That is, if the deviation from the normal state of the gate voltage-drain current characteristic due to the imperfections generated in the thin film transistor is canceled based on the theoretical formula to which the depletion approximation is applied, the voltage shift amount is too large. This makes it difficult to restore the normal state.

Therefore, by setting the dopant concentration of the active layer to a concentration that gives a voltage shift amount lower than the voltage shift amount calculated from the theoretical formula to which the depletion approximation is applied,
A shift amount close to the desired voltage shift can be obtained. (Manufacturing Process of Thin Film Transistor of the Present Invention) Next, an example of a manufacturing process of the thin film transistor of the present invention will be described with reference to the drawings.

FIG. 3 is a diagram for explaining the manufacturing process of the thin film transistor of the present invention. In this example, a case where a silicon thin film is formed as a semiconductor layer for forming a transistor on an insulating substrate such as glass will be described as an example.

First, a silane-based reactive gas is used as a silicon atom supply source on the insulating substrate 1, for example, low pressure CVD using disilane (Si ₂ H ₆ ) gas.
(LPCVD) method or plasma enhancement CVD (PECV) using, for example, monosilane (SiH ₄ ) gas
The amorphous silicon film 2 is formed by the method D). Following this, the formed amorphous silicon film 2 is recrystallized by supplying energy necessary for crystallization of amorphous silicon atoms from the outside to form a polycrystalline silicon film 2 (FIG. 3). (A)).
The recrystallization method, the optimum method and conditions are selected in order to realize the grain size and crystal orientation of the polycrystal necessary for obtaining various characteristics such as carrier mobility required in the thin film transistor. However, for example, as shown in FIG. 3A, light irradiation using an excimer laser or the like, or heat treatment in a heat treatment furnace for solid phase growth is selected.

The polycrystalline silicon film 2 thus formed is subjected to desired patterning by using a photolithography technique, and further a dielectric film 3 which will be used as a gate oxide film later is formed. It This dielectric film is, for example, a silicon oxide film (SiO ₂ ) formed by a thermal CVD method, and is deposited on the entire surface of the substrate (FIG. 3).
(B)).

Next, the active layer is doped with impurities. The dopant concentration in the active layer of the thin film transistor of the present invention is important for canceling the voltage shift in the gate voltage-drain current characteristics and realizing normal characteristics. Since it has various meanings, it is necessary to accurately control the doping level. That is, the gate voltage-drain current characteristic is 1.37 × 10 ⁻¹⁷ · N
_In order to satisfy the requirement of shifting the voltage by _d (V), it is necessary to control the dopant concentration of the active layer to N _d (cm ⁻³ ). For this reason, in this embodiment, as the ion doping method, an ion implantation method is employed which allows easy and accurate control of the doping level.

The type of element to be doped is determined by the design of the thin film transistor, but in the case of this embodiment, the case of a thin film transistor in which the conductivity type of the active layer is n type is shown. First, in order to adjust the threshold value, boron (B), which is a group III impurity acting as an acceptor in silicon, is implanted (FIG. 3B).

Following the doping process into the active layer, a thin film is formed to form the gate electrode 4. After depositing a thin film of metal or polysilicon selected as a gate electrode material on the entire surface of the substrate by a CVD method or a sputtering method, patterning is performed by photolithography so as to obtain a desired gate electrode shape (FIG. 3).
(C)).

Further, in order to make the conductivity type of the source region 5 and the drain region 6 n ⁺ type, for example, phosphorus (P) is ion-implanted (FIG. 3C). In this step, the already patterned gate electrode 4 is used as a mask to implant phosphorus (P) in a self-aligned manner. That is, there is no phosphorus implantation into the polycrystalline silicon film region immediately below the gate electrode, and the state in which boron ions are implanted in the step of FIG. 3B is maintained.

After the implantation of boron into the active layer region and the implantation of phosphorus into the source region 5 and the drain region 6, the crystal lattice state disturbed by these ion implantations is restored, and boron and phosphorus are used as dopants. Processing for activating the image is performed.

Various methods are known as the dopant activation method. For example, if a thermal activation method that holds the substrate at a high temperature for a long time is selected, the dopant activation can be performed with a simple device. There is an advantage that a thin film transistor can be manufactured at low cost.

This dopant activation is not limited to the above-mentioned thermal activation method, and may be, for example, a laser activation method. When the laser activation method is adopted, a rapid thermal process is realized in the crystal, so that a reaction deviating from the thermal equilibrium state can be realized, and a dopant having a dopant solubility higher than that obtained in the thermal equilibrium state can be realized. The concentration can be obtained. Further, according to the laser activation method, since the ion-implanted impurities can be electrically activated with high efficiency, the dopant concentration actually acting as an acceptor or a donor should be close to the design value of the device. It is easy to do so, and more accurate voltage shift is possible.

When the dopant activation is performed by the laser activation method, the same laser light source as the laser used in the crystallization process of the amorphous silicon thin film shown in FIG. 3A may be used. A laser light source having a different wavelength different from this may be provided and used.

Subsequent to the above dopant activation, an interlayer insulating film 7 for electrically insulating the individual transistors formed on the substrate from each other is formed (FIG. 3D), and further,
The dielectric film 3 and the interlayer insulating film 7 formed on the source region 5 and the drain region 6 are removed by photolithography to open contact holes, and then thin films for the source electrode 8 and the drain electrode 9 are deposited. After that, the source electrode 8 and the drain electrode 9 are patterned. In this way, the thin film transistor of the present invention is completed (FIG. 3D).

In the present embodiment, boron is selected as the impurity implanted in the active layer and the gate voltage-drain current characteristic is shifted to the voltage plus side to adjust the threshold voltage, for example. The same voltage shift can be performed when other impurities such as aluminum (Al) are selected. Further, when the characteristics are shifted to the negative voltage side, impurities such as phosphorus (P) and arsenic may be selected.

In the above-mentioned embodiment, an example in which the ion implantation method with mass spectrometry of the dopant is selected as the doping method for the active layer is shown, but the doping method is not limited to this. That is, another doping method may be used in which doping is performed without mass spectrometry of the dopant. In particular, when adopting the ion doping method without mass spectrometry, structural defects such as dislocations existing at the active layer, the gate insulating film, the substrate insulating film, or their interfaces due to the ion doping, and electrical charges such as fixed electric charges. There is an advantage that it is possible to reduce the physical defects. On the other hand, when the ion implantation method accompanied by mass spectrometry is adopted, structural defects such as dislocations or fixed charges induced in the active layer, the gate insulating film, the substrate insulating film, or their interfaces due to excessive ion bombardment are used. It is possible to suppress electrical defects such as. Therefore, an optimum method may be appropriately selected to obtain desired characteristics of the thin film transistor.

Furthermore, the doping of the active layer does not have to be performed after the step of polycrystallizing the amorphous silicon layer, and may be performed simultaneously with the film formation of the amorphous silicon. For example, in the case of performing doping by an ion doping method, an amorphous silicon film is formed by using a gas containing a silicon element, which is a base material of a transistor, and a gas containing a dopant element at the same time, so as to contain impurities serving as a dopant. An amorphous silicon film is obtained.

Needless to say, the impurity doping process to the active layer region, the source region, and the drain region may be set in any manufacturing process order as long as doping to those layers is realized.

[0047]

As described above, according to the thin film transistor of the present invention, the dopant concentration in the active layer of the thin film transistor formed on the insulating substrate is set to N _d (cm ⁻³ ), and the gate voltage-drain current is set. Characteristic is approximately 1.37 x 1
Since the voltage is shifted by 0 ⁻¹⁷ · N _d (V),
The voltage shift amount of the gate voltage-drain current characteristic can be freely set, and a thin film transistor having normal gate voltage-drain current characteristic can be obtained.

Further, according to the method of manufacturing a thin film transistor of the present invention, in the manufacturing process of the thin film transistor, impurity doping into the active layer is performed by an ion doping method without mass spectrometry or an ion implantation method with mass spectrometry, By performing the dopant activation in the active layer by a thermal activation method or a laser activation method,
Accurate voltage shift of the gate voltage-drain current characteristic becomes possible.

[Brief description of drawings]

FIG. 1 is a diagram in which a relationship between a dopant concentration of an active layer and a voltage shift in a gate voltage-drain current characteristic is obtained for each of two-dimensional device simulator and theoretical formulas to which a depletion approximation is applied.

FIG. 2 is a diagram in which the dependence of the gate voltage-drain current characteristics on the dopant concentration of the active layer is obtained by a two-dimensional device simulator.

FIG. 3 is a diagram illustrating a manufacturing process of the thin film transistor of the invention.

[Explanation of symbols]

1 Insulation board 2 Polycrystalline silicon 3 Gate insulation film 4 gate electrode 5 Source area 6 drain region 7 Interlayer insulation film 8 Source electrode 9 Drain electrode

Claims (9)

[Claims] 1. A thin film transistor formed on an insulating substrate, wherein a dopant concentration in an active layer is set to N _d (cm ⁻³ ) and a gate voltage-drain current characteristic is about 1.37 × 10.
A thin film transistor characterized in that the voltage is shifted by ⁻¹⁷ · N _d (V). 2. A thin film transistor formed on an insulating substrate.
And The dopant concentration in the active layer is N_d(Cm^-3) And set
Gate voltage-drain current characteristics 2φ_F+ (4ε_s・ Q ・ N_d・ Φ_F)^1/2/ C_OX (Φ_F= KT / q · ln (N_d/ N_i), Ε_s: Active layer
Dielectric constant, q: elementary charge, k: Boltzmann coefficient, T: absolute
Temperature, n_i: Intrinsic carrier concentration, C_OX: Gate oxidation
Shift by a voltage smaller than the membrane capacitance),
Is a thin film transistor. 3. The thin film transistor according to claim 1, wherein the thin film transistor is a fully depleted thin film transistor. 4. The thin film transistor according to claim 1, wherein the semiconductor layer of the thin film transistor has a film thickness of 100 nm or less. 5. The thin film transistor according to claim 1, wherein the semiconductor layer of the thin film transistor has a film thickness of 50 nm or less. 6. A manufacturing method for manufacturing the thin film transistor according to claim 1, wherein the active layer is doped with impurities by an ion doping method. Manufacturing method. 7. A manufacturing method for manufacturing the thin film transistor according to claim 1, wherein the active layer is doped with an impurity by an ion implantation method. Manufacturing method. 8. A manufacturing method for manufacturing the thin film transistor according to claim 1, wherein the dopant activation in the active layer is performed by a thermal activation method. Method of manufacturing thin film transistor. 9. A manufacturing method for manufacturing the thin film transistor according to claim 1, wherein the activation of the dopant in the active layer is performed by a laser activation method. Method of manufacturing thin film transistor.