JP2002368032A - Semiconductor device manufacturing method and semiconductor device - Google Patents

Abstract

(57) [Problem] To provide a semiconductor device not using a lead frame or the like. An electrode (30) for contacting an electrode provided on a mounting substrate is fixed to a plurality of pad portions (12a) formed on a semiconductor substrate (12) such as a semiconductor chip or a semiconductor wafer on which circuit elements are formed. The semiconductor device 10 in the form of a land grid array is obtained by covering the electrode with the reinforcing layer 32 except for a part thereof. An external electrode is connected to the pad portion itself formed on the semiconductor substrate, which is a land grid array electrode. Since a lead frame is not used, the size of the semiconductor device becomes the chip size of the semiconductor substrate, that is, the semiconductor chip, and a semiconductor device having a chip size can be provided. Further, since the lead frame is not used, the number of parts is reduced, and the manufacturing configuration is simplified, so that the cost is greatly reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device which can be made even smaller than a chip size package. More specifically, the configuration is such that the external electrodes are led out from the semiconductor substrate itself or via an intermediate electrode, so that the semiconductor device can be made even smaller than a conventional chip size package.

[0002]

2. Description of the Related Art Among semiconductor devices, a package (CSP) close to a chip size is known. As the CSP type semiconductor device, a land grid array (LGA), a ball grid array (BGA), and the like are well known. FIG. 15 is a cross-sectional view of a land grid array type semiconductor device. The semiconductor device 10 uses an insulating substrate 16 as a lead frame 14 on which a semiconductor chip 12 is mounted. Insulating substrate 16
An internal electrode layer 16a is formed on the upper surface of the substrate, and an external electrode layer 16b is formed on the lower surface thereof. Although not shown, the external electrode layer 16b is electrically connected to the internal electrode layer 16a via a through hole.

[0005] The semiconductor chip 12 and the internal electrode layer 16 a are connected by a gold wire 18, and the upper surface of the insulating substrate 16 is sealed with a resin material 20 so as to cover the semiconductor chip 12 and the gold wire 18. In the land grid array type, the external electrode layer 16b provided on the lead frame 14 is used.
Are used as external electrodes for a mounting substrate (not shown). When the semiconductor device 10 is configured in this manner, the size of the semiconductor device 10 becomes substantially equal to the size of the insulating substrate 16, and a semiconductor device close to the chip size can be realized.

FIG. 16 shows a modification of the land grid array type. In this example, an electrode layer provided on a semiconductor chip 12 and an internal electrode layer 16a of an insulating substrate 16 are connected to bumps 2a.
2 and the connection gold wire is omitted. FIG. 17 shows an example of a ball grid array type semiconductor device 10. The configuration is almost the same as that of the land grid array type semiconductor device 10 shown in FIG.
Are formed. Therefore, it is mounted on the mounting substrate via the ball-shaped external electrode 24. Even with this ball grid array type, the semiconductor device 10
Is approximately the size of the insulating substrate 16, so that a semiconductor device close to the chip size can be realized.

[0005]

As described above, in the CSP type semiconductor device 10, the semiconductor chip 12
And the external electrode layer 16 b or the external electrode 24 are always assembled via an intermediate substrate such as the lead frame 14. The intermediate substrate is not used as a solidified one having a chip size as shown in FIG. 15 from the beginning. Instead, a large-sized intermediate substrate on which a plurality of semiconductor chips 12 can be mounted is cut after the molding process. 15 to 1
The semiconductor device 10 is as shown in FIG. Therefore, since it is necessary to precisely form the internal electrode layer 16a and the external electrode layer 16b, complicated quality control is required for the large-sized intermediate substrate, and processing steps such as cutting of the intermediate substrate are required. . Of course, when an intermediate substrate is used, quality control of the substrate material is also required, and the cost of the substrate material itself is relatively expensive, which contributes to cost increase in combination with the quality control and processing described above. Has become.

Further, due to the existence of the intermediate substrate, the semiconductor device is not strictly a chip-sized semiconductor device. Therefore, the lead frame 14 which is the intermediate substrate
It is impossible to reduce the size to a size smaller than the size of the semiconductor chip 12, that is, ultimately to the size of the semiconductor chip 12 itself. This is the semiconductor chip 12 and the lead frame 1
This is because a width is required for electrically connecting the first and second substrates 4 to each other. Therefore, the present invention solves such a conventional problem, and proposes an ultimate semiconductor device which is reduced in cost and has the same size as a semiconductor chip, particularly by adopting a configuration in which a lead frame is omitted. Is what you do.

[0007]

According to a first aspect of the present invention, there is provided a method for manufacturing a semiconductor device having a land grid array according to the present invention. An electrode that is in contact with an electrode provided on a mounting substrate is fixed to a plurality of pad portions formed on a semiconductor substrate such as a wafer,
This electrode is characterized in that a semiconductor device having a land grid array shape is obtained by covering a part of the electrode with a reinforcing layer.

According to a fourth aspect of the present invention, there is provided a land grid array semiconductor device comprising: a plurality of pad portions formed on a semiconductor substrate such as a semiconductor chip or a semiconductor wafer having circuit elements formed thereon; And external electrodes for a mounting substrate fixed on the plurality of pad portions.

According to a sixth aspect of the present invention, in a method of manufacturing a semiconductor device having a land grid array, a plurality of pad portions formed on a semiconductor substrate such as a semiconductor chip or a semiconductor wafer on which circuit elements are formed. An intermediate electrode is fixed to the intermediate electrode, a sealing layer is formed so as to cover the intermediate electrode, and then the sealing layer is cut so that a part of the intermediate electrode is exposed. A ball-shaped external electrode that is in contact with an electrode provided on a mounting substrate, and is formed on a semiconductor substrate such as a semiconductor chip or a semiconductor wafer on which circuit elements are formed. After fixing the intermediate electrode to the plurality of pad portions and forming a sealing layer so as to cover the intermediate electrode, the sealing layer is cut so that a part of the intermediate electrode is exposed. To, exposed the on the intermediate electrode, the external electrode forming a ball-like to the electrodes and contacts provided on the mounting board, characterized in that so as to deposit formation.

In a semiconductor device according to the present invention having a ball grid array shape according to the present invention, a plurality of pad portions formed on a semiconductor substrate such as a semiconductor chip or a semiconductor wafer on which circuit elements are formed are provided. An intermediate electrode fixed on the plurality of pad portions, an external electrode connected to the intermediate electrode, and an intermediate substrate for expanding a space between the pad portions joined to the external electrode. I do.

According to the present invention, the external electrode is connected to the pad portion formed on the semiconductor substrate or to the pad portion via the intermediate electrode. External electrodes are electrodes in the form of a land grid array for connection to the mounting board,
The external electrode is a ball grid array electrode for connecting to a mounting substrate.

In the case of a ball grid array type semiconductor device, when the number of pads formed on the semiconductor substrate is large, external electrodes are fixed by employing an electrode spacing expanding means. In that case, the external electrodes can be led out using an intermediate substrate in exceptional cases. Also in this case, in order to make the intermediate substrate as close to the chip size as possible, multiple external electrodes are connected. By doing so, it is possible to provide a semiconductor device having a size nearly equal to the chip size.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, an embodiment of a method for manufacturing a semiconductor device and a semiconductor device according to the present invention will be described in detail with reference to the drawings. FIG. 1 shows an embodiment in which a semiconductor device 10 according to the present invention is applied to a land grid array type semiconductor device. FIG. 1 is a sectional view, and FIG. 2 is a rear view of the semiconductor device 10. In this embodiment, a semiconductor chip which has been diced and solidified as the semiconductor substrate 12 will be exemplified. At a predetermined position on the upper surface of the semiconductor substrate 12, a plurality of pad portions 12a arranged in a rectangular shape as shown in FIG. 2, for example, are formed. The number of the pad portions 12a is arbitrary. For example, when the semiconductor device is a 16-pin type semiconductor device, the chip size is not limited, and the present invention can be applied to a semiconductor device having an arbitrary size from 2.7 × 3.5 mm.

External electrodes 30 having a ball shape are formed on the upper surfaces of the plurality of pad portions 12a, and the surfaces of the external electrodes 30 are processed to be flat surfaces. Further, a reinforcing layer 32 is formed on the surface of the semiconductor substrate 12 excluding the external electrodes 30. The surface of the reinforcing layer 32 is flush with or slightly lower than the flat surface of the external electrode 30. The reinforcing layer 32 also functions as a sealing layer that seals the surface of the semiconductor substrate 12.

By thus making the externally exposed surface of the external electrode 30 flat, the semiconductor device 10 becomes a land grid array type semiconductor device. Since the semiconductor device 10 is provided with the external electrodes 30 for connecting to the mounting substrate on the semiconductor substrate 12 itself, the size of the semiconductor device 10 is the same as the size of the semiconductor substrate 12, that is, the size of the semiconductor chip. Therefore, the semiconductor device 10 having the smallest chip size can be realized.

FIG. 3 is a main part process chart showing an embodiment of a method of manufacturing the land grid array semiconductor device 10 shown in FIG. In this case as well, for the sake of explanation, the semiconductor substrate 12 is shown as being solidified into a semiconductor chip, but the semiconductor device according to the present invention is actually manufactured in the state of a semiconductor wafer before dicing. It is.

First, as shown in FIG. 3A, a semiconductor substrate 12 on which circuit elements are formed is prepared. Next, the ball-shaped external electrode 30 is provided on the pad portion 12 formed on the semiconductor substrate 12.
a (FIG. 3B). The size of the external electrode 30 fixed on the pad portion 12a depends on the size of the pad portion 12a.
However, a ball electrode having a diameter substantially equal to the width of the pad portion 12a or a diameter slightly smaller than the width is used.

Next, the semiconductor substrate 1 including the external electrodes 30
2 is filled with a reinforcing layer 32 using resin (FIG. 3B). Since the reinforcing layer 32 covers the entire upper surface of the semiconductor substrate 12, it also functions as a sealing layer for the semiconductor substrate 12. Thereafter, the external electrode 30 is exposed, and the reinforcing layer 32 and the external electrode 30 are cut so that the exposed surface becomes a flat surface (FIG. 3C). In this example, the external electrode 30 is cut by about 1/3. It shows the case where it was processed as follows. The cutting method is optional, but the etching process is most easily used. The flat surface of the external electrode 30 becomes well compatible with the wiring pattern (electrode portion) formed on the mounting substrate, and the semiconductor device 10 can be firmly mounted on the mounting substrate. When formed in this manner, a chip-sized semiconductor device 10 can be obtained in which the external electrodes 30 are directly adhered to the pad portions 12a of the semiconductor substrate 12 while being embedded in the reinforcing layer 32.

When it is considered that the reinforcement of the external electrode 30 is not sufficient with the reinforcement layer 32 alone, a second reinforcement layer 34 can be further formed on the upper surface of the reinforcement layer 32 as shown in FIG. In this case, since the external electrode 30 is recessed from the surface of the second reinforcing layer 34, when the second reinforcing layer 34 is used, a ball-shaped electrode is attached to the mounting substrate as an auxiliary electrode. This will make the implementation more reliable. Resin is used for the second reinforcing layer 34 as well as the first reinforcing layer 32.

In order to ensure that the external electrode 30 can be mounted on the mounting board, the surface of the reinforcing layer 32 is further slightly cut so that the flat surface of the external electrode 30 projects slightly from the reinforcing layer 32. May be formed. Further, in order to apply the reinforcing layer 32 to the upper surface of the semiconductor substrate 12, a coating case 36 as shown in FIG. 5 is used, and a resin serving as a reinforcing layer is poured therein. Then, the flat reinforcing layer 32 can be applied to the upper surface of the semiconductor substrate 12 so as to have a predetermined thickness.

The external electrode 30 shown in FIG. 1 has a structure in which a part of a ball-shaped electrode is cut into a flat surface as an embodiment. However, as shown in FIG. 6 or FIG. You can also.

In the embodiment shown in FIG. 6, a rod-shaped electrode 40 is further attached as a top electrode on the top of a ball-shaped electrode. In this case, after the external electrode 30 and the rod-shaped electrode 40 are respectively formed, the reinforcing layer 32 is formed on the semiconductor substrate 12.
Then, the rod-shaped electrode 40 is exposed by cutting. With this configuration, the size of the exposed electrode can be made very small, so that the wiring pattern of the mounting substrate can be miniaturized.

In the embodiment shown in FIG. 7, a rectangular electrode is formed as the external electrode 30, and a rectangular auxiliary electrode 42 is provided on the upper surface thereof.
Are laminated. In this case, since the contact area of the auxiliary electrode 42 with the mounting substrate increases, the mounting can be performed more firmly. Therefore, it is suitable for a semiconductor device having a relatively large chip size. Also in this case, the external electrode 3
The semiconductor device 10 having an electrode structure as shown in FIG. 7 can be obtained by filling the reinforcing layer 32 after attaching the 0 and the auxiliary electrode 42 respectively, and thereafter cutting the reinforcing layer 32.

The semiconductor device 10 shown in FIG. 1 shows a case where the external electrodes 30 are arranged in a rectangular shape as shown in FIG. However, when the number of pins is increased, it may not be possible with the single-row arrangement. In such a case, for example, the external electrodes 30 are arranged in several rows as shown in FIG. By doing so, the semiconductor device 10 having a larger number of pins can be configured. The present invention can be applied to such a multi-row electrode structure. It can be easily understood that the external electrodes 30 arranged in several lines can be arranged in a staggered pattern as shown in FIG. 9 in order to arrange as many electrodes as possible.

In the above-described embodiment, the present invention is applied to a land grid array type semiconductor device. The following describes a case where the present invention is applied to a ball grid array type semiconductor device. FIG. 10 shows an embodiment of a semiconductor device 10 of the ball grid array type. 1 are denoted by the same reference numerals and description thereof is omitted. In this embodiment, an external electrode formed on pad portion 12a of semiconductor substrate 12 is used as intermediate electrode 40. Is done. Cutting is performed so that the intermediate electrode 40 and the reinforcing layer 32 are on the same surface, and the surface of the intermediate electrode 40 is, for example, a flat surface.

A ball-shaped electrode 46 which is finally used as an external electrode is formed on the intermediate electrode 40, and a second reinforcing layer 44 is further formed on the first reinforcing layer 3.
2 is formed on the upper surface. The thickness of the second reinforcing layer 44 is selected so that about 2/3 of the ball-shaped electrode 46 is covered.

With this configuration, as shown in FIG. 11, only the ball electrodes 46 are exposed on the outer surface 12b of the semiconductor substrate 12, so that the ball grid array type semiconductor device 10 is formed. Is obtained. The size of the ball grid array type semiconductor device 10 is the same as the size of the semiconductor substrate 12, that is, the chip size.

FIG. 12 is a main part process chart showing an embodiment of a method of manufacturing the ball grid array type semiconductor device 10 shown in FIG. In this case as well, for the sake of explanation, the semiconductor substrate 12 is shown as being solidified into a semiconductor chip, but the semiconductor device according to the present invention is actually manufactured in the state of a semiconductor wafer before dicing. It is.

First, as shown in FIG. 12A, a semiconductor substrate 12 on which circuit elements are formed is prepared. Next, a pad portion 1 in which a ball-shaped intermediate electrode 40 is formed on the semiconductor substrate 12 is formed.
2a (FIG. 12B). Although the size of the intermediate electrode 40 differs depending on the size of the pad portion 12a,
A ball electrode having a diameter substantially equal to or slightly smaller than the width of the pad portion 12a is used.

Next, the semiconductor substrate 1 including the intermediate electrode 40 is
A first reinforcing layer 32 using resin is formed on the upper surface of the second 2 (FIG. 12C). Since the first reinforcing layer 32 covers the entire upper surface of the semiconductor substrate 12, it also functions as a sealing layer for the semiconductor substrate 12.

After that, the intermediate electrode 40 is exposed, and the first reinforcing layer 32 and the intermediate electrode 40 are cut so that the exposed surface becomes a flat surface (FIG. 12D). This shows a case where the workpiece is cut so as to be cut by about / 3. The cutting method is optional, but the etching process is most easily used. The reason why the intermediate electrode 40 is made flat is to improve the familiarity with the external electrode 46 to be formed next, and to increase the bonding area.

Next, the second reinforcing layer 44 is selectively formed by etching while leaving the surface of the intermediate electrode 40 (FIG. 1).
2E). Thereafter, a ball electrode 46 is formed on the intermediate electrode 40 (FIG. 12F). Thus, the ball-shaped electrode 46 is exposed on the surface of the semiconductor substrate 12.

When formed in this manner, the ball-shaped electrode 46 is used as an external electrode in a state where the second reinforcing layer 44 is partially embedded in the pad portion 12a of the semiconductor substrate 12.
Grid array type semiconductor device 10 connected to
Can be obtained. As shown, the size of the completed semiconductor device 10 is a chip size.

When the arrangement pitch of the pad portions 12a arranged on the semiconductor substrate 12 is extremely narrow, the arrangement shown in FIG.
As shown in FIG. 3, it is sufficient to use an electrode interval expanding means. The embodiment shown in FIG.
a is applied to the arrayed semiconductor substrate 12,
In this case, the adjacent pitch pa is very narrow, so that the external electrode 46 cannot be formed as it is.

Thus, a ball grid array type semiconductor device 10 is constructed by using the means for expanding the interval between the electrodes. In this embodiment, in addition to the ball-shaped electrode 46, an external lead-out layer 48 that functions as a wiring pattern layer for extending the interval is used. That is, in order to contact the second reinforcing layer 44 with the intermediate electrode 40, the external lead-out layer 48 having the same shape as the pad portion 12a is formed. Outer layer 48
Are wired in the left-right direction so that the interval between them is widened as shown in the figure. Then, a ball-shaped electrode 46 to be a final external electrode is formed on the external lead-out layer 48. By doing so, the pitch pb of the ball-shaped electrodes 46 becomes wider than the pitch pa of the pad portions 12a formed on the semiconductor substrate 12, and the ball-shaped electrodes 46 used as final external electrodes are deposited. Enough spacing can be obtained to form.

FIG. 14 shows another embodiment of FIG. 13, in which the intermediate substrate 50 is exceptionally used as the means for extending the interval between the electrodes. In this case, on the lower surface of the intermediate substrate 50, an electrode pattern layer 50a arranged in the same manner as the pad portion 12a is provided, and the electrode pattern layer 50a makes contact with the pad portion 12a.

On the upper surface of the intermediate substrate 50, an electrode pattern layer 50b having a wider pitch than the electrode pattern layer 50a on the lower surface is formed.
Then, a ball-shaped electrode 52 to be a final external electrode is formed. By using the intermediate substrate 50 in this manner,
Since the external electrode 52 can be fixed even in the pad section 12a having a narrow pitch, the present invention can be applied to a semiconductor device having a high density and a multi-pin configuration. The space between the semiconductor substrate 12 and the intermediate substrate 50 may be sealed with a resin or the like.

[0038]

As described above, in the method of manufacturing a semiconductor device and the semiconductor device according to the present invention, an external electrode is formed on a plurality of pad portions formed on a semiconductor substrate or via an intermediate electrode. It is something to do. According to this, since the size of the semiconductor device is the same as the size of the semiconductor substrate, that is, the chip size of the semiconductor chip, a semiconductor device having the smallest chip size can be provided.

By using such a semiconductor device, it is not necessary to use an intermediate substrate such as a lead frame. Therefore, all processing steps such as complicated quality control for the lead frame and cutting of the intermediate substrate are performed. Can be omitted. As a result, the cost can be significantly reduced as compared with the related art in combination with the simplification of the manufacturing process. Therefore, the present invention is extremely suitable for application to a land grid array or ball grid array semiconductor device.

[Brief description of the drawings]

FIG. 1 is a sectional view showing an embodiment of a land grid array semiconductor device according to the present invention.

FIG. 2 is a rear view thereof.

FIG. 3 is a view of a manufacturing process showing an embodiment of a method for manufacturing a land grid array semiconductor device according to the present invention.

FIG. 4 is a cross-sectional view of a main part showing another embodiment of a land grid array semiconductor device according to the present invention.

FIG. 5 is a partial cross-sectional view showing another example of a method for manufacturing a land grid array semiconductor device according to the present invention.

FIG. 6 is a partial cross-sectional view showing another embodiment of the external electrode (part 1).

FIG. 7 is a partial cross-sectional view showing another embodiment of the external electrode (part 2).

FIG. 8 is a back view of the semiconductor device showing an example of arrangement of external electrodes.

FIG. 9 is a rear view of a part of the semiconductor device showing another example of arrangement of external electrodes.

FIG. 10 is a sectional view showing an embodiment of a ball grid array semiconductor device according to the present invention;

FIG. 11 is a rear view thereof.

FIG. 12 is a view of a manufacturing process showing an embodiment of a method for manufacturing a ball grid array semiconductor device according to the present invention;

FIG. 13 is a cross-sectional view of a main part showing another embodiment of a ball grid array semiconductor device according to the present invention.

FIG. 14 is a sectional view of a main part showing another embodiment of a ball grid array semiconductor device according to the present invention.

FIG. 15 is a sectional view of a conventional semiconductor device (part 1).

FIG. 16 is a sectional view of a conventional semiconductor device (part 2).

FIG. 17 is a sectional view of a conventional semiconductor device (part 3).

[Explanation of symbols]

10 semiconductor device, 12 semiconductor substrate, 14
..Lead frames, 18 gold wires, 20 sealing layers, 12a pad portions, 30, 46, 52 external electrodes, 32, 44 reinforcing layers (expansion of electrode spacing) Means), 50 ... intermediate substrate

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H01L 21/92 602K 602D

Claims (13)

[Claims] An electrode for contacting an electrode provided on a mounting substrate is fixed to a plurality of pads formed on a semiconductor substrate such as a semiconductor chip or a semiconductor wafer on which a circuit element is formed. In contrast, a method of manufacturing a semiconductor device, characterized in that a semiconductor device having a land grid array shape is obtained by coating a reinforcing layer while leaving a part thereof. 2. The method for manufacturing a semiconductor device according to claim 1, wherein a land-shaped external electrode is formed by cutting a surface of the electrode to expose the surface. 3. The method of manufacturing a semiconductor device according to claim 2, wherein when the semiconductor substrate is a semiconductor wafer, the electrode is exposed and then solidified into a plurality of semiconductor chips. 4. A semiconductor device comprising: a plurality of pad portions formed on a semiconductor substrate such as a semiconductor chip or a semiconductor wafer on which circuit elements are formed; and external electrodes for a mounting substrate fixed on the plurality of pad portions. A semiconductor device having a land grid array shape. 5. The semiconductor device according to claim 4, wherein said external electrode is reinforced by a reinforcing layer. 6. An intermediate electrode is fixed to a plurality of pads formed on a semiconductor substrate such as a semiconductor chip or a semiconductor wafer on which circuit elements are formed, and a sealing layer is formed so as to cover the intermediate electrode. After that, the sealing layer is cut so that a part of the intermediate electrode is exposed, and a ball-shaped external electrode that is in contact with the electrode provided on the mounting board is covered on the exposed intermediate electrode. An intermediate electrode is fixed to a plurality of pad portions formed on a semiconductor substrate such as a semiconductor chip or a semiconductor wafer on which a circuit element is formed, and is sealed so as to cover the intermediate electrode. After the stop layer is formed, the sealing layer is cut so that a part of the intermediate electrode is exposed, and a ball-shaped contacting electrode provided on a mounting board is formed on the exposed intermediate electrode. The method of manufacturing a semiconductor device forming a ball grid array, characterized in that the external electrode so as to deposit formation Nasu. 7. The method for manufacturing a semiconductor device according to claim 6, wherein when the semiconductor substrate is a semiconductor wafer, the intermediate electrode is exposed and then solidified into a semiconductor chip. 8. A semiconductor device according to claim 1, further comprising a space extending means for connecting a plurality of pads formed on the surface of said semiconductor substrate, said external electrode being fixed to another surface of said space extending means. 7. The method for manufacturing a semiconductor device according to claim 6, wherein: 9. The space expansion means is an intermediate substrate,
9. The method according to claim 8, wherein an external electrode is fixed to an upper surface of the intermediate substrate. 10. The gap extending means is a gap extending electrode pattern layer, and the external electrode is fixed to the gap extending electrode formed on the upper surface thereof.
The manufacturing method of the semiconductor device described in the above. 11. A semiconductor chip on which a circuit element is formed,
A plurality of pad portions formed on a semiconductor substrate such as a semiconductor wafer; an intermediate electrode fixed on the plurality of pad portions; an external electrode connected to the intermediate electrode; and a pad joined to the external electrode A ball grid array-shaped semiconductor device comprising: 12. A gap extending electrode pattern layer for a pad section connectable to an intermediate electrode fixed on the plurality of pad sections, and a gap extending electrode formed on an upper surface of the gap extending electrode pattern layer. 12. The semiconductor device according to claim 11, wherein the ball-shaped external electrode is fixed to the electrode. 13. A space extending intermediate substrate is bonded to the plurality of pad portions, and the ball-shaped external electrode is fixed to the space extending electrode formed on the upper surface of the intermediate substrate. The semiconductor device according to claim 11, wherein: