JP2002118260A - Manufacturing method of semiconductor device - Google Patents

Abstract

(57) Abstract: Provided is a method of manufacturing a semiconductor device which does not hinder transistor performance while sufficiently suppressing a substrate floating effect accompanying impact ionization in an SOI device. A method of manufacturing a semiconductor device according to the present invention includes:
A step of preparing the SOI substrate 1, a step of forming trenches 4a and 4b in the single-crystal Si layer 4, and a step of implanting Ar ions 9 from the side walls in the trench to the bottom of the single-crystal Si layer to form a single-crystal Si layer 4, a step of forming a damaged layer 11 at the bottom, a step of embedding a silicon oxide film in a trench, a step of forming a gate oxide film on the surface of a single-crystal Si layer, and forming a gate electrode on the gate oxide film. A step of implanting impurity ions into the single-crystal Si layer using the gate electrode as a mask, and a step of forming a source / drain region diffusion layer in the single-crystal Si layer by annealing the single-crystal Si layer; Is provided.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for manufacturing a semiconductor device having an SOI structure. In particular, the present invention relates to a method for manufacturing a semiconductor device capable of sufficiently suppressing a substrate floating effect.

[0002]

2. Description of the Related Art A method of forming a transistor in a single crystal semiconductor layer on an insulating film is known as an SOI (Silicon On Insulator) structure. Hereinafter, the MO formed on the SOI substrate will be described.
A method for manufacturing the S transistor will be described.

FIGS. 4A and 4B are cross-sectional views showing a conventional method for manufacturing a semiconductor device. First, the SOI substrate 10
Prepare 1 The SOI substrate 101 includes a support substrate 102 made of single crystal silicon, an insulating film 103 formed on the support substrate 102, and a single crystal Si layer 104 formed on the insulating film 103. I have. The SOI substrate 101 can be manufactured by various manufacturing methods.
It can also be manufactured by X (separation by Implanted oxygen) or the like. The bonding method is a method for preparing an SOI substrate by preparing two silicon substrates each having an insulating film on the surface and bonding the insulating films of the silicon substrates to each other. SIMOX is a method for manufacturing an SOI substrate by implanting oxygen at a high concentration into a single crystal silicon substrate to form an oxide film inside the silicon substrate.

[0004] Next, as shown in FIG.
A trench is formed in the i-layer 104, and a silicon oxide film is embedded in the trench. Thus, the element isolation film 1 made of a silicon oxide film is formed in the element isolation region on the insulating film 103.
05 is formed. Next, a P-type impurity is ion-implanted into the single-crystal Si layer 104.

Thereafter, a gate oxide film 106 is formed on the surface of the single crystal Si layer 104 by a thermal oxidation method. Next, a polysilicon film is deposited on the entire surface including the gate oxide film 106, and the polysilicon film is patterned to form a gate electrode 107 on the gate oxide film.

Next, while rotating the SOI substrate 101, high-energy Ar ions 109 are obliquely implanted under the condition that the concentration becomes maximum at the bottom of the single-crystal Si layer 104. As a result, a damage layer 111 including a crystal defect is formed at the bottom of the single crystal Si layer 104 located below the gate electrode. This damage layer 111 is made of SO
This is for suppressing the substrate floating effect due to impact ionization in the I device. In other words, when there is no damage layer, the single-crystal Si layer 104 is insulated from the support substrate 102, so that minority carriers (holes) generated by a strong drain electric field or the like are transiently accumulated in the single-crystal Si layer. Although the threshold voltage fluctuates as a result, when the damage layer 111 is present, the recombination of holes generated in the single crystal Si layer is promoted, and the lifetime of the holes is shortened. The accumulation of holes in the substrate can be suppressed, and the floating effect of the substrate can be suppressed.

Thereafter, as shown in FIG. 4B, low concentration N-type impurity ions are implanted using the gate electrode 107 as a mask. Next, a silicon oxide film is deposited on the entire surface including the gate electrode 107 by a CVD (Chemical Vapor Deposition) method, and the silicon oxide film is etched on the entire surface. A wall 113 is formed.

Next, N-type impurity ions are implanted using the side wall 113 and the gate electrode 107 as a mask. Thereafter, the SOI substrate 101 is annealed, so that the single-crystal Si layer 104 has a low-concentration N-type diffusion layer 1.
15 and N-type diffusion layers 116, 1 of source / drain regions
17 are formed.

[0009]

By the way, in the conventional method of manufacturing a semiconductor device, when the Ar ions 109 are implanted, the conditions are such that the concentration is maximized at the bottom of the single crystal Si layer 104. In addition, a damage layer 111 including a crystal defect is formed at the bottom of the single crystal Si layer. Therefore, the concentration of crystal defects is highest at the bottom of the single crystal Si layer. However, although this crystal defect has a lower concentration than the bottom of the single-crystal Si layer, it is also formed in the diffusion layers 116 and 117 in the source / drain regions where the crystal defect is not desired to be formed. As a result, in the case of, for example, an N-channel MOS transistor, majority carriers (electrons) are trapped by crystal defects (damaged portions) in the source / drain regions, and desired transistor performance cannot be exhibited.

The present invention has been made in view of the above circumstances, and has as its object to sufficiently suppress the substrate floating effect associated with impact ionization in an SOI device and not to hinder transistor performance. An object of the present invention is to provide a method for manufacturing a semiconductor device.

[0011]

In order to solve the above-mentioned problems, a method of manufacturing a semiconductor device according to the present invention comprises a supporting substrate,
A step of preparing an SOI substrate having a first insulating film formed thereon and a single-crystal Si layer formed thereon; a step of forming a trench in the single-crystal Si layer; Implanting defects forming ions into the bottom of the crystalline Si layer to form a damaged layer comprising crystal defects at the bottom of the single-crystal Si layer;
A step of embedding an insulating film, a step of forming a gate insulating film on the surface of the single crystal Si layer, a step of forming a gate electrode on the gate insulating film, and a step of implanting impurity ions into the single crystal Si layer using the gate electrode as a mask. Injecting step and single crystal Si
Forming a diffusion layer of a source / drain region in the single-crystal Si layer by annealing the layer.

According to the method of manufacturing a semiconductor device, a trench is formed in the single-crystal Si layer, and ions for forming a defect are implanted into the bottom of the single-crystal Si layer from a side wall in the trench, so as to be located near the trench. A damaged layer made of crystal defects is formed at the bottom of the single crystal Si layer. Since the defect forming ions are implanted from the side walls in the trench in this manner, the defect forming ions can be directly implanted into the bottom of the single crystal Si layer while suppressing the passage of the defect forming ions through the source / drain regions. Therefore, since the crystal defects are not formed where they are not desired, the floating effect of the substrate due to the impact ionization in the SOI device can be sufficiently suppressed without impairing the transistor performance.

In the method for manufacturing a semiconductor device according to the present invention, in the step of forming the damaged layer, when implanting ions for forming defects from the side wall in the trench into the bottom of the single-crystal Si layer, the SOI substrate is removed. It is preferable to implant the defect forming ions obliquely while rotating.

In the method of manufacturing a semiconductor device according to the present invention, it is preferable that the damaged layer is located below a diffusion layer in a source / drain region.

[0015]

Embodiments of the present invention will be described below with reference to the drawings. 1 to 3 are sectional views showing a method for manufacturing a semiconductor device according to an embodiment of the present invention.

First, an SOI substrate 1 is prepared. This SO
The I substrate 1 includes a support substrate 2 made of single crystal silicon, an insulating film 3 formed on the support substrate 2,
And a single-crystal Si layer 4 formed thereon. The SOI substrate 1 can be manufactured by various manufacturing methods.
It can also be manufactured by OX or the like.

Next, as shown in FIG.
A pad oxide film (not shown) is formed on the surface of the substrate by a thermal oxidation method, and a silicon nitride film 8 is deposited on the pad oxide film by a CVD method. Thereafter, a resist film (not shown) is provided on the silicon nitride film 8, and the silicon nitride film 8 is etched using the resist film as a mask. 8
a, 8b are formed. Next, trenches 4a and 4b are formed in single crystal Si layer 4 by etching single crystal Si layer 4 using silicon nitride film 8 as a mask.

Thereafter, while rotating the SOI substrate 1,
Using the silicon nitride film 8 as a mask, high-energy Ar ions 9 are obliquely implanted. As a result, Ar ions are implanted into the bottom of the single-crystal Si layer 4 from the sidewalls in the trenches 4a and 4b, and a damaged layer 11 composed of crystal defects is formed at the bottom of the single-crystal Si layer 4 located near the trench. The damage layer 11 is for suppressing a substrate floating effect due to impact ionization in an SOI device. In other words, when there is no damage layer, the single-crystal Si layer 4 is insulated from the support substrate 2, so that minority carriers (holes) generated by a strong drain electric field or the like are transiently accumulated in the single-crystal Si layer. As a result, the threshold voltage fluctuates.
By accelerating the recombination of holes generated in the layer and shortening the lifetime of the holes, the accumulation of holes in the single crystal Si layer can be suppressed, and the substrate floating effect can be suppressed. be able to.

Next, as shown in FIG. 2, after the silicon nitride film 8 is peeled off, a silicon oxide film is deposited on the entire surface including the insides of the trenches 4a and 4b by the CVD method. Thereafter, the silicon oxide film existing on the single crystal Si layer 4 is removed by etch back or CMP (Chemical Mechanical Polishing) polishing. As a result, a silicon oxide film is buried in the trench, and an element isolation film 5 made of a silicon oxide film is formed in an element isolation region on the insulating film 3. Next, a P-type impurity is ion-implanted into the single-crystal Si layer 4.

Thereafter, a gate oxide film 6 is formed on the surface of the single crystal Si layer 4 by a thermal oxidation method. Next, a polysilicon film is deposited on the entire surface including the gate oxide film 6 by a CVD method, and the polysilicon film is patterned to form a gate electrode 7 on the gate oxide film.

Next, low concentration N-type impurity ions are implanted using the gate electrode 7 as a mask. Next, a silicon oxide film is deposited on the entire surface including the gate electrode 7 by the CVD method, and the silicon oxide film is etched over the entire surface, so that a sidewall 13 made of the silicon oxide film is formed on the side wall of the gate electrode 7. You.

Thereafter, N-type impurity ions are implanted using the side wall 13 and the gate electrode 7 as a mask.
The SOI substrate 1 is annealed. Thereby, the single crystal S
In the i-layer 4, a low-concentration N-type diffusion layer 15 and N-type diffusion layers 16 and 17 of source / drain regions are formed.

Next, as shown in FIG. 3, an interlayer insulating film 23 made of a silicon oxide film or the like is formed on the entire surface including the gate electrode 7.
Is deposited. Thereafter, by etching the interlayer insulating film 23, the N-type diffusion layers 16 in the source / drain regions are removed.
17 contact holes 23a,
23b is formed. Next, a wiring layer 25 is formed in the contact hole and on the interlayer insulating film.

According to the above embodiment, single-crystal Si layer 4
Trenches 4a and 4b are formed in the trench, and Ar ions are implanted into the bottom of the single-crystal Si layer from the side walls in the trench to form a damage layer 11 on the bottom of the single-crystal Si layer 4 located near the trench. I have. Therefore, unlike the conventional semiconductor device, crystal defects are not formed in the diffusion layers of the source / drain regions, which are places where crystal defects are not desired to be formed. That is, by implanting Ar ions from the side walls in the trench, Ar ions can be suppressed from passing through the source / drain regions and directly implanted into the bottom of the single-crystal Si layer. Therefore, since the crystal defects are not formed in places where they are not desired, the transistor performance is not hindered.

In the present embodiment, a damaged layer (defective layer) having a recombination center is formed below the N-type diffusion layers 16 and 17 in the source / drain regions. For this reason, the recombination of the minority carriers (holes) generated in the single-crystal Si layer 4 due to the strong electric field of the drain is promoted, and the lifetime of the holes is shortened, so that the substrate floating effect can be suppressed.

The present invention is not limited to the above embodiment, but can be implemented with various modifications. For example,
As for the specific direction when the Ar ions 9 are implanted obliquely, it is possible to select and execute various appropriate ones depending on conditions such as the size of the gate electrode and the thickness of the single crystal Si layer. .

In the above embodiment, Ar ions are implanted to form the damaged layer. However, the ion species is not limited to Ar, but a rare gas element such as Ne, F, Cl or the like. Halogen element, and Si, C, Ge
It is also possible to use Group 14 elements.

[0028]

As described above, according to the present invention, by implanting defect-forming ions from the sidewalls in the trench into the bottom of the single-crystal Si layer, damage due to crystal defects is formed in the bottom of the single-crystal Si layer. Forming a layer. Therefore,
It is possible to provide a method of manufacturing a semiconductor device which does not hinder transistor performance while sufficiently suppressing a substrate floating effect due to impact ionization in an SOI device.

[Brief description of the drawings]

FIG. 1 is a sectional view illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view showing the method of manufacturing the semiconductor device according to the embodiment of the present invention, showing a step subsequent to FIG. 1;

FIG. 3 is a cross-sectional view showing the method of manufacturing the semiconductor device according to the embodiment of the present invention, showing a step subsequent to FIG. 2;

FIGS. 4A and 4B are cross-sectional views illustrating a method for manufacturing a conventional semiconductor device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1, 101 SOI substrate 2, 102 Support substrate 3, 103 Insulating film 4, 104 Single crystal Si layer 4a, 4b Trench 5, 105 Element isolation film 6, 106 Gate oxide film 7, 107 Gate electrode 8 Silicon nitride film 8a, 8b Opening 9,109 Ar ion 11,111 Damage layer 13,113 Side wall 15,115 Low concentration N-type diffusion layer 16,116 Source diffusion layer 17,117 Drain diffusion layer 23 Interlayer insulating film 23a, 23b Contact hole 25 Wiring layer

Claims (3)

[Claims] An SOI having a support substrate, a first insulating film formed thereon, and a single-crystal Si layer formed thereon
A step of preparing a substrate; a step of forming a trench in the single-crystal Si layer; and implanting a defect-forming ion from the side wall in the trench into the bottom of the single-crystal Si layer to form a crystal at the bottom of the single-crystal Si layer. A step of forming a damaged layer composed of defects; a step of embedding a second insulating film in the trench; a step of forming a gate insulating film on the surface of the single-crystal Si layer; and forming a gate electrode on the gate insulating film A step of implanting impurity ions into the single-crystal Si layer using the gate electrode as a mask; and annealing the single-crystal Si layer to form the single-crystal Si layer.
Forming a diffusion layer of a source / drain region in a layer. 2. In the step of forming a damaged layer, when ion for forming a defect is implanted from a side wall in a trench to a bottom of a single crystal Si layer, the ion for forming a defect is tilted while rotating an SOI substrate. The method according to claim 1, wherein the implantation is performed. 3. The method according to claim 1, wherein the damaged layer is located below the diffusion layer in the source / drain region.