JP2002171067A - Multi-layered three-dimensional circuit board and its manufacturing method - Google Patents
Multi-layered three-dimensional circuit board and its manufacturing methodInfo
- Publication number
- JP2002171067A JP2002171067A JP2000367091A JP2000367091A JP2002171067A JP 2002171067 A JP2002171067 A JP 2002171067A JP 2000367091 A JP2000367091 A JP 2000367091A JP 2000367091 A JP2000367091 A JP 2000367091A JP 2002171067 A JP2002171067 A JP 2002171067A
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- circuit
- dimensional
- multilayer
- cut end
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
- B29L—INDEXING SCHEME ASSOCIATED WITH SUBCLASS B29C, RELATING TO PARTICULAR ARTICLES
- B29L2031/00—Other particular articles
- B29L2031/34—Electrical apparatus, e.g. sparking plugs or parts thereof
- B29L2031/3493—Moulded interconnect devices, i.e. moulded articles provided with integrated circuit traces
Landscapes
- Structure Of Printed Boards (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は回路パターンが多層
に形成されている多層立体回路基板及びその製造方法に
関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer three-dimensional circuit board in which circuit patterns are formed in multiple layers, and a method for manufacturing the same.
【0002】[0002]
【従来の技術】立体回路基板(MID基板)においても
高密度実装や回路設計の自由度の向上のために多層化の
要望があり、このために特開平7−170077号公報
には突部を有する立体回路基板と孔を有する立体回路基
板とを組み合わせて、孔に嵌め込んだ突部に設けている
導体で両立体回路基板の回路パターン間の接続を行うよ
うにしたものが開示され、特開平7−249873号公
報には突部を有する立体回路基板に対して2色成形で他
の立体回路基板を形成し、他の立体回路基板の表面に位
置させた上記突部の端面で両立体回路基板の回路パター
ン間の接続を行うようにしたものが開示されている。こ
の場合、スルーホールやヴィアホールを用いる場合の問
題点を回避することができる。2. Description of the Related Art There is also a demand for multi-layered circuit boards (MID boards) for high-density mounting and to improve the degree of freedom in circuit design. For this reason, Japanese Patent Application Laid-Open No. Hei. There has been disclosed a combination of a three-dimensional circuit board having a three-dimensional circuit board and a three-dimensional circuit board having a hole, and connecting the circuit patterns of the three-dimensional circuit boards with conductors provided on the protrusions fitted into the holes. Japanese Unexamined Patent Publication No. Hei 7-249873 discloses that a three-dimensional circuit board having a projection is formed by two-color molding to form another three-dimensional circuit board, and the two-dimensional circuit board is formed on the end face of the projection positioned on the surface of the other three-dimensional circuit board. There is disclosed an arrangement in which connection between circuit patterns on a circuit board is performed. In this case, it is possible to avoid problems when using a through hole or a via hole.
【0003】[0003]
【発明が解決しようとする課題】しかし、上記両公報に
示されたものでは、射出成形品である複数枚の立体回路
基板を積み重ねることから、どうしても厚みが大きくな
ってしまうものであり、3層、4層といった多層のもの
を小型に形成することは困難であり、立体回路基板が有
する小型化についての特質を損なうものとなってしま
う。However, in the two publications described above, since a plurality of three-dimensional circuit boards, which are injection molded products, are stacked, the thickness is inevitably increased. It is difficult to reduce the size of a multi-layered circuit board such as four layers, and this impairs the characteristics of the three-dimensional circuit board regarding miniaturization.
【0004】本発明はこのような点に鑑みなされたもの
であって、その目的とするところは多層でありながらコ
ンパクトである多層立体回路基板及びその製造方法を提
供するにある。SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a multilayer three-dimensional circuit board which is multilayer and compact, and a method of manufacturing the same.
【0005】[0005]
【課題を解決するための手段】しかして本発明に係る多
層立体回路基板は、成形品である立体回路基板と、該立
体回路基板の少なくとも一面上に絶縁層を介在させて複
数層の回路パターンが積層された多層回路部とを備える
とともに、上記多層回路部に形成されて回路パターンの
端面が露出している切断端面上に、上記複数層の回路パ
ターンのいずれかに少なくとも一端が接続されている接
続用回路パターンを設けていることに特徴を有してい
る。立体回路基板上に複数層の回路パターンを絶縁層を
介して積層した多層回路部を設けるとともに、これら複
数層の回路パターン間の接続を多層回路部を切断して回
路パターンの端部を露出させている切断端面上に設けた
接続用回路パターンで行うようにしたものである。SUMMARY OF THE INVENTION A multilayer three-dimensional circuit board according to the present invention comprises a three-dimensional circuit board which is a molded product and a plurality of circuit patterns formed by interposing an insulating layer on at least one surface of the three-dimensional circuit board. And a multilayer circuit portion in which the laminated circuit portion is laminated, and at least one end is connected to any of the circuit patterns of the plurality of layers on the cut end surface formed in the multilayer circuit portion and exposing the end surface of the circuit pattern. It is characterized in that a connection circuit pattern is provided. A multi-layer circuit portion in which a plurality of circuit patterns are laminated via an insulating layer is provided on a three-dimensional circuit board, and the connection between the plurality of circuit patterns is cut to expose an end of the circuit pattern. The connection circuit pattern provided on the cut end face is used.
【0006】上記切断端面は立体回路基板に及んでいる
とともに接続用回路パターンの一部が立体回路基板の切
断端面上に形成されていてもよい。The cut end face may extend over the three-dimensional circuit board, and a part of the connection circuit pattern may be formed on the cut end face of the three-dimensional circuit board.
【0007】また、立体回路基板の切断端面上に部品実
装部を設けて、該部品実装部に接続用回路パターンを接
続していてもよい。Further, a component mounting portion may be provided on a cut end surface of the three-dimensional circuit board, and a connection circuit pattern may be connected to the component mounting portion.
【0008】さらに多層回路部を貫通して立体回路基板
の表面に凹所を形成している貫通凹部を設けて、該貫通
凹部の底面上に部品実装部を形成し、該部品実装部に上
記貫通凹部の内壁である切断端面に形成された接続用回
路パターンを接続するようにしてもよく、また、該貫通
凹部の底面上と上記貫通凹部の内壁である切断端面とに
接続用回路パターンを形成するようにしてもよい。[0008] Further, a through recess is formed in the surface of the three-dimensional circuit board through the multilayer circuit portion, and a component mounting portion is formed on the bottom surface of the through recess. A connection circuit pattern formed on a cut end surface that is an inner wall of the through recess may be connected, and a connection circuit pattern may be formed on the bottom surface of the through recess and the cut end surface that is the inner wall of the through recess. It may be formed.
【0009】いずれの場合においても、切断端面を傾斜
面として形成することが好ましい。In any case, it is preferable to form the cut end surface as an inclined surface.
【0010】そして本発明に係る多層立体回路基板の製
造方法は、成形品である立体回路基板の少なくとも一面
上に絶縁層を介在させて複数層の回路パターンを積層し
て多層回路部を形成し、次いで多層回路部を切断して切
断端面に回路パターンの端部を露出させ、その後、上記
切断端面に銅薄膜を形成して該銅薄膜に対してレーザー
加工を行って回路として必要な部分と不必要な部分とを
分離し、その後、回路として必要な部分にのみめっきを
施すことで少なくとも一端が上記複数層の回路パターン
のいずれかに接続された接続用回路パターンを形成する
ことに特徴を有している。[0010] In the method for manufacturing a multilayer three-dimensional circuit board according to the present invention, a multilayer circuit part is formed by laminating a plurality of circuit patterns with an insulating layer interposed on at least one surface of a three-dimensional circuit board which is a molded product. Then, the multilayer circuit portion is cut to expose the end of the circuit pattern at the cut end face, and thereafter, a copper thin film is formed on the cut end face, and the copper thin film is subjected to laser processing to form a portion required as a circuit. Unnecessary portions are separated, and thereafter, plating is performed only on portions necessary as circuits, thereby forming a connection circuit pattern at least one end of which is connected to any of the plurality of circuit patterns. Have.
【0011】この時、多層回路部の切断に際して立体回
路基板の一部を切除し、接続用回路パターンの形成時に
その一部を立体回路基板の上記切除で生じた切断端面上
に位置させることで、接続用パターンを形成することが
できる切断端面の面積を大きくして、接続用回路パター
ンの配置の自由度を高めたり、接続用回路パターンの形
成時に該接続用回路パターンに接続された部品実装部を
形成して、部品実装部の配置の自由度を高くしてもよ
い。At this time, a part of the three-dimensional circuit board is cut off when cutting the multi-layer circuit portion, and a part of the three-dimensional circuit board is formed on the cut end face of the three-dimensional circuit board formed when the connection circuit pattern is formed. By increasing the area of the cut end face on which the connection pattern can be formed, the degree of freedom of the arrangement of the connection circuit pattern can be increased, or the components mounted on the connection circuit pattern when the connection circuit pattern is formed can be mounted. A part may be formed to increase the degree of freedom of arrangement of the component mounting part.
【0012】[0012]
【発明の実施の形態】以下本発明を実施の形態の一例に
基づいて詳述すると、図1において、1は射出成形によ
る成形品としての基板であり、その表面には常法、たと
えば表面全面に銅スパッタリング法によって銅薄膜を形
成した後、該銅薄膜に対してレーザー加工等を行うこと
で回路として必要な部分と不必要な部分とを分離し、そ
の後、回路として必要な部分にのみ電気めっきによって
めっきを施すことで回路パターン21が形成されてい
る。また、上記回路パターン21上に絶縁層4を形成す
るとともに該絶縁層4上に常法によって他の回路パター
ン22を形成し、さらに回路パターン22上に絶縁層4
を形成するとともに該絶縁層4上に常法によってさらに
他の回路パターン23を形成し、また、回路パターン2
3上に絶縁層4を介して常法によって回路パターン24
を形成することで、都合4層の多層回路部を基板1上に
形成してある。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will now be described in detail with reference to an example of an embodiment. In FIG. 1, reference numeral 1 denotes a substrate as a molded product by injection molding, and the surface thereof is formed by a conventional method, for example, the entire surface After forming a copper thin film by a copper sputtering method, a portion necessary for a circuit and an unnecessary portion are separated by performing a laser processing or the like on the copper thin film. The circuit pattern 21 is formed by performing plating by plating. Further, the insulating layer 4 is formed on the circuit pattern 21 and another circuit pattern 22 is formed on the insulating layer 4 by a conventional method.
And another circuit pattern 23 is formed on the insulating layer 4 by an ordinary method.
3 and a circuit pattern 24 through an insulating layer 4 in a conventional manner.
Is formed on the substrate 1 for convenience.
【0013】製造法の一例についてさらに詳しく説明す
れば、基板1の表面全面に銅スパッタリングやCVD法
によって銅薄膜層を形成した後、レーザによって銅薄膜
層における回路として必要な部分と不必要な部分とを分
離し、その後、回路として必要な部分にのみ電気めっき
によってめっきを行うとともに不要部分をエッチングで
除去することで回路パターン21を形成する。An example of the manufacturing method will be described in more detail. A copper thin film layer is formed on the entire surface of the substrate 1 by copper sputtering or CVD, and then a portion necessary and unnecessary for a circuit in the copper thin film layer by a laser. Then, plating is performed by electroplating only on a portion necessary for a circuit, and an unnecessary portion is removed by etching to form a circuit pattern 21.
【0014】この後、基板1の表面全面に上記回路パタ
ーン21を覆う絶縁層4を形成し、その上に銅薄膜層の
形成、銅薄膜層における回路として必要な部分と不必要
な部分とのレーザー加工等による分離、めっきによる回
路パターン22の生成を行う。その後、さらに絶縁層4
の形成と上記回路パターンの形成とを繰り返すことで、
回路パターン23,24を形成する。Thereafter, an insulating layer 4 covering the circuit pattern 21 is formed on the entire surface of the substrate 1, and a copper thin film layer is formed thereon, and a portion of the copper thin film layer necessary and unnecessary as a circuit is formed. Separation by laser processing or the like, and generation of the circuit pattern 22 by plating are performed. After that, the insulating layer 4
By repeating the formation of the above and the formation of the circuit pattern,
Circuit patterns 23 and 24 are formed.
【0015】このように多層の回路パターン21,2
2,23,24を備えた多層回路部を形成したならば、
次いで多層回路部を切断することで切断端面に回路パタ
ーン21,22,23,24を露出させる。なお、露出
させるのは、他の層の回路パターン等に接続する必要の
ある回路パターンのみであってもよい。As described above, the multilayer circuit patterns 21 and
After forming a multilayer circuit section having 2, 23, 24,
Next, the circuit patterns 21, 22, 23, and 24 are exposed on the cut end surfaces by cutting the multilayer circuit portion. Note that only the circuit patterns that need to be connected to the circuit patterns of other layers may be exposed.
【0016】そして切断端面に対して、さらに銅薄膜層
の形成、銅薄膜層における回路として必要な部分と不必
要な部分とのレーザー加工等による分離を行い、回路と
して必要な部分に対して電気めっきによるめっきを行っ
て少なくとも一端が上記切断端面に露出する回路パター
ン21,22,23,24のいずれかに接続された接続
用回路パターン30,31を形成する。The cut end face is further subjected to formation of a copper thin film layer, separation of a portion necessary for a circuit and an unnecessary portion of the copper thin film layer by laser processing or the like. Plating is performed by plating to form connection circuit patterns 30, 31 connected to any of the circuit patterns 21, 22, 23, 24 at least one end of which is exposed to the cut end surface.
【0017】上記多層回路部の切断にあたり、基板1も
同時に切断して、基板1にも切断端面を形成し、上記接
続用回路パターン30,31の形成に際して、図2に示
すように、多層回路部の切断端面に連続している上記基
板1の切断端面に接続用回路パターン30,31の一部
が位置するようにしてもよい。接続用回路パターン3
0,31を形成することができる面積が広くなるため
に、接続用回路パターン30,31の配置の自由度を高
くすることができる。In cutting the multilayer circuit portion, the substrate 1 is also cut at the same time, and a cut end face is also formed on the substrate 1. When forming the connection circuit patterns 30 and 31, as shown in FIG. A part of the connection circuit patterns 30 and 31 may be located on the cut end surface of the substrate 1 that is continuous with the cut end surface of the portion. Connection circuit pattern 3
Since the area in which 0 and 31 can be formed is increased, the degree of freedom of arrangement of the connection circuit patterns 30 and 31 can be increased.
【0018】また、接続用回路パターン30,31にお
ける基板1の切断端面上に位置する部分にICやチップ
部品等の部品を表面実装するための部品実装部を形成し
て、図3に示すように部品3の実装を行うことで、回路
パターン21,22,23,24と上記部品3との間を
接続用回路パターン30,31で接続するようにしても
よい。なお、多層回路部と基板1の切断に際しては、図
4に示すように、基板1の一部を切り落とす形態のほ
か、基板1に孔をあける形態であってもよい。Further, a component mounting portion for surface mounting components such as ICs and chip components is formed on portions of the connection circuit patterns 30 and 31 located on the cut end surface of the substrate 1 as shown in FIG. By mounting the component 3 on the circuit board 3, the circuit patterns 21, 22, 23, 24 and the component 3 may be connected by the connection circuit patterns 30, 31. When cutting the multilayer circuit portion and the substrate 1, as shown in FIG. 4, in addition to cutting off a part of the substrate 1, a hole may be formed in the substrate 1.
【0019】図5に他例を示す。これは多層回路部を貫
通して立体回路基板の表面に凹所を形成している貫通凹
部5を設けるとともに、貫通凹部5の内壁である切断端
面と貫通凹部5の底面とに跨った接続用回路パターン3
0,31を形成し、さらに貫通凹部5の底面上において
接続用回路パターン30,31に部品実装部を形成し
て、上記底面上に部品3の実装を行ったものである。FIG. 5 shows another example. This is provided with a through recess 5 penetrating the multilayer circuit portion and forming a recess on the surface of the three-dimensional circuit board, and for connecting across the cut end face which is the inner wall of the through recess 5 and the bottom surface of the through recess 5. Circuit pattern 3
0, 31 are formed, and component mounting portions are formed on the connection circuit patterns 30, 31 on the bottom surface of the through recess 5, and the component 3 is mounted on the bottom surface.
【0020】この場合、多層回路部を切断すると同時に
立体回路基板の一部を切除することで貫通凹部5を形成
し、その後、貫通凹部5の内壁である切断端面から貫通
凹部の底面にかけて銅薄膜層を形成して、銅薄膜層にお
ける回路として必要な部分と不必要な部分とのレーザー
加工等による分離を行い、回路として必要な部分に対し
て電気めっきによるめっきを行うことで部品実装部を備
えた接続用回路パターン30,31を形成する。In this case, the through-hole 5 is formed by cutting off a part of the three-dimensional circuit board at the same time as cutting the multilayer circuit portion, and thereafter, a copper thin film extends from the cut end surface, which is the inner wall of the through-hole 5, to the bottom of the through-hole. After forming a layer, the necessary parts and unnecessary parts of the copper thin film layer are separated by laser processing, etc., and the parts necessary for the circuits are plated by electroplating, so that the component mounting part is The provided connection circuit patterns 30 and 31 are formed.
【0021】この時、貫通凹部5は図6(a)に示すよう
に切断端面が4方に位置する形状の角形のもの、あるい
は図6(b)に示すように切断端面が対向する2方に位置
する形状の溝型のもののいずれであってもよい。また、
貫通凹部5内に部品3を実装する場合、貫通凹部5内を
封止樹脂で埋めてしまってもよい。At this time, the penetrating concave portion 5 has a rectangular shape whose cut end face is located in four directions as shown in FIG. 6A, or has two cut end faces facing each other as shown in FIG. 6B. May be any of the groove-shaped ones located at Also,
When mounting the component 3 in the through recess 5, the inside of the through recess 5 may be filled with a sealing resin.
【0022】図7に示すように、貫通凹部5の底面に部
品4の実装を行わずに、左右の切断端面に端部を露出さ
せている回路パターン21〜24間の接続のための接続
用回路パターン30,31が上記底面上を通過するよう
にしたものであってもよい。As shown in FIG. 7, the connection for connection between the circuit patterns 21 to 24 whose ends are exposed on the left and right cut end surfaces without mounting the component 4 on the bottom surface of the through recess 5. The circuit patterns 30 and 31 may pass through the bottom surface.
【0023】また、図7に示すものでは、切断端面を傾
斜面として形成しているが、このように切断端面を傾斜
面としておくと、接続用回路パターン30,31の形成
に際してレーザーを照射する工程を有するものの場合、
加工が容易となる。In FIG. 7, the cut end surface is formed as an inclined surface. However, if the cut end surface is formed as an inclined surface as described above, a laser is irradiated when the connection circuit patterns 30 and 31 are formed. If you have a process,
Processing becomes easy.
【0024】なお、ここでは最表層に位置する回路パタ
ーン24の形成の後、接続用回路パターン30,31を
形成するものを示したが、最表層に位置する回路パター
ン24の形成の前の段階で切断を行い、その後、最表層
に位置する回路パターン24と接続用回路パターン3
0,31とを同時に形成してもよいものである。Although the connection circuit patterns 30 and 31 are formed after the formation of the circuit pattern 24 located on the outermost layer, a step before the formation of the circuit pattern 24 located on the outermost layer is shown here. Then, the circuit pattern 24 located on the outermost layer and the connection circuit pattern 3 are cut.
0 and 31 may be formed at the same time.
【0025】[0025]
【発明の効果】以上のように本発明においては、成形品
である立体回路基板と、該立体回路基板の少なくとも一
面上に絶縁層を介在させて複数層の回路パターンが積層
された多層回路部を備えるとともに、上記多層回路部に
形成されて回路パターンの端面が露出している切断端面
上に、上記複数層の回路パターンのいずれかに少なくと
も一端が接続されている接続用回路パターンを設けたも
のであって立体回路基板上の多層回路部における複数層
の回路パターン間の接続を多層回路部を切断して回路パ
ターンの端部を露出させている切断端面上に設けた接続
用回路パターンで行うようにしたものであるから、複数
枚の立体回路基板を積層する場合に比して、小型を保ち
つつ多層化を図ることができるものであり、しかも接続
用回路パターンは切断端面に形成しているために、スル
ーホールやヴィアホールを用いる場合と異なって通常の
回路パターンの形成方法で接続用回路パターンを形成す
ることができるものであり、従ってスルーホールやヴィ
アホールを用いる場合の問題点を招くことなく回路パタ
ーンの接続を確実に行うことができる。As described above, according to the present invention, a three-dimensional circuit board which is a molded product, and a multilayer circuit part in which a plurality of circuit patterns are laminated on at least one surface of the three-dimensional circuit board with an insulating layer interposed therebetween. A connection circuit pattern having at least one end connected to any of the plurality of circuit patterns is provided on the cut end surface formed on the multilayer circuit portion and exposing the end surface of the circuit pattern. The connection between a plurality of circuit patterns in a multi-layer circuit portion on a three-dimensional circuit board is performed by a connection circuit pattern provided on a cut end surface that cuts the multi-layer circuit portion and exposes an end of the circuit pattern. Since it is intended to be performed, compared to the case of laminating a plurality of three-dimensional circuit boards, it is possible to achieve multilayering while maintaining a small size, and furthermore, the connection circuit pattern is Since it is formed on the stump, the connection circuit pattern can be formed by a normal circuit pattern forming method differently from the case of using a through hole or a via hole. The connection of the circuit pattern can be reliably performed without incurring the problem in the case of using.
【0026】上記切断端面が立体回路基板に及ぶととも
に接続用回路パターンの一部を立体回路基板の切断端面
上に形成すれば、広い面に対して接続用回路パターンを
形成することができるために、接続用回路パターンの形
成が容易となるとともに複雑なパターンの接続用回路パ
ターンの形成も可能となる。If the cut end surface extends over the three-dimensional circuit board and a part of the connection circuit pattern is formed on the cut end surface of the three-dimensional circuit board, the connection circuit pattern can be formed over a wide surface. In addition, the formation of the connection circuit pattern becomes easy, and the connection circuit pattern of a complicated pattern can be formed.
【0027】また、立体回路基板の切断端面上に部品実
装部を設けて、該部品実装部に接続用回路パターンを接
続すれば、部品の実装面を増やすことができると同時
に、部品実装に際しての回路パターンの設計の自由度を
大きくすることができる。Further, if a component mounting portion is provided on the cut end surface of the three-dimensional circuit board and a connection circuit pattern is connected to the component mounting portion, the mounting surface of the component can be increased, and at the same time, the component mounting time can be reduced. The degree of freedom in designing circuit patterns can be increased.
【0028】さらに多層回路部を貫通して立体回路基板
の表面に凹所を形成している貫通凹部を設けて、該貫通
凹部の底面上に部品実装部を形成し、該部品実装部に上
記貫通凹部の内壁である切断端面に形成された接続用回
路パターンを接続すれば、貫通凹部を囲む複数の切断端
面から部品実装部に接続用回路パターンを引き回すこと
ができるために、さらに回路パターンの設計の自由度を
大きくすることができるものであり、また部品の大きさ
に合わせて貫通凹部を形成すればよいことから、大きな
部品の実装も可能となる。Further, there is provided a through recess which penetrates the multilayer circuit portion and forms a recess on the surface of the three-dimensional circuit board. A component mounting portion is formed on the bottom surface of the through recess, and the component mounting portion is formed on the component mounting portion. By connecting the connection circuit pattern formed on the cut end face which is the inner wall of the through recess, the connection circuit pattern can be routed to the component mounting portion from the plurality of cut end faces surrounding the through recess, and further the circuit pattern The degree of freedom in design can be increased, and since the through recessed portion may be formed in accordance with the size of the component, mounting of a large component is also possible.
【0029】また上記貫通凹部の底面上と上記貫通凹部
の内壁である切断端面とに接続用回路パターンを形成す
るようにすれば、回路パターン間の接続のための接続用
回路パターンの設計の自由度が向上して、複雑な接続も
容易に行うことができるものとなる。If connection circuit patterns are formed on the bottom surface of the through recess and the cut end surface that is the inner wall of the through recess, the design of the connection circuit pattern for connection between the circuit patterns is free. The degree of improvement is improved, and complicated connections can be easily made.
【0030】いずれの場合においても、切断端面を傾斜
面として形成すると、切断端面に露出する回路パターン
の端面の露出面積が広くなるために、接続用回路パター
ンとの接続を良好にすることができるほか、製造に際し
て切断端面に対してレーザー加工を行う場合、レーザー
加工が容易となる。In any case, if the cut end face is formed as an inclined surface, the exposed area of the end face of the circuit pattern exposed on the cut end face becomes large, so that the connection with the connection circuit pattern can be improved. In addition, when laser processing is performed on the cut end surface during manufacturing, laser processing becomes easy.
【0031】そして本発明に係る多層立体回路基板の製
造方法は、成形品である立体回路基板の少なくとも一面
上に絶縁層を介在させて複数層の回路パターンを積層し
て多層回路部を形成し、次いで多層回路部を切断して切
断端面に回路パターンの端部を露出させ、その後、上記
切断端面に銅薄膜を形成して該銅薄膜に対してレーザー
加工を行って回路として必要な部分と不必要な部分とを
分離し、その後、回路として必要な部分にのみめっきを
施すことで少なくとも一端が上記複数層の回路パターン
のいずれかに接続された接続用回路パターンを形成する
ことから、上記多層立体回路基板を容易に製造すること
ができるものであり、殊に切断端面に露出させた回路パ
ターンの端部に少なくとも一端が接続される接続用回路
パターンを上記切断端面に形成するために、接続用回路
パターンは成形品である立体回路基板に対する回路パタ
ーンの形成手法と同じ手法で形成することができる。In the method of manufacturing a multilayer three-dimensional circuit board according to the present invention, a multilayer circuit part is formed by laminating a plurality of circuit patterns on at least one surface of a molded three-dimensional circuit board with an insulating layer interposed therebetween. Then, the multilayer circuit portion is cut to expose the end of the circuit pattern at the cut end face, and thereafter, a copper thin film is formed on the cut end face, and the copper thin film is subjected to laser processing to form a portion required as a circuit. Separating unnecessary portions from each other, and then plating only necessary portions as circuits to form a connection circuit pattern at least one end of which is connected to any of the plurality of circuit patterns. A multilayer three-dimensional circuit board can be easily manufactured. In particular, the connection circuit pattern having at least one end connected to an end of the circuit pattern exposed on the cut end face is cut. To form the end surface, the connection circuit pattern may be formed by the same method as the formation method of a circuit pattern with respect to the three-dimensional circuit substrate is a molded article.
【0032】この時、多層回路部の切断に際して立体回
路基板の一部を切除し、接続用回路パターンの形成時に
その一部を立体回路基板の上記切除で生じた切断端面上
に位置させることで、接続用パターンを形成することが
できる切断端面の面積を大きくすることで、接続用回路
パターンの配置の自由度を高めることができ、接続用回
路パターンの形成時に該接続用回路パターンに接続され
た部品実装部を形成することで、部品実装部の配置の自
由度を高くすることができる。At this time, a part of the three-dimensional circuit board is cut off when cutting the multilayer circuit portion, and a part of the three-dimensional circuit board is formed on the cut end face of the three-dimensional circuit board formed by the cutting when forming the circuit pattern for connection. By increasing the area of the cut end face on which the connection pattern can be formed, the degree of freedom of the arrangement of the connection circuit pattern can be increased, and the connection circuit pattern is connected to the connection circuit pattern at the time of formation. By forming the mounted component mounting section, the degree of freedom in arranging the component mounting section can be increased.
【図1】本発明の実施の形態の一例を示すもので、(a)
は断面図、(b)は端面図である。FIG. 1 shows an example of an embodiment of the present invention, in which (a)
Is a sectional view, and (b) is an end view.
【図2】同上の他例の端面図である。FIG. 2 is an end view of another example of the above.
【図3】同上の更に他例の端面図である。FIG. 3 is an end view of still another example of the above.
【図4】(a)(b)(c)は同上の基板の切断形状の例を示す
斜視図である。FIGS. 4A, 4B, and 4C are perspective views showing examples of cut shapes of the above-mentioned substrate.
【図5】同上の別の例の断面図である。FIG. 5 is a sectional view of another example of the above.
【図6】(a)(b)は同上の貫通凹部の形状例を示す斜視図
である。FIGS. 6 (a) and 6 (b) are perspective views showing examples of the shape of the through recess in the above.
【図7】同上のさらに別の例の断面図である。FIG. 7 is a sectional view of still another example of the above.
1 立体回路基板 4 絶縁層 21 回路パターン 22 回路パターン 23 回路パターン 24 回路パターン 30 接続用回路パターン 31 接続用回路パターン DESCRIPTION OF SYMBOLS 1 Three-dimensional circuit board 4 Insulating layer 21 Circuit pattern 22 Circuit pattern 23 Circuit pattern 24 Circuit pattern 30 Connection circuit pattern 31 Connection circuit pattern
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.7 識別記号 FI テーマコート゛(参考) H05K 1/02 H05K 1/11 F 1/11 3/00 W 3/00 3/40 D 3/40 H01L 23/12 N (72)発明者 正木 康史 大阪府門真市大字門真1048番地松下電工株 式会社内 (72)発明者 武藤 正英 大阪府門真市大字門真1048番地松下電工株 式会社内 Fターム(参考) 5E317 AA11 AA22 BB01 BB11 CC31 CD25 CD31 CD34 GG14 5E338 AA03 AA05 AA16 BB03 BB19 BB28 BB63 CC01 CD01 CD32 EE22 5E346 AA02 AA12 AA15 AA38 AA60 BB01 FF21 FF42 FF45 GG17 GG22 GG26 GG28 HH22 ──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. 7 Identification symbol FI Theme coat ゛ (Reference) H05K 1/02 H05K 1/11 F 1/11 3/00 W 3/00 3/40 D 3/40 H01L 23/12 N (72) Inventor Yasushi Masaki 1048 Kazuma Kadoma, Kadoma City, Osaka Prefecture Inside Matsushita Electric Works, Ltd. 5E317 AA11 AA22 BB01 BB11 CC31 CD25 CD31 CD34 GG14 5E338 AA03 AA05 AA16 BB03 BB19 BB28 BB63 CC01 CD01 CD32 EE22 5E346 AA02 AA12 AA15 AA38 AA60 BB01 FF21 FF42 FF45 GG17 GG22 GG17 GG22
Claims (9)
路基板の少なくとも一面上に絶縁層を介在させて複数層
の回路パターンが積層された多層回路部とを備えるとと
もに、上記多層回路部に形成されて回路パターンの端面
が露出している切断端面上に、上記複数層の回路パター
ンのいずれかに少なくとも一端が接続されている接続用
回路パターンを設けていることを特徴とする多層立体回
路基板。1. A three-dimensional circuit board, which is a molded product, and a multilayer circuit part in which a plurality of circuit patterns are laminated on at least one surface of the three-dimensional circuit board with an insulating layer interposed therebetween. A connection circuit pattern having at least one end connected to any one of the plurality of circuit patterns on the cut end surface formed by exposing the end surface of the circuit pattern. Circuit board.
ともに接続用回路パターンの一部が立体回路基板の切断
端面上に形成されていることを特徴とする請求項1記載
の多層立体回路基板。2. The multilayer three-dimensional circuit board according to claim 1, wherein the cut end face extends to the three-dimensional circuit board, and a part of the connection circuit pattern is formed on the cut end face of the three-dimensional circuit board. .
が形成されて該部品実装部に接続用回路パターンが接続
されていることを特徴とする請求項2記載の多層立体回
路基板。3. The multilayer three-dimensional circuit board according to claim 2, wherein a component mounting portion is formed on a cut end surface of the three-dimensional circuit board, and a connection circuit pattern is connected to the component mounting portion.
面に凹所を形成している貫通凹部を備えているととも
に、該貫通凹部の底面上に部品実装部が形成されて該部
品実装部に上記貫通凹部の内壁である切断端面に形成さ
れた接続用回路パターンが接続されていることを特徴と
する請求項2記載の多層立体回路基板。4. A component mounting portion, wherein the component mounting portion is formed on a bottom surface of the through recess, the component mounting portion being formed on the surface of the three-dimensional circuit board through the multilayer circuit portion. 3. The multilayer three-dimensional circuit board according to claim 2, wherein a connection circuit pattern formed on a cut end surface that is an inner wall of the through recess is connected to the portion.
面に凹所を形成している貫通凹部を備えているととも
に、該貫通凹部の底面上と上記貫通凹部の内壁である切
断端面とに接続用回路パターンが形成されていることを
特徴とする請求項2記載の多層立体回路基板。5. A penetrating recess which penetrates the multilayer circuit portion and forms a recess on the surface of the three-dimensional circuit board, and on a bottom surface of the penetrating recess and a cut end face which is an inner wall of the penetrating recess. 3. The multilayer three-dimensional circuit board according to claim 2, wherein a connection circuit pattern is formed on the three-dimensional circuit board.
ことを特徴とする請求項1〜5のいずれかの項に記載の
多層立体回路基板。6. The multilayer three-dimensional circuit board according to claim 1, wherein the cut end surface is formed as an inclined surface.
一面上に絶縁層を介在させて複数層の回路パターンを積
層して多層回路部を形成し、次いで多層回路部を切断し
て切断端面に回路パターンの端部を露出させ、その後、
上記切断端面に銅薄膜を形成して該銅薄膜に対してレー
ザー加工を行って回路として必要な部分と不必要な部分
とを分離し、その後、回路として必要な部分にのみめっ
きを施すことで少なくとも一端が上記複数層の回路パタ
ーンのいずれかに接続された接続用回路パターンを形成
することを特徴とする多層立体回路基板の製造方法。7. A multilayer circuit part is formed by laminating a plurality of circuit patterns with an insulating layer interposed on at least one surface of a three-dimensional circuit board that is a molded product, and then cutting the multilayer circuit part to form a cut end surface. Exposing the end of the circuit pattern, then
By forming a copper thin film on the cut end surface and performing laser processing on the copper thin film to separate a portion necessary as a circuit from an unnecessary portion, and then plating only the portion necessary as a circuit A method of manufacturing a multilayer three-dimensional circuit board, comprising forming a connection circuit pattern having at least one end connected to one of the plurality of circuit patterns.
の一部を切除し、接続用回路パターンの形成時にその一
部を立体回路基板の上記切除で生じた切断端面上に位置
させていることを特徴とする請求項7記載の多層立体回
路基板の製造方法。8. A part of the three-dimensional circuit board is cut off when cutting the multilayer circuit part, and a part of the three-dimensional circuit board is positioned on the cut end surface of the three-dimensional circuit board formed by the cutting when forming the connection circuit pattern. The method for manufacturing a multilayer three-dimensional circuit board according to claim 7, characterized in that:
回路パターンに接続された部品実装部を形成することを
特徴とする請求項8記載の多層立体回路基板の製造方
法。9. The method for manufacturing a multilayer three-dimensional circuit board according to claim 8, wherein a component mounting portion connected to the connection circuit pattern is formed when the connection circuit pattern is formed.
Priority Applications (6)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000367091A JP2002171067A (en) | 2000-12-01 | 2000-12-01 | Multi-layered three-dimensional circuit board and its manufacturing method |
| EP01126948A EP1209959A3 (en) | 2000-11-27 | 2001-11-13 | Multilayer circuit board and method of manufacturing the same |
| TW090128064A TW507514B (en) | 2000-11-27 | 2001-11-13 | Multilayer circuit board and method of manufacturing the same |
| CNB011401311A CN1181718C (en) | 2000-11-27 | 2001-11-26 | Multi-layer circuit board and its preparing process |
| KR10-2001-0073721A KR100439593B1 (en) | 2000-11-27 | 2001-11-26 | Multilayer circuit board and method of manufacturing the same |
| US09/995,085 US6833511B2 (en) | 2000-11-27 | 2001-11-27 | Multilayer circuit board and method of manufacturing the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000367091A JP2002171067A (en) | 2000-12-01 | 2000-12-01 | Multi-layered three-dimensional circuit board and its manufacturing method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2002171067A true JP2002171067A (en) | 2002-06-14 |
Family
ID=18837591
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2000367091A Pending JP2002171067A (en) | 2000-11-27 | 2000-12-01 | Multi-layered three-dimensional circuit board and its manufacturing method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2002171067A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP2469990A3 (en) * | 2008-04-30 | 2012-09-19 | Panasonic Corporation | Method of producing ciruit board by additive method, and circuit board and multilayer circuit board obtained by the method |
| US9082438B2 (en) | 2008-12-02 | 2015-07-14 | Panasonic Corporation | Three-dimensional structure for wiring formation |
| US9332650B2 (en) | 2008-04-30 | 2016-05-03 | Panasonic Corporation | Method of producing multilayer circuit board |
-
2000
- 2000-12-01 JP JP2000367091A patent/JP2002171067A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP2469990A3 (en) * | 2008-04-30 | 2012-09-19 | Panasonic Corporation | Method of producing ciruit board by additive method, and circuit board and multilayer circuit board obtained by the method |
| US9332650B2 (en) | 2008-04-30 | 2016-05-03 | Panasonic Corporation | Method of producing multilayer circuit board |
| US9082438B2 (en) | 2008-12-02 | 2015-07-14 | Panasonic Corporation | Three-dimensional structure for wiring formation |
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