JP2000323841A - Multilayer circuit board and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a multilayer circuit board having high design freedom in a fine circuit pattern and a highly reliable structure of interlayer conduction and a method of manufacturing the multilayer circuit board by a build-up process. SOLUTION: This multilayer circuit board has a structure where a lower-layer circuit board 1 and an upper-layer circuit board 2 are successively laminated via an inner-layer via hole 5. In this multilayer circuit board, the inner-layer via hole 5 has a solid conductive structure composed of a recessed hole 5A, a conductive plated layer 5B coating a wall surface of the recessed hole, a conductive paste 5C filled in the hollow of the recessed hole, and a top surface portion 5D of a plated surface layer formed by coating at least the upper surface 5c of the conductive paste. An inner-layer via hole 6 positioned in the upper-layer circuit board is disposed directly on the plated surface layer of the inner-via hole 5 positioned in the lower-layer circuit board.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer circuit board and a method of manufacturing the same by a build-up method, and more particularly, to increase the degree of freedom of interlayer connection while ensuring fine circuit patterns. The present invention relates to a multilayer circuit board having a high reliability of a conductive structure of an inner via hole and capable of using a head surface of the inner via hole as a pad, and a method of manufacturing the same.

[0002]

2. Description of the Related Art In recent years, as electronic and electric equipment has been reduced in size and weight, multilayer circuit boards have been widely adopted as circuit boards incorporated in these equipment. This multilayer circuit board has a structure in which a plurality of circuit boards each having a predetermined circuit pattern formed on the surface are stacked, and conduction is provided between the respective layers by through through holes and inner layer via holes. .

The demand for thinner circuit patterns, higher densities, and thinner circuit patterns has been increasing for this multilayer circuit board. That is being done. This build-up method generally proceeds as follows. One example will be described in the case of building up on one side.

[0004] First, as shown in FIG.
A circuit board 1 having a predetermined circuit pattern 1B formed on the surface thereof is prepared as a core board. Then, an insulating resin is laminated on the surface of the core substrate 1 to form the circuit pattern 1B.
Is formed to have an insulating layer 2A having a desired thickness (FIG. 1).
0). Then, in the surface of the insulating layer 2A, a concave hole 1C is formed at a position where a target inner layer via hole is to be formed up to the surface of the circuit pattern 1B (FIG. 1).
1).

[0005] Such a hole has conventionally been formed using photolithography, but recently, a laser has been used because a hole having a smaller diameter can be formed. Then, the surface of the insulating layer 2A and the side wall surface of the concave hole 1C are subjected to a surface roughening treatment by, for example, a chemical solution treatment, and then electroless plating and electroplating are sequentially performed on the entire surface. As shown in FIG. A plating layer 2B having a desired thickness is formed to cover the surface of the insulating layer 2B and the surface of the insulating layer 2B.

[0006] Then, removing a portion by patterning process conventional method with respect to the plating layer 2B, a pattern and a predetermined conductor circuit pattern of concavities 1C having a land portion 1C ₁ on the surface of the insulating layer 2A Form. As a result, as shown in FIG. 13, on the core substrate 1, the insulating layer 2A, the predetermined circuit pattern 2B formed on the surface thereof, and the concave hole 1C connected to the circuit pattern 1B of the core substrate 1, That is, a circuit board having a two-layer structure in which the second circuit board 2 having the inner via hole is laminated is obtained.

When another circuit board is laminated on the second circuit board 2, an insulating resin is laminated on the surface of the circuit board 2 as shown in FIG. Insulating layer 3 burying pattern 2B and pattern of concave hole 1C
After the formation of the insulating layer 3A, the land 1
May be performed the same processing as shown in FIGS. 11 to 13 at positions corresponding to C _1.

As a result, as shown in FIG. 15, on the second circuit board 2, the insulating layer 3A, the predetermined circuit pattern 3B formed on the surface thereof and the second circuit board 2 recessed hole 2C that is connected to the land portion 1C _1, i.e. the circuit board having a three-layer structure in which the third circuit board 3 is laminated with an inner layer via holes can be obtained. By repeating the above operation on the third circuit board, a multilayer circuit board having a desired number of layers and each layer having concave holes 1C, 2C,... Functioning as inner via holes is manufactured. can do.

Such a build-up method is a conventional method of manufacturing a multilayer circuit board, that is, a circuit board in which a predetermined circuit pattern and an inner via hole are formed separately, and the circuit boards are separately manufactured. Compared to a method in which a predetermined number of sheets are collectively laminated, a through-hole is formed in a predetermined position of the laminate, and then plating is performed to establish conduction between the layers, the insulation layers 2A,
By reducing the thickness of 3A,..., The overall thickness can be reduced, and even if the circuit pattern formed on the surface of each layer is fine, the formation of inner via holes is possible, so that high density can be realized. It has the advantage that.

[0010]

FIGS. 9 to 1 show an embodiment of the present invention.
The build-up method shown in 5 has the following problems. The first problem, as illustrated in FIG. 15, recessed holes (inner layer of the circuit board 3 positioned thereon on a certain concavity in the layer 2 of the circuit board (inner via hole) 1C of the land portion 1C ₁ (Via holes) 2C are formed.

That is, the inner via hole formed in the lower layer must have a land portion of a predetermined width connected to the inner via hole formed in the upper layer. Therefore, since the two inner via holes are formed to be separated from each other by a predetermined distance in a plane, the formation of the inner via holes is defined according to the pattern form of the lower circuit pattern. Become
This reduces the degree of freedom in pattern design.

The present invention solves the above-mentioned problem when a multilayer circuit board is manufactured by a conventional build-up method, and has a large degree of freedom in design while ensuring fine circuit patterns, and furthermore, has a large number of internal via holes. It is an object of the present invention to provide a multilayer circuit board having a highly reliable conductive structure and a method for manufacturing the same.

[0013]

According to the present invention, there is provided a multi-layer circuit board having a structure in which a lower circuit board and an upper circuit board are sequentially stacked via an inner via hole. The inner via hole is formed by covering the concave hole, a conductive plating layer covering a wall surface of the concave hole, a conductive paste filled in a hollow portion of the concave hole, and at least an upper surface of the conductive paste. An inner via hole located on the upper circuit board immediately above the inner via hole located on the lower circuit board and having a solid conductive structure consisting of Are provided, and an upper circuit board is sequentially stacked on a lower circuit board having a circuit pattern and an inner via hole formed on a surface thereof. In the method of manufacturing a multilayer circuit board, the insulating layer is formed by covering the surface of the lower circuit board, and the insulating layer is irradiated with laser light, and the insulating layer is exposed to the head of the inner layer via hole. Conductive plating for forming a concave hole up to a surface portion, plating the surface of the insulating layer, and covering the entire surface of the insulating layer, the side wall surface of the concave hole, and the head surface of the inner via hole. After forming a layer, a conductive paste is applied to the entire surface of the conductive plating layer and then polished, and the hollow portion of the concave hole is filled with the conductive paste to form a solid structure. After forming a plating layer, patterning the surface plating layer to form a circuit pattern and a top surface portion of an inner via hole covering at least an upper surface of the conductive paste, and repeating the operation. Method for manufacturing a multilayer circuit board is provided.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows an example of the arrangement of inner via holes in each layer of a multilayer circuit board according to the present invention.
FIG. 1 shows a multilayer circuit board in which a three-layer circuit board is laminated on one surface of a circuit board (core board) 1 having a circuit pattern 1B formed on the surface of an insulating base material 1A by a build-up method of the present invention described later. Is illustrated by way of example.

In FIG. 1, a second circuit board 2 comprising an insulating layer 2A and a circuit pattern 2B formed on the surface thereof is laminated on the circuit pattern 1B of the core board 1, and the second circuit board 2 The circuit board 2 has an inner via hole 5 described later. Then, the second circuit board 2
A third circuit board (upper circuit board) 3 composed of an insulating layer 3A and a circuit pattern 3B formed on the surface thereof
And a second circuit board (lower layer circuit board)
Immediately above the inner via hole 5 located at 2, the inner via hole 6 having the same structure as the inner via hole 5 is formed.

Further, on the third circuit board 3, a fourth circuit board (upper circuit board) including an insulating layer 4A and a circuit pattern 4B formed on the surface thereof is laminated. An inner via hole 7 having the same structure as that of the inner via hole 6 located on the circuit board (lower layer circuit board) 3 is formed immediately above the inner via hole 6. In FIG. 1,
The inner layer via hole 7 has a top surface exposed on the surface of the fourth circuit board 4, but a fifth circuit board can be further laminated here. In this case, the head surface of the inner via hole 7 is buried in the fifth circuit board.

As described above, according to the multilayer circuit board of the present invention, the inner via holes connecting the respective layers are not separated from each other in a plane as in the conventional case shown in FIG. Is formed in a series structure that is arranged directly above the. Here, the structure of the inner via holes 5, 6, and 7 of the present invention will be described by taking the inner via hole 5 as an example.

The inner via hole 5 is formed with a concave hole 5A formed by irradiating the insulating layer 2A with a laser, a side wall surface of the concave hole, a surface of the circuit pattern 1B of the core substrate 1, and a concave hole 5A in the insulating layer 2A. A thin conductive plating layer 5B covering the peripheral surface, and a conductive paste 5C filled in the hollow portion
And a head surface portion 5D, which is a plating layer covering the upper surface of the conductive paste 5C, and has a solid structure made of a conductive material as a whole.

As described above, in the case of the inner-layer via hole 5, the whole is formed in a columnar shape made of a conductive material. Therefore, the multilayer circuit board of the present invention simply conducts conduction with the lower layer by a thin conductive plating layer. The reliability of the conductive structure is higher than that of the conventional inner via hole. In addition, since the inner via holes are arranged in series with each other and arranged between the layers, it is possible to form a large number of inner via holes even in a small area. Higher pattern density can also be realized.

Further, in the case of the inner via hole 7 exposed on the uppermost layer, the head surface portion 7D can be used as a pad for mounting another component. The above-described multilayer circuit board of the present invention is manufactured as follows. First, a second circuit board 2 is built up on a core substrate 1 including an insulating base material 1A and a circuit pattern 1B formed on the surface thereof as described later.

First, as shown in FIG. 2, an insulating resin is applied to the surface of the core substrate 1 and then cured to form an insulating layer 2A having a desired thickness. Next, a portion of the insulating layer 2A where an inner via hole is to be formed is irradiated with, for example, a CO ₂ laser beam to form a concave hole 5A having a predetermined hole diameter reaching the surface 1b of the lower circuit pattern 1B (FIG. 3).

Next, the insulating layer 2A including the inner wall surface of the recess 5A is formed.
Is subjected to, for example, a copper plating process. As the plating treatment, electroplating may be performed after electroconductivity plating is performed to impart conductivity to the side wall surface 5a of the concave hole 5A and the surface 2a of the insulating layer 2A. As a result, as shown in FIG.
A surface 2a, side wall surface 5a of concave hole 5A and circuit pattern 1
A thin conductor plating layer 5B is formed covering the surface 1b of B.

At this time, the thickness of the conductor plating layer 5B is set to be approximately half the thickness of the circuit pattern 2B to be formed on the surface of the second circuit board 2 to be built up. Next, on the entire surface of the conductor plating layer 5B,
For example, after a conductive paste formed by dispersing copper powder in an epoxy resin is applied and the conductive paste is hardened, the surface is polished to expose the surface of the conductive plating layer 5B.

As a result, as shown in FIG. 5, a solid structure filled with conductive paste 5C is formed in the recess, and its upper surface 5c is flush with surface 5b of conductive plating layer 5B. Become. Next, for example, copper plating is performed on the conductive plating layer 5B and the upper surface 5c of the conductive paste to form a surface plating layer 5D (FIG. 6). The thickness of the surface plating layer 5D at this time is the same as that of the second circuit board 2 to be built up.
The thickness is set to approximately half the thickness of the circuit pattern 2B to be formed. Therefore, the circuit pattern 2 to be formed on the second circuit board 2 is provided on the surface of the insulating layer 2A.
This means that a plating layer having a thickness substantially equal to the thickness of B is formed.

Next, photolithography is performed on the surface plating layer 5D by a conventional method, and furthermore, necessary portions are removed by etching to the surface 2a of the insulating layer 2A. As a result, as shown in FIG. 7, a circuit pattern 2 including the conductor plating layer 5B and the surface plating layer 5D is formed on the surface 2a of the insulating layer 2, and the insulating layer 2 includes the surface plating layer 5D. The second circuit board 2 is formed in which the head surface is exposed and the inner via hole 5 connected to the lower circuit pattern 1B is arranged.

When the third circuit board 3 shown in FIG. 1 is formed on the second circuit board 2 by build-up, as shown in FIG. After forming the insulating layer 3A by covering the entire surface of the substrate 2 and further forming the concave hole 6A reaching the head surface portion 5D of the lower inner layer via hole 5, the operation described with reference to FIGS. Good.
Then, by repeating the above operation on the third circuit board 3 thus formed, a circuit board of a desired number of layers is built up, and the multilayer circuit board of the present invention is manufactured.

[0027]

EXAMPLE First, the core substrate 1 shown in FIG. 9 was manufactured as follows. Insulating layer 1A is double-sided copper clad laminate made of epoxy resin (copper foil thickness: 12 [mu] m) was the thickness of the surface copper foil 1B ₁ performing soft etching on both sides of the approximately 5 [mu] m. Then, after forming a through-hole having a hole diameter of 0.3 mm in the double-sided copper-clad laminate, chemical copper plating was performed on the entire surface including the inner wall surface of the through-hole, and then electrolytic copper plating was further performed thereon to reduce the thickness to about to form a copper plating layer 1B ₂ of 20 [mu] m.

The epoxy resin-based non-conductive paste 8 containing copper powder was filled in the through-holes by a printing method, and the non-conductive paste 8 was thermally cured, and both surfaces were polished smoothly with a belt sander and a buff. . Then, after the polished surface is roughened with a permanganate solution, chemical copper plating and electrolytic copper plating are sequentially performed on the entire surface to form a copper plating layer 1B having a thickness of about 15 μm.
Formed _three .

[0029] Then, etching treatment with tenting with respect to the copper plating layer 1B _3, diameter 500μm
The core substrate 1 has the circuits 1B and 1B. Then
An ink-like epoxy resin is applied to both surfaces of the core substrate 1 with a curtain coater, and after thermosetting, both surfaces are buff-polished to form insulating layers 2A, 2A having a thickness of about 50 μm for embedding the circuits 1B, 1B. (FIG. 10). And CO ₂
Concave holes 5A, 5A were formed in the insulating layers 2A, 2A by laser to reach the surfaces of the circuits 1B, 1B (FIG. 11).

Next, the surfaces of the insulating layers 2A, 2A and the recesses 5 are formed.
After roughening the side walls 5a, 5a of A, 5A with a permanganic acid-based solution and removing the residual film at the bottom of the recess, chemical copper plating and electrolytic copper plating are sequentially performed, and a copper plating of about 7 μm in thickness is performed. The layers 5B ₁ and 5B ₁ were formed (FIG. 12). The recess was filled with a copper powder-containing epoxy resin-based conductive paste 5C by a printing method, and after thermosetting, the surface was polished with a belt sander and a buff (FIG. 13).

Then, after the surface of the conductive paste 5C is roughened with a permanganic acid-based solution, chemical copper plating and electrolytic copper plating are sequentially performed to obtain a copper plating layer 5B having a thickness of about 15 μm.
₂ was formed (FIG. 14). Then, an etching process is performed on the copper plating layer 5B by a tenting method, and the diameter 30
Circuits 2B and 2B of 0 μm were formed (FIG. 15).

In this way, a four-layer multilayer circuit board in which each circuit is connected in a series structure was obtained. If the above operation is further performed using the multilayer circuit board shown in FIG. 15 as a core substrate, a six-layer multilayer circuit board as shown in FIG. 16 is obtained.

[0033]

As apparent from the above description, the present invention has the following effects. (1) In the multilayer circuit board of the present invention, the inner via holes connecting the respective layers are formed in a series structure in which the upper via holes are arranged immediately above the lower via holes, so that the plane of each inner via hole is formed. The spread of the global dispersion is reduced, and it is possible to cope with an increase in the density of circuit patterns. This increases the degree of freedom in designing the multilayer circuit board, and has great industrial value. At the same time, since the wiring length is the shortest, the electrical characteristics are excellent.

(2) Since the inner via hole has a solid structure made of a conductive material as a whole, the conduction between the lower layer and the upper layer in the multilayer circuit board of the present invention can be achieved by plating and conduction by the conductive material. Therefore, it has high reliability. (3) Since the top surface of the inner-layer via hole disposed on the uppermost layer in the multilayer circuit board of the present invention is smooth, it functions as a pad as compared with a conventional structure having a concave hole. In this case, the reliability at the time of mounting is excellent.

[Brief description of the drawings]

FIG. 1 is a partial sectional view showing a main part of a multilayer circuit board according to the present invention.

FIG. 2 is a partial cross-sectional view showing a state in which an insulating layer is formed on a core substrate in the manufacturing method of the present invention.

FIG. 3 is a partial cross-sectional view showing a state where a concave hole is formed in the insulating layer of FIG. 2;

FIG. 4 is a partial cross-sectional view showing a state in which a conductor plating layer is formed on the surfaces of the insulating layer and the concave hole in FIG. 3;

FIG. 5 is a partial cross-sectional view showing a state in which a conductive paste is filled in the concave hole of FIG. 4;

FIG. 6 is a partial cross-sectional view showing a state in which a surface plating layer is formed on the upper surfaces of the conductive plating layer and the conductive paste of FIG.

FIG. 7 is a partial cross-sectional view showing a state where a second circuit board is formed on a core substrate by patterning the surface plating layer of FIG. 5;

8 is a partial cross-sectional view showing a state where an insulating layer is formed on the surface of the second circuit board in FIG. 7;

FIG. 9 is a partial cross-sectional view showing one example of a core substrate.

FIG. 10 is a partial cross-sectional view showing a state where insulating layers are formed on both surfaces of the core substrate of FIG. 9;

11 is a partial cross-sectional view showing a state in which a concave hole is formed in the insulating layer of FIG.

FIG. 12 is a partial cross-sectional view showing a state where a copper plating layer is formed on the surfaces of the insulating layer and the concave hole of FIG. 11;

FIG. 13 is a partial cross-sectional view showing a state in which a conductive paste is filled into the concave holes of FIG.

14 is a partial cross-sectional view showing a state where a copper plating layer is formed on the surfaces of the conductive paste and the insulating layer of FIG.

FIG. 15 is a partial cross-sectional view showing a multilayer circuit board having a four-layer structure manufactured by the build-up method of the present invention.

FIG. 16 is a partial cross-sectional view showing a multilayer circuit board having a six-layer structure manufactured by the build-up method of the present invention.

FIG. 17 is a partial cross-sectional view showing a core substrate used in a conventional build-up method.

18 is a partial cross-sectional view showing a state where an insulating layer is formed on the surface of the core substrate of FIG.

FIG. 19 is a partial cross-sectional view showing a state where a concave hole is formed in the insulating layer of FIG. 18;

20 is a partial cross-sectional view showing a state where a conductor plating layer is formed on the surface of the insulating layer and the concave hole of FIG. 19;

FIG. 21 is a partial cross-sectional view showing a state where a second circuit board is formed by patterning the conductor plating layer of FIG. 20;

FIG. 22 is a partial cross-sectional view showing a state where an insulating layer is formed on the surface of the second circuit board in FIG. 21;

FIG. 23 is a partial cross-sectional view showing a multilayer circuit board having a three-layer structure manufactured by a conventional build-up method.

[Explanation of symbols]

 Reference Signs List 1 core board 2 second circuit board 3 third circuit board 4 fourth circuit board 5, 6, 7 inner via hole 1A, 2A, 3A, 4A insulating layer 1B, 2B, 3B, 4B circuit pattern 1b circuit pattern 1B Surface 2a Surface of insulating layer 2A 5A, 6A Recessed hole 5a Side wall surface of concave hole 5A 5B Conductive plating layer 5b Surface of conductive plating layer 5B 5C Conductive paste 5c Top surface of conductive paste 5C 5D Surface plating layer

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5E346 AA06 AA12 AA15 AA43 BB01 BB16 CC31 DD01 DD22 DD32 EE33 FF04 FF15 FF18 GG01 GG15 GG17 GG27 HH07 HH25 HH31

Claims (2)

[Claims] 1. A multilayer circuit board having a structure in which a lower circuit board and an upper circuit board are sequentially laminated via an inner via hole, wherein the inner via hole covers a concave hole and a wall surface of the concave hole. A conductive plating layer, a conductive paste filled in the hollow portion of the recess, and a solid conductive structure comprising a top surface portion of a surface plating layer formed by covering at least an upper surface of the conductive paste. A multilayer circuit board, comprising: an inner via hole located on an upper circuit board immediately above a surface plating layer of an inner via hole located on a lower circuit board. 2. A method for manufacturing a multilayer circuit board, comprising sequentially laminating an upper circuit board on a lower circuit board having a circuit pattern and an inner via hole formed on a surface thereof. Forming an insulating layer by irradiating a laser beam to the insulating layer to form a concave hole in the insulating layer up to the top surface of the inner via hole; and forming a concave hole on the surface of the insulating layer. A plating process is performed to form a conductive plating layer covering the entire surface of the insulating layer, the side wall surface of the concave hole and the top surface of the inner via hole, and then applying a conductive paste to the entire surface of the conductive plating layer. Polishing, filling the hollow portion of the recess with the conductive paste to form a solid structure, further performing a plating process on the entire surface to form a surface plating layer, and then patterning the surface plating layer to form a circuit pattern and Method of manufacturing a multilayer circuit board and forming the head surface portion of the inner via holes that covers the upper surface of the conductive paste, repeating the work even without.