JP2001168224A - Semiconductor device, electronic circuit device, and manufacturing method - Google Patents

Abstract

(57) Abstract: Provided are a semiconductor device, an electronic circuit device, and a method of manufacturing the same, in which the stress of a solder bump is reduced and the occurrence of cracks in a connection portion is prevented. A semiconductor substrate, a semiconductor element formed on a first surface which is one surface of the semiconductor substrate, and a semiconductor substrate.
A wiring pattern 6 formed between the semiconductor substrate 3 and the insulating substrate 2 and electrically connected to the semiconductor element; and a wiring pattern 6 formed on the insulating substrate 2
Through hole 11, an insulating layer 12 covering the side surface in the through hole 11, and a through hole buried portion formed of a conductor formed in the through hole 11 via the insulating layer 12 and connected to the wiring pattern 6. A semiconductor device, an electronic circuit device, and a method of manufacturing the same, having a solder bump 17 connected to the through-hole buried portion 13 and serving as an external terminal.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device corresponding to high speed, high pin count, miniaturization and high density mounting.
The present invention relates to an electronic circuit device and a manufacturing method, and more particularly to a semiconductor device, an electronic circuit device, and a manufacturing method in which the stress of solder bumps at a joint between a semiconductor chip and an insulating substrate is reduced and connection reliability is improved.

[0002]

2. Description of the Related Art In recent years, as semiconductor devices become more highly integrated and operate at higher speeds, semiconductor packages have been replaced by conventional QFPs (quads).
from flat package) to more compact and multi-pin BGA (ball grid array)
Is increasingly being adopted. The BGA is a surface mount type package in which solder balls as connection terminals are two-dimensionally arranged on the bottom side of an insulating substrate on which a semiconductor chip is mounted. Therefore, even when the number of pins is increased, there is an advantage that a narrow pitch between pins can be avoided and the package size can be reduced. Furthermore, similarly to the conventional surface mount components, there is an advantage that the substrate can be mounted by batch reflow.

An example of a conventional BGA type semiconductor package will be described with reference to FIG. In a semiconductor device 101 shown in FIG. 11, a surface of a semiconductor chip 103 is mounted on an insulating substrate (mounting substrate) 102 via an electrode pad 104 and a solder bump 105. A wiring pattern 106 is formed on the surface of the insulating substrate 102. A part of the wiring pattern 106 becomes a land 107, and the land 107
At this time, the wiring pattern 106 and the solder bump 105 are connected. The wiring pattern 106 is covered with an overcoat 108 made of an insulating film, and a sealing resin 109 is formed between the insulating substrate 102 and the semiconductor chip 103. Through holes 110 are two-dimensionally arranged on the insulating substrate 102, and external terminal solder bumps 111 connected to the external terminals and the wiring pattern 106 are formed in the through holes 110.

In a conventional BGA type semiconductor package as shown in FIG. 11, cream solder is filled in a through-hole 110 using a squeegee, and a solder ball previously formed in a substantially spherical shape is transferred thereon. From
A method of melting by batch reflow is generally used. Here, the wiring pattern 106 and the solder balls are connected by the cream solder filled in the through holes 110. When the solder ball is melted, a force acts to maintain a spherical shape due to surface tension. Therefore, if the cream solder is not filled in the through hole 110, a gap is formed between the wiring pattern 106 and the solder ball, resulting in poor connection.

As described above, according to the conventional BGA type semiconductor package, it is necessary to fill the through-hole with the cream solder, which hinders improvement in productivity and cost reduction.

[0006] On the other hand, there have been proposed some methods of using a cream solder in a BGA type semiconductor package. For example, Japanese Patent Application Laid-Open No. 10-50883 describes a method in which a part of a wiring pattern is projected so as to form a projection in a through hole, and the wiring pattern and a solder ball are joined. In addition, it is stated that the stress applied to the solder ball can be reduced by providing a projection on the wiring pattern.

Japanese Patent Application Laid-Open No. Hei 9-232373 (Japanese Patent No. 2842361) discloses a semiconductor device in which a resin reinforcing member is formed by applying a resin so as to surround a solder bump for an external terminal. ing. Since a strong stress due to a difference in thermal expansion coefficient between the insulating substrate (mounting substrate) and the semiconductor chip is applied to the solder bump joint, the solder bump joint breaks when subjected to a temperature cycle test. According to the semiconductor device described in Japanese Patent Application Laid-Open No. 9-232373, since the solder bump bonding portion is reinforced, the temperature cycle life of the semiconductor device can be improved.

[0008]

As described above, in the conventional BGA type semiconductor package, it is necessary to fill the solder bump joint with cream solder, which hinders improvement in productivity and cost reduction. . A method using no cream solder has also been proposed.
As described in Japanese Patent Publication No. 883, when a wiring pattern is projected so that a projection is formed in a through hole, it is necessary to perform a work for deforming the wiring for each through hole, which is a problem in terms of productivity. There is.

Further, since the wiring may be broken by deforming the wiring so that a protrusion is formed in the through hole, the size of the protrusion that can be formed is limited. In the case of a structure in which solder bumps are formed in through holes, strain energy is concentrated at the joint between the insulating substrate and the solder bumps, and cracks occur due to fatigue in the solder. December) p. 37-40). JP 1
According to the semiconductor device described in Japanese Patent Application Laid-Open No. 0-50883, the size of the protrusion that can be formed at the joint between the insulating substrate and the solder bump is limited. Also have limitations.

On the other hand, according to the method of manufacturing a semiconductor device described in Japanese Patent Application Laid-Open No. 9-232373, resin coating is performed after solder bumps for external terminals are formed, and then a semiconductor chip is mounted on an insulating substrate. Is done. Therefore, the resin may remain on the surface of the external terminal solder bump, and in such a case, a connection failure occurs when the resin is mounted on the insulating substrate.

As described above, when a solder ball is formed in a through hole in a BGA type semiconductor package, it is necessary to use cream solder, or to form a projection by deforming a wiring pattern without using cream solder. However, only a limited effect can be obtained. Further, when a resin for reinforcing the solder bump is coated after forming the solder bump for the external terminal, it is difficult to prevent the resin from adhering to the joint of the solder bump.

The present invention has been made in view of the above problems, and accordingly, the present invention reduces the stress applied to the external terminal solder bumps and prevents the occurrence of cracks at the solder bump joints. It is an object to provide an electronic circuit device and a manufacturing method.

[0013]

In order to achieve the above object, a semiconductor device according to the present invention comprises: a semiconductor substrate; a semiconductor element formed on a first surface, which is one surface of the semiconductor substrate; An insulating substrate on which a semiconductor substrate is mounted, a wiring pattern formed between the semiconductor substrate and the insulating substrate and electrically connected to the semiconductor element, and a through hole formed on the insulating substrate and reaching the wiring pattern When,
An insulating layer covering the side surface in the through hole, and a through hole buried portion formed of an electric conductor formed in the through hole via the insulating layer and connected to the wiring pattern; And a solder bump to be connected to and serve as an external terminal.

Preferably, in the semiconductor device according to the present invention, the through-hole buried portion is made of a metal having a higher mechanical strength than the solder bump. In the semiconductor device of the present invention, preferably, the insulating layer is made of an insulating resin having a lower elastic modulus than the insulating substrate, and a stress generated at a joint between the through hole buried portion and the wiring pattern. Is reduced. The semiconductor device according to the present invention is preferably characterized in that a joint portion between the through hole buried portion and the solder bump protrudes from a surface of the insulating substrate.

Preferably, in the semiconductor device according to the present invention, the insulating layer covers a side surface in the through hole and a surface of the insulating substrate near the through hole. The semiconductor device of the present invention is further preferably characterized in that a joint between the through hole buried portion and the solder bump protrudes from a surface of the insulating layer near the through hole. Preferably, the semiconductor device of the present invention
The insulating layers formed in adjacent through holes are separated from each other. Alternatively, the semiconductor device of the present invention is preferably characterized in that the insulating layers formed in adjacent through holes are integrated. The semiconductor device of the present invention is preferably characterized in that the insulating substrate is a flexible insulating substrate.

Thus, it is possible to prevent cracks from being generated in the conductor filling the through holes formed in the insulating substrate. According to the semiconductor device of the present invention, a metal having high mechanical strength is embedded in the through-hole via the insulating resin that reduces stress. Therefore, the occurrence of cracks in the connection portion is prevented, and the long-term connection reliability of the semiconductor device is improved.

In order to achieve the above object, a semiconductor device according to the present invention comprises a semiconductor substrate, a semiconductor element formed on a first surface, which is one surface of the semiconductor substrate, and the semiconductor substrate, A flexible insulating substrate mounted via one surface;
A wiring pattern formed between the semiconductor substrate and the flexible insulating substrate and electrically connected to the semiconductor element; a connection portion connecting the wiring pattern and the semiconductor element; The first of the semiconductor substrate;
A sealing resin layer formed between the through-hole and the surface; a through-hole formed in the flexible insulating substrate and reaching the wiring pattern; an insulating layer covering a side surface in the through-hole; Formed through the insulating layer, connected to the wiring pattern, and provided with a through-hole buried portion made of a conductor, and a solder bump connected to the through-hole buried portion and serving as an external terminal. . The semiconductor device of the present invention is preferably characterized in that the connection portion is a solder bump.

Thus, in the surface mount type package, the connection reliability of the through hole formed in the insulating substrate can be improved. ADVANTAGE OF THE INVENTION According to the semiconductor device of this invention, generation | occurrence | production of a crack in a connection part is prevented by embedding the conductive material with high mechanical strength via the insulating resin which reduces stress in a through-hole, Connection reliability can be improved.

In order to achieve the above object, a semiconductor device according to the present invention comprises: a semiconductor substrate; a semiconductor element formed on a first surface side, which is one surface of the semiconductor substrate; A flexible insulating substrate mounted via a second surface which is a back surface of one surface; and a wiring pattern formed between the semiconductor substrate and the flexible insulating substrate and electrically connected to the semiconductor element. A bonding wire formed outside the semiconductor substrate and connecting the wiring pattern and the semiconductor element, a sealing resin layer covering the semiconductor substrate and the bonding wire, and formed on the flexible insulating substrate. A through hole reaching the wiring pattern, an insulating layer covering a side surface in the through hole, and the wiring pattern formed in the through hole via the insulating layer. Connect a through-hole filling portion made of a conductor, connected to the through-hole filling unit, and having a solder bump as the external terminals.

Thus, in the package formed by the wire bonding method, the connection reliability of the through hole formed in the insulating substrate can be improved. ADVANTAGE OF THE INVENTION According to the semiconductor device of this invention, generation | occurrence | production of a crack in a connection part is prevented by embedding the conductive material with high mechanical strength via the insulating resin which reduces stress in a through-hole, Long-term connection reliability can be improved.

In order to achieve the above object, a semiconductor device according to the present invention comprises a semiconductor substrate, a semiconductor element formed on a first surface, which is one surface of the semiconductor substrate, and the semiconductor substrate, A flexible insulating substrate mounted via one surface;
A wiring pattern formed between the semiconductor substrate and the flexible insulating substrate and electrically connected to the semiconductor element; a connection portion connecting the wiring pattern and the semiconductor element; The first of the semiconductor substrate;
A sealing resin layer formed between the through-hole and the surface; a through-hole formed in the flexible insulating substrate and reaching the wiring pattern; an insulating layer covering a side surface in the through-hole; Formed on the insulating layer, connected to the wiring pattern, having a through-hole buried portion made of a conductor, and an electrode portion connected to the through-hole buried portion on the surface, the flexible insulating substrate And a mounting substrate on which the semiconductor substrate is mounted.

Thus, the LGA (land grid)
In an array type package, connection reliability of through holes formed in an insulating substrate can be improved. ADVANTAGE OF THE INVENTION According to the semiconductor device of this invention, generation | occurrence | production of a crack in a connection part is prevented by embedding the conductive material with high mechanical strength via the insulating resin which reduces stress in a through-hole, Long-term connection reliability can be improved. In addition, conventional LGA
By not forming solder bumps unlike the semiconductor device of the mold, the connection height can be reduced, and the semiconductor device can be downsized.

In order to achieve the above object, a semiconductor device according to the present invention comprises a semiconductor substrate, a semiconductor element formed on a first surface, which is one surface of the semiconductor substrate, and an insulating element for mounting the semiconductor substrate. A wiring pattern formed between the substrate and the semiconductor substrate and the insulating substrate and electrically connected to the semiconductor element; a through hole formed in the insulating substrate and reaching the wiring pattern; A conductive resin layer covering at least a side surface, made of a material having a lower elastic modulus than the insulating substrate, and relieving stress generated at a junction between the through-hole buried portion and the wiring pattern; Formed in the hole via the conductive resin layer, connected to the wiring pattern,
It is characterized by having a through-hole buried portion made of a conductor, and a solder bump connected to the through-hole buried portion and serving as an external terminal.

Thus, it is possible to prevent cracks from being generated in the conductor filling the through holes formed in the insulating substrate. According to the semiconductor device of the present invention, a metal having high mechanical strength is embedded in the through-hole via the conductive resin that reduces stress. Therefore, the occurrence of cracks in the connection portion is prevented, and the long-term connection reliability of the semiconductor device is improved.

In order to achieve the above object, an electronic circuit device according to the present invention comprises a first substrate, an electronic circuit element formed on a first surface, which is one surface of the first substrate, and First
A second substrate on which the first substrate is mounted, a wiring pattern formed between the first substrate and the second substrate and electrically connected to the electronic circuit element, and a wiring pattern formed on the second substrate. And a through hole reaching the wiring pattern, an insulating layer covering a side surface in the through hole, and a through hole formed in the through hole via the insulating layer, connected to the wiring pattern, and formed of a conductor. It has a hole filling portion and a solder bump connected to the through hole filling portion and serving as an external terminal.

Thus, it is possible to prevent cracks from being generated in the conductor filling the through holes formed in the substrate. According to the electronic circuit device of the present invention, a metal having high mechanical strength is embedded in the through hole via the insulating resin that reduces stress. Therefore, the occurrence of cracks in the connection portion is prevented, and the long-term connection reliability of the electronic circuit device is improved.

In order to achieve the above object, a method of manufacturing a semiconductor device according to the present invention is directed to a method of manufacturing a semiconductor device, the method comprising:
A step of forming a semiconductor element on the surface side, a step of forming a wiring pattern on the surface of the insulating substrate, and a step of forming a through hole reaching the wiring pattern on the insulating substrate;
Forming an insulating layer on the side surface in the through hole;
Forming a through-hole buried portion made of a conductor in the through-hole via the insulating layer; and mounting the semiconductor substrate on the insulating substrate so that the wiring pattern and the semiconductor element are connected to each other. And a step of forming a solder bump serving as an external terminal on the surface of the through hole buried portion.

In the method of manufacturing a semiconductor device according to the present invention, preferably, the step of forming the through-hole buried portion uses a metal having a higher mechanical strength than the solder bump as a material. . In the method for manufacturing a semiconductor device according to the present invention, preferably, the step of forming the insulating layer includes a step of relaxing a stress generated at a junction between the through-hole buried portion and the wiring pattern, as compared with the insulating substrate. Characterized by using an insulating resin having a low elastic modulus as a material.

In the method of manufacturing a semiconductor device according to the present invention, preferably, the step of forming the through-hole buried portion is a step of conducting an electrolytic plating by supplying a current to the wiring pattern. The method for manufacturing a semiconductor device according to the present invention includes:
Preferably, the step of forming the through-hole buried portion is a step of performing electrolytic plating until the conductor protrudes from the surface of the insulating substrate.

In the method of manufacturing a semiconductor device according to the present invention, preferably, the step of forming the insulating layer includes the step of forming the insulating layer so as to cover a side surface in the through hole and a surface of the insulating substrate. It is characterized by being. In the method of manufacturing a semiconductor device according to the present invention, more preferably, the step of forming the through-hole buried portion performs electrolytic plating until the conductor projects beyond the surface of the insulating layer covering the insulating substrate. Process. The method of manufacturing a semiconductor device according to the present invention preferably includes a step of removing a part of the insulating layer formed on the surface of the substrate between adjacent through holes and dividing the insulating layer. I do.

In the method of manufacturing a semiconductor device according to the present invention, preferably, the step of forming the solder bump includes the step of forming a substantially spherical solder ball, and the step of transferring the solder ball to the surface of the through hole buried portion. And a step of forming the solder bump covering the surface of the through-hole buried portion by heating and melting the solder ball. The method for manufacturing a semiconductor device according to the present invention is preferably characterized in that the insulating substrate is a flexible insulating substrate.

In the method of manufacturing a semiconductor device according to the present invention, preferably, the step of mounting the semiconductor substrate on the insulating substrate includes:
Forming a connection portion on the surface of the wiring pattern, mounting the semiconductor substrate on the insulating substrate via the first surface so that the semiconductor element contacts the connection portion, Forming a sealing resin layer between the first surface of the semiconductor substrate and the first surface of the semiconductor substrate. Preferably, the method for manufacturing a semiconductor device according to the present invention includes:
The step of forming the connection portion is a step of forming a solder bump.

Alternatively, in the method of manufacturing a semiconductor device according to the present invention, preferably, the step of mounting the semiconductor substrate on the insulating substrate includes the step of mounting the semiconductor substrate via a second surface which is a back surface of the first surface. Mounting the semiconductor substrate on the insulating substrate, forming a bonding wire connecting the wiring pattern and the semiconductor element outside the semiconductor substrate, Forming a sealing resin layer covering the semiconductor substrate and the bonding wire.

This makes it possible to embed a conductor in a simple process in a through hole for connecting and mounting an insulating substrate on which a semiconductor chip is mounted to another substrate or the like. According to the method of manufacturing a semiconductor device of the present invention, it is preferable to bury a metal material in the through hole by electrolytic plating. This eliminates the step of reflowing the solder balls. Further, since a reflow process for forming solder bumps is not required, the material does not need to be limited to a low melting point metal, and a metal having high mechanical strength can be used. Therefore,
Cracks can be prevented from occurring at the connection portions of the through holes.

[0035]

Embodiments of a semiconductor device and a method of manufacturing the same according to the present invention will be described below with reference to the drawings. (Embodiment 1) FIG. 1 is a perspective view of a semiconductor device of the present embodiment, and FIG. 2 is a cross-sectional view corresponding to AA 'of FIG. The semiconductor device 1 shown in FIGS. 1 and 2 has a semiconductor chip 3 mounted on an upper surface of a flexible insulating substrate 2 with its main surface (the surface on which a semiconductor integrated circuit (not shown) is formed) facing downward. On the main surface of the semiconductor chip 3, an electrode pad 4 connected to a semiconductor integrated circuit formed on the semiconductor chip 3 is formed. A bump base metal (not shown) is formed between the electrode pad 4 and the solder bump 5.

The solder bumps 5 are connected to lands 7 provided on a wiring pattern 6 on the flexible insulating substrate 2. The wiring pattern 6 of the insulating substrate 2 is covered with an overcoat 8, and the opening of the overcoat 8 serves as a land 7. The wiring pattern 6 extends to the end of the semiconductor device 1 and is also used as a plating lead 9 in an electrolytic plating process described later. The other end of the wiring pattern 6 is connected to the external terminal land 10. A through hole 11 is formed in the insulating substrate 2 in the portion of the external terminal land 10, and a through hole buried portion 13 is formed in the through hole 11 via an insulating resin layer 12. The through hole buried portion 13 is connected to the external terminal land 10. External terminal solder bumps 17 are formed on the surface of through-hole buried portion 13 with antioxidant layer 14b interposed therebetween.

According to the semiconductor device of the present embodiment, since the inside of the through-hole 11 is filled with the through-hole filling portion 13, it is not necessary to fill cream solder unlike the case where the inside of the through-hole is filled with solder bumps.
Further, since the insulating resin layer 12 is formed in the through hole 11, the stress at the joint between the metal in the through hole 11 and the wiring pattern 6 is reduced, and the long-term connection reliability is improved. .

Next, a method of manufacturing the semiconductor device of the present embodiment will be described. First, as shown in FIG. 3A, an insulating resin 2a is applied to a metal thin film such as a copper foil 6a. The copper foil 6a becomes the wiring pattern 6, and the insulating resin 2a becomes the insulating substrate 2. As the insulating resin 2a, for example, polyimide or epoxy resin can be used.

Next, as shown in FIG. 3B, a through hole 11 is formed by patterning the insulating substrate 2. For example, when a photosensitive thermosetting polyimide is used as the insulating resin 2a, the photosensitive resin is exposed to ultraviolet light using a photomask on which a predetermined pattern is formed.
The through hole 11 is formed by performing development using a developer and thermosetting. Alternatively, when a non-photosensitive thermosetting polyimide is used as the insulating resin 2a,
After applying polyimide on copper foil 6a and baking,
A photoresist is laminated on the polyimide, and the resist is patterned. Using the photoresist as a mask, the polyimide is etched to form through holes 11.

When an ultraviolet-curable epoxy resin is used as the insulating resin 2a, the through-hole 11 is formed by applying the epoxy resin, exposing it using a photomask, and developing it. When a thermosetting epoxy resin is used as the insulating resin 2a, the epoxy resin is screen-printed on the copper foil 6a using a mesh screen on which a pattern covering a portion where the through hole 11 is formed is formed. After the resin is printed, the insulating substrate 2 is formed in a portion other than the through hole 11 by thermosetting.

The through hole 11 is formed by the method described above.
Instead of forming the through holes, the through holes 11 may be formed by punching using a mold, laser processing, or the like. Also,
Instead of applying the insulating resin 2a to the copper foil 6a as described above, the copper foil 6a may be laminated on a film made of the insulating resin using an adhesive. The thickness of the copper foil 6a is, for example, 12 to 18 μm, and the thickness of the insulating resin 2a is, for example, 20 to 50 μm. The pitch of the through holes 11 is, for example, 0.5 mm, and the diameter of the through holes 11 is, for example, 240 μm.

Subsequently, as shown in FIG. 3C, the copper foil 6a is etched using a resist (not shown) as a mask to form a wiring pattern 6. Next, as shown in FIG. 3D, an overcoat 8 is formed by applying an insulating resin to the surface opposite to the side where the through holes 11 are formed. An opening is formed by patterning the overcoat 8 to form the land 7. As the overcoat 8, a resin similar to the above-described insulating resin 2a can be used. The opening of the land 7 portion of the overcoat 8 can be performed in the same manner as when the through hole 11 is formed in the insulating resin 2a. The thickness of the overcoat 8 is, for example, 10 to 30 μm.

Next, as shown in FIG. 4A, an insulating resin 12 is applied and formed on the side where the through holes 11 are formed. As the insulating resin 12, the same resin as the insulating resin 2a and the overcoat 8 described above can be used.
As the insulating resin 12, it is preferable to use a material having a low elastic modulus in order to reduce thermal stress applied to the through-hole buried portion 13 in the through-hole 11. For example, the elastic modulus is set to 0.1 to 5 GPa. . Insulating resin 12
Has a thickness of, for example, 20 μm.

Next, as shown in FIG. 4B, the portion of the insulating resin 12 connected to the wiring pattern 6 in the through hole 11 is removed. In order to selectively remove a part of the insulating resin 12, the through-hole 11 is formed in the insulating resin 2 a.
Is formed, or the land 7 of the overcoat 8 is formed.
This can be performed in the same manner as when removing the portion.

Next, as shown in FIG. 4C, electrolysis is performed using the end of the wiring pattern 6 as a plating lead 9 to form a through-hole buried portion 13 in the through-hole 11. For example, copper can be used as the through-hole buried portion 13. The thickness of the insulating resin 12 is, for example, 20
In the case of μm, the plating thickness of the through-hole buried portion 13 is about 23 μm, and the buried portion 13 whose surface protrudes from the through-hole 11 is formed.

Further, as shown in FIG. 4D, oxidation preventing layers 14a and 14b are formed on the surfaces of the lands 7 and the through hole buried portions 13, respectively. Antioxidant layer 14a,
14b can be formed by electrolytic plating using the plating leads 9 or by electroless plating. As the oxidation preventing layers 14a and 14b, for example, a laminated film of nickel plating with a thickness of 3 μm and flash gold plating with a thickness of 0.03 to 0.05 μm can be used.

Next, as shown in FIG. 5A, solder bumps 5 are formed on the main surface of the semiconductor chip 3 via the electrode pads 4. The solder bumps 5 are aligned with the lands 7 on the insulating substrate 2, and the semiconductor chip 3 is mounted on the insulating substrate 2. The pitch of the electrode pads 4 formed on the main surface of the semiconductor chip 3 is, for example, 150 μm, and the size of the electrode pads 4 is, for example, one side of 110 μm. A bump base metal (not shown) between the electrode pad 4 and the solder bump 5 enhances the adhesion between the semiconductor chip 3 and the solder bump 5.
Alternatively, it is provided for the purpose of preventing mutual diffusion between the electrode material of the semiconductor chip 3 and the material of the solder bump 5. As the under bump metal, for example, a laminated film of nickel plating with a thickness of 5 μm and gold plating with a thickness of 0.05 μm can be used. In addition, a laminated film of chromium, copper, titanium, or tungsten can be used as the base metal of the bump.

The solder bumps 5 may be made of Sn-Ag, Sn-Ag-Cu, S
Lead-free solders such as n-Ag-Bi-based and Sn-Zn-based can also be used. The height of the solder bump 5 is, for example, 6
0 μm. Before mounting the semiconductor chip 3 on the insulating substrate 2, a flux (for example, a mixture of a rosin-based resin, an organic acid, a wax, and a high-boiling-point glycol) 15 is applied to the lands 7 of the insulating substrate 2 in advance. Or,
A flux 15 is applied to a portion of the solder bump 5 to be joined to the land 7. Thereafter, as shown in FIG. 5B, the semiconductor chip 3 is heated to melt the solder bumps 5, and the solder bumps 5 are joined to the electrode pads 4 and the lands 7. The soldering temperature is usually 220 to 240 ° C.

Next, as shown in FIG. 6A, after the residue of the flux 15 is washed, the space between the flexible insulating substrate 2 and the semiconductor chip 3 is sealed with the sealing resin 16. . Subsequently, as shown in FIG.
A flux (not shown) is supplied to the antioxidant layer 14b formed on the surface of the through hole buried portion 13 in 1.
Here, FIG. 6 (b) is shown upside down from FIGS. 2 to 6 (a). The solder ball 17a is formed on the oxidation preventing layer 14b via a flux. The diameter of the solder ball 17a is, for example, 0.3 to 0.4 mm when the pitch of the through holes 11 is 0.5 mm.

Next, as shown in FIG. 2, the solder balls 17a are melted by using a reflow apparatus or the like to form solder bumps 17 for external terminals. The flux residue generated during the reflow is washed and removed as necessary. afterwards,
A plurality of semiconductor devices 1 collectively formed on a wafer are cut into individual semiconductor devices. This singulation can be performed by, for example, punching using a die, laser processing, router processing, dicing using a rotating blade, or the like. Through the above steps, the semiconductor device 1 shown in FIGS. 1 and 2 is obtained.

According to the method of manufacturing a semiconductor device of the present embodiment, since the inside of the through hole is buried by electrolytic plating, a step of filling with cream solder or transferring a solder ball to the through hole and performing a reflow process is not required. Becomes
Therefore, a semiconductor device with high connection reliability can be formed by a simple process.

(Embodiment 2) FIG. 7A is a sectional view of a semiconductor device according to this embodiment. In the semiconductor device shown in FIG. 7, similarly to the semiconductor device 1 of the first embodiment, the main surface (the surface on which a semiconductor integrated circuit (not shown) is formed) of the semiconductor chip 3 faces downward on the upper surface of the flexible insulating substrate 2. It is mounted. On the main surface of the semiconductor chip 3, an electrode pad 4 connected to a semiconductor integrated circuit formed on the semiconductor chip 3 is formed. A bump base metal (not shown) is formed between the electrode pad 4 and the solder bump 5.

The solder bumps 5 are connected to lands 7 provided on a wiring pattern 6 on the flexible insulating substrate 2. The wiring pattern 6 of the insulating substrate 2 is covered with an overcoat 8, and the opening of the overcoat 8 serves as a land 7. The wiring pattern 6 is connected to the external terminal land 10, and a through hole 11 is formed in the insulating substrate 2 at the external terminal land 10. A through-hole buried portion 13 is formed in the through-hole 11 via an insulating resin 12. The through hole buried portion 13 is connected to the external terminal land 10.

In the semiconductor device of the first embodiment (see FIG. 2), the insulating resin 12 is formed so as to cover the insulating substrate 2 other than the through holes 11. The insulating resin 12 is formed so as to cover only the side wall in the through hole 11 and the periphery of the through hole 11. As in the semiconductor device of the present embodiment, the insulating resin 1 is provided only near the through hole 11.
2 has a structure in which the insulating resin 12 is formed.
The stress is relieved at the divided portions. Therefore, compared to the semiconductor device of the first embodiment, the stress applied to the external terminal solder bumps 17 can be further reduced.

The semiconductor device of the present embodiment can be formed substantially along the steps shown in FIGS. First, the through hole 11 is formed in the insulating substrate 2 after the insulating substrate 2 and the copper foil 6a are integrated. An insulating resin 12 is formed on the surface of the insulating substrate 2 including the inside of the through hole 11. After the overcoat 8 is formed on the surface of the copper foil 6a, an opening is provided in the overcoat 8 on the land 7.

Next, as shown in FIG. 7B, a portion where the insulating resin 12 in the through hole 11 is connected to the wiring pattern 6 is removed. In addition, a part of the insulating resin 12 formed between the adjacent through holes 11 is removed so that the insulating substrate 2 is exposed between the through holes 11. Thereafter, similarly to the manufacturing method of the first embodiment, the through-hole buried portion 13 made of, for example, copper is formed in the through-hole 11.
To form Further, on the surfaces of the lands 7 and the through-hole buried portions 13, for example, oxidation preventing layers 14a, 1
4b is formed. Further, solder bumps 5 are formed on the main surface of the semiconductor chip 3 via the electrode pads 4, the solder bumps 5 are aligned with the lands 7 on the insulating substrate 2, and the semiconductor chip 3 is mounted on the insulating substrate 2.

The semiconductor chip 3 is heated to form the solder bumps 5.
And the solder bumps 5 are bonded to the electrode pads 4 and the lands 7. Further, the insulating substrate 2 and the semiconductor chip 3
Is sealed with a sealing resin 16. continue,
An oxidation preventing layer 14b is formed on the surface of the through hole buried portion 13.
And a solder ball 1 via a flux (not shown).
7a is formed. Further, the solder balls 17a are melted to form solder bumps 17 for external terminals. afterwards,
A plurality of semiconductor devices formed collectively on the wafer are cut into individual pieces. Through the above steps, the semiconductor device shown in FIG. 7A is obtained.

(Embodiment 3) FIG. 8 is a sectional view of a semiconductor device of this embodiment. In the semiconductor device of the present embodiment, the insulating substrate 2 and the semiconductor chip are joined via the die bonding material 18, and the solder bump 5 shown in the first or second embodiment is not formed. The semiconductor chip 3 has a main surface (a surface on which a semiconductor integrated circuit (not shown) is formed).
The electrode pads 4 formed on the surface of the semiconductor chip 3 and the lands 7 are connected via bonding wires 19. The upper and side surfaces of the semiconductor chip 3 and the bonding wires 19 are connected to the sealing resin 16.
Is sealed.

In the present embodiment, in a semiconductor device in which the insulating substrate 2 and the semiconductor chip 3 are connected by the wire bonding method, the through-hole buried portion 13 is formed in the through-hole 11 of the insulating substrate 2 via the insulating resin 12. It was formed. FIG. 8 shows an example in which the insulating resin 12 is divided between the through holes as in the second embodiment.
The insulating resin 12 may have a shape that continuously covers the insulating substrate 2 between the through holes as in the first embodiment. According to the semiconductor device of the present embodiment, even in the semiconductor device in which the insulating substrate 2 and the semiconductor chip 3 are connected by the wire bonding method, the stress applied to the external terminal solder bumps formed on the insulating substrate is reduced. be able to. Therefore, the long-term reliability of the semiconductor device can be improved.

In order to form the semiconductor device of the present embodiment, first, the insulating substrate 2 and the copper foil 6a are formed in the same manner as in the steps shown in FIGS. 3A to 4A of the first embodiment. To form a through hole 11 in the insulating substrate 2. Insulating resin 1 on the surface of insulating substrate 2 including inside of through hole 11
2 is formed. Next, the portion of the insulating resin 12 connected to the wiring pattern (the portion of the insulating resin
2) is removed. As shown in FIG. 8, in the case of a structure in which the insulating resin 12 is divided between the through holes, a part of the insulating resin 12 formed between the adjacent through holes 11 is removed. It is assumed that the insulating substrate 2 is exposed between them.

Next, a through-hole buried portion 13 made of, for example, copper is formed in the through-hole 11 in the same manner as in the manufacturing method of the first embodiment. Further, on the surface of the through-hole buried portion 13, an oxidation preventing layer 14b made of a laminated film of, for example, nickel plating and flash gold plating is formed. Subsequently, a die bonding material 18 is applied to the side of the insulating substrate 2 on which the wiring pattern 6 is formed. As the die bonding material 18, for example, a thermosetting resin is used. Thereafter, the semiconductor chip 3 is placed on the insulating substrate 2 via the die bonding material 18 and the die bonding material 1
8 is cured by heating.

Next, the space between the land 7 of the wiring pattern 6 and the electrode pad 4 of the semiconductor chip 3 is made, for example, of Al or A.
The connection is performed using a bonding wire 19 made of u (wire bonding step). Thereafter, the semiconductor chip 3 and the bonding wires 19 are sealed using a sealing resin 16 made of a thermosetting resin. Subsequently, a solder ball is formed on the surface of the through-hole buried portion 13 via the antioxidant layer 14 and a flux (not shown).
Further, the solder balls are melted to form external terminal solder bumps 17. Thereafter, the plurality of semiconductor devices formed collectively on the wafer are cut into individual pieces. Through the above steps, the semiconductor device shown in FIG. 8 is obtained.

(Embodiment 4) FIG. 9 is a sectional view of a semiconductor device according to this embodiment. According to the semiconductor device of the present embodiment, the insulating resin 12 that covers the side wall inside the through hole 11 is formed as in the semiconductor device according to the first or second embodiment, but the external terminal solder bump 17 is not formed. . In FIG. 9, the through-hole buried portion 13 is attached to the pad 21 of the printed wiring board (board) 20 by the cream solder 2.
LGA (landgrid ar) connected via
ray type CSP (chip size packa)
Ge or chip scale package).

Like the BGA, the LGA is a surface mount type package in which connection terminals are two-dimensionally arranged on the bottom side of an insulating substrate on which a semiconductor chip is mounted. Even when the number of pins is increased, the pin interval is narrow. This has the advantage that pitching can be avoided and the package dimensions can be reduced. The LGA is a package in which only a pad is formed without a lead in a connection portion, and a semiconductor chip is mounted on a printed wiring board via a connector formed on a bottom surface of an insulating substrate. LGA type C
In the SP, it is necessary to improve the connection reliability of the connector and the substantial increase in size due to the addition of the connector. Conventionally, the solder connection height has been increased to disperse the stress to improve the connection reliability of the connector. However, in this case, there is a problem that the size is substantially increased.

According to the semiconductor device of this embodiment, since the insulating resin 12 is formed in the through hole 11, the stress at the interface of the through hole 11 is reduced.
Through hole buried part 13 with cream solder 22 only
Can be connected to the printed wiring board 20. The through-hole buried portion 13 is formed by the conventional LGA type CS described above.
It corresponds to the connector at P. Since it is not necessary to form solder bumps for external terminals on the surface of the through-hole buried portion 13, it is possible to reduce the mounting height of the semiconductor chip mounted on the printed wiring board, and to realize an electronic product using the semiconductor device. It is possible to reduce the target size.

The semiconductor device of the present embodiment can be formed according to the same method as that of the first or second embodiment. However, a step of forming a solder ball on the surface of the through-hole buried portion 13, A heating step for reflow is not required. Therefore, the above-described semiconductor device of the present invention can be manufactured in a simplified process, and the connection reliability with the printed wiring board to be mounted is improved.

(Embodiment 5) FIG. 10 is a sectional view of a semiconductor device according to this embodiment. As shown in FIG. 10, by forming a conductive resin layer 25 in the through hole 11 instead of the insulating layer 12 (see Embodiments 1 to 4), the stress applied to the external terminal solder bumps can be reduced. it can. As shown in the present embodiment, when the conductive resin layer 25 having a low elastic modulus is formed in the through hole, it is not necessary to remove the conductive resin layer 25 at a portion connected to the land 10.
However, in order to prevent a short circuit between adjacent through holes, the conductive resin layer 25 between the through holes is divided as shown in FIG.

The embodiments of the semiconductor device, the electronic circuit device and the manufacturing method of the present invention are not limited to the above description. For example, the thickness of the insulating resin formed in the through-hole can be appropriately changed as long as the stress of the through-hole buried portion is reduced. In addition, various changes can be made without departing from the gist of the present invention.

[0069]

According to the semiconductor device of the present invention, in a through hole for connecting / mounting an insulating substrate on which a semiconductor chip is mounted to another substrate or the like, the stress at the joint is reduced to reduce the occurrence of cracks. Prevention and connection reliability can be improved. According to the electronic circuit device of the present invention, in a through-hole for connecting / mounting a substrate to another substrate or the like, a stress at a bonding portion is reduced to prevent occurrence of a crack,
Connection reliability can be improved. ADVANTAGE OF THE INVENTION According to the manufacturing method of the semiconductor device of this invention, the stress of a joining part is reduced by a simple process in the through-hole for mounting the insulating board in which the semiconductor chip was mounted on another board etc. Can be formed.

[Brief description of the drawings]

FIG. 1 is a perspective view of a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a cross-sectional view of the semiconductor device according to the first exemplary embodiment of the present invention, which is a cross-sectional view taken along line AA ′ of FIG.

FIGS. 3A to 3D are cross-sectional views illustrating manufacturing steps of a method for manufacturing a semiconductor device according to the first embodiment of the present invention;
The steps up to the step of forming an overcoat of a wiring pattern are shown.

FIGS. 4A to 4D are cross-sectional views illustrating manufacturing steps of a method for manufacturing a semiconductor device according to the first embodiment of the present invention;
The steps up to the step of forming an oxidation preventing layer on the surface of the through hole buried portion are shown.

FIGS. 5A and 5B are cross-sectional views showing a manufacturing process of the semiconductor device manufacturing method according to the first embodiment of the present invention, up to a process of forming a solder bump connecting a semiconductor chip and an insulating substrate; Is shown.

FIGS. 6A and 6B are cross-sectional views illustrating a manufacturing process of a method for manufacturing a semiconductor device according to the first embodiment of the present invention, up to a process of forming a solder ball on a surface of a through-hole buried portion; Show.

FIG. 7A is a cross-sectional view of a semiconductor device according to a second embodiment of the present invention, and FIG. 7B is a cross-sectional view illustrating a manufacturing process of the semiconductor device manufacturing method according to the second embodiment of the present invention. .

FIG. 8 is a sectional view of a semiconductor device according to a third embodiment of the present invention.

FIG. 9 is a sectional view of a semiconductor device according to a fourth embodiment of the present invention.

FIG. 10 is a sectional view of a semiconductor device according to a fifth embodiment of the present invention.

FIG. 11 is a sectional view of a conventional semiconductor device.

[Explanation of symbols]

1, 101: semiconductor device, 2, 102: insulating substrate (mounting substrate), 2a: insulating resin, 3, 103: semiconductor chip, 4, 104: electrode pad, 5, 105: solder bump, 6, 106: wiring Pattern, 6a ... copper foil, 7, 10
7: Land, 8, 108: Overcoat, 9: Plating lead, 10: Land for external terminal, 11, 110: Through hole, 12: Insulating resin layer, 13: Embedded portion of through hole, 14a, 14b: Oxidation prevention Layer, 15: flux, 16, 109: sealing resin, 17: solder bump for external terminal, 17a: solder ball, 18: die bonding material, 19: bonding wire, 20: printed wiring board, 21: pad, 22 ... Cream solder, 23 ...
Contact holes, 24: conductive layer, 25: conductive resin layer.

Claims (28)

[Claims] A semiconductor substrate formed on a first surface of the semiconductor substrate, an insulating substrate on which the semiconductor substrate is mounted, and an interlayer between the semiconductor substrate and the insulating substrate. A wiring pattern formed on the insulating substrate and reaching the wiring pattern; an insulating layer covering a side surface in the through hole; A semiconductor device having a through-hole buried portion formed of a conductor and connected to the wiring pattern, and a solder bump connected to the through-hole buried portion and serving as an external terminal. 2. The semiconductor device according to claim 1, wherein said through-hole buried portion is made of a metal having a higher mechanical strength than said solder bump. 3. The insulating layer is made of an insulating resin having a lower elastic modulus than that of the insulating substrate, and relieves stress generated at a junction between the through hole buried portion and the wiring pattern. 13. The semiconductor device according to claim 1. 4. The semiconductor device according to claim 1, wherein a junction between the through hole buried portion and the solder bump protrudes from a surface of the insulating substrate. 5. The semiconductor device according to claim 1, wherein said insulating layer continuously covers a side surface inside said through hole and a surface of said insulating substrate near said through hole. 6. The semiconductor device according to claim 5, wherein a junction between said through hole buried portion and said solder bump protrudes from a surface of said insulating layer near said through hole. 7. The semiconductor device according to claim 5, wherein said insulating layers formed in adjacent through holes are separated from each other. 8. The semiconductor device according to claim 5, wherein said insulating layers formed in adjacent through holes are integrated. 9. The semiconductor device according to claim 1, wherein said insulating substrate is a flexible insulating substrate. 10. A semiconductor substrate, a semiconductor element formed on a first surface side as one surface of the semiconductor substrate, and a flexible insulating substrate on which the semiconductor substrate is mounted via the first surface. A wiring pattern formed between the semiconductor substrate and the flexible insulating substrate and electrically connected to the semiconductor element; a connection part connecting the wiring pattern and the semiconductor element; and the wiring pattern. A sealing resin layer formed between the first surface of the semiconductor substrate, a through hole formed on the flexible insulating substrate and reaching the wiring pattern, and an insulation covering a side surface in the through hole. A layer, formed in the through hole via the insulating layer, connected to the wiring pattern, a through hole buried portion made of a conductor, and connected to the through hole buried portion, and an external terminal. The semiconductor device having a Ruhanda bumps. 11. The semiconductor device according to claim 10, wherein said connection portion is a solder bump. 12. A semiconductor substrate, a semiconductor element formed on a first surface side which is one surface of the semiconductor substrate, and the semiconductor substrate mounted via a second surface which is a back surface of the first surface. A flexible insulating substrate, a wiring pattern formed between the semiconductor substrate and the flexible insulating substrate, and electrically connected to the semiconductor element; and a wiring pattern formed outside the semiconductor substrate. A bonding wire connecting the semiconductor element and the semiconductor element; a sealing resin layer covering the semiconductor substrate and the bonding wire; a through hole formed in the flexible insulating substrate and reaching the wiring pattern; An insulating layer covering the inner side surface; and an insulating layer formed in the through hole via the insulating layer, connected to the wiring pattern, and filled with a through hole made of a conductor. A saw unit, connected to the through-hole filling unit, a semiconductor device having a solder bump as the external terminals. 13. A semiconductor substrate, a semiconductor element formed on a first surface side as one surface of the semiconductor substrate, and a flexible insulating substrate on which the semiconductor substrate is mounted via the first surface. A wiring pattern formed between the semiconductor substrate and the flexible insulating substrate and electrically connected to the semiconductor element; a connection part connecting the wiring pattern and the semiconductor element; and the wiring pattern. A sealing resin layer formed between the first surface of the semiconductor substrate, a through hole formed on the flexible insulating substrate and reaching the wiring pattern, and an insulation covering a side surface in the through hole. A layer, a through-hole buried portion that is formed in the through-hole via the insulating layer, is connected to the wiring pattern, is made of a conductor, and an electrode portion that is connected to the through-hole buried portion. To a semiconductor device and a mounting board for mounting the semiconductor substrate via the flexible insulating substrate. 14. A semiconductor substrate, a semiconductor element formed on a first surface side as one surface of the semiconductor substrate, an insulating substrate on which the semiconductor substrate is mounted, and an interlayer between the semiconductor substrate and the insulating substrate. A wiring pattern formed on the insulating substrate and electrically connected to the semiconductor element; a through hole formed on the insulating substrate and reaching the wiring pattern; and covering at least a side surface of the through hole. A conductive resin layer made of a material having a low elastic modulus to relieve stress generated at a junction between the through-hole buried portion and the wiring pattern; and a conductive resin layer formed in the through-hole via the conductive resin layer. A through-hole buried portion made of a conductor connected to the wiring pattern; and a solder bump connected to the through-hole buried portion and serving as an external terminal. Semiconductor device. 15. A first substrate, an electronic circuit element formed on a first surface, which is one surface of the first substrate, a second substrate on which the first substrate is mounted, Formed between the first substrate and the second substrate,
A wiring pattern electrically connected to the electronic circuit element; a through hole formed in the second substrate and reaching the wiring pattern; an insulating layer covering a side surface in the through hole; An electronic circuit device formed through the insulating layer and connected to the wiring pattern and having a through-hole buried portion made of a conductor, and a solder bump connected to the through-hole buried portion and serving as an external terminal. 16. A step of forming a semiconductor element on a first surface, which is one surface of a semiconductor substrate; a step of forming a wiring pattern on a surface of an insulating substrate; A step of forming a hole, a step of forming an insulating layer on a side surface in the through hole, a step of forming a through hole buried portion made of a conductor through the insulating layer in the through hole, and the wiring A step of mounting the semiconductor substrate on the insulating substrate so that the pattern and the semiconductor element are connected; and a step of forming a solder bump serving as an external terminal on a surface of the through-hole buried portion. Production method. 17. The method of manufacturing a semiconductor device according to claim 16, wherein said step of forming said through-hole buried portion uses a metal having a higher mechanical strength than said solder bump as a material. 18. The method according to claim 18, wherein the step of forming the insulating layer comprises applying an insulating resin having a lower elastic modulus than that of the insulating substrate to alleviate a stress generated at a junction between the through hole buried portion and the wiring pattern. 17. The method for manufacturing a semiconductor device according to claim 16, wherein the method is used as a material. 19. The method of manufacturing a semiconductor device according to claim 16, wherein the step of forming the through-hole buried portion is a step of performing electroplating by supplying a current to the wiring pattern. 20. The method of manufacturing a semiconductor device according to claim 19, wherein the step of forming the through hole buried portion is a step of performing electrolytic plating until the conductor protrudes from the surface of the insulating substrate. 21. The method according to claim 16, wherein the step of forming the insulating layer is a step of forming the insulating layer so as to cover a side surface in the through hole and a surface of the insulating substrate. . 22. The semiconductor device according to claim 21, wherein the step of forming the through-hole buried portion is a step of performing electrolytic plating until the conductor protrudes from a surface of the insulating layer covering the insulating substrate. Manufacturing method. 23. The method according to claim 22, further comprising the step of removing a part of the insulating layer formed on the surface of the substrate between adjacent through holes and dividing the insulating layer. 24. A step of forming the solder bump, the step of forming a substantially spherical solder ball, the step of transferring the solder ball to the surface of the through hole buried portion, and the step of heating the solder ball. 17. The method of manufacturing a semiconductor device according to claim 16, further comprising: forming the solder bump covering the surface of the through-hole buried portion by melting. 25. The method according to claim 16, wherein said insulating substrate is a flexible insulating substrate. 26. A step of mounting the semiconductor substrate on the insulating substrate, the step of forming a connection portion on a surface of the wiring pattern, and the step of mounting the semiconductor substrate so that the semiconductor element contacts the connection portion. 17. The manufacturing of a semiconductor device according to claim 16, further comprising: a step of mounting on the insulating substrate via one surface; and a step of forming a sealing resin layer between the wiring pattern and the first surface of the semiconductor substrate. Method. 27. The method of manufacturing a semiconductor device according to claim 26, wherein the step of forming the connection part is a step of forming a solder bump. 28. The step of mounting the semiconductor substrate on the insulating substrate, the step of mounting the semiconductor substrate on the insulating substrate via a second surface, which is a back surface of the first surface, After mounting the semiconductor substrate, forming a bonding wire connecting the wiring pattern and the semiconductor element outside the semiconductor substrate, and a sealing resin layer covering the semiconductor substrate and the bonding wire. 17. The method for manufacturing a semiconductor device according to claim 16, comprising the step of forming.