JP2001008100A - Infrared imaging device and element defect compensation method - Google Patents
Infrared imaging device and element defect compensation methodInfo
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- JP2001008100A JP2001008100A JP11176349A JP17634999A JP2001008100A JP 2001008100 A JP2001008100 A JP 2001008100A JP 11176349 A JP11176349 A JP 11176349A JP 17634999 A JP17634999 A JP 17634999A JP 2001008100 A JP2001008100 A JP 2001008100A
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Abstract
(57)【要約】
【課題】 複数素子構成の赤外線検知器を有する赤外線
撮像装置及び欠陥素子補償方法に関し、素子のリニアリ
ティ特性についても判定する。
【解決手段】 赤外線の走査を行う光学系1,2と、複
数素子構成の赤外線検知器3と、常温の基準熱源10
と、高温の基準熱源11と、無効走査期間に於ける常温
の基準熱源10による常温データと高温の基準熱源11
による高温データとを基に、赤外線検知器3の各素子の
感度補正、S/N判定やDCオフセット判定による素子
判定、欠陥素子の置換処理を行う信号処理回路6とを含
み、信号処理回路6は、更に、電源立上げ時/置換指令
時に、基準熱源10,11の温度を変更して、全素子平
均値に対する各素子の差分を求め、この差分が閾値を超
えている素子を欠陥素子と判定するリニアリティ判定を
行う処理機能を備えている。
(57) Abstract: In an infrared imaging apparatus having an infrared detector having a plurality of elements and a defective element compensation method, the linearity characteristics of the elements are also determined. An optical system for performing infrared scanning, an infrared detector having a plurality of elements, and a reference heat source at room temperature.
, A high-temperature reference heat source 11, normal-temperature data from the normal-temperature reference heat source 10 during the invalid scanning period, and a high-temperature reference heat source 11.
And a signal processing circuit 6 for performing sensitivity correction of each element of the infrared detector 3, element determination by S / N determination or DC offset determination, and replacement of defective elements based on the high-temperature data obtained by Further, at the time of power-on / replacement command, the temperature of the reference heat sources 10 and 11 is changed to obtain the difference between the respective elements with respect to the average value of all the elements, and the element whose difference exceeds the threshold value is determined as a defective element. It has a processing function of performing linearity determination.
Description
【0001】[0001]
【発明の属する技術分野】本発明は、赤外線撮像装置及
びこの赤外線撮像装置に於ける素子欠陥補償方法に関す
る。赤外線撮像装置は、赤外線の検知素子を用いて、光
学的に、又は機械的に、又は電気的に目標物方向を走査
し、目標物から放射される赤外線を検出し、その検出信
号を処理して赤外線画像を表示するものであり、監視カ
メラ,暗視装置,サーモグラフィ,リモートセンシン
グ,車両や航空機等に搭載する先方監視装置等の広範囲
の分野で利用されている。[0001] 1. Field of the Invention [0002] The present invention relates to an infrared imaging device and a method for compensating element defects in the infrared imaging device. An infrared imaging device scans a target direction optically, mechanically, or electrically using an infrared detection element, detects infrared light emitted from the target, and processes the detection signal. It is used in a wide range of fields such as surveillance cameras, night vision devices, thermography, remote sensing, and remote monitoring devices mounted on vehicles and airplanes.
【0002】又赤外線の検出波長域により、例えば、3
〜5μm帯と8〜10μm帯とに区分されている場合が
一般的であり、赤外線検出素子は、3〜5μm帯では、
PtSi,InSn,HgCdTe等の材料による構成
が適用され、又8〜10μm帯では、HgCdTeによ
る構成が適用されている。又赤外線検知器は、素子構成
として、単一素子,一次元配列素子,二次元配列素子の
何れかの構成があり、一次元配列及び二次元配列の構成
の場合、各素子の感度特性が完全に均一でないことか
ら、ばらつきを補正する必要がある。又感度補正をかけ
ても均一にならない素子が存在する場合、隣接する正常
な画素と置き換える必要がある。本発明は、このような
欠陥素子の置き換えを行う赤外線撮像装置及び素子欠陥
補償方法に関する。Also, depending on the detection wavelength range of infrared rays, for example, 3
In general, the band is divided into a band of about 5 μm and a band of 8 to 10 μm.
A configuration using a material such as PtSi, InSn, or HgCdTe is applied, and a configuration using HgCdTe is applied in the 8 to 10 μm band. In addition, the infrared detector has one of a single element, a one-dimensional array element, and a two-dimensional array element as an element configuration. In the case of the one-dimensional array and the two-dimensional array, the sensitivity characteristics of each element are completely completed. Therefore, it is necessary to correct the variation. If there is an element that is not uniform even after sensitivity correction, it must be replaced with an adjacent normal pixel. The present invention relates to an infrared imaging device that performs such replacement of a defective element and a method for compensating for a defective element.
【0003】[0003]
【従来の技術】図48は従来例の赤外線撮像装置の説明
図であり、401,402は光学系、403は赤外線の
検知素子を例えば一次元配列とした赤外線検知器、40
4は増幅器、405はAD変換器(A/D)、406は
感度補正等を行う信号処理回路、407はDA変換器
(D/A)、408はブラウン管や液晶表示パネル等に
よるモニタ、410,411は基準熱源を示す。2. Description of the Related Art FIG. 48 is an explanatory view of a conventional infrared imaging apparatus, wherein 401 and 402 are optical systems, 403 is an infrared detector in which infrared detecting elements are arranged in a one-dimensional array, for example, 40
4 is an amplifier, 405 is an AD converter (A / D), 406 is a signal processing circuit for performing sensitivity correction and the like, 407 is a DA converter (D / A), 408 is a monitor using a cathode ray tube, a liquid crystal display panel, or the like. Reference numeral 411 denotes a reference heat source.
【0004】基準熱源410,411はそれぞれ異なる
基準温度に設定した熱源であり、目標物が放射する赤外
線を走査検出する有効走査期間以外の期間、即ち、無効
走査期間に於いて、光学系402を介して基準熱源41
0,411からの赤外線を赤外線検知器403に入射
し、各検知素子の感度補正を信号処理回路406に於い
て行い、目標物の赤外線画像をモニタ408に表示する
ものである。[0004] The reference heat sources 410 and 411 are heat sources set at different reference temperatures, respectively. The optical system 402 is turned on during a period other than an effective scanning period for scanning and detecting infrared rays emitted from a target, that is, during an invalid scanning period. Via the reference heat source 41
The infrared rays from 0 and 411 enter the infrared detector 403, the sensitivity of each detection element is corrected in the signal processing circuit 406, and the infrared image of the target is displayed on the monitor 408.
【0005】図49は光学系の説明図であり、図48の
光学系401,402の概要を示すもので、同一符号は
同一部分を示す。図49に於いて、412,413は光
学系401を構成するレンズ、414,415は光学系
402を構成するレンズ、416,418はレンズによ
る集光部、417,419は反射鏡を示す。FIG. 49 is an explanatory view of the optical system, and shows an outline of the optical systems 401 and 402 in FIG. 48, and the same reference numerals indicate the same parts. In FIG. 49, reference numerals 412 and 413 denote lenses constituting the optical system 401, reference numerals 414 and 415 denote lenses which constitute the optical system 402, reference numerals 416 and 418 denote condensing parts by lenses, and reference numerals 417 and 419 denote reflecting mirrors.
【0006】レンズ414,415による光学系402
の後段に、一次元配列構成の赤外線検知器403を配置
し、この赤外線検知器403を構成する検知素子の一次
元配列方向と直交する方向に光学系402によって走査
し、目標物を二次元走査するものである。光学系402
の走査は、モニタ408に於ける表示の走査に対応して
行う場合が一般的であるが、例えば、インタレース走査
を行い、2フィールドで1フレームを構成する場合の第
1フィールドは奇数番目のラインの走査を行い、第2フ
ィールドは偶数番目のラインの走査を行い、このインタ
レース走査による赤外線検出出力信号を用い、特定の目
標物の検出の為やモニタ408表示用に走査変換を信号
処理回路406に於いて行うことになる。An optical system 402 using lenses 414 and 415
In the subsequent stage, an infrared detector 403 having a one-dimensional array configuration is arranged, and the optical element 402 scans in a direction orthogonal to the one-dimensional array direction of the detecting elements constituting the infrared detector 403, and two-dimensionally scans the target. Is what you do. Optical system 402
Is generally performed in correspondence with display scanning on the monitor 408. For example, when interlaced scanning is performed and two fields constitute one frame, the first field is an odd-numbered field. The second field scans the even-numbered lines in the second field, and uses the infrared detection output signal obtained by the interlaced scanning to perform scan conversion for detecting a specific target or for displaying on the monitor 408. This is performed in the circuit 406.
【0007】又赤外線検知器403を一次元配列又は二
次元配列の多素子構成とした場合、隣接素子による検出
信号の相関が大きいことを利用して、感度特性が基準か
ら大きくずれているような欠陥素子に対しては、隣接素
子を代替えとする制御を行う手段が知られている。即
ち、感度特性等が基準から大きくずれている欠陥素子の
検出信号の代わりに、隣接する正常素子の検出信号を用
いるように切替制御する。When the infrared detector 403 has a one-dimensional array or a two-dimensional array of multiple elements, the sensitivity characteristic is greatly deviated from the standard by utilizing the large correlation between the detection signals of adjacent elements. Means for performing control to replace a defective element with an adjacent element are known. That is, the switching control is performed so that the detection signal of the adjacent normal element is used instead of the detection signal of the defective element whose sensitivity characteristic or the like largely deviates from the reference.
【0008】[0008]
【発明が解決しようとする課題】従来の赤外線検知器4
03を構成する各素子に対する判定は、S/NとDCオ
フセットとの何れか一方又は両方で行う場合が一般的で
ある。そして、それらの値が基準値から外れている場合
に、その素子は欠陥素子は判定し、この欠陥素子の検出
出力信号を用いないで、隣接する正常素子の検出出力信
号を用いる素子置換処理が行われる。SUMMARY OF THE INVENTION Conventional infrared detector 4
It is general that the determination of each element constituting 03 is made based on one or both of S / N and DC offset. When those values deviate from the reference values, the element is determined to be a defective element, and the element replacement process using the detection output signal of the adjacent normal element without using the detection output signal of the defective element is performed. Done.
【0009】又赤外線検知器403の各素子について、
基準値の範囲内の場合に、感度のばらつきについては、
各素子の検出信号について補正処理を行うものである。
しかし、実際には、検出信号レベルと温度との関係は曲
線となる場合が一般的であり、更に、この特性は素子間
でばらつきがある。従って、感度補正のみでは、正確な
赤外線画像を得ることが容易でなかった。本発明は、赤
外線検知器の各素子の特性を補正すると共に、リニアリ
ティ特性を含めて基準値を外れた素子の置換の処理を行
って、正確な赤外線画像を得ることを目的とする。For each element of the infrared detector 403,
When the sensitivity is within the range of the reference value,
The correction processing is performed on the detection signal of each element.
However, actually, the relationship between the detection signal level and the temperature is generally a curve, and furthermore, this characteristic varies among the elements. Therefore, it was not easy to obtain an accurate infrared image only by the sensitivity correction. SUMMARY OF THE INVENTION It is an object of the present invention to obtain an accurate infrared image by correcting characteristics of each element of an infrared detector and performing processing of replacing an element that deviates from a reference value including a linearity characteristic.
【0010】[0010]
【課題を解決するための手段】本発明の赤外線撮像装置
は、(1)複数の素子により構成された赤外線検知器3
と、高温の基準熱源11と常温の基準熱源10と、高温
と常温との基準熱源の温度を制御する基準熱源制御回路
12と、有効走査期間に目標物方向の赤外線を走査して
赤外線検知器3に入射し、無効走査期間に、高温と常温
との基準熱源11,10からの赤外線を走査して赤外線
検知器3に入射する光学系1,2と、無効走査期間に取
込んだ高温の基準熱源11による高温データと、常温の
基準熱源10による常温データとを基に、素子対応の感
度補正を行い、且つ赤外線検知器を構成する各素子の欠
陥を判定し、欠陥素子による信号を正常素子による信号
に置換する処理を行う信号処理回路6とを備えた赤外線
撮像装置であって、基準熱源制御回路12は、電源立上
げ時/置換指令時に、高温と常温との基準熱源11,1
0の温度を所定フィールド数毎に2段階に切替え、通常
動作時は所定の一定温度に制御する構成を有し、信号処
理回路6は、無効走査期間に取込んだ高温データと常温
データとを基に、感度補正係数算出と、感度補正と、S
/N判定、DCオフセット判定又はリニアリティ判定の
少なくとも何れか一方の判定による素子判定と、欠陥素
子の素子判定結果による置換アドレス生成・更新と、各
判定による欠陥素子に対する置換処理を行う処理機能を
有するものである。The infrared imaging apparatus according to the present invention comprises: (1) an infrared detector 3 comprising a plurality of elements;
A high-temperature reference heat source 11, a normal-temperature reference heat source 10, a reference heat-source control circuit 12 for controlling the temperatures of the high-temperature and normal-temperature reference heat sources, and an infrared detector that scans infrared rays in a target direction during an effective scanning period. 3, the optical systems 1 and 2 that scan infrared rays from the reference heat sources 11 and 10 at high temperature and normal temperature to enter the infrared detector 3 during the invalid scanning period, and the high temperature taken during the invalid scanning period. Based on the high-temperature data from the reference heat source 11 and the room temperature data from the room-temperature reference heat source 10, sensitivity correction corresponding to the element is performed, and a defect of each element constituting the infrared detector is determined. An infrared imaging apparatus comprising a signal processing circuit 6 for performing a process of substituting a signal by an element, wherein a reference heat source control circuit 12 is configured to switch between a high temperature and a normal temperature at the time of power-on / replacement command.
The temperature of 0 is switched to two levels for each predetermined number of fields, and is controlled to a predetermined constant temperature during normal operation. The signal processing circuit 6 converts the high-temperature data and the normal-temperature data captured during the invalid scanning period. Based on the sensitivity correction coefficient calculation, sensitivity correction, and S
/ N determination, DC offset determination, and / or linearity determination, and has a processing function of performing replacement address generation / update based on a result of element determination of a defective element and performing a replacement process on the defective element by each determination. Things.
【0011】又(2)基準熱源制御回路12は、電源立
上げ時/置換指令時の最初は、常温の基準熱源10の温
度をシーンの平均温度のA〔°C〕に、又高温の基準熱
源の温度をA+α〔°C〕に制御し、所定フィールド後
に、常温の基準熱源10の温度をA+ΔT1 〔°C〕
に、又高温の基準熱源11の温度をA+α+ΔT2 〔°
C〕に制御し、通常動作時に、常温と高温との基準熱源
10,11の温度を最初の状態に制御する構成を備え、
又信号処理回路6は、電源立上げ時/置換指令時と通常
動作時とに於ける常温と高温との基準熱源10,11の
温度に対応して、無効走査期間に取込んだ常温データと
高温データとを基に、S/N判定と、DCオフセット判
定と、全素子平均値に対する各素子の差によるリニアリ
ティ判定との組合せを切替えて素子判定を行い、各判定
による欠陥素子に対する置換アドレス生成・更新を行う
処理機能を備えている。(2) At the time of power-on / replacement command, the reference heat source control circuit 12 sets the temperature of the reference heat source 10 at room temperature to A [° C.] of the average temperature of the scene, The temperature of the heat source is controlled to A + α [° C.], and after a predetermined field, the temperature of the reference heat source 10 at room temperature is A + ΔT 1 [° C.]
And the temperature of the high-temperature reference heat source 11 is A + α + ΔT 2 [°
C], and during normal operation, the temperature of the reference heat sources 10, 11 at room temperature and high temperature is controlled to the initial state,
Further, the signal processing circuit 6 stores the normal temperature data acquired during the invalid scanning period in accordance with the temperatures of the reference heat sources 10 and 11 at normal temperature and high temperature at the time of power-on / replacement command and during normal operation. Based on the high-temperature data, a combination of the S / N determination, the DC offset determination, and the linearity determination based on the difference of each element with respect to the average value of all the elements is switched to perform the element determination, and the replacement address generation for the defective element by each determination is performed. -It has a processing function for updating.
【0012】又(3)欠陥素子補償方法は、複数の素子
により構成された赤外線検知器3と、高温の基準熱源1
1と、常温の基準熱源10と、有効走査期間に目標物方
向の赤外線を走査して赤外線検知器3に入射し、無効走
査期間に高温と常温との基準熱源11,10からの赤外
線を走査して赤外線検知器3に入射する光学系1,2
と、信号処理回路6とを有し、赤外線検知器3の出力の
高温の基準熱源11による高温データと、常温の基準熱
源10による常温データとを基に、赤外線検知器3の各
素子を判定し、欠陥素子の信号を正常素子の信号に置換
する欠陥素子補償方法であって、電源立上げ時/置換指
令時に、常温の基準熱源10の温度をA〔°C〕に、又
高温の基準熱源11の温度をA+α〔°C〕に制御し
て、無効走査期間に常温データと高温データとを取込
み、S/N判定又はDCオフセット判定の何れか一方又
は両方により欠陥素子か否かの素子判定後に、感度補正
係数算出を行い、次に、常温の基準熱源10の温度をA
±ΔT1 〔°C〕に、又高温の基準熱源11の温度をA
+α±ΔT2 〔°C〕に制御して、無効走査期間に常温
データと高温データとを取込み、全素子についての平均
値に対する各素子毎の差を第1のリニアリティ判定とし
て、閾値と比較し、該閾値を超える素子を欠陥素子と判
定し、次の通常動作時に、常温の基準熱源10の温度を
A〔°C〕に、又高温の基準熱源11の温度をA+α
〔°C〕に制御して、無効走査期間に常温データと高温
データとを取込み、S/N判定又はDCオフセット判定
又はリニアリティ判定との少なくとも何れか一つの判定
によって欠陥素子か否かの素子判定を行い、各判定によ
る判定結果の論理和を基に欠陥素子の置換処理を行う過
程を含むものである。(3) The method of compensating for a defective element comprises the steps of: an infrared detector 3 composed of a plurality of elements;
1, a reference heat source 10 at room temperature, and infrared rays in the direction of the target object during the effective scanning period and incident on the infrared detector 3, and infrared rays from the reference heat sources 11 and 10 at high and normal temperatures during the invalid scanning period. Optical systems 1 and 2 incident on the infrared detector 3
And a signal processing circuit 6 for determining each element of the infrared detector 3 based on high-temperature data from the high-temperature reference heat source 11 output from the infrared detector 3 and normal-temperature data from the normal-temperature reference heat source 10. A defective element compensation method for replacing a defective element signal with a normal element signal, wherein the temperature of the normal heat source 10 is set to A [° C.] and the high temperature The temperature of the heat source 11 is controlled to A + α [° C.], the normal temperature data and the high temperature data are acquired during the invalid scanning period, and the element is determined to be a defective element by one or both of the S / N determination and the DC offset determination. After the determination, a sensitivity correction coefficient is calculated, and then the temperature of the standard heat source
± ΔT 1 [° C], and the temperature of the high-
+ Α ± ΔT 2 [° C.], fetch normal temperature data and high temperature data during the invalid scanning period, compare the difference of each element with the average value of all elements for each element as a first linearity judgment, and compare it with a threshold value. The element exceeding the threshold value is determined as a defective element, and in the next normal operation, the temperature of the reference heat source 10 at normal temperature is set to A [° C.] and the temperature of the reference heat source 11 at high temperature is set to A + α.
The temperature is controlled to [° C.], the normal temperature data and the high temperature data are fetched during the invalid scanning period, and the element is determined as a defective element based on at least one of the S / N determination, the DC offset determination, and the linearity determination. And performing a process of replacing defective elements based on the logical sum of the determination results of the respective determinations.
【0013】又(4)複数の素子により構成された赤外
線検知器3と、高温の基準熱源11と、常温の基準熱源
10と、有効走査期間に目標物方向の赤外線を走査して
赤外線検知器3に入射し、無効走査期間に高温と常温と
の基準熱源11,10からの赤外線を走査して赤外線検
知器3に入射する光学系1,2と、信号処理回路6とを
有し、高温の基準熱源11による高温データと常温の基
準熱源10による常温データとを基に、赤外線検知器3
の各素子を判定し、欠陥素子の信号を正常素子の信号に
置換する欠陥素子補償方法であって、電源立上げ時/置
換指令時に、常温の基準熱源10の温度をA〔°C〕
に、又高温の基準熱源11の温度をA+α〔°C〕に制
御して、無効走査期間に常温データと高温データとを取
込んで第1の感度補正係数を算出し、次に常温の基準熱
源10の温度をA+ΔT1 〔°C〕に、又高温の基準熱
源11の温度をA+α+ΔT2 〔°C〕に制御して、無
効走査期間に常温データと高温データとを取込んで第2
の感度補正係数を算出し、第1と第2との感度補正係数
の素子対応の差を第2のリニアリティ判定として閾値と
比較し、閾値を超える素子を欠陥素子と判定し、通常動
作時に、常温の基準熱源10の温度をA〔°C〕に、又
高温の基準熱源11の温度をA+α〔°C〕に制御し
て、無効走査期間に常温データと高温データとを取込
み、S/N判定又はDCオフセット判定又はリニアリテ
ィ判定との少なくとも何れか一つの判定によって欠陥素
子か否かの素子判定を行い、各判定による判定結果の論
理和を基に欠陥素子の置換処理を行う過程を含むもので
ある。(4) An infrared detector 3 composed of a plurality of elements, a high-temperature reference heat source 11, a normal-temperature reference heat source 10, and an infrared detector that scans infrared light in the direction of a target object during an effective scanning period. 3, optical systems 1 and 2 that scan infrared rays from the reference heat sources 11 and 10 at high and normal temperatures during the invalid scanning period and enter the infrared detector 3, and a signal processing circuit 6. The infrared detector 3 is based on the high temperature data from the reference heat source 11 and the room temperature data from the room temperature reference heat source 10.
Is a method of compensating for a defective element, and replacing a signal of a defective element with a signal of a normal element, wherein the temperature of the reference heat source 10 at room temperature is A [° C.]
In addition, the temperature of the high-temperature reference heat source 11 is controlled to A + α [° C.], the normal-temperature data and the high-temperature data are taken in the invalid scanning period, the first sensitivity correction coefficient is calculated, and then the normal-temperature reference The temperature of the heat source 10 is controlled to A + ΔT 1 [° C.], and the temperature of the high-temperature reference heat source 11 is controlled to A + α + ΔT 2 [° C.].
Of the first and second sensitivity correction coefficients are compared with a threshold value as a second linearity determination, an element exceeding the threshold value is determined as a defective element, and during normal operation, By controlling the temperature of the reference heat source 10 at normal temperature to A [° C.] and the temperature of the reference heat source 11 at high temperature to A + α [° C.], the normal temperature data and the high temperature data are acquired during the invalid scanning period, and the S / N The method includes a step of performing an element determination as to whether or not the element is a defective element by at least one of the determination, the DC offset determination, and the linearity determination, and performing a defective element replacement process based on a logical sum of the determination results of each determination. .
【0014】[0014]
【発明の実施の形態】図1は本発明の実施の形態の説明
図であり、1,2は光学系、3は赤外線検知器、4は増
幅器、5はAD変換器(A/D)、6は信号処理回路、
7は走査変換回路、8はDA変換器(D/A)、10,
11は基準熱源、12は基準熱源制御回路、13は制御
回路、21,22はディジタル・シグナル・プロセッサ
(DSP1,DSP2)、23〜26はランダムアクセ
スメモリ(RAM1〜RAM4)、27,28はリード
オンリメモリ(ROM1,ROM2)を示す。以下2
1,22はDSP、23〜28はメモリと略称する。DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is an explanatory view of an embodiment of the present invention. Reference numerals 1 and 2 denote an optical system, 3 denotes an infrared detector, 4 denotes an amplifier, 5 denotes an AD converter (A / D), 6 is a signal processing circuit,
7, a scan conversion circuit; 8, a DA converter (D / A);
11 is a reference heat source, 12 is a reference heat source control circuit, 13 is a control circuit, 21 and 22 are digital signal processors (DSP1 and DSP2), 23 to 26 are random access memories (RAM1 to RAM4), and 27 and 28 are leads. 3 shows only memories (ROM1 and ROM2). Below 2
1 and 22 are abbreviated as DSPs and 23 to 28 are abbreviated as memories.
【0015】目標物方向からの赤外線を入射する光学系
1,2と、赤外線検知器3と、検出出力信号を増幅する
増幅器4と、AD変換器5と、無効走査期間に赤外線検
知器3に基準温度の赤外線を入射させる為の基準熱源1
0,11と、モニタ(図示を省略)にアナログ映像信号
として入力する為のDA変換器7とについては、従来例
と同様の構成とすることができる。Optical systems 1 and 2 for receiving infrared rays from a target object direction, an infrared detector 3, an amplifier 4 for amplifying a detection output signal, an A / D converter 5, and the infrared detector 3 during an invalid scanning period. Reference heat source 1 for injecting infrared light of reference temperature
The configuration of the D / A converter 7 for inputting an analog video signal to a monitor (not shown) can be the same as that of the conventional example.
【0016】又光学系2による走査に従って、常温の基
準熱源10と高温の基準熱源11とからの赤外線を赤外
線検知器3に入射させる為のそれぞれの走査先頭タイミ
ングでトリガ信号1,2を制御回路13に入力し、又有
効走査期間の走査先頭タイミングでトリガ信号3を制御
回路13に入力し、制御回路13はトリガ信号1,2,
3を基に信号処理回路21に各種の演算処理の開始やモ
ード切替えを指示するものである。この制御回路13
は、前述のトリガ信号1,2,3と、運用中に欠陥素子
の置換を行わせる為の置換指令が入力され、シーケンス
コントローラとして動作して、タイミング信号を信号処
理回路6に入力する機能を備えている。In accordance with the scanning by the optical system 2, the trigger signals 1 and 2 are controlled by the control circuit at the respective scanning start timings for causing the infrared rays from the reference heat source 10 at normal temperature and the reference heat source 11 at high temperature to be incident on the infrared detector 3. 13 and a trigger signal 3 to the control circuit 13 at the scanning start timing of the effective scanning period.
3 to instruct the signal processing circuit 21 to start various arithmetic processing and to switch modes. This control circuit 13
Has a function of receiving the above-mentioned trigger signals 1, 2, 3 and a replacement command for performing replacement of a defective element during operation, operating as a sequence controller, and inputting a timing signal to the signal processing circuit 6. Have.
【0017】又光学系2の走査効率を例えば80%と
し、1フィールド1/60sとすると、有効走査期間
は、(1/60)×0.8=13.33〔ms〕、無効
走査期間は、(1/60)×0.2=3.33〔ms〕
となる。この無効走査期間に於いて、常温と高温との基
準熱源10,11からの赤外線を赤外線検知器3に入射
させ、有効走査期間に於いて、光学系1を介した目標物
方向からの赤外線を光学系2による走査に従って赤外線
検知器3に入射させる。If the scanning efficiency of the optical system 2 is, for example, 80% and one field is 1/60 s, the effective scanning period is (1/60) × 0.8 = 13.33 [ms], and the invalid scanning period is , (1/60) × 0.2 = 3.33 [ms]
Becomes In this invalid scanning period, infrared rays from the reference heat sources 10 and 11 at normal temperature and high temperature are made incident on the infrared detector 3, and in the effective scanning period, infrared rays from the direction of the target via the optical system 1 are emitted. The light enters the infrared detector 3 according to the scanning by the optical system 2.
【0018】又信号処理回路6は、DSP21,22
と、メモリ23〜28とを含み、DSP21は、データ
取込み、素子判定、置換アドレス生成及び更新、感度補
正係数算出、感度補正等の処理を行い、DSP22は、
感度補正を行う場合の構成を示す。又メモリ(RAM
1)23は、感度補正係数及び素子判定データの格納用
であり、メモリ(RAM2)24は感度補正係数格納
用、メモリ(RAM3)25及びメモリ(RAM4)2
6は置換アドレス格納用である。又メモリ(ROM1)
27及びメモリ(ROM2)28は、それぞれDSP2
1,DSP22のファーム格納用である。The signal processing circuit 6 includes DSPs 21 and 22.
And memories 23 to 28. The DSP 21 performs processes such as data acquisition, element determination, replacement address generation and updating, sensitivity correction coefficient calculation, and sensitivity correction.
The configuration for performing sensitivity correction will be described. Also memory (RAM
1) 23 is for storing a sensitivity correction coefficient and element determination data, and a memory (RAM2) 24 is for storing a sensitivity correction coefficient, a memory (RAM3) 25 and a memory (RAM4) 2
Reference numeral 6 is for storing a replacement address. Also memory (ROM1)
27 and the memory (ROM 2) 28
1, for storing the firmware of the DSP 22.
【0019】又走査変換回路7は、信号処理回路6に於
いて補正処理された赤外線検知器3の検出出力信号を、
モニタに表示する為の例えばNTSC方式に従った走査
方式に変換し、又メモリ25,26に格納された置換ア
ドレスに従って欠陥素子の置換処理、即ち、欠陥素子の
検出信号を正常素子の検出信号に置換えて出力するもの
である。The scan conversion circuit 7 outputs the detection output signal of the infrared detector 3 which has been corrected by the signal processing circuit 6,
It is converted into a scanning method in accordance with, for example, the NTSC system for displaying on a monitor, and the defective element is replaced in accordance with the replacement address stored in the memories 25 and 26, that is, the defective element detection signal is converted into a normal element detection signal. This is replaced and output.
【0020】又基準熱源制御回路12は、基準熱源1
0,11の温度を、AD変換器5によりディジタル信号
に変換された赤外線検知器3からのデータを基に、一定
に制御するものであり、更に、電源立上げ時/置換指令
時に、シーン(赤外線画像)の温度の平均値をA°Cと
すると、例えば、温度1として、基準熱源10の温度を
A〔°C〕、基準熱源11の温度をA+α〔°C〕と
し、温度2として、基準熱源10の温度をA±ΔT
1 〔°C〕、基準熱源11の温度をA+α±ΔT2 に制
御する。例えば、α=10、ΔT1 =−10、ΔT2 =
+20とすることができる。このような切替えのタイミ
ングは、制御回路13から指示される。Further, the reference heat source control circuit 12
The temperature of 0, 11 is controlled to be constant based on the data from the infrared detector 3 which is converted into a digital signal by the AD converter 5. Assuming that the average value of the temperatures of the infrared image) is A ° C., for example, as temperature 1, the temperature of the reference heat source 10 is A [° C.], the temperature of the reference heat source 11 is A + α [° C.], and the temperature 2 is The temperature of the reference heat source 10 is A ± ΔT
At 1 ° C., the temperature of the reference heat source 11 is controlled to A + α ± ΔT 2 . For example, α = 10, ΔT 1 = −10, ΔT 2 =
+20. The timing of such switching is instructed by the control circuit 13.
【0021】又赤外線撮像装置の電源を投入して動作を
開始させる電源立上げ時又は欠陥素子の置換の指令が制
御回路13に入力された時の電源立上げ時/置換指令時
のモードと、赤外線画像を撮像処理する通常動作時のモ
ードとに切替え、電源立上げ時/置換指令時のモードで
は、赤外線画像処理を中止し、素子の良否の判定等を行
い、又通常動作時のモードでは、素子の良否の判定,欠
陥素子の置換処理,感度補正処理等と共に、赤外線画像
処理を行うものである。A power-on / replacement mode when the infrared imaging device is powered on to start operation and when a command to replace a defective element is input to the control circuit 13; The mode is switched to the normal operation mode for imaging processing of an infrared image. In the mode at power-on / replacement command, the infrared image processing is stopped, the quality of the element is determined, and the like. In addition, the infrared image processing is performed together with the determination of the quality of the element, the replacement processing of the defective element, the sensitivity correction processing, and the like.
【0022】図2及び図3は電源立上げ時/置換指令時
の機能説明図であり、赤外線検知器3が180素子によ
る一次元配列の場合の信号処理回路6の機能を示す。な
お、素子判定として、電源立上げ時/置換指令時及び通
常動作時に、リニアリティ(1)を用いた場合(第1の
リニアリティ判定)の第1の実施の形態について説明す
る。FIG. 2 and FIG. 3 are explanatory diagrams of functions at the time of power-on / replacement command, and show the functions of the signal processing circuit 6 when the infrared detector 3 has a one-dimensional array of 180 elements. The first embodiment in which the linearity (1) is used (first linearity determination) at the time of power-on / replacement command and during normal operation will be described as the element determination.
【0023】即ち、電源立上げ時/置換指令時のモード
に於いて、常温の基準熱源10の温度をシーンの平均値
Aとし、高温の基準熱源11の温度をA+α=B〔°
C〕として、無効走査期間に取込んだ基準熱源10によ
る常温データと基準熱源11による高温データとを基
に、従来例と同様にS/N,DCオフセット判定により
素子判定を行い、欠陥素子については置換アドレスの生
成,更新を行い、再度、常温データと高温データとの取
込みを行い、感度補正係数を算出後、基準熱源10の温
度をA±ΔT1 =C〔°C〕に、基準熱源11の温度を
B±ΔT2 =D〔°C〕にそれぞれ変更し、感度補正を
行ってデータ取込みを行い、全素子の平均値を算出し、
素子毎に全素子平均値との差分を求める第1のリニアリ
ティ判定を行い、この差分が閾値を超える大きさの場合
に欠陥素子と判定して、置換アドレスの生成,更新を行
う。そして、基準熱源10の温度をA〔°C〕、基準熱
源11の温度をB〔°C〕に変更し、通常動作時のモー
ドに移行して、赤外線画像処理を行うと共に、S/N,
DCオフセット,リニアリティ判定の何れ一つ或いは複
数の判定処理によって、置換アドレスの生成,更新を行
い、フィールド間隔のリアルタイムで欠陥素子の置換え
を行うものである。That is, in the power-on mode / replacement command mode, the temperature of the reference heat source 10 at room temperature is set to the average value A of the scene, and the temperature of the reference heat source 11 at high temperature is A + α = B [°
C], based on the room temperature data from the reference heat source 10 and the high temperature data from the reference heat source 11 taken in the invalid scanning period, perform element determination by S / N and DC offset determination in the same manner as in the conventional example, and determine defective elements. Generates and updates the replacement address, takes in the normal temperature data and the high temperature data again, calculates the sensitivity correction coefficient, and then sets the temperature of the reference heat source 10 to A ± ΔT 1 = C [° C.] The temperature of No. 11 was changed to B ± ΔT 2 = D [° C.], sensitivity was corrected, data was acquired, and the average value of all elements was calculated.
A first linearity determination for obtaining a difference from the average value of all the elements is performed for each element. When the difference exceeds a threshold value, the element is determined to be a defective element, and a replacement address is generated and updated. Then, the temperature of the reference heat source 10 is changed to A [° C.], the temperature of the reference heat source 11 is changed to B [° C.], the mode is shifted to the normal operation mode, infrared image processing is performed, and S / N,
The replacement address is generated and updated by one or more of the DC offset and linearity determination processing, and the defective element is replaced in real time at the field interval.
【0024】図2に於いて、30は取込み(高温)部、
31,35は加算器、32,35,37はメモリ(RA
M1)、32,36は除算器、40は取込み(常温)・
感度補正係数算出部41,45は加算器、42,44,
47はメモリ(RAM1)、43,46は除算器を示
し、それぞれ赤外線検知器3の第1素子対応の機能を示
し、第2素子〜第180素子対応に同様の機能を有する
ものである。In FIG. 2, reference numeral 30 denotes an intake (high-temperature) portion;
31 and 35 are adders, and 32, 35 and 37 are memories (RA
M1), 32 and 36 are dividers, 40 is a load (normal temperature)
The sensitivity correction coefficient calculation units 41 and 45 include adders, 42, 44,
47 is a memory (RAM1), 43 and 46 are dividers, each of which has a function corresponding to the first element of the infrared detector 3, and has the same function as the second element to the 180th element.
【0025】又図3に於いて、50は高温リニアリティ
判定部、51,54は加算器、52は除算器、53はB
レジスタ、55は絶対値算出回路、56,58はメモリ
(RAM1)、57は比較器、60は常温リニアリティ
判定部、61,64は加算器、62は除算器、63はB
レジスタ、65は絶対値算出回路、66,68はメモリ
(RAM1)、70はリニアリティ(1)判定部、71
はオア回路(OR)、72はメモリ(RAM1)、80
は置換アドレス生成・更新部、81は置換アドレス生成
部、82,83はメモリ(RAM3,RAM4)、8
4,85は切替部を示す。In FIG. 3, reference numeral 50 denotes a high-temperature linearity determination unit, 51 and 54 are adders, 52 is a divider, and 53 is B
A register, 55 is an absolute value calculation circuit, 56 and 58 are memories (RAM1), 57 is a comparator, 60 is a normal temperature linearity determination unit, 61 and 64 are adders, 62 is a divider, and 63 is B
Register, 65 is an absolute value calculation circuit, 66 and 68 are memories (RAM1), 70 is a linearity (1) determination unit, 71
Is an OR circuit (OR), 72 is a memory (RAM1), 80
Is a replacement address generation / update section, 81 is a replacement address generation section, 82 and 83 are memories (RAM3, RAM4), 8
Reference numerals 4 and 85 denote switching units.
【0026】取込み(常温)・感度補正係数算出部40
は、無効走査期間に、常温の基準熱源10からの赤外線
を検出してAD変換した常温データを取込み、又取込み
(高温)部30は、無効走査期間に、高温の基準熱源1
1からの赤外線を検出してAD変換した高温データを取
り込むもので、例えば、32ライン分について16フィ
ールドにわたって取り込む。例えは、赤外線検知器を1
80素子の一元配列構成とすると、180×32×16
=92160のデータを取込むことになる。Capture (normal temperature) / sensitivity correction coefficient calculator 40
During the invalid scanning period, the normal temperature data obtained by detecting the infrared ray from the normal temperature reference heat source 10 and performing A / D conversion is fetched.
High-temperature data obtained by detecting the infrared rays from 1 and AD-converted is taken in. For example, the data is taken in 16 fields for 32 lines. For example, one infrared detector
Assuming a unitary array configuration of 80 elements, 180 × 32 × 16
= 92160 data.
【0027】そして、加算器31,41とメモリ32,
42とを用いて、それぞれ1〜16フィールド毎に、3
2ライン分についての累算値を求め、除算器33,43
により1/32してライン平均値を算出し、メモリ3
4,44に格納し、加算器35,45により16フィー
ルド分の平均値を加算し、除算器36,46により1/
16の除算を行ってフィールド平均値、即ち、高温平均
値と常温平均値とを算出し、メモリ37,47にその高
温平均値と常温平均値とを格納する。なお、赤外線検知
器3を構成する第1素子〜第180素子対応に、メモリ
37には高温平均値、メモリ47には常温平均値をそれ
ぞれ格納する。The adders 31, 41 and the memories 32,
42 and 3 for every 1 to 16 fields, respectively.
The accumulated values for the two lines are obtained, and divided by 33 and 43.
Is calculated by 1/32 to calculate the line average value.
4 and 44, add the average value of 16 fields by adders 35 and 45, and 1/1 by dividers 36 and 46.
The field average value, that is, the high temperature average value and the normal temperature average value are calculated by dividing by 16, and the high temperature average value and the normal temperature average value are stored in the memories 37 and 47. The high-temperature average value is stored in the memory 37 and the normal-temperature average value is stored in the memory 47 for each of the first to 180th elements constituting the infrared detector 3.
【0028】高温リニアリティ判定部50は、メモリ3
7の第1素子〜第180素子対応の高温平均値を加算器
51により加算し、除算器52により1/180の除算
を行って第1素子〜第180素子の高温平均値をBレジ
スタ53に格納し、この全素子についての高温平均値
と、各素子対応のメモリ37に格納された高温平均値と
の差分を加算器54に於いて求め、絶対値算出回路55
で正負の差分値の絶対値を求めてメモリ56に高温リニ
ア値として格納する。比較器57は、この高温リニア値
と閾値とを比較し、閾値を超える素子は欠陥素子
(“1”)と判定し、閾値以内の場合は正常素子
(“0”)と判定してメモリ58に格納する。The high-temperature linearity determining unit 50
7 is added by the adder 51 to the high temperature average value corresponding to the first element to the 180th element, and the divider 52 divides by 1/180, and the high temperature average value of the first element to the 180th element is stored in the B register 53. The difference between the high-temperature average value for all the elements and the high-temperature average value stored in the memory 37 corresponding to each element is obtained in an adder 54, and an absolute value calculation circuit 55
The absolute value of the positive / negative difference value is obtained and stored in the memory 56 as a high temperature linear value. The comparator 57 compares the high-temperature linear value with the threshold value, determines that the element exceeding the threshold value is a defective element (“1”), and determines that the element exceeds the threshold value as a normal element (“0”). To be stored.
【0029】又常温リニアリティ判定部60は、高温リ
ニアリティ判定部50と同様に、加算器51と除算器6
2とにより全素子についての常温平均値を求めてBレジ
スタ63に格納し、この全素子平均値と各素子の平均値
との差分を求め、その絶対値について比較器67に於い
て閾値と比較し、その閾値を超える素子は欠陥素子
(“1”)と判定し、又閾値以内の場合は正常
(“0”)と判定してメモリ68に格納する。The normal temperature linearity determining unit 60 includes an adder 51 and a divider 6 similarly to the high temperature linearity determining unit 50.
2, the average value of the room temperature of all the elements is calculated and stored in the B register 63, the difference between the average value of all the elements and the average value of each element is calculated, and the absolute value is compared with the threshold value in the comparator 67. An element exceeding the threshold value is determined as a defective element (“1”), and an element exceeding the threshold value is determined as normal (“0”) and stored in the memory 68.
【0030】リニアリティ(1)判定部70は、メモリ
58,68の格納された判定値をオア回路71を介して
メモリ72に素子対応の判定値として格納する。即ち、
高温リニアリティ判定と常温リニアリティ判定との何れ
か一方又は両方で欠陥素子(“1”)と判定した素子
は、欠陥素子として、メモリ72に格納される。即ち、
決定結果の論理和をメモリ72に格納することになる。
従って、赤外線検知器3の各素子のリニアリティ特性が
平均から大きくずれている場合、欠陥素子と判定して正
常素子による置換が行われる。The linearity (1) judgment unit 70 stores the judgment values stored in the memories 58 and 68 in the memory 72 via the OR circuit 71 as the judgment values corresponding to the elements. That is,
An element determined as a defective element (“1”) in one or both of the high-temperature linearity determination and the normal-temperature linearity determination is stored in the memory 72 as a defective element. That is,
The logical sum of the determination result is stored in the memory 72.
Therefore, when the linearity characteristic of each element of the infrared detector 3 is largely deviated from the average, it is determined that the element is defective, and the element is replaced with a normal element.
【0031】又置換アドレス生成・更新部80は、置換
アドレス生成部81に於いてメモリ72に格納された素
子判定値(正常=“0”,欠陥=“1”)を基に、正常
素子は置換無し、欠陥素子は例えば隣接した次の素子に
置換える。例えば、第1素子が欠陥素子の場合、この第
1素子の検出信号を、この第1素子に隣接した正常な第
2素子の検出信号に置換える。従って、第2素子による
1画素対応の検出信号は2画素対応の検出信号として処
理される。この置換を示すアドレスを生成して、メモリ
82,83の何れかに格納する。このメモリ(RAM
3,RAM4)82,83は二面構成の場合を示し、例
えば、フィールド毎に、一方を更新している時に、他方
から読出しを行う制御を行うことになる。The replacement address generating / updating unit 80 determines the normal element based on the element determination values (normal = “0”, defect = “1”) stored in the memory 72 in the replacement address generating unit 81. Without replacement, the defective element is replaced with, for example, the next adjacent element. For example, when the first element is a defective element, the detection signal of the first element is replaced with a detection signal of a normal second element adjacent to the first element. Therefore, the detection signal corresponding to one pixel by the second element is processed as a detection signal corresponding to two pixels. An address indicating this replacement is generated and stored in one of the memories 82 and 83. This memory (RAM
3, RAM 4) 82, 83 show a two-sided configuration, and for example, for one field, when one is updated, control to read from the other is performed.
【0032】通常動作は、有効走査期間の赤外線検知器
3の検出出力信号について、1フィールド間隔でリアル
タイムに感度補正,置換アドレス生成・更新を行うもの
である。図3,図4及び図5は通常動作時の機能説明図
であり、基準熱源10,11を、例えば、前述の温度1
に固定する。図4は、取込み(高温)部30と高温リニ
アリティ判定部50との機能を示し、図2及び図3と同
一符号は同一部分を示す。取込み(高温)部30は、無
効走査期間に於ける32ライン分について16フィール
ドにわたって、第1素子〜第180素子の全素子につい
ての高温平均値を求め、高温リニアリティ判定部50
は、この高温平均値と各素子対応の高温平均値との差分
が閾値を超えるか否かを比較器57により判定し、閾値
を超えた素子は、欠陥素子(“1”)と判定してメモリ
(RAM1)58に格納する。In the normal operation, the detection output signal of the infrared detector 3 during the effective scanning period is subjected to real-time sensitivity correction and replacement address generation / update at one-field intervals. FIGS. 3, 4 and 5 are explanatory diagrams of functions during normal operation, in which the reference heat sources 10 and 11 are set to, for example, the aforementioned temperature 1
Fixed to. FIG. 4 shows the functions of the capturing (high-temperature) unit 30 and the high-temperature linearity determination unit 50, and the same reference numerals as those in FIGS. 2 and 3 denote the same parts. The capture (high-temperature) unit 30 obtains a high-temperature average value for all of the first to 180th elements over 16 fields for 32 lines in the invalid scanning period, and obtains a high-temperature linearity determination unit 50.
The comparator 57 determines whether the difference between the high-temperature average value and the high-temperature average value corresponding to each element exceeds a threshold value, and determines that the element exceeding the threshold value is a defective element (“1”). It is stored in the memory (RAM1) 58.
【0033】又図5は、取込み(常温)・感度補正係数
算出部40と常温リニアリティ判定部60との機能を示
し、図2及び図3と同一符号は同一部分を示す。取込み
(常温)・感度補正係数算出部40は、無効走査期間に
於ける32ライン分について16フィールドにわたっ
て、赤外線検知器の第1素子〜第180素子の全素子に
ついての常温平均値を求め、常温リニアリティ判定部6
0は、この常温平均値と各素子対応の常温平均値との差
分が閾値を超えているか否かを比較器67により判定
し、閾値を超えた素子は、欠陥素子(“1”)と判定し
てメモリ(RAM1)68に格納する。FIG. 5 shows the functions of the acquisition (normal temperature) / sensitivity correction coefficient calculating section 40 and the normal temperature linearity determining section 60, and the same reference numerals as those in FIGS. 2 and 3 indicate the same parts. The acquisition (normal temperature) / sensitivity correction coefficient calculation unit 40 calculates the normal temperature average value of all of the first to 180th elements of the infrared detector over 16 fields for 32 lines in the invalid scanning period, Linearity judgment unit 6
0 indicates that the comparator 67 determines whether or not the difference between the room temperature average value and the room temperature average value corresponding to each element exceeds a threshold value. The element exceeding the threshold value is determined as a defective element (“1”). And store it in the memory (RAM1) 68.
【0034】又図6は、リニアリティ判定部70と、置
換アドレス生成・更新部80と、感度補正部90と、感
度補正係数算出部100との機能を示し、リニアリティ
判定部70は、高温リニアリティ判定部50からの素子
判定値と、常温リニアリティ判定部60からの素子判定
値とをオア回路71を介してメモリ72に素子判定値と
して格納する。FIG. 6 shows the functions of a linearity determination section 70, a replacement address generation / update section 80, a sensitivity correction section 90, and a sensitivity correction coefficient calculation section 100. The element determination value from the unit 50 and the element determination value from the normal temperature linearity determination unit 60 are stored as element determination values in the memory 72 via the OR circuit 71.
【0035】置換アドレス生成・更新部80は、置換ア
ドレス生成部81と、メモリ82,83,86,87
と、切替部84,85と、オア回路88(OR)とを含
み、電源立上げ時に求めた素子判定値をメモリ86に格
納する。又メモリ87は、メモリ86に格納された素子
判定値と、リニアリティ判定部70のメモリ72に格納
された素子判定値との論理和の素子判定値を格納する。
即ち、電源立上げ時に求めた素子判定値に、通常動作時
に得られた素子判定値を加えることになり、置換アドレ
ス生成部81は、メモリ87に格納された欠陥素子
(“1”)を示す素子判定値に従って置換アドレスを生
成し、フィールド毎に切替部84,85の切替制御を行
って、メモリ82,83の何れかに格納する。The replacement address generating / updating unit 80 includes a replacement address generating unit 81 and memories 82, 83, 86, 87.
, Switching units 84 and 85, and an OR circuit 88 (OR), and stores the element determination value obtained at power-on in the memory 86. The memory 87 stores an element determination value of a logical sum of the element determination value stored in the memory 86 and the element determination value stored in the memory 72 of the linearity determination unit 70.
That is, the element determination value obtained during normal operation is added to the element determination value obtained at power-on, and the replacement address generation unit 81 indicates the defective element ("1") stored in the memory 87. A replacement address is generated according to the element determination value, and switching control of the switching units 84 and 85 is performed for each field, and stored in one of the memories 82 and 83.
【0036】感度補正部90は、加算器91と、乗算器
92とを含み、又感度補正係数算出部100は、加算器
101と除算器102とメモリ(RAM1)103とを
含む機能を有し、メモリ37(図4参照)からの高温平
均値と、メモリ47(図5参照)からの常温平均値との
差を加算器101により求め、除算器102により逆数
を求め、感度補正係数としてメモリ103に格納する。The sensitivity correction section 90 includes an adder 91 and a multiplier 92, and the sensitivity correction coefficient calculation section 100 has a function including an adder 101, a divider 102, and a memory (RAM1) 103. , The difference between the high-temperature average value from the memory 37 (see FIG. 4) and the normal temperature average value from the memory 47 (see FIG. 5) is obtained by the adder 101, the reciprocal is obtained by the divider 102, and the memory is used as a sensitivity correction coefficient. 103.
【0037】感度補正部90は、加算器91に於いて、
有効走査期間に得られた画像データから常温平均値を減
算し、乗算器92に於いて、メモリ103からの感度補
正係数を乗算し、走査変換回路7に画像データとして入
力し、置換アドレス生成・更新部80からの置換アドレ
スに従って、欠陥素子をそれに隣接する正常な素子に置
換えた状態の画像データとし、DA変換器8によりアナ
ログ信号に変換してモニタ9に加えて赤外線画像を表示
させる。従って、温度分布等を正確に表す赤外線画像を
表示できる。前述の図2〜図6に示す機能は、電源立上
げ時/置換指令時と通常動作時とに於いて、第1のリニ
アリティ判定により欠陥素子か否かを判定し、欠陥素子
の置換処理を行う場合を示す。In the adder 91, the sensitivity correction unit 90
The normal temperature average value is subtracted from the image data obtained during the effective scanning period, multiplied by the sensitivity correction coefficient from the memory 103 in the multiplier 92, and input to the scan conversion circuit 7 as image data to generate a replacement address. In accordance with the replacement address from the updating unit 80, the defective element is replaced with a normal element adjacent to the defective element and converted into an analog signal by the DA converter 8, which is added to the monitor 9 to display an infrared image. Therefore, an infrared image accurately representing a temperature distribution or the like can be displayed. The functions shown in FIGS. 2 to 6 determine whether or not a defective element is present by the first linearity determination at the time of power-on / replacement command and during normal operation. Here is an example of the case.
【0038】図7及び図8は動作シーケンス説明図であ
り、電源立上げ時又は置換指令時のフィールドと、光学
系動作と、動作シーケンスと、DSP1,DSP2(図
1に於けるDSP21,22)の動作とを示す。フィー
ルドNに於ける光学系動作の走査期間中の無効期間(以
下、無効走査期間及び有効走査期間を、簡略化して無効
期間及び有効期間と表現する)では、DSP1によりデ
ータを取込み、前述のように、常温の基準熱源10は、
シーンの平均値をAとして、L=A〔°C〕に設定し、
高温の基準熱源11は、α=10として、H=A+10
〔°C〕に設定する。この場合の取込みデータ数は、各
フィールドに於いて、高温データ及び常温データは、1
80(素子)×32(ライン)=5760となる。FIGS. 7 and 8 are explanatory diagrams of the operation sequence. The fields at the time of power-on or replacement command, the operation of the optical system, the operation sequence, DSP1, DSP2 (DSP21, 22 in FIG. 1) Operation. In the invalid period during the scanning period of the operation of the optical system in the field N (hereinafter, the invalid scanning period and the effective scanning period are simply referred to as the invalid period and the valid period), the data is fetched by the DSP 1 and the data is acquired as described above. In addition, the normal temperature reference heat source 10
Assuming that the average value of the scene is A, L = A [° C.]
The high-temperature reference heat source 11 is H = A + 10, where α = 10.
Set to [° C]. In this case, the number of acquired data is as follows: high-temperature data and normal-temperature data are 1 in each field.
80 (elements) × 32 (lines) = 5760.
【0039】そして、フィールドN+15に於いて、1
6フィールド間で取り込んだ高温データと低温データと
について、全素子に対する平均値を求めて、この平均値
との差分により素子判定,置換アドレス生成更新,欠陥
素子の置換を行う。次のフィールドN+16〜N+31
に於いては、フィールドN〜N+15と同様に、高温デ
ータ及び常温データを取込み、平均値を求めることによ
り、各素子対応の感度補正係数を算出する。そして、熱
源温度変更を行う。例えば、高温の基準熱源11は、Δ
T2 =+20として、H=A+20〔°C〕、常温の基
準熱源10は、ΔT1 =−10として、L=A−10
〔°C〕に設定する。この熱源温度変更に要するフィー
ルドをaとする。Then, in field N + 15, 1
With respect to the high-temperature data and the low-temperature data taken in the six fields, an average value is obtained for all the elements, and element determination, replacement address generation and update, and replacement of defective elements are performed based on a difference from the average value. Next field N + 16 to N + 31
In this case, similarly to the fields N to N + 15, high-temperature data and normal-temperature data are taken in, and an average value is obtained, thereby calculating a sensitivity correction coefficient corresponding to each element. Then, the heat source temperature is changed. For example, the high-temperature reference heat source 11
Assuming that T 2 = + 20, H = A + 20 [° C.], the standard heat source 10 at normal temperature is ΔT 1 = −10, and L = A−10.
Set to [° C]. The field required for this heat source temperature change is a.
【0040】従って、次のフィールドN+32+a〜N
+48+aに於いて、DSP2により感度補正処理を行
い、又DSP1により感度補正されたデータを基に、リ
ニアリティ特性による素子判定、欠陥素子についての置
換アドレスの生成,更新を行い、次に熱源温度変更を行
う。即ち、最初のように、常温の基準熱源10は、シー
ンの平均値をAとして、L=A〔°C〕に設定し、高温
の基準熱源11は、H=A+10〔°C〕に設定する。
そして、撮像画像信号を処理する通常動作に移行する。Therefore, the next field N + 32 + a to N
At + 48 + a, the sensitivity correction processing is performed by the DSP2, and based on the data corrected for the sensitivity by the DSP1, the element is determined based on the linearity characteristic, and the replacement address of the defective element is generated and updated, and then the heat source temperature is changed. Do. That is, as in the first case, the normal-temperature reference heat source 10 is set to L = A [° C.], where A is the average value of the scene, and the high-temperature reference heat source 11 is set to H = A + 10 [° C.]. .
Then, the process proceeds to the normal operation of processing the captured image signal.
【0041】図9は通常動作に移行した後の動作シーケ
ンスを示し、フィールドN〜N+3の場合のみを示す
が、それ以降のフィールドに於いても同様な動作を行う
ものである。又フィールドN+2,N+3について、前
のフィールドN,N+1と同一の処理内容の説明の図示
を省略している。通常動作時は、有効期間に於いて画像
データを処理すると共に、無効期間に於いて高温データ
と常温データとをDSP1により取込み、リニアリティ
特性(第1のリニアリティ判定)による素子判定,置換
アドレス生成更新,感度補正係数算出,感度補正処理を
行う。感度補正処理はDSP2が担当する。FIG. 9 shows an operation sequence after shifting to the normal operation, and shows only the case of the fields N to N + 3, but the same operation is performed in the subsequent fields. In the fields N + 2 and N + 3, the description of the same processing contents as those in the previous fields N and N + 1 is omitted. During normal operation, image data is processed during the valid period, high-temperature data and normal-temperature data are fetched by the DSP 1 during the invalid period, and element determination based on linearity characteristics (first linearity determination) and replacement address generation / update are performed. , Sensitivity correction coefficient calculation and sensitivity correction processing. The DSP 2 is in charge of the sensitivity correction processing.
【0042】前述のように、A〔°C〕とした常温の基
準熱源10とA+10〔°C〕とした高温の基準熱源1
1とに対応する常温データと高温データとを取込んで、
S/NとDCオフセットとの判定により、素子の正常/
欠陥の判定を行い、次に、常温データと高温データとを
取込んで、感度補正係数を算出し、その後、基準熱源1
0の温度をA−10〔°C〕、基準熱源11の温度をA
+20〔°C〕に変更し、感度補正を行ったデータにつ
いて、全素子の平均値を算出し、素子毎に全素子平均値
との差を求め、予め設定した閾値と比較して、閾値を超
える値の素子をリニアリティ判定による欠陥素子とし、
S/N,DCオフセットの判定に於ける欠陥素子との論
理和による欠陥素子について置換処理を行うものであ
る。As described above, the normal temperature reference heat source 10 at A [° C.] and the high temperature reference heat source 1 at A + 10 [° C.]
By taking the normal temperature data and high temperature data corresponding to 1
By judging the S / N and the DC offset, whether the element is normal /
Defects are determined, and then normal temperature data and high temperature data are taken in to calculate a sensitivity correction coefficient.
0 is A-10 [° C], and the temperature of the reference heat source 11 is A
+20 [° C], and for the data subjected to the sensitivity correction, calculate the average value of all the elements, find the difference from the average value of all the elements for each element, compare the average value with the preset threshold value, and set the threshold value. An element with a value exceeding the value is determined as a defective element by the linearity judgment,
The replacement process is performed on a defective element based on a logical sum with the defective element in the determination of the S / N and DC offset.
【0043】図10,図11はDSPの動作フローチャ
ートを示し、図7,図8に於けるフィールドN〜N+4
8+aについて、図1に示すDSP(DSP1)21
と、DSP(DSP2)22との動作を示す。即ち、D
SP1,DSP2の初期値設定を行い、DSP1は無効
期間に於ける高温データと低温データとのデータ取込み
を行い、フィールドN+15では、フィールドN〜N+
15間に於いて取得したデータを基に、従来例と同様な
S/N,DCオフセットについての素子判定を行い、欠
陥素子についての置換アドレスを生成し、メモリ(RA
M3)25に格納する。FIGS. 10 and 11 are flowcharts showing the operation of the DSP. The fields N to N + 4 in FIGS.
For 8 + a, the DSP (DSP1) 21 shown in FIG.
And the operation with the DSP (DSP2) 22. That is, D
Initial values of SP1 and DSP2 are set. DSP1 fetches high-temperature data and low-temperature data during the invalid period. In field N + 15, fields N to N +
Based on the data acquired during the period 15, the element determination regarding the S / N and DC offset is performed in the same manner as in the conventional example, a replacement address for the defective element is generated, and the memory (RA
M3) Stored in 25.
【0044】次のフィールドN+16〜N+31間に取
得したデータを基に、フィールドN+31に於いて感度
補正係数を算出する。そして、熱源温度変更を行う。即
ち、基準熱源10をA〔°C〕からC〔°C〕に変更
し、基準熱源11をB〔°C〕からD〔°C〕に変更す
る。この基準熱源の温度変更に要するフィールドをaと
する。A sensitivity correction coefficient is calculated in the field N + 31 based on the data obtained in the next field N + 16 to N + 31. Then, the heat source temperature is changed. That is, the reference heat source 10 is changed from A [° C] to C [° C], and the reference heat source 11 is changed from B [° C] to D [° C]. A field required for changing the temperature of the reference heat source is defined as a.
【0045】そして、フィールドN+32+aでは、D
SP2は、フィールドN+32+a〜N+37+aに於
いて、それぞれ前のフィールドN+31に於いて算出さ
れた感度補正係数を用いて感度補正処理を行う。又DS
P1は、フィールドN+32+a〜N+48+aに於い
て取込んだ高温データと常温データとを基にリニアリテ
ィ判定を行い、欠陥素子についての置換アドレスを生成
し、メモリ(RAM3)25に格納する。そして、熱源
温度変更を行う。この熱源温度変更は、常温の基準熱源
10と高温の基準熱源11との温度を、それぞれ最初の
A〔°C〕とB〔°C〕とに戻すものである。In the field N + 32 + a, D
SP2 performs a sensitivity correction process in the fields N + 32 + a to N + 37 + a using the sensitivity correction coefficients calculated in the previous field N + 31. Also DS
P1 performs a linearity determination based on the high-temperature data and the normal-temperature data taken in the fields N + 32 + a to N + 48 + a, generates a replacement address for the defective element, and stores it in the memory (RAM3) 25. Then, the heat source temperature is changed. This heat source temperature change is to return the temperatures of the normal temperature reference heat source 10 and the high temperature reference heat source 11 to the initial values of A [° C] and B [° C], respectively.
【0046】図12,図13はDSPの動作フローチャ
ートであり、フィールドN,N+1,N+2に於けるD
SP1,DSP2の詳細な処理を示す。即ち、初期値設
定後、フィールドNに於いては、DSP2は、前フィー
ルドN−1に於いて算出された感度補正係数を用いて感
度補正処理を行い、DSP1は、無効期間に高温データ
と常温データとのデータ取込みを行い、有効期間に、こ
のフィールドNに於いて取得した32ライン分のデータ
と、過去の16フィールドに於ける32ライン分のデー
タとを用いて、感度補正係数を算出し、素子判定を行
い、欠陥素子に対する置換アドレスを生成する。FIGS. 12 and 13 are flow charts showing the operation of the DSP. The D in the fields N, N + 1 and N + 2 are shown in FIGS.
The detailed processing of SP1 and DSP2 will be described. That is, after the initial value is set, in the field N, the DSP 2 performs the sensitivity correction process using the sensitivity correction coefficient calculated in the previous field N-1, and the DSP 1 performs the high temperature data and the normal temperature Data is taken in, and during the valid period, a sensitivity correction coefficient is calculated using the data for 32 lines acquired in this field N and the data for 32 lines in the past 16 fields. , And a replacement address for the defective element is generated.
【0047】次のフィールドN+1,N+2に於いて
も、無効期間に於いて、DSP1は、高温データと常温
データとの取込みを行い、有効期間に於いて、DSP1
は、感度補正係数算出と、素子判定と、置換アドレス生
成・更新を行う。又DSP2は、前のフィールドN,N
+2に於いて算出された感度補正係数を用いて感度補正
処理を行う。In the next fields N + 1 and N + 2, the DSP 1 fetches high-temperature data and normal-temperature data during the invalid period.
Performs sensitivity correction coefficient calculation, element determination, and replacement address generation / update. Also, the DSP 2 determines that the previous fields N, N
The sensitivity correction processing is performed using the sensitivity correction coefficient calculated at +2.
【0048】図14はデータ取込みのフローチャートで
あり、赤外線検知器を180素子の一次元配列構成とし
た場合について示し、基準熱源11による高温データと
基準熱源10による常温データとの取込み時のDSP1
の処理フローを示す。又赤外線画像の1画面は、例え
ば、図15に示すように、180×480(画素)構成
となる。即ち、180素子の一次元配列構成の赤外線検
知器を矢印の走査方向に走査して、480ラインで1画
面を構成した場合を示す。FIG. 14 is a flow chart of data acquisition, showing a case where the infrared detector has a one-dimensional array configuration of 180 elements. The DSP 1 at the time of acquiring high-temperature data by the reference heat source 11 and normal-temperature data by the reference heat source 10 is shown.
3 shows a processing flow. In addition, one screen of the infrared image has, for example, a 180 × 480 (pixel) configuration as shown in FIG. That is, a case is shown in which one screen is constituted by 480 lines by scanning an infrared detector having a one-dimensional arrangement of 180 elements in the scanning direction indicated by an arrow.
【0049】又図16はRAM1(図1のメモリ23)
の説明図であり、赤外線検知器3の180素子対応に1
7ビット構成のデータを格納する領域〜と、16フ
ィールド分の高温データを格納する領域H1〜H16
と、16フィールド分の常温データを格納する領域L1
〜L16とを形成した場合を示し、それぞれ図示のデー
タが格納されることになる。FIG. 16 shows the RAM 1 (the memory 23 in FIG. 1).
FIG. 3 is an explanatory diagram of the infrared detector 3, which corresponds to 180 elements of the infrared detector 3;
Area for storing 7-bit data and areas H1 to H16 for storing high-temperature data for 16 fields
And an area L1 for storing room temperature data for 16 fields
To L16 are formed, and the illustrated data are stored.
【0050】又DSP1,DSP2は、演算回路とA,
B,C,Dレジスタ等の複数のレジスタとを含む構成を
有するもので、DSP1は、図14に示すように、バス
ラインからAレジスタに高温データを書込み、このAレ
ジスタからメモリ23(RAM1)に転送して格納す
る。これを180素子について1ライン分行う。この場
合、DSPの1サイクルを40nsとすると、この処理
時間は、40(ns)×180(素子)×2(サイク
ル)=14400(ns)となる。DSP1 and DSP2 are arithmetic circuits and A,
The DSP 1 has a configuration including a plurality of registers such as B, C, and D registers. The DSP 1 writes high-temperature data from a bus line to an A register as shown in FIG. Transfer to and store. This is performed for one line for 180 elements. In this case, assuming that one cycle of the DSP is 40 ns, the processing time is 40 (ns) × 180 (elements) × 2 (cycles) = 14400 (ns).
【0051】又バスラインからAレジスタに高温データ
を書込み、メモリ23(RAM1)からBレジスタに書
込み、AレジスタのデータとBレジスタのデータとを加
算してAレジスタに格納する。これを31ライン分につ
いて行う。従って、処理時間は、40(ns)×180
(素子)×31(ライン)×4(サイクル)=8928
00(ns)となる。次にAレジスタのデータを1/3
2の除算を行ってAレジスタへ格納し、Aレジスタから
メモリ23(RAM1)のフィールド対応の領域H1〜
H16に格納する。この場合、14.4μsとなる。従
って、高温データのライン平均値算出処理時間は、92
1.6μsとなる。High-temperature data is written from the bus line to the A register, written from the memory 23 (RAM1) to the B register, and the A register data and the B register data are added and stored in the A register. This is performed for 31 lines. Therefore, the processing time is 40 (ns) × 180.
(Element) × 31 (line) × 4 (cycle) = 8928
00 (ns). Next, the data of the A register is reduced to 1/3
2 and store the result in the A register. From the A register, fields H1 to H1 corresponding to fields in the memory 23 (RAM1) are stored.
Store in H16. In this case, it is 14.4 μs. Therefore, the line average value calculation processing time of the high temperature data is 92
1.6 μs.
【0052】同様に、常温データについても、バスライ
ンからAレジスタに常温データを書込み、このAレジス
タからメモリ23(RAM1)に転送して格納する。な
お、(AレジスタからRAM1(領域(LB1〜LB3
2))への格納)は、後述の実施の形態に於いて通常動
作時のみ行う処理ステップを示す。これを180素子に
ついて1ライン分行い、又バスラインからAレジスタに
高温データを書込み、メモリ23(RAM1)からBレ
ジスタに書込む。この場合も、(AレジスタからRAM
1(領域(LB1〜LB32))への格納)は、後述の
実施の形態に於いて通常動作時のみ行う処理ステップを
示す。Similarly, for the room temperature data, the room temperature data is written from the bus line to the A register, and is transferred from the A register to the memory 23 (RAM1) and stored. Note that, from the (A register) to the RAM1 (area (LB1 to LB3
2)) indicates processing steps performed only during normal operation in the embodiment described later. This is performed for one line for 180 elements, high-temperature data is written to the A register from the bus line, and written to the B register from the memory 23 (RAM1). Also in this case, (A register to RAM
1 (storage in areas (LB1 to LB32)) indicates processing steps performed only during normal operation in the embodiment described later.
【0053】そして、AレジスタのデータとBレジスタ
のデータとを加算してAレジスタに書込み、これを31
ライン分について行う。次にAレジスタのデータを1/
32の除算を行ってAレジスタへ格納し、除算結果の常
温平均値をAレジスタからメモリ23(RAM1)のフ
ィールド対応の領域L1〜L16に格納する。Then, the data of the A register and the data of the B register are added and written into the A register, and this is
Perform for the line. Next, the data of the A register is
The result of the division is stored in the register A, and the room temperature average value of the result of the division is stored from the register A in the field corresponding areas L1 to L16 of the memory 23 (RAM1).
【0054】図17は感度補正係数算出のフローチャー
トであり、RAM1の領域H1〜H16から高温データ
の平均値をAレジスタに書込み、このAレジスタからR
AM1の領域(図16参照)へ格納する。そして、R
AM1の領域H1〜H16から高温データの平均値を読
出してAレジスタに書込み、又RAM1の領域L1〜L
16から常温データの平均値を読出してBレジスタに書
込み、AレジスタのデータとBレジスタのデータとを加
算してAレジスタに書込み、このAレジスタからRAM
1の領域へ加算結果を格納する。これを15フィール
ドにわたって行い、次にAレジスタのデータを1/16
の除算を行ってAレジスタに格納し、AレジスタからR
AM1の領域へ除算結果を格納する。それにより、高
温データのフィールド平均値が得られる。FIG. 17 is a flowchart for calculating the sensitivity correction coefficient. The average value of the high-temperature data is written to the A register from the areas H1 to H16 of the RAM 1, and the A register is
It is stored in the area of AM1 (see FIG. 16). And R
The average value of the high temperature data is read from the areas H1 to H16 of AM1 and written to the A register, and the average value of the high
The average value of the room temperature data is read from 16 and written to the B register, the data of the A register and the data of the B register are added and written to the A register, and the RAM is read from the A register.
The addition result is stored in the area of No. 1. This is performed over 15 fields, and then the data of the A register is
, And stores the result in the A register.
The division result is stored in the area of AM1. Thereby, a field average value of the high temperature data is obtained.
【0055】又常温データについても同様に処理して、
常温データのフィールド平均値を求め、RAM1の領域
へ格納する。そして、RAM1の領域から高温デー
タのフィールド平均値をAレジスタへ、RAM1の領域
から常温データのフィールド平均値をBレジスタへそ
れぞれ書込み、AレジスタとBレジスタとのデータの差
分の逆数を求めてAレジスタに書込み、このAレジスタ
からRAM1の領域へ算出結果を感度補正係数として
格納する。The same processing is performed for the normal temperature data.
The field average value of the room temperature data is obtained and stored in the area of the RAM 1. Then, the field average value of the high-temperature data is written into the A register from the area of the RAM 1 and the field average value of the normal temperature data is written into the B register from the area of the RAM 1, and the reciprocal of the data difference between the A register and the B register is obtained. The result is written into the register, and the calculation result is stored as a sensitivity correction coefficient from the A register to the area of the RAM 1.
【0056】図18は感度補正処理のフローチャートで
あり、RAM1の領域に格納された感度補正係数をA
レジスタへ書込み、このAレジスタからRAM2(図1
のメモリ24参照)の領域へ感度補正係数値として書
込む。このRAM2は、例えば、180素子対応の16
ビット構成の領域,を有するものである。そして、
RAM1の領域からAレジスタへフィールド平均値を
書込み、このAレジスタからRAM1の領域へオフセ
ット補正係数値として書込む。FIG. 18 is a flow chart of the sensitivity correction processing, in which the sensitivity correction coefficient stored in the area of the RAM 1 is represented by A
Write to the register, and from this A register to RAM2 (FIG. 1)
In the memory 24) as a sensitivity correction coefficient value. The RAM 2 has, for example, 16 elements corresponding to 180 elements.
And a bit configuration area. And
The field average value is written from the area of the RAM 1 to the A register, and is written from this A register to the area of the RAM 1 as an offset correction coefficient value.
【0057】次に、バスラインからAレジスタに画像デ
ータを書込み、RAM1の領域からBレジスタへ感度
補正係数値として書込み、RAM1の領域からCレジ
スタへオフセット補正係数値として書込み、Aレジスタ
のデータとCレジスタのデータとの差分にBレジスタの
データを乗算してAレジスタに格納し、Aレジスタから
感度補正したデータをバスラインに送出する。この感度
補正に要する時間は、例えば、10.40msとなる。Next, image data is written from the bus line to the A register, a sensitivity correction coefficient value is written from the area of the RAM 1 to the B register, and an offset correction coefficient value is written from the area of the RAM 1 to the C register. The difference from the data in the C register is multiplied by the data in the B register, stored in the A register, and the sensitivity-corrected data from the A register is sent out to the bus line. The time required for this sensitivity correction is, for example, 10.40 ms.
【0058】図19,図20,図21は素子判定のフロ
ーチャートであり、RAM1の領域H1〜H16から高
温データをAレジスタへ書込み、AレジスタからRAM
1の領域へ格納し、次に、15フィールド分につい
て、RAM1の領域H1〜H16から高温データをAレ
ジスタに書込み、RAM1の領域からBレジスタへ平
均値を書込み、AレジスタのデータとBレジスタのデー
タとを加算してAレジスタに書込み、AレジスタからR
AM1の領域へ加算結果を格納する。FIGS. 19, 20 and 21 are flow charts of element determination. High-temperature data is written from the areas H1 to H16 of the RAM 1 to the A register,
1 and then, for 15 fields, write high-temperature data from the areas H1 to H16 of the RAM 1 to the A register, write an average value from the area of the RAM 1 to the B register, and write data of the A register and the B register. Add data and write to A register.
The addition result is stored in the area of AM1.
【0059】又15フィールドについての加算結果のA
レジスタのデータを1/16の除算を行ってAレジスタ
に格納し、このAレジスタからRAM1の領域へ除算
結果を格納する。即ち、高温データのフィールド平均値
を求める。A of the addition result for 15 fields
The data in the register is divided by 1/16 and stored in the A register, and the result of the division is stored in the A register from the A register. That is, the field average value of the high temperature data is obtained.
【0060】又RAM1の領域L1〜L16から常温デ
ータをAレジスタへ書込み、前述の高温データの場合と
同様に、除算結果の常温データのフィールド平均値をA
レジスタからRAM1の領域に格納する。The normal temperature data is written into the A register from the areas L1 to L16 of the RAM 1 and the field average value of the normal temperature data as a result of the division is set to A in the same manner as in the case of the high temperature data.
The data is stored in the area of the RAM 1 from the register.
【0061】そして、Bレジスタの内容を0とし(図2
0参照)、RAM1の領域から高温データのフィール
ド平均値をAレジスタに書込み、Aレジスタのデータと
Bレジスタのデータとを加算してAレジスタに格納す
る。これを180素子について行い、Bレジスタの加算
結果を1/180として、高温データの全素子平均値を
Bレジスタに格納する。Then, the content of the B register is set to 0 (FIG. 2)
0), the field average value of the high-temperature data from the area of the RAM 1 is written to the A register, the data of the A register and the data of the B register are added and stored in the A register. This is performed for 180 elements, and the average value of all elements of the high-temperature data is stored in the B register, with the addition result of the B register being 1/180.
【0062】次に、RAM1の領域から高温データの
フィールド平均値をAレジスタに書込み、Aレジスタの
データとBレジスタのデータとの差分をAレジスタに書
込み、Aレジスタのデータの絶対値を求めてAレジスタ
に格納し、このAレジスタからRAM1の領域へ格納
する。即ち、素子対応の平均値に対する差分をRAM1
の領域に格納する。Next, the field average value of the high temperature data is written into the A register from the area of the RAM 1, the difference between the data of the A register and the data of the B register is written into the A register, and the absolute value of the data of the A register is obtained. The data is stored in the A register, and stored in the area of the RAM 1 from the A register. That is, the difference from the average value corresponding to the element is stored in RAM1.
Is stored in the area.
【0063】このRAM1の領域から差分値をAレジ
スタへ書込み、判定値(閾値)と比較し、判定値を差分
値が超えてない場合は、正常素子と判定して、Aレジス
タに“0”を書込み、又判定値を差分値が超えて大きい
場合、欠陥素子(異常素子)と判定して、Aレジスタに
“1”を書込む。そして、AレジスタからRAM1の領
域に判定結果を書込む。即ち、180素子対応にそれ
ぞれ判定結果をRAM1に書込むことになる。The difference value is written to the A register from the area of the RAM 1 and compared with the judgment value (threshold). If the judgment value does not exceed the difference value, it is judged that the element is normal and the A register is set to “0”. If the difference value exceeds the determination value and is large, it is determined that the element is defective (abnormal element), and "1" is written to the A register. Then, the determination result is written from the A register to the area of the RAM1. That is, the determination result is written into the RAM 1 for each of the 180 elements.
【0064】又Bレジスタの内容を0とし、RAM1の
領域から高温データのフィールド平均値をAレジスタ
に書込み、AレジスタのデータとBレジスタのデータと
の加算結果をBレジスタに格納し、このBレジスタの1
80素子についての加算結果に対して1/180の除算
を行い、除算結果をBレジスタに格納する。又RAM1
の領域からAレジスタにデータを書込み、Aレジスタ
のデータとBレジスタのデータとの差分をAレジスタに
格納し、Aレジスタのデータの絶対値を求めてAレジス
タに格納し、このAレジスタからRAM1の領域へ格
納する。従って、領域には180素子についての高温
データの差分の絶対値が格納される。The contents of the B register are set to 0, the field average value of the high temperature data is written from the area of the RAM 1 to the A register, and the result of adding the data of the A register and the data of the B register is stored in the B register. Register 1
The addition result for 80 elements is divided by 1/180, and the division result is stored in the B register. Also RAM1
, Data is written into the A register from the area, the difference between the data in the A register and the data in the B register is stored in the A register, the absolute value of the data in the A register is obtained and stored in the A register, and the RAM 1 To the area. Therefore, the absolute value of the difference between the high-temperature data for 180 elements is stored in the area.
【0065】又RAM1の領域からAレジスタへ差分
の絶対値を書込み、判定値(閾値)とAレジスタのデー
タとを比較し、差分の絶対値が判定値を超えて大きい場
合、欠陥素子(異常素子)と判定して、Aレジスタに
“1”を書込み、又それ以外は正常素子と判定して、A
レジスタに“0”を書込む。そして、AレジスタからR
AM1の領域に判定結果を書込む。従って、180素
子対応に高温データについての判定結果が領域に書込
まれる。The absolute value of the difference is written from the area of the RAM 1 to the A register, and the judgment value (threshold) is compared with the data of the A register. If the absolute value of the difference exceeds the judgment value and is larger, the defective element (abnormal) Element) and writes "1" into the A register. Otherwise, it is determined that the element is normal and A
Write "0" to the register. Then, from the A register to R
The determination result is written in the area of AM1. Therefore, the determination result for the high-temperature data is written in the area corresponding to 180 elements.
【0066】又RAM1の領域から常温データのフィ
ールド平均値をAレジスタに書込み、Bレジスタを用い
て180素子についての加算を行い、加算結果のBレジ
スタの内容を1/180にしてBレジスタに格納し、R
AM1の領域から常温データのフィールド平均値をA
レジスタに書込み、AレジスタのデータとBレジスタの
データとの差分を求め、その差分の絶対値をAレジスタ
に格納し、このAレジスタからRAM1の領域へ、1
80素子についての常温データの差分の絶対値を格納す
る。The field average value of the room temperature data is written from the area of the RAM 1 into the A register, the addition is performed for 180 elements using the B register, and the result of the addition is set to 1/180 and stored in the B register. Then R
The field average value of room temperature data from the area of AM1 is A
Write to the register, find the difference between the data in the A register and the data in the B register, store the absolute value of the difference in the A register,
The absolute value of the difference between the room temperature data for 80 elements is stored.
【0067】このRAM1の領域からAレジスタへ絶
対値を書込み、判定値(閾値)と比較して素子判定を行
う。前述のように、判定値を超えている場合は欠陥素子
(異常素子)として“1”、又超えていない場合は正常
素子として“0”を、それぞれAレジスタを介してRA
M1の領域に格納する。An absolute value is written from the area of the RAM 1 to the A register, and is compared with a determination value (threshold) to determine an element. As described above, when the determination value is exceeded, “1” is determined as a defective element (abnormal element), and when the determination value is not exceeded, “0” is determined as a normal element.
It is stored in the area of M1.
【0068】そして、RAM1の領域からAレジスタ
に高温データのリニアリティ判定結果と、RAM1の領
域からAレジスタに常温データのリニアリティ判定結
果との論理和を、AレジスタからRAM1の領域にリ
ニアリティ(1)の判定結果(第1のリニアリティ判
定)として格納する。Then, the logical sum of the high-temperature data linearity determination result from the RAM1 area to the A register and the normal temperature data linearity determination result from the RAM1 area to the A register, and the linearity (1) from the A register to the RAM1 area. (The first linearity determination).
【0069】図22は置換アドレス生成・更新のフロー
チャートであり、電源立上げ時/置換指令時に於ける動
作を示し、Dレジスタ及びAレジスタをそれぞれ0と
し、次にAレジスタが180素子に対応した値180で
あるか否かを判定し、180でない場合は、RAM1の
領域からBレジスタへリニアリティ判定データを書込
み、“1”か否かを判定し、“1”の場合、欠陥素子を
示すから、Aレジスタが0か否かを判定し、0の場合は
Cレジスタを1とし、Dレジスタが偶数か否かを判定
し、偶数の場合、CレジスタからRAM3(図1のメモ
リ25)の領域へ正常,欠陥の判定結果を書込み、A
レジスタの内容を+1する。FIG. 22 is a flowchart of replacement address generation / update, showing the operation at power-on / replacement command. The D register and the A register are each set to 0, and the A register corresponds to 180 elements. It is determined whether or not the value is 180. If the value is not 180, linearity determination data is written from the area of the RAM 1 to the B register, and whether or not the value is "1" is determined. , A register is 0 or not. If 0, the C register is set to 1. If the D register is even, it is determined whether the D register is even or not. If the D register is even, the area from the C register to the RAM 3 (the memory 25 in FIG. 1) is determined. Write the judgment result of normal and defect to
+1 the contents of the register.
【0070】又Bレジスタが“1”でない場合、正常素
子であるから、Aレジスタの内容をCレジスタに書込
む。又Aレジスタが0でない場合、Aレジスタの内容を
−1してCレジスタに書込む。そして、前述のDレジス
タが偶数か否かを判定する。Dレジスタが偶数の場合、
CレジスタからRAM4(図1のメモリ26)の領域
へ正常,欠陥の判定結果を書込み、Aレジスタの内容を
+1する。これを180素子について行うことにより、
Aレジスタの内容が180となる。そして、Dレジスタ
の内容を+1する。このDレジスタの内容が偶数か否か
を判定した時、奇数であると、RAM3からRAM4に
切替えて、CレジスタからこのRAM4の領域にデー
タを書込むことになる。If the B register is not "1", the contents of the A register are written to the C register because the element is a normal element. If the A register is not 0, the content of the A register is decremented by 1 and written to the C register. Then, it is determined whether or not the above-mentioned D register is an even number. If the D register is even,
The normal / defective judgment result is written from the C register to the area of the RAM 4 (the memory 26 in FIG. 1), and the content of the A register is incremented by one. By doing this for 180 elements,
The content of the A register becomes 180. Then, the content of the D register is incremented by one. When it is determined whether or not the content of the D register is an even number, if the content is an odd number, the RAM 3 is switched to the RAM 4 and data is written from the C register to the RAM 4 area.
【0071】図23は置換アドレス生成・更新のフロー
チャートであり、通常動作に於ける場合を示し、180
素子分について順次RAM1からAレジスタにデータを
書込み、RAM1の領域からBレジスタにリニアリテ
ィ判定結果を書込み、AレジスタとBレジスタとの論理
和をAレジスタに書込む。そして、DレジスタとAレジ
スタとを0とし、Aレジスタの内容か180か否かを判
定する。このステップ以降は図22の対応するステップ
と同一であり、重複する説明は省略する。FIG. 23 is a flow chart of the replacement address generation / update, showing the case of normal operation.
Data is sequentially written from the RAM 1 to the A register for the elements, the linearity determination result is written from the area of the RAM 1 to the B register, and the logical sum of the A register and the B register is written to the A register. Then, the D register and the A register are set to 0, and it is determined whether or not the content of the A register is 180. Subsequent steps are the same as the corresponding steps in FIG. 22, and duplicate description will be omitted.
【0072】図24は電源立上げ時/置換指令時のタイ
ムチャートであり、走査系の同期信号によるトリガ信号
1〜3と、DSP動作と、DSPインストラクションと
を示す。トリガ信号1〜3は、前述のように、光学系の
走査に同期した信号であり、無効走査期間の走査先頭タ
イミング(高温データ取込み先頭タイミング)と、常温
データ取込み先頭タイミングと、有効走査期間の走査先
頭タイミングとを示すものである。そして、1/60の
周期の各フィールドの無効走査期間を3.33ms、有
効走査期間を13.33msとすると、トリガ信号1の
立上りにより、無効走査期間の半分の1.65msのD
SPインストラクションINST1に従って、DSPは
32ラインについての高温データの取込みが開始され
る。FIG. 24 is a time chart at power-on / replacement command, showing trigger signals 1 to 3 by a synchronizing signal of the scanning system, DSP operation, and DSP instructions. As described above, the trigger signals 1 to 3 are signals synchronized with the scanning of the optical system, and include the scanning start timing (high-temperature data acquisition start timing) in the invalid scanning period, the normal temperature data acquisition start timing, and the effective scanning period. 5 shows the scanning start timing. Then, assuming that the invalid scanning period of each field of the 1/60 cycle is 3.33 ms and the valid scanning period is 13.33 ms, the rising edge of the trigger signal 1 causes a D of 1.65 ms, which is half of the invalid scanning period.
In accordance with the SP instruction INST1, the DSP starts acquiring high-temperature data for 32 lines.
【0073】又無効走査期間の中間のトリガ信号2の立
上りにより、DSPインストラクションINST2に従
って、DSPは32ラインについての常温データを取込
む。この場合、高温データの取込みに921.6μs、
常温データの取込みに1.1520msを要する場合を
示す。そして、フィールドN〜N+15にわたる高温デ
ータと常温データとの取込みにより、フィールドN+1
5のトリガ信号3の立上りによる有効走査期間に於い
て、DSPインストラクションINST8に従って、S
/N判定とDCオフセット判定とによる素子判定を行
い、それによる置換アドレス生成・更新を行うものであ
る。この場合、素子判定に5.91ms、置換アドレス
生成・更新に166μsを要する場合を示す。At the rising edge of the trigger signal 2 in the middle of the invalid scanning period, the DSP takes in room temperature data for 32 lines in accordance with the DSP instruction INST2. In this case, 921.6 μs is required to acquire the high temperature data,
This shows a case where 1.1520 ms is required to capture room temperature data. Then, by taking in the high temperature data and the normal temperature data over the fields N to N + 15, the field N + 1
5 during the effective scanning period due to the rising edge of the trigger signal 3 in accordance with the DSP instruction INST8.
/ N element determination and DC offset determination are performed, and replacement address generation / update is performed based on the element determination. In this case, it is assumed that it takes 5.91 ms for element determination and 166 μs for replacement address generation / update.
【0074】又同様な動作を繰り返すことにより、図示
を省略しているが、次のフィールドN+16からフィー
ルドN+31に於いても同様な処理により、高温データ
と常温データとを取込み、フィールドN+31の有効走
査期間に於いて感度補正係数計算を行う。そして、基準
熱源の温度を変更し、その時のフィールド数をaとし
て、フィールドN+32+a〜N+48+aに於いて高
温データと常温データとを取込み、フィールドN+48
+aの有効走査期間に於いてリニアリティ判定による素
子判定を行い、置換アドレス生成・更新を行い、次に基
準熱源の温度を最初の状態に戻して通常動作に移行す
る。Although the illustration is omitted by repeating the same operation, high-temperature data and normal-temperature data are fetched by the same processing in the next field N + 16 to field N + 31, and the effective scanning of the field N + 31 is performed. The sensitivity correction coefficient is calculated in the period. Then, the temperature of the reference heat source is changed, and high-temperature data and normal-temperature data are fetched in fields N + 32 + a to N + 48 + a, where a is the number of fields at that time, and field N + 48
In the + a effective scanning period, the element is determined by the linearity determination, the replacement address is generated and updated, and then the temperature of the reference heat source is returned to the initial state, and the operation shifts to the normal operation.
【0075】図25は通常動作時のタイムチャートであ
り、トリガ信号1〜3と、DSP1動作とDSP1イン
ストラクションと、DSP2動作とDSP2インストラ
クションとを示す。無効走査期間に於いては、DSP1
インストラクションINST1,INST2に従って、
基準熱源の温度を一定として、高温データと常温データ
とを取込み、有効走査期間に於いては、DSP1インス
トラクションINST7に従って、感度補正係数計算と
素子判定と置換アドレス生成・更新のDSP1動作とな
る。又DSP2インストラクションにより感度補正のD
SP2動作となる。FIG. 25 is a time chart at the time of normal operation, showing trigger signals 1 to 3, DSP1 operation and DSP1 instruction, DSP2 operation and DSP2 instruction. In the invalid scanning period, DSP1
According to the instructions INST1 and INST2,
With the temperature of the reference heat source kept constant, high-temperature data and normal-temperature data are fetched, and during the effective scanning period, the DSP1 operation of sensitivity correction coefficient calculation, element determination, and replacement address generation / update is performed according to the DSP1 instruction INST7. Also, D2 of sensitivity correction by DSP2 instruction
The operation becomes SP2.
【0076】この場合の感度補正係数計算に2.39m
s、素子判定に7.09ms、置換アドレス生成・更新
に195μsを有する場合を示す。又DSP2は、無効
走査期間では動作しないが、有効走査期間では、DSP
2インストラクションINST4に従って感度補正処理
を行う。この場合、例えば、90素子、480ラインに
ついての場合、10.40msを要することになる。In this case, the sensitivity correction coefficient was calculated to be 2.39 m.
s, 7.09 ms for element determination, and 195 μs for replacement address generation / update. The DSP 2 does not operate during the invalid scanning period, but does not operate during the effective scanning period.
2) A sensitivity correction process is performed according to instruction INST4. In this case, for example, in the case of 90 elements and 480 lines, 10.40 ms is required.
【0077】図26は図1に於けるメモリ24〜26
(RAM2〜RAM4)の説明図であり、RAM2は前
述のように領域,を有し、16ビット構成のデータ
を格納する180素子に対応するアドレス0〜180の
領域にオフセット補正係数、アドレス181〜360
の領域に感度補正係数が格納される。又RAM3,R
AM4はそれぞれ16ビット構成の置換アドレスデータ
を格納するアドレス0〜180の領域をそれぞれ有す
るものである。FIG. 26 shows the memories 24 to 26 in FIG.
FIG. 7 is an explanatory diagram of (RAM2 to RAM4), where RAM2 has an area as described above, and an offset correction coefficient and an address 181 to area of addresses 0 to 180 corresponding to 180 elements for storing 16-bit data. 360
The sensitivity correction coefficient is stored in the area. RAM3, R
The AM 4 has areas of addresses 0 to 180 for respectively storing 16-bit replacement address data.
【0078】又前述の第1の実施の形態は、電源立上げ
時/置換指令時及び通常動作時に、リニアリティ(1)
(第1のリニアリティ判定)による素子判定を用いた場
合を示すが、第2の実施の形態として、電源立上げ時/
置換指令時は、リニアリティ(1)による素子判定を行
い、通常動作時は、このリニアリティ(1)による素子
判定と、S/Nによる素子判定と、DCオフセットによ
る素子判定との判定結果の論理和による素子判定結果を
用いることできる。この場合、電源立上げ時/置換指令
時の動作は、前述の第1の実施の形態の場合と同様であ
るから、重複した説明は省略する。In the first embodiment, the linearity (1) is set at the time of power-on / replacement command and at the time of normal operation.
A case where element determination by (first linearity determination) is used will be described. As a second embodiment, when power is turned on /
At the time of a replacement command, element determination based on linearity (1) is performed. At the time of normal operation, a logical sum of the determination results of the element determination based on the linearity (1), the element determination based on S / N, and the element determination based on the DC offset is performed. Can be used. In this case, the operation at the time of power-on / at the time of the replacement command is the same as that of the first embodiment described above, and the duplicated description will be omitted.
【0079】図27,図28,図29は第2の実施の形
態に於ける通常動作時の機能説明図であり、通常動作時
に、感度補正とS/Nにる素子判定及び置換を行う場合
の機能を示すのであって、図27に於いて、180は取
込み(高温)部、110は感度補正係数算出部、18
1,185,111は加算器、182,184,18
7,113はメモリ(RAM1)、183,186は除
算器、112は逆数部を示す。FIG. 27, FIG. 28, and FIG. 29 are explanatory diagrams of the function in the normal operation in the second embodiment. In the normal operation, the case where the sensitivity correction, the element determination and the S / N are performed, and the replacement is performed. In FIG. 27, reference numeral 180 denotes a capture (high temperature) unit, 110 denotes a sensitivity correction coefficient calculation unit, and
1,185,111 are adders, 182,184,18
7, 113 denotes a memory (RAM1), 183, 186 denotes a divider, and 112 denotes a reciprocal part.
【0080】又図28に於いて、120は取込み(常
温)・感度補正係数算出部、130は雑音値算出判定
部、121,125,135は加算器、122,12
4,127,131,133,136,138はメモリ
(RAM1)、123,126は除算器、132,12
4,137は比較器を示す。In FIG. 28, reference numeral 120 denotes an acquisition (normal temperature) / sensitivity correction coefficient calculation unit, 130 denotes a noise value calculation determination unit, 121, 125, and 135 denote adders, and 122 and 12
4, 127, 131, 133, 136, and 138 are memories (RAM1); 123 and 126 are dividers;
Reference numeral 4,137 denotes a comparator.
【0081】又図29に於いて、140は差信号判定
部、150は素子判定部、160は置換アドレス生成・
更新部、170は感度補正部、141,143,15
2,162,163はメモリ(RAM1)、142は比
較器、151,161はオア回路(OR)、164は置
換アドレス生成部、165,166はメモリ(RAM
3,RAM4)、167,168は切替部、171は加
算器、172は乗算器、7は走査変換回路、8はDA変
換器(D/A)、9はモニタを示す。In FIG. 29, reference numeral 140 denotes a difference signal judgment unit, 150 denotes an element judgment unit, and 160 denotes a replacement address generation /
Updating section, 170 is sensitivity correction section, 141, 143, 15
2, 162 and 163 are memories (RAM1), 142 is a comparator, 151 and 161 are OR circuits (OR), 164 is a replacement address generator, and 165 and 166 are memories (RAM).
3, RAM 4), 167 and 168 are switching units, 171 is an adder, 172 is a multiplier, 7 is a scan conversion circuit, 8 is a DA converter (D / A), and 9 is a monitor.
【0082】図27の取込み(高温)部180及び感度
補正係数算出部110は、図4に於ける取込み(高温)
部30及び図6に於ける感度補正係数算出部100と同
一の機能を有し、又図28の取込み(常温)・感度補正
係数算出部120は、図5に於ける取込み(常温)・感
度補正整数算出部40と同一の機能を有し、又図29の
置換アドレス生成・更新部160及び感度補正部170
は、図6に於ける置換アドレス生成・更新部80及び感
度補正部90と同一の機能を有するもので、重複した説
明は省略する。The acquisition (high temperature) section 180 and the sensitivity correction coefficient calculation section 110 in FIG.
6 has the same function as the sensitivity correction coefficient calculation unit 100 in FIG. 6, and the capture (normal temperature) / sensitivity correction coefficient calculation unit 120 in FIG. 28 has the capture (normal temperature) / sensitivity in FIG. It has the same function as the correction integer calculation unit 40, and also has the replacement address generation / update unit 160 and the sensitivity correction unit 170 shown in FIG.
Has the same functions as the replacement address generating / updating unit 80 and the sensitivity correcting unit 90 in FIG. 6, and a duplicate description will be omitted.
【0083】又図30,図31はS/Nによる素子判定
時のRAM1の説明図であり、17×16380の領域
を用いた場合を示し、右側のそれぞれのデータが格納さ
れる。又図32はDCオフセットによる素子判定時のR
AM1の説明図であり、17×7200の領域を用いた
場合を示し、右側のそれぞれのデータが格納される。又
RAM1についてはそれぞれの処理過程で同一又は異な
る領域が使用される。又RAM3,RAM4について
は、図26に示す前述の実施の形態の場合と同様の構成
とすることができる。FIGS. 30 and 31 are explanatory diagrams of the RAM 1 at the time of element determination based on S / N, showing a case where an area of 17 × 16380 is used, in which respective data on the right side are stored. FIG. 32 is a graph showing the relationship between R and R when the element is determined based on the DC offset.
FIG. 4 is an explanatory diagram of AM1, showing a case where a 17 × 7200 area is used, and stores respective data on the right side. The same or different area is used for the RAM 1 in each process. The RAM 3 and the RAM 4 can have the same configuration as that of the above-described embodiment shown in FIG.
【0084】図28に於ける雑音値算出判定部130
は、メモリ131(図31の領域LB1〜LB32)に
16フィールド対応に32ライン分の高温データを格納
し、比較器132により最大値を抽出してメモリ133
(RAM1の領域)にDC値の最大値として格納し、
又比較器134により最小値を抽出してメモリ134
(RAM1の領域にDC値の最小値として格納する。
そして、加算器133に於いて、(DC値の最大値)−
(DC値の最小値)の演算により、雑音値を算出し、メ
モリ136(RAM1の領域)に格納する。比較器1
37は、雑音値と閾値とを比較し、閾値を超える雑音値
の素子は異常(欠陥)素子(“1”)とし、閾値を超え
ない雑音値の素子は正常(“0”)としてメモリ138
(RAM1の領域)に格納する。The noise value calculation judging section 130 in FIG.
Stores high-temperature data for 32 lines corresponding to 16 fields in the memory 131 (the areas LB1 to LB32 in FIG. 31), extracts the maximum value by the comparator 132, and
(The area of RAM 1) as the maximum DC value,
The minimum value is extracted by the comparator 134 and stored in the memory 134.
(Stored in the area of the RAM 1 as the minimum DC value.
Then, in the adder 133, (the maximum value of the DC value) −
By calculating (the minimum value of the DC value), a noise value is calculated and stored in the memory 136 (the area of the RAM 1). Comparator 1
The memory 37 compares the noise value with the threshold value, and determines that an element having a noise value exceeding the threshold value is an abnormal (defective) element ("1") and an element having a noise value not exceeding the threshold value is normal ("0").
(Area of the RAM 1).
【0085】又図29に於ける差信号判定部140は、
感度補正係数算出部110の加算器111の出力の高温
平均値と常温平均値との差分をメモリ141に格納し、
比較器142により閾値と比較し、閾値を超えるものは
欠陥素子(“1”)とし、超えないのは正常素子
(“0”)としてメモリ43に差信号による素子判定値
を格納する。素子判定部150は、雑音値算出判定部1
30のメモリ138からの雑音による素子判定値と、差
信号判定部140のメモリ143からの差信号による素
子判定値との論理和をメモリ152(RAM1の領域
)に、S/Nによる素子判定値として格納する。The difference signal judging section 140 in FIG.
The difference between the high temperature average value and the normal temperature average value of the output of the adder 111 of the sensitivity correction coefficient calculation unit 110 is stored in the memory 141,
The comparator 142 compares the threshold value with the threshold value. If the threshold value is exceeded, the defective element (“1”) is determined. If the threshold value is not exceeded, a normal element (“0”) is stored in the memory 43. The element determination unit 150 includes the noise value calculation determination unit 1
The logical OR of the element determination value based on the noise from the memory 138 of the memory 30 and the element determination value based on the difference signal from the memory 143 of the difference signal determination unit 140 is stored in the memory 152 (the area of the RAM 1). Stored as
【0086】図33〜図36は素子判定のフローチャー
トであり、図33〜図35はS/Nによる素子判定、図
36はDCオフセットによる素子判定を示す。なお、図
33の高温のフィールド平均値算出のフローと、常温の
フィールド平均値算出のフローとは、図17示すフロー
と同様であり、重複した説明は省略する。FIGS. 33 to 36 are flowcharts of element determination. FIGS. 33 to 35 show element determination by S / N, and FIG. 36 shows element determination by DC offset. Note that the flow of calculating the high-temperature field average value and the flow of calculating the normal-temperature field average value in FIG. 33 are the same as the flow illustrated in FIG. 17, and redundant description will be omitted.
【0087】図34に於いては、差信号算出として、高
温のフィールド平均値と常温のフィールド平均値との差
分を求め、素子判定として、差信号を判定値(閾値)と
比較する。差信号が小さいことは、高温データと常温デ
ータとの差が小さいことであるから、判定値より小さい
場合に異常素子と判定して“1”とし、判定値より大き
い場合は正常素子と判定して“0”とする。これを信号
Sの判定値としてRAM1に格納する。In FIG. 34, as a difference signal calculation, a difference between a high-temperature field average value and a normal-temperature field average value is obtained, and as a device determination, the difference signal is compared with a determination value (threshold). When the difference signal is small, it means that the difference between the high-temperature data and the normal-temperature data is small. Therefore, if the difference signal is smaller than the judgment value, it is judged as an abnormal element and it is set to “1”. To “0”. This is stored in the RAM 1 as a determination value of the signal S.
【0088】次に雑音値の算出を行う。即ち、RAM1
の領域LB1(図31参照)からAレジスタに常温デー
タを書込み、この常温データをRAM1の領域,に
格納する。180素子について終了すると、次に31ラ
イン分について、AレジスタとBレジスタとCレジスタ
とを用いて順次大小比較することにより、RAM1の領
域にDC最大値を格納し、RAM1の領域にDC最
小値を格納する。そして、図35に示すように、最大値
と最小値との差分を雑音値として、AレジスタからRA
M1の領域PP1〜PP16(図31参照)に格納す
る。即ち、180素子対応に16フィールドについての
雑音値がそれぞれ格納される。Next, a noise value is calculated. That is, RAM1
The normal temperature data is written from the area LB1 (see FIG. 31) to the A register, and the normal temperature data is stored in the area of the RAM1. When the 180 elements are completed, the DC maximum value is stored in the RAM1 area by sequentially comparing the magnitudes of the 31 lines using the A register, the B register, and the C register, and the DC minimum value is stored in the RAM1 area. Is stored. Then, as shown in FIG. 35, the difference between the maximum value and the minimum value
It is stored in the areas PP1 to PP16 of M1 (see FIG. 31). That is, noise values for 16 fields are stored for each of the 180 elements.
【0089】そして、RAM1の領域PP1からAレジ
スタにデータを書込み、RAM1の領域PP2〜PP1
6から順次データをBレジスタに書込んで、Aレジスタ
とBレジスタとの比較を行い、A<Bの場合は、RAM
11の領域に雑音値を格納し、A<Bでない場合は次
のステップに移行する。Then, data is written from the area PP1 of the RAM1 to the A register, and the areas PP2 to PP1 of the RAM1 are written.
6, data is sequentially written to the B register, the A register and the B register are compared, and if A <B, the RAM
The noise value is stored in the area of No. 11, and if A <B, the process proceeds to the next step.
【0090】次にRAM1の領域からAレジスタへデ
ータを書込み、判定値(閾値)と比較する。この判定値
をAレジスタのデータが超えている場合は異常素子とし
て“1”をAレジスタに書込み、又超えていない場合は
正常素子として“0”をAレジスタに書込み、このAレ
ジスタからRAM1の領域へ、“1”,“0”の雑音
Nについての判定値を格納する。そして、信号Sの判定
値と雑音Nの判定値との論理和をRAM1の領域に、
S/N判定による素子判定結果として格納する。Next, data is written from the area of the RAM 1 to the A register and compared with a judgment value (threshold). If the data in the A register exceeds this determination value, "1" is written to the A register as an abnormal element, and if not, "0" is written to the A register as a normal element. The determination values for the noise N of “1” and “0” are stored in the area. Then, the logical sum of the determination value of the signal S and the determination value of the noise N is stored in the area of the RAM 1.
It is stored as an element determination result by the S / N determination.
【0091】図36に於いては、図32に示すRAM1
の領域L1〜L16と、A,Bレジスタとを用いて、常
温データの15フィールド分の平均値を算出し、平均値
をRAM1の領域へ格納する。次に、mフィールド目
に於ける平均値と、(m−1)フィールド目までの平均
値との差分を求めて、その絶対値をDC判定値として、
RAM1の領域に格納し、予め設定した判定値(閾
値)と比較する。この判定値より大きい場合は、異常素
子として“1”、大きくない場合は、正常素子として
“0”を、Aレジスタを介してRAM1の領域にDC
オフセット判定値として格納する。In FIG. 36, the RAM 1 shown in FIG.
Using the areas L1 to L16 and the A and B registers, the average value of the normal temperature data for 15 fields is calculated, and the average value is stored in the area of the RAM 1. Next, a difference between the average value in the m-th field and the average value up to the (m-1) -th field is obtained, and the absolute value is determined as a DC determination value.
The data is stored in the area of the RAM 1 and compared with a predetermined judgment value (threshold). If the value is larger than the determination value, “1” is set as an abnormal element, and if not, “0” is set as a normal element in the area of the RAM 1 via the A register.
Store as offset judgment value.
【0092】前述の第1の実施の形態は、電源立上げ時
/置換指令時と通常動作時とに於いてリニアリティ
(1)(第1のリニアリティ判定)による素子判定を用
い、又第2の実施の形態は、電源立上げ時/置換指令時
にリニアリティ(1)による素子判定を行い、通常動作
時に、リニアリティ(1)による素子判定と、S/Nに
よる素子判定と、DCオフセットによる素子判定とを行
う場合であり、第3の実施の形態として、電源立上げ時
/置換指令時には、リニアリティ(2)(第2のリニア
リティ判定)による素子判定、通常動作時にはリニアリ
ティ(1)(第1のリニアリティ判定)による素子判定
を行うものである。The first embodiment uses the element determination based on linearity (1) (first linearity determination) at the time of power-on / replacement command and during normal operation. The embodiment performs element determination based on linearity (1) at power-on / replacement command, and performs element determination based on linearity (1), element determination based on S / N, and element determination based on DC offset during normal operation. In the third embodiment, the element is determined by the linearity (2) (second linearity determination) at power-on / replacement command, and the linearity (1) (first linearity) is determined during normal operation. Judgement).
【0093】このリニアリティ(2)(第2のリニアリ
ティ判定)の素子判定は、常温の基準熱源10の温度を
A〔°C〕とし、高温の基準熱源11の温度をA+10
〔°C〕(α=10)として、それぞれの基準熱源1
0,11による常温データと高温データとを用いて感度
補正係数を算出して係数1とする。次に基準熱源10の
温度をA−10〔°C〕(ΔT1 =−10)とし、基準
熱源11の温度をA+20〔°C〕(ΔT2 =+20)
に変更して、それぞれの基準熱源10,11による常温
データと高温データとを用いて感度補正係数を算出して
係数2とする。これらの係数1,2の差分を算出し、そ
の差分と閾値とを比較し、閾値を超える素子を欠陥素子
と判定する。In the element determination of the linearity (2) (second linearity determination), the temperature of the reference heat source 10 at normal temperature is set to A [° C.], and the temperature of the reference heat source 11 at high temperature is set to A + 10.
[° C] (α = 10), each reference heat source 1
A sensitivity correction coefficient is calculated using the normal temperature data and the high temperature data according to 0 and 11, and is set as a coefficient 1. Next, the temperature of the reference heat source 10 is set to A-10 [° C] (ΔT 1 = -10), and the temperature of the reference heat source 11 is set to A + 20 [° C] (ΔT 2 = + 20).
And the sensitivity correction coefficient is calculated using the normal temperature data and the high temperature data from the respective reference heat sources 10 and 11 to obtain a coefficient 2. The difference between these coefficients 1 and 2 is calculated, the difference is compared with a threshold, and an element exceeding the threshold is determined as a defective element.
【0094】図37,図38は電源立上げ時/置換指令
時の機能説明図であり、図37に於いて、200は取込
み(高温)部、210は取込み(常温)部、201,2
05,211,215は加算器、202,204,20
7,212,214,217はメモリ(RAM1)、2
03,206,213,216は除算器を示す。FIGS. 37 and 38 are explanatory diagrams of functions at the time of power-on / replacement command. In FIG. 37, reference numeral 200 denotes a take-in (high temperature) section, 210 denotes a take-in (normal temperature) section, and 201 and 201.
05, 211 and 215 are adders, 202, 204 and 20
7, 212, 214, and 217 are memories (RAM1), 2
Numerals 03, 206, 213 and 216 denote dividers.
【0095】又図38に於いて、220,230は感度
補正係数算出部(感度)部、240はリニアリティ
(2)判定部、250は置換アドレス生成・更新部、7
は走査変換回路、8はDA変換器(D/A)、9はモニ
タ、221,231,241は加算器、222,232
は逆数部、223,233,242,244はメモリ
(RAM1)、243は比較器、251は置換アドレス
生成部、252,253はメモリ(RAM3,RAM
4)、254,255は切替部である。In FIG. 38, 220 and 230 are sensitivity correction coefficient calculation units (sensitivity) units, 240 is a linearity (2) determination unit, 250 is a replacement address generation / update unit, 7
Is a scan conversion circuit, 8 is a DA converter (D / A), 9 is a monitor, 221, 231, 241 are adders, 222, 232
Is a reciprocal part, 223, 233, 242 and 244 are memories (RAM1), 243 is a comparator, 251 is a replacement address generator, and 252 and 253 are memories (RAM3 and RAM3).
4), 254 and 255 are switching units.
【0096】取込み(高温)部200と取込み(常温)
部210は、図2に於ける取込み(高温)部30と取込
み(常温)・感度補正係数算出部40と同様な機能を備
えており、高温平均値の算出処理及び常温平均値の算出
処理については同様な処理であるから、重複した説明は
省略する。Uptake (high temperature) section 200 and uptake (normal temperature)
The unit 210 has the same functions as the acquisition (high temperature) unit 30 and the acquisition (normal temperature) / sensitivity correction coefficient calculation unit 40 in FIG. 2, and performs a high temperature average value calculation process and a normal temperature average value calculation process. Is a similar process, and a duplicate description will be omitted.
【0097】又メモリ(RAM1)は、例えば、図39
に示すように、17×6840の領域を使用し、右側に
示すようなデータを格納するものである。又図38に於
ける感度補正係数算出(感度)部220は、基準熱源1
0,11の温度を、A〔°C〕とB〔°C〕とした場合
の常温平均値と高温平均値との差分を求め、この差分値
の逆数を逆数部222により求めて、感度補正係数とし
てメモリ223(図39に示すRAM1の領域)に格
納する。これを係数1とする。The memory (RAM1) is, for example, as shown in FIG.
As shown in FIG. 7, a 17 × 6840 area is used to store data as shown on the right side. The sensitivity correction coefficient calculation (sensitivity) section 220 in FIG.
When the temperatures of 0 and 11 are A [° C] and B [° C], the difference between the normal temperature average value and the high temperature average value is obtained, and the reciprocal of this difference value is obtained by the reciprocal part 222 to correct the sensitivity. The coefficients are stored in the memory 223 (the area of the RAM 1 shown in FIG. 39). This is set as a coefficient 1.
【0098】又感度補正係数算出(感度)部230は、
基準熱源10,11の温度をC〔°C〕とD〔°C〕と
した場合の常温平均値と高温平均値との差分を求め、こ
の差分値の逆数を逆数部232により求めて、感度補正
係数としてメモリ233(図39に示すRAM1の領域
)に格納する。これを係数2とする。The sensitivity correction coefficient calculation (sensitivity) section 230
The difference between the normal temperature average value and the high temperature average value when the temperatures of the reference heat sources 10 and 11 are C [° C] and D [° C] is determined, and the reciprocal of the difference value is determined by the reciprocal part 232 to obtain the sensitivity. The correction coefficient is stored in the memory 233 (the area of the RAM 1 shown in FIG. 39). This is referred to as coefficient 2.
【0099】リニアリティ(2)判定部240は、係数
1と係数2との差分を求め、係数の差としてメモリ24
2(RAM1の領域)に格納し、比較器243により
閾値と比較し、閾値を超えているものは異常素子と判定
し、閾値を超えないものは正常素子と判定し、メモリ2
44(RAM1の領域)に異常素子は“1”、正常素
子は“0”とした判定値を格納する。The linearity (2) determination unit 240 calculates the difference between the coefficient 1 and the coefficient 2 and determines the difference between the coefficients 1 and 2 in the memory 24.
2 (area of RAM 1), and the comparator 243 compares the threshold value with the threshold value. If the threshold value is exceeded, it is determined that the element is abnormal.
A determination value of “1” for an abnormal element and “0” for a normal element is stored in 44 (area of RAM1).
【0100】置換アドレス生成部251は、メモリ24
4からの判定値を基に、赤外線検知器の素子の置換アド
レスを生成し、メモリ252,253に格納し、走査変
換回路7に於いて画像データに対する置換処理を行う。The replacement address generation section 251
Based on the judgment value from 4, the replacement address of the element of the infrared detector is generated, stored in the memories 252 and 253, and the scanning conversion circuit 7 performs the replacement process on the image data.
【0101】図40,図41はDSPの動作フローチャ
ートであり、DSP1,DSP2(図1参照)は初期値
設定を行い、DSP1は無効期間に於いて高温データと
常温データとを取込み、有効期間は動作しない。フィー
ルドN+15に於いて、高温データと常温データとをそ
れぞれ32ライン分取得し、次の有効期間に於いて感度
補正係数(1)を算出し、これを前述のように係数1と
し、次に熱源温度を変更して、同様の処理によってフィ
ールドN+31+aの有効期間に於いて感度補正係数
(2)を算出し、これを係数2とする。FIGS. 40 and 41 are operation flowcharts of the DSP. DSP1 and DSP2 (see FIG. 1) perform initial value setting, and DSP1 captures high-temperature data and normal-temperature data during an invalid period. Do not work. In field N + 15, high-temperature data and normal-temperature data are acquired for 32 lines each, a sensitivity correction coefficient (1) is calculated in the next effective period, and this is set to coefficient 1 as described above, and then a heat source By changing the temperature and performing the same processing, the sensitivity correction coefficient (2) is calculated in the effective period of the field N + 31 + a, and this is set as the coefficient 2.
【0102】次のフィールドN+32+aに於いて、図
41に示すように、係数1と係数2とを用いてリニアリ
ティ(2)判定による素子判定を行い、判定結果に従っ
た置換アドレス生成・更新を行い、置換アドレスをメモ
リ252(RAM3)に格納し、次フィールドに於ける
置換アドレスとして走査変換回路7に入力される。In the next field N + 32 + a, as shown in FIG. 41, element determination based on linearity (2) determination is performed using coefficient 1 and coefficient 2, and replacement address generation / update is performed according to the determination result. , The replacement address is stored in the memory 252 (RAM3), and is input to the scan conversion circuit 7 as the replacement address in the next field.
【0103】図42はリニアリティ(2)判定のフロー
チャートであり、RAM1(図39参照)の領域から
感度補正係数、即ち、係数1をAレジスタに書込み、R
AM1の領域からBレジスタへ感度補正係数、即ち係
数2をBレジスタに書込み、A,Bレジスタ間の差分を
求め、RAM1の領域へ係数の差として格納する。そ
して、この領域の係数の差をAレジスタに書込み、判
定値(閾値)と比較する。判定値(閾値)よりAレジス
タのデータが大きい場合は、異常素子として“1”、大
きくない場合は正常素子として“0”を、Aレジスタか
らRAM1の領域へリニアリティ(2)判定値として
格納する。FIG. 42 is a flow chart of the linearity (2) determination. The sensitivity correction coefficient, that is, the coefficient 1 is written into the A register from the area of the RAM 1 (see FIG. 39).
The sensitivity correction coefficient, that is, the coefficient 2, is written from the area of AM1 to the B register into the B register, a difference between the A and B registers is obtained, and the difference is stored in the area of RAM1 as the coefficient difference. Then, the difference between the coefficients in this area is written into the A register, and is compared with a determination value (threshold). When the data of the A register is larger than the judgment value (threshold), “1” is stored as an abnormal element, and when the data is not larger, “0” is stored as a normal element from the A register to the area of the RAM 1 as a linearity (2) judgment value. .
【0104】図43,図44は動作シーケンス説明図で
あり、フィールドと、光学系動作と、動作シーケンス
と、DSP1動作と、DSP2動作とを示し、図43に
於けるフィールドN〜N+15では、基準熱源の温度を
H=L+10〔°C〕(A=L,α=10)、L=シー
ンの平均値(A)として、DSP1は無効期間に於いて
データ取込み、有効期間に於いて感度補正係数算出を行
い、熱源温度変更を行い、次に図44に示すように、H
=L+20〔°C〕(L=A,ΔT2 =+20)、L=
シーンの平均値−10〔°C〕(ΔT1 =−10)とし
て、フィールドN+16+a〜N+31+aに於いて同
様にデータの取込みと感度補正係数算出とを行い、フィ
ールドN+32+aの有効期間に於いて、リニアリティ
(2)判定による素子判定、置換アドレス生成・更新、
置換の処理を行う。FIG. 43 and FIG. 44 are explanatory diagrams of the operation sequence, showing the field, the optical system operation, the operation sequence, the DSP1 operation and the DSP2 operation. In the fields N to N + 15 in FIG. Assuming that the temperature of the heat source is H = L + 10 [° C.] (A = L, α = 10), and L = the average value of the scene (A), the DSP 1 takes in data during the ineffective period and the sensitivity correction coefficient during the effective period. The calculation is performed, the heat source temperature is changed, and then, as shown in FIG.
= L + 20 [° C] (L = A, ΔT 2 = + 20), L =
Assuming that the average value of the scene is −10 [° C.] (ΔT 1 = −10), data acquisition and sensitivity correction coefficient calculation are similarly performed in the fields N + 16 + a to N + 31 + a, and linearity is calculated in the validity period of the field N + 32 + a. (2) Element determination by determination, replacement address generation / update,
Perform the replacement process.
【0105】又通常動作時は、第1の実施の形態と同様
に、リニアリティ(1)判定により素子判定を行い、欠
陥素子についてリアルタイムで正常素子の検出信号を利
用する置換処理を行うものであり、重複する説明は省略
する。In the normal operation, as in the first embodiment, the element determination is performed by the linearity (1) determination, and the replacement processing is performed on the defective element in real time using the detection signal of the normal element. , Overlapping description will be omitted.
【0106】又第4の実施の形態として、電源立上げ時
/置換指令時は、リニアリティ(2)判定(第2のリニ
アリティ判定)を行い、通常動作時はリニアリティ
(1)判定(第1のリニアリティ判定)とS/N判定と
DCオフセット判定とを行う。即ち、電源立上げ時/置
換指令時には、図37〜図44について説明したよう
に、基準熱源の温度を変更してそれぞの感度補正係数を
求め、その感度補正係数の差分を基にリニアリティ
(2)判定を行い、通常動作時には、図1〜図26につ
いて説明したように、リニアリティ(1)判定を行うも
のである。As a fourth embodiment, at the time of power-on / replacement command, linearity (2) determination (second linearity determination) is performed, and during normal operation, linearity (1) determination (first linearity determination) is performed. Linearity determination), S / N determination, and DC offset determination. That is, at the time of power-on / replacement command, as described with reference to FIGS. 37 to 44, the temperature of the reference heat source is changed to obtain the respective sensitivity correction coefficients, and the linearity (linearity) is determined based on the difference between the sensitivity correction coefficients. 2) A determination is made, and during normal operation, the linearity (1) determination is performed as described with reference to FIGS.
【0107】又電源立上げ時/置換指令時は、リニアリ
ティ(2)判定を行い、通常動作時は、感度補正とDC
オフセット判定とを行う実施の形態の機能を、図45〜
図47に示す。この図45に於いて、300は取込み
(高温)部、301,305は加算器、302,30
4,307はメモリ(RAM1)、303,306は除
算器を示す。At power-on / replacement command, the linearity (2) is determined. During normal operation, sensitivity correction and DC
The functions of the embodiment for performing the offset determination are shown in FIGS.
As shown in FIG. In FIG. 45, reference numeral 300 denotes a take-in (high temperature) portion, 301 and 305 denote adders, and 302 and 30.
Reference numerals 4 and 307 denote memories (RAM1), and 303 and 306 denote dividers.
【0108】又図46に於いて、310は取込み(常
温)・感度補正係数算出部、320はDCオフセット値
算出部、311,315,321,325は加算器、3
12,314,317,322,324,327,32
9はメモリ(RAM1)、313,316,323は除
算器、326は絶対値回路、328は比較器を示す。In FIG. 46, reference numeral 310 denotes an acquisition (normal temperature) / sensitivity correction coefficient calculator, 320 denotes a DC offset value calculator, 311, 315, 321 and 325 denote adders,
12,314,317,322,324,327,32
9 is a memory (RAM1), 313, 316 and 323 are dividers, 326 is an absolute value circuit, and 328 is a comparator.
【0109】又図47に於いて、330は感度補正係数
算出(感度)部、340は感度補正部、350は置換ア
ドレス生成・更新部、331,341は加算器、332
は逆数部、333,352,353はメモリ(RAM
1)、342は乗算器、351はオア回路(OR)、3
54は置換アドレス生成部、355,356はメモリ
(RAM3,RAM4)、357,358は切替部、7
は走査変換回路、8はDA変換器(D/A)、9はモニ
タを示す。In FIG. 47, 330 is a sensitivity correction coefficient calculation (sensitivity) section, 340 is a sensitivity correction section, 350 is a replacement address generation / update section, 331 and 341 are adders, 332
Is a reciprocal part, and 333, 352 and 353 are memories (RAM
1) and 342 are multipliers, 351 is an OR circuit (OR), 3
54 is a replacement address generation unit, 355 and 356 are memories (RAM3, RAM4), 357 and 358 are switching units, 7
Denotes a scan conversion circuit, 8 denotes a DA converter (D / A), and 9 denotes a monitor.
【0110】取込み(高温)部300と取込み(常温)
・感度補正係数算出部310は、例えば、図2に於ける
取込み(高温)部30と取込み(高温)・感度補正係数
算出部40と同一の機能を備えており、前述のように、
メモリ37の各素子対応の領域に高温平均値が格納さ
れ、又メモリ47の各素子対応の領域に常温平均値が格
納されるもので、重複した説明は省略する。Capture (high temperature) section 300 and capture (normal temperature)
The sensitivity correction coefficient calculation unit 310 has, for example, the same function as the capture (high temperature) unit 30 and the capture (high temperature) sensitivity correction coefficient calculation unit 40 in FIG.
The high temperature average value is stored in the area corresponding to each element of the memory 37, and the normal temperature average value is stored in the area corresponding to each element of the memory 47, and a duplicate description will be omitted.
【0111】DCオフセット値算出部320は、メモリ
314に格納された1〜15フィールドのライン常温平
均値を加算してメモリ322に格納し、除算器323に
より1/15の乗算によりフィールド常温平均値をメモ
リ324に格納し、このフィールド常温平均値と、ライ
ン常温平均値との差分を加算器325に於いて求め、絶
対値回路326により差分の絶対値を求め、メモリ32
7にDCオフセット値として格納し、比較器328に於
いて閾値と比較し、この閾値を超えたDCオフセット値
の素子を異常素子と判定し、判定値の“1”をメモ32
9に格納し、又閾値を超えないDCオフセット値の素子
を正常素子と判定し、判定値の“0”をメモリ329に
格納する。The DC offset value calculation section 320 adds the line normal temperature average values of 1 to 15 fields stored in the memory 314 and stores the sum in the memory 322. The divider 323 multiplies the field normal temperature average value by 1/15. Is stored in the memory 324, the difference between the field normal temperature average value and the line normal temperature average value is obtained in the adder 325, the absolute value circuit 326 obtains the absolute value of the difference, and
7 is stored as a DC offset value, is compared with a threshold value in a comparator 328, an element having a DC offset value exceeding the threshold value is determined as an abnormal element, and “1” of the determination value is stored in a memo 32
9 and the element having a DC offset value not exceeding the threshold value is determined as a normal element, and the determination value “0” is stored in the memory 329.
【0112】感度補正係数算出(感度)部330は、メ
モリ307からの高温平均値と、メモリ317の常温平
均値との差分の逆数を感度補正係数としてメモリ333
に格納し、この感度補正係数を感度補正部340の乗算
器342に入力する。この感度補正部340は、メモリ
317からの常温平均値を画像データから減算し、乗算
器342に於いてメモリ333からの感度補正係数を乗
算して、赤外線検知器の各素子の感度を補正する。The sensitivity correction coefficient calculation (sensitivity) section 330 uses the reciprocal of the difference between the high temperature average value from the memory 307 and the normal temperature average value in the memory 317 as the sensitivity correction coefficient for the memory 333.
And the sensitivity correction coefficient is input to the multiplier 342 of the sensitivity correction unit 340. This sensitivity correction unit 340 corrects the sensitivity of each element of the infrared detector by subtracting the normal temperature average value from the memory 317 from the image data and multiplying the image data by the sensitivity correction coefficient from the memory 333 in the multiplier 342. .
【0113】又置換アドレス生成・更新部350は、メ
モリ329からの素子判定値と、メモリ352からの電
源立上げ時に求めた素子判定値との論理和を求めて、新
たな素子判定値としてメモリ353に格納する。置換ア
ドレス生成部354は、素子判定値を基に置換アドレス
を生成し、メモリ355又は356に格納する。この置
換アドレスが走査変換回路7に入力され、素子判定値が
“1”の欠陥素子を、素子判定値が“0”の正常素子に
よって置換した状態の信号処理を行う。The replacement address generating / updating section 350 obtains the logical sum of the element determination value from the memory 329 and the element determination value obtained when the power is turned on from the memory 352, and stores the logical sum as a new element determination value. 353. The replacement address generation unit 354 generates a replacement address based on the element determination value and stores the replacement address in the memory 355 or 356. This replacement address is input to the scan conversion circuit 7, and signal processing is performed in a state where a defective element having an element determination value of "1" is replaced by a normal element having an element determination value of "0".
【0114】本発明は、前述の各実施の形態にのみ限定
されるものではなく、例えば、赤外線検知器3の素子数
は180以外の数とすることも可能であり、又無効走査
期間に於ける常温データと高温データとの取込みのライ
ン数とフィールド数とは、走査効率やDSPの演算能力
等に対応して任意に選択可能である。又第1のリニアリ
ティ判定と、第2のリニアリティ判定と、S/N判定等
の他の判定との種々の組合せを適用することも可能であ
る。又電源立上げ時には、第1のリニアリティ判定又は
第2のリニアリティ判定により欠陥素子か正常素子かの
判定を含めるものであり、従って、通常動作に移行した
場合に、少なくとも、リニアリティ特性がほぼ均一な素
子による赤外線画像を得ることができる。そして、この
通常動作を所定時間経過した時に、自動的に置換指令に
よる動作を行わせて、リニアリティ判定を行わせること
も可能である。The present invention is not limited to the above embodiments. For example, the number of elements of the infrared detector 3 can be set to a number other than 180. The number of lines and the number of fields for taking in the normal temperature data and the high temperature data can be arbitrarily selected in accordance with the scanning efficiency, the operation capability of the DSP, and the like. Also, various combinations of the first linearity determination, the second linearity determination, and other determinations such as the S / N determination can be applied. When the power is turned on, the first linearity determination or the second linearity determination includes a determination as to whether the element is a defective element or a normal element. Therefore, when the operation shifts to the normal operation, at least the linearity characteristics are substantially uniform. An infrared image by the element can be obtained. Then, when a predetermined time has elapsed from the normal operation, an operation based on the replacement command may be automatically performed to determine the linearity.
【0115】[0115]
【発明の効果】以上説明したように、本発明は、赤外線
検知器3の各素子の判定手段として、従来例のS/N判
定やDCオフセット判定に、リニアリティ判定を付加し
たものであり、このリニアリティ判定による素子判定に
よって、複数素子から構成された赤外線検知器3の各素
子の特性の均一化を保証することが可能となり、又周囲
温度の変化等による特性変化に対しても対応することが
できる。従って、モニタに表示する赤外線画像の精度を
著しく向上することができる利点がある。更に、通常動
作時に於いても、S/N判定,DCオフセット判定等と
共にリニアリティ判定を含めて、リアルタイムで欠陥素
子の有無の判定と、欠陥素子の置換処理とを行うことが
可能となり、赤外線撮像装置の信頼性を向上することが
できる利点がある。As described above, according to the present invention, the linearity judgment is added to the conventional S / N judgment and DC offset judgment as means for judging each element of the infrared detector 3. By the element determination by the linearity determination, it is possible to guarantee the uniformity of the characteristics of each element of the infrared detector 3 composed of a plurality of elements, and to cope with the characteristic change due to the change of the ambient temperature. it can. Therefore, there is an advantage that the accuracy of the infrared image displayed on the monitor can be significantly improved. Further, even during normal operation, it is possible to perform real-time determination of presence / absence of a defective element and replacement processing of the defective element, including linearity determination together with S / N determination, DC offset determination, etc. There is an advantage that the reliability of the device can be improved.
【図1】本発明の実施の形態の説明図である。FIG. 1 is an explanatory diagram of an embodiment of the present invention.
【図2】電源立上げ時/置換指令時の機能説明図であ
る。FIG. 2 is an explanatory diagram of functions at the time of power-on / when a replacement command is issued.
【図3】電源立上げ時/置換指令時の機能説明図であ
る。FIG. 3 is an explanatory diagram of functions at the time of power-on / when a replacement command is issued.
【図4】通常動作時の機能説明図である。FIG. 4 is an explanatory diagram of functions during a normal operation.
【図5】通常動作時の機能説明図である。FIG. 5 is an explanatory diagram of functions during a normal operation.
【図6】通常動作時の機能説明図である。FIG. 6 is an explanatory diagram of functions during a normal operation.
【図7】動作シーケンス説明図である。FIG. 7 is an explanatory diagram of an operation sequence.
【図8】動作シーケンス説明図である。FIG. 8 is an explanatory diagram of an operation sequence.
【図9】動作シーケンス説明図である。FIG. 9 is an explanatory diagram of an operation sequence.
【図10】DSPの動作フローチャートである。FIG. 10 is an operation flowchart of a DSP.
【図11】DSPの動作フローチャートである。FIG. 11 is an operation flowchart of a DSP.
【図12】DSPの動作フローチャートである。FIG. 12 is an operation flowchart of a DSP.
【図13】DSPの動作フローチャートである。FIG. 13 is an operation flowchart of the DSP.
【図14】データ取込みのフローチャートである。FIG. 14 is a flowchart of data acquisition.
【図15】画面構成説明図である。FIG. 15 is an explanatory diagram of a screen configuration.
【図16】RAM1の説明図である。FIG. 16 is an explanatory diagram of a RAM 1;
【図17】感度補正係数算出のフローチャートである。FIG. 17 is a flowchart of sensitivity correction coefficient calculation.
【図18】感度補正処理のフローチャートである。FIG. 18 is a flowchart of a sensitivity correction process.
【図19】素子判定のフローチャートである。FIG. 19 is a flowchart of element determination.
【図20】素子判定のフローチャートである。FIG. 20 is a flowchart of element determination.
【図21】素子判定のフローチャートである。FIG. 21 is a flowchart of element determination.
【図22】置換アドレス生成・更新のフローチャートで
ある。FIG. 22 is a flowchart of replacement address generation / update.
【図23】置換アドレス生成・更新のフローチャートで
ある。FIG. 23 is a flowchart of replacement address generation / update.
【図24】電源立上げ時/置換指令時のタイムチャート
である。FIG. 24 is a time chart at power-on / replacement command.
【図25】通常動作時のタイムチャートである。FIG. 25 is a time chart during normal operation.
【図26】RAM2〜RAM4の説明図である。FIG. 26 is an explanatory diagram of RAM2 to RAM4.
【図27】通常動作時の機能説明図である。FIG. 27 is an explanatory diagram of functions during a normal operation.
【図28】通常動作時の機能説明図である。FIG. 28 is an explanatory diagram of functions during a normal operation.
【図29】通常動作時の機能説明図である。FIG. 29 is an explanatory diagram of functions during a normal operation.
【図30】S/Nによる素子判定時のRAM1の説明図
である。FIG. 30 is an explanatory diagram of the RAM 1 at the time of element determination based on S / N.
【図31】S/Nによる素子判定時のRAM1の説明図
である。FIG. 31 is an explanatory diagram of the RAM 1 at the time of element determination based on S / N.
【図32】DCオフセットによる素子判定時のRAM1
の説明図である。FIG. 32: RAM1 at the time of element determination by DC offset
FIG.
【図33】素子判定のフローチャートである。FIG. 33 is a flowchart of element determination.
【図34】素子判定のフローチャートである。FIG. 34 is a flowchart of element determination.
【図35】素子判定のフローチャートである。FIG. 35 is a flowchart of element determination.
【図36】素子判定のフローチャートである。FIG. 36 is a flowchart of element determination.
【図37】電源立上げ時/置換指令時の機能説明図であ
る。FIG. 37 is an explanatory diagram of functions at power-on / replacement command.
【図38】電源立上げ時/置換指令時の機能説明図であ
る。FIG. 38 is an explanatory diagram of functions at the time of power-on / when a replacement command is issued.
【図39】RAM1の説明図である。FIG. 39 is an explanatory diagram of a RAM 1;
【図40】DSPの動作フローチャートである。FIG. 40 is an operation flowchart of the DSP.
【図41】DSPの動作フローチャートである。FIG. 41 is an operation flowchart of a DSP.
【図42】リニアリティ(2)判定のフローチャートで
ある。FIG. 42 is a flowchart of linearity (2) determination.
【図43】動作シーケンス説明図である。FIG. 43 is an explanatory diagram of an operation sequence.
【図44】動作シーケンス説明図である。FIG. 44 is an explanatory diagram of an operation sequence.
【図45】通常動作時の機能説明図である。FIG. 45 is an explanatory diagram of functions during a normal operation.
【図46】通常動作時の機能説明図である。FIG. 46 is an explanatory diagram of functions during a normal operation.
【図47】通常動作時の機能説明図である。FIG. 47 is an explanatory diagram of functions during a normal operation.
【図48】従来例の赤外線撮像装置の説明図である。FIG. 48 is an explanatory diagram of a conventional infrared imaging device.
【図49】光学系の説明図である。FIG. 49 is an explanatory diagram of an optical system.
1,2 光学系 3 赤外線検知器 4 増幅器 5 AD変換器(A/D) 6 信号処理回路 7 走査変換回路 8 DA変換器(D/A) 10,11 基準熱源 12 基準熱源制御回路 13 制御回路 21,22 DSP1,DSP2 23〜26 メモリ(RAM1〜RAM4) 27,28 メモリ(ROM1,ROM2) 1, 2 optical system 3 infrared detector 4 amplifier 5 AD converter (A / D) 6 signal processing circuit 7 scanning conversion circuit 8 DA converter (D / A) 10, 11 reference heat source 12 reference heat source control circuit 13 control circuit 21, 22 DSP1, DSP2 23 to 26 memory (RAM1 to RAM4) 27, 28 memory (ROM1, ROM2)
───────────────────────────────────────────────────── フロントページの続き Fターム(参考) 2G065 AB02 AB03 BA02 BA15 BA34 BB06 BB11 BB49 BC07 BC14 BC16 BC28 BC33 BD01 DA01 DA18 2G066 AA06 BA13 BA14 BA22 BA25 BA26 BA27 BC02 BC07 BC09 BC21 CA08 CB01 5C024 AA06 AA07 CA09 FA01 FA11 GA06 HA08 HA12 HA18 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 2G065 AB02 AB03 BA02 BA15 BA34 BB06 BB11 BB49 BC07 BC14 BC16 BC28 BC33 BD01 DA01 DA18 2G066 AA06 BA13 BA14 BA22 BA25 BA26 BA27 BC02 BC07 BC09 BC21 CA08 CB01 5C024 AA06 AA11 CA09 FA01 FA HA08 HA12 HA18
Claims (4)
器と、高温の基準熱源と常温の基準熱源と、該高温と常
温との基準熱源の温度を制御する基準熱源制御回路と、
有効走査期間に目標物方向の赤外線を走査して前記赤外
線検知器に入射し、無効走査期間に前記高温と常温との
基準熱源からの赤外線を走査して前記赤外線検知器に入
射する光学系と、前記無効走査期間に取込んだ前記高温
の基準熱源による高温データと前記常温の基準熱源によ
る常温データとを基に、前記素子対応の感度補正を行
い、且つ前記赤外線検知器を構成する各素子の欠陥を判
定し、欠陥素子による信号を正常素子による信号に置換
する処理を行う信号処理回路とを備えた赤外線撮像装置
に於いて、 前記基準熱源制御回路は、電源立上げ時/置換指令時に
前記高温と常温との基準熱源の温度を所定フィールド数
毎に2段階に切替え、通常動作時は所定の一定温度に制
御する構成を有し、 前記信号処理回路は、前記無効走査期間に取込んだ前記
高温データと前記常温データとを基に、感度補正係数算
出と、感度補正と、S/N判定、DCオフセット判定又
はリニアリティ判定の少なくとも何れか一方の判定によ
る素子判定と、欠陥素子の素子判定結果による置換アド
レス生成・更新と、各判定による欠陥素子に対する置換
処理を行う処理機能を有することを特徴とする赤外線撮
像装置。An infrared detector comprising a plurality of elements; a high-temperature reference heat source and a normal temperature reference heat source; a reference heat source control circuit for controlling the temperatures of the high-temperature and normal temperature reference heat sources;
An optical system that scans infrared rays in a target direction during the effective scanning period and enters the infrared detector, and scans infrared rays from the high-temperature and normal-temperature reference heat sources and enters the infrared detector during the invalid scanning period. Based on high-temperature data from the high-temperature reference heat source taken during the invalid scanning period and normal-temperature data from the normal-temperature reference heat source, perform sensitivity correction corresponding to the element, and each element constituting the infrared detector And a signal processing circuit for performing a process of determining a defect of the defective element and replacing a signal of the defective element with a signal of the normal element. The reference heat source control circuit, when power-on / replacement command The temperature of the reference heat source between the high temperature and the normal temperature is switched in two stages for each predetermined number of fields, and has a configuration in which the temperature is controlled to a predetermined constant temperature during a normal operation. A sensitivity correction coefficient calculation, a sensitivity correction, an element determination based on at least one of S / N determination, DC offset determination or linearity determination, and a defective element An infrared imaging apparatus having a processing function of generating and updating a replacement address based on an element determination result and performing a replacement process on a defective element based on each determination.
げ時/置換指令時の最初は、前記常温の基準熱源の温度
をA〔°C〕に、又前記高温の基準熱源の温度をA+α
〔°C〕に制御し、所定フィールド後に、前記常温の基
準熱源の温度をA+ΔT1 〔°C〕に、又前記高温の基
準熱源の温度をA+α+ΔT2 〔°C〕に制御し、前記
通常動作時に、前記常温と高温との基準熱源の温度を前
記最初の状態に制御する構成を備え、 前記信号処理回路は、前記電源立上げ時/置換指令時と
通常動作時とに於ける前記常温と高温との基準熱源の温
度に対応して、無効走査期間に取込んだ前記常温データ
と高温データとを基に、S/N判定と、DCオフセット
判定と、全素子平均値に対する各素子の差によるリニア
リティ判定との組合せを切替えて素子判定を行い、各判
定による欠陥素子に対する置換アドレス生成・更新を行
う処理機能を備えたことを特徴とする請求項1記載の赤
外線撮像装置。2. The reference heat source control circuit sets the temperature of the normal temperature reference heat source to A [° C.] and sets the temperature of the high temperature reference heat source to A + α at the time of the power-on / replacement command.
[° C], and after a predetermined field, the temperature of the standard heat source at normal temperature is controlled to A + ΔT 1 [° C], and the temperature of the high-temperature reference heat source is controlled to A + α + ΔT 2 [° C], and the normal operation is performed. A temperature control unit that controls the temperature of the reference heat source between the normal temperature and the high temperature to the initial state, wherein the signal processing circuit is configured to control the normal temperature during the power-on / replacement command and during the normal operation. Based on the normal temperature data and the high temperature data acquired during the invalid scanning period, corresponding to the temperature of the reference heat source at the high temperature, the S / N determination, the DC offset determination, and the difference of each element with respect to the average value of all the elements are performed. 2. The infrared imaging apparatus according to claim 1, further comprising a processing function of performing element determination by switching a combination with the linearity determination by the above, and generating and updating a replacement address for a defective element by each determination.
器と、高温の基準熱源と、常温の基準熱源と、有効走査
期間に目標物方向の赤外線を走査して前記赤外線検知器
に入射し、無効走査期間に前記高温と常温との基準熱源
からの赤外線を走査して前記赤外線検知器に入射する光
学系と、信号処理回路とを有し、前記赤外線検知器の出
力の前記高温の基準熱源による高温データと前記常温の
基準熱源による常温データとを基に、前記赤外線検知器
の各素子を判定し、欠陥素子の信号を正常素子の信号に
置換する欠陥素子補償方法に於いて、 電源立上げ時/置換指令時に、前記常温の基準熱源の温
度をA〔°C〕に、又前記高温の基準熱源の温度をA+
α〔°C〕に制御して、無効走査期間に常温データと高
温データとを取込み、S/N判定又はDCオフセット判
定の何れか一方又は両方により欠陥素子か否かの素子判
定後に感度補正係数算出を行い、 前記常温の基準熱源の温度をA±ΔT1 〔°C〕に、又
前記高温の基準熱源の温度をA+α±ΔT2 〔°C〕に
制御して、無効走査期間に常温データと高温データとを
取込み、全素子についての平均値に対する各素子毎の差
を第1のリニアリティ判定として、閾値と比較し、該閾
値を超える素子を欠陥素子と判定し、 通常動作時に、前記常温の基準熱源の温度をA〔°C〕
に、又前記高温の基準熱源の温度をA+α〔°C〕に制
御して、感度補正後、無効走査期間に常温データと高温
データとを取込み、S/N判定又はDCオフセット判定
又は前記リニアリティ判定との少なくとも何れか一つの
判定によって欠陥素子か否かの素子判定を行い、 各判定による判定結果の論理和を基に欠陥素子の置換処
理を行う過程を含むことを特徴とする欠陥素子補償方
法。3. An infrared detector constituted by a plurality of elements, a high-temperature reference heat source, a normal-temperature reference heat source, and an infrared ray directed to a target object during an effective scanning period, and the infrared ray is incident on the infrared ray detector. An optical system that scans infrared rays from the high-temperature and normal-temperature reference heat sources during the invalid scanning period and enters the infrared detector, and a signal processing circuit, and the high-temperature reference heat source output from the infrared detector In the defective element compensation method of determining each element of the infrared detector based on the high temperature data obtained by the method and the normal temperature data obtained by the normal temperature reference heat source and replacing the signal of the defective element with the signal of the normal element, At the time of raising / replacement command, the temperature of the normal temperature reference heat source is set to A [° C], and the temperature of the high temperature reference heat source is set to A +
The temperature is controlled to α (° C.), the normal temperature data and the high temperature data are fetched during the invalid scanning period, and the sensitivity correction coefficient is determined after the element determination as to whether or not the element is defective by one or both of the S / N determination and the DC offset determination. The temperature of the reference heat source at room temperature is controlled to A ± ΔT 1 [° C], and the temperature of the reference heat source at high temperature is controlled to A + α ± ΔT 2 [° C]. And the high-temperature data, the difference of each element from the average value of all the elements is compared as a first linearity determination with a threshold, and an element exceeding the threshold is determined as a defective element. A [° C]
The temperature of the high-temperature reference heat source is controlled to A + α [° C.], and after the sensitivity is corrected, the normal temperature data and the high-temperature data are acquired during the invalid scanning period, and the S / N determination or the DC offset determination or the linearity determination is performed. Determining whether or not the element is a defective element by at least one of the following determinations; and performing a replacement process of the defective element based on a logical sum of the determination results of the respective determinations. .
器と、高温の基準熱源と、常温の基準熱源と、有効走査
期間に目標物方向の赤外線を走査して前記赤外線検知器
に入射し、無効走査期間に前記高温と常温との基準熱源
からの赤外線を走査して前記赤外線検知器に入射する光
学系と、信号処理回路とを有し、前記高温の基準熱源に
よる高温データと前記常温の基準熱源による常温データ
とを基に、前記赤外線検知器の各素子を判定し、欠陥素
子の信号を正常素子の信号に置換する欠陥素子補償方法
に於いて、 電源立上げ時/置換指令時に、前記常温の基準熱源の温
度をA〔°C〕に、又前記高温の基準熱源の温度をA+
α〔°C〕に制御して、無効走査期間に常温データと高
温データとを取込んで第1の感度補正係数を算出し、 次に前記常温の基準熱源の温度をA+ΔT1 〔°C〕
に、又前記高温の基準熱源の温度をA+α+ΔT2 〔°
C〕に制御して、無効走査期間に常温データと高温デー
タとを取込んで第2の感度補正係数を算出し、 前記第1と第2との感度補正係数の素子対応の差を第2
のリニアリティ判定として閾値と比較し、該閾値を超え
る素子を欠陥素子と判定し、 通常動作時に、前記常温の基準熱源の温度をA〔°C〕
に、又前記高温の基準熱源の温度をA+α〔°C〕に制
御して、無効走査期間に常温データと高温データとを取
込み、S/N判定又はDCオフセット判定又はリニアリ
ティ判定との少なくとも何れか一つの判定によって欠陥
素子か否かの素子判定を行い、 各判定による判定結果の論理和を基に欠陥素子の置換処
理を行う過程を含むことを特徴とする欠陥素子補償方
法。4. An infrared detector constituted by a plurality of elements, a high-temperature reference heat source, a normal-temperature reference heat source, and an infrared ray in a direction toward a target object during an effective scanning period, and incident on the infrared ray detector, An optical system that scans infrared rays from the high-temperature and normal-temperature reference heat sources during the invalid scanning period and enters the infrared detector, and a signal processing circuit, and includes high-temperature data obtained from the high-temperature reference heat sources and the normal temperature. In the defective element compensation method of determining each element of the infrared detector based on the normal temperature data from the reference heat source and replacing the signal of the defective element with the signal of the normal element, The temperature of the normal temperature reference heat source is set to A [° C], and the temperature of the high temperature reference heat source is set to A +
α [° C.], taking in room temperature data and high temperature data during the invalid scanning period to calculate a first sensitivity correction coefficient. Then, the temperature of the reference heat source at room temperature is calculated as A + ΔT 1 [° C.]
And the temperature of the hot reference heat source is A + α + ΔT 2 [°
C], the normal temperature data and the high temperature data are taken in the invalid scanning period to calculate a second sensitivity correction coefficient, and a difference between the first and second sensitivity correction coefficients corresponding to the elements is calculated as a second sensitivity correction coefficient.
In comparison with a threshold value, the element exceeding the threshold value is determined as a defective element. During normal operation, the temperature of the normal temperature reference heat source is set to A [° C].
Further, the temperature of the high-temperature reference heat source is controlled to A + α [° C.] to acquire normal temperature data and high temperature data during the invalid scanning period, and at least one of S / N judgment, DC offset judgment, and linearity judgment A defective element compensation method, comprising: performing element determination as to whether or not the element is a defective element by one determination, and performing a replacement process of the defective element based on a logical sum of the determination results of each determination.
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004077349A (en) * | 2002-08-21 | 2004-03-11 | Yamato Scale Co Ltd | Metal detecting device |
| US6900756B2 (en) | 2001-02-21 | 2005-05-31 | Qinetiq Limited | Calibrating radiometers |
| JP2008148129A (en) * | 2006-12-12 | 2008-06-26 | Canon Inc | Imaging apparatus, control method therefor, and program |
| JP2011171892A (en) * | 2010-02-17 | 2011-09-01 | Fujitsu Ltd | Imaging device |
| US11039096B2 (en) | 2017-04-24 | 2021-06-15 | Nec Corporation | Image processing device, image processing method and storage medium |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03246428A (en) * | 1990-02-23 | 1991-11-01 | Fujitsu Ltd | Infrared video device |
| JPH0432378A (en) * | 1990-05-29 | 1992-02-04 | Mitsubishi Heavy Ind Ltd | Infrared ray image pickup device |
| JPH07507390A (en) * | 1992-05-26 | 1995-08-10 | フリル システムズ アクチボラゲット | Detector calibration |
| JPH09130679A (en) * | 1995-10-27 | 1997-05-16 | Fujitsu Ltd | Infrared imaging device |
| JPH09307815A (en) * | 1996-05-10 | 1997-11-28 | Fujitsu Ltd | Infrared imaging device |
-
1999
- 1999-06-23 JP JP17634999A patent/JP3876400B2/en not_active Expired - Fee Related
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03246428A (en) * | 1990-02-23 | 1991-11-01 | Fujitsu Ltd | Infrared video device |
| JPH0432378A (en) * | 1990-05-29 | 1992-02-04 | Mitsubishi Heavy Ind Ltd | Infrared ray image pickup device |
| JPH07507390A (en) * | 1992-05-26 | 1995-08-10 | フリル システムズ アクチボラゲット | Detector calibration |
| JPH09130679A (en) * | 1995-10-27 | 1997-05-16 | Fujitsu Ltd | Infrared imaging device |
| JPH09307815A (en) * | 1996-05-10 | 1997-11-28 | Fujitsu Ltd | Infrared imaging device |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6900756B2 (en) | 2001-02-21 | 2005-05-31 | Qinetiq Limited | Calibrating radiometers |
| JP2004077349A (en) * | 2002-08-21 | 2004-03-11 | Yamato Scale Co Ltd | Metal detecting device |
| JP2008148129A (en) * | 2006-12-12 | 2008-06-26 | Canon Inc | Imaging apparatus, control method therefor, and program |
| JP2011171892A (en) * | 2010-02-17 | 2011-09-01 | Fujitsu Ltd | Imaging device |
| US11039096B2 (en) | 2017-04-24 | 2021-06-15 | Nec Corporation | Image processing device, image processing method and storage medium |
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