JP2001007121A - Horizontal high voltage junction type transistor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce a cut-off voltage that depends on a drain voltage by forming a plurality of high breakdown voltage JFETs, connecting the drain and the source of the transistors in series, and at the same time grounding each gate. SOLUTION: Two high breakdown voltage JFETs (junction-type transistor) are formed closely, connection is made by wiring at a connection point M of the source electrode of the high breakdown voltage JFET at the upper stage and the drain electrode of the high breakdown voltage JFET at the lower stage, and each gate 5a is connected to the ground G. Then, when a voltage of 100-700 V is applied to the high breakdown voltage JFET at the higher stage, most of the voltage is absorbed by the high breakdown voltage JFET at the first stage, and only 50 V or less is applied to the drain side of the high breakdown voltage JFET at the second stage, thus reducing a cut-off voltage depending on a drain voltage.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a lateral high withstand voltage junction type transistor suitable for use as an element upstream of a starting circuit section of a PWM type switching power supply control IC.

[0002]

2. Description of the Related Art FIGS. 5A and 5B are plan views (a) and (b) of FIG. 5 (a) showing an example of the structure of a conventional lateral high voltage junction type transistor (hereinafter simply referred to as a high voltage JFET). . In these figures, 1 is a substrate (p ⁻ ), and 2 is an n ⁻ layer formed on the substrate 1. 3 n ^- n formed from the surface portion of the layer 2 to reach the substrate ^- a layer.

Above the n ^- layer, a p layer 4 for functioning as a pn junction type gate is formed. Also, this is on top of the p layer 4, a p ⁺ layer 5 as a contact layer, a gate electrode 5a in contact with the p ⁺ layer 5
Are formed.

[0004] Reference numeral 8 denotes an n ⁺ layer formed on the n ⁻ layer 2 at a distance of about 80 μm from the n ⁻ layer 3, and this n ⁺ layer functions as a drain electrode. 8a is a drain electrode. The gate electrode 5a and the drain electrode 8a are separated from each other by a thick oxide film 9 as an insulating member, and this space is called a drift channel layer D.

[0005] Reference numeral 10 denotes an n ⁺ layer formed slightly apart from the n ^- layer 3 via the oxide film 9, and the n ⁺ layer 10 functions as a source. 10a is a source electrode formed in contact with the n ⁺ layer 10, 13 is an insulating interlayer film, and 14 is a protective film.

Note that, as shown in FIG.
A source pad 10b is formed to be drawn from 0a, and a drain pad 8b is formed on the drain electrode 8a. The gate electrode 5a is connected to a ground G formed on the outermost periphery (the ground electrode is omitted in FIG. 5b).

FIG. 7 is a sectional view showing the configuration of a lateral power MOSFET which is one of the components of the power supply control IC (the same elements as those in FIG. 5 are denoted by the same reference numerals). The horizontal power MOSFET shown in FIG. 7 has a drift channel layer D and a LOCOS oxide film 9a stacked on a p ⁻ substrate 1 and has a gate electrode 5a and a drain electrode 8a with these layers interposed therebetween, as shown in FIG. The configuration is very similar to that of the JFET.

That is, the difference between the two is that the high breakdown voltage JFET has a gate structure by a diffusion PN junction, whereas the lateral power MOSFET has an insulating gate structure in which a voltage is applied via a gate oxide film. (Circled part).

[0009]

The relationship between the source potential of the high breakdown voltage JFET as shown in FIG. 5, the current flowing through the JFET, and the cutoff voltage is as shown in FIG.

That is, when VD = 100V, 35V
On the other hand, the cut-off voltage value is 45 V or more when VD = 700 V. High pressure resistance J
For the FET, a lateral power MOSFET is used to increase the breakdown voltage.
Although there is no problem since the technique of T can be followed, the cut-off characteristic eventually has a large drain voltage (VD) dependency, and an unstable voltage is supplied to downstream elements.

This drain voltage dependency is due to the high breakdown voltage JFE
Devices that do not have a high breakdown voltage downstream of T (MOSFETs and BJs)
T = Bipolar Junction Transistor). SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems of the related art, and has as its object to provide a PWM type switching power supply in which a cutoff voltage depending on a drain voltage (VD) is reduced.

[0012]

In order to achieve the above object, according to the present invention, there is provided a high withstand voltage JFET used as an element upstream of a starting circuit of a PWM type switching power supply control IC. A plurality of the high-withstand-voltage JFETs are formed, the drains and the sources of the transistors are connected in series, and the respective gates are grounded.

According to a second aspect of the present invention, in the high breakdown voltage JFET according to the first aspect, a high voltage is applied to a drain of the high breakdown voltage JFET and a reduced voltage is output from a source.

According to a third aspect of the present invention, in the high breakdown voltage JFET according to the first or second aspect, when the voltage applied to the drain is several hundred volts, the voltage downstream of the source is reduced to about several tens of volts. Features.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in detail with reference to the drawings. 1 (a) and 1 (b) are views showing an example of an embodiment of the present invention, wherein FIG. 1 (a) is a plan view and FIG. 1 (b) is a sectional view of FIG. 1 (a). In these figures, the same elements as those in FIG. 5 are denoted by the same reference numerals.

FIG. 5A shows two high breakdown voltage JFETs shown in FIG.
Are formed close to each other, and the source electrode and the drain electrode of these two high-breakdown-voltage JFETs are connected by the wiring 22b, in which the high-breakdown-voltage JFETs are connected in series.
Although not shown in the figure, the gate electrode 5a is connected to the ground G
(The ground electrode is omitted in FIG. 1b).

FIG. 2 is a diagram in which the two high breakdown voltage JFETs shown in FIG. 1 are symbolized in an equivalent circuit. Here, the point M is the source electrode of the upper high-voltage JFET and the lower high-voltage JFET.
And the gate 5a of each
Is grounded to the ground G. In such a configuration, the drain voltage dependency of the cut-off voltage can be reduced because the drain voltage is regulated in two stages by two high-voltage JFETs.

For example, 100 to 700
When the voltage VD of V is applied, most of the voltage is absorbed by the high-voltage JFET of the first stage, and only 50 V or less is applied to the drain side of the second-stage JFET (that is, the source side of the first-stage JFET). Therefore, the cut-off characteristics viewed from the downstream of the second stage appear to have sufficiently small drain voltage dependence.

FIG. 3 shows the relationship between the source potential, the current flowing through the high-voltage JFET, and the cutoff voltage using the high-voltage JFET shown in FIG. That is, when VD = 100V, the cut-off is performed at about 30V,
Even when D = 700 V, the cut-off voltage value is about 31 V, which indicates that the drain voltage dependence of the cut-off voltage is small.

FIGS. 4 (a) and 4 (b) show another embodiment. FIG. 4 (a) is a plan view, and FIG. 4 (b) is a sectional view taken along a line AB in FIG. 4 (a). . In this example, the drain 38 is formed at the center of the circle, and the first gate 26 is formed around the drain 38 via the first drift channel D1.

Further, a second gate 36 is formed via a second drift channel D2, and a source 22 and a ground G are sequentially formed. The first and second gates are connected to a ground (omitted in FIG. B) by a connection line 40. The source 22 is insulated from the ground G and is drawn out of the circle to form a source pad 22a.

Even in such a configuration, a circuit similar to the equivalent circuit shown in FIG. 2 is obtained, and almost the same result is obtained. In this embodiment, the high breakdown voltage JFET of the embodiment shown in FIG.
Area can be reduced by about 70%.

The foregoing description of the present invention has been presented by way of illustration and example only and in certain preferred embodiments. Accordingly, the present invention has many modifications, without departing from its essence,
It will be apparent to those skilled in the art that variations can be made. The scope of the present invention, which is defined by the description in the appended claims, is intended to cover alterations and modifications within the scope.

[0024]

As described above, according to the present invention,
In the high-voltage JFET used as an element upstream of the start-up circuit section of the power supply control IC, a plurality of the high-voltage JFETs were formed, and the drains and sources of the transistors were connected in series and the respective gates were grounded.
High voltage JFET for switching power supply of PWM system with reduced cut-off voltage depending on drain voltage (VD)
Can be realized.

[0025]

[Brief description of the drawings]

FIG. 1 is a lateral high withstand voltage junction type transistor (high withstand voltage JFET) used in a PWM switching power supply of the present invention.
It is a figure showing an example of.

FIG. 2 is an explanatory diagram showing an equivalent circuit of a lateral high voltage junction type transistor used in a PWM switching power supply of the present invention.

FIG. 3 is a diagram showing a relationship between a source potential, a current flowing through a high breakdown voltage JFET, and a cutoff voltage.

FIG. 4 is a diagram showing another embodiment of the present invention.

FIG. 5 is a diagram showing an example of a conventional horizontal high voltage transistor.

FIG. 6 is a diagram showing a relationship between a source potential, a current flowing through a JFET, and a cutoff voltage.

FIG. 7 is a diagram showing a general configuration of a lateral MOSFET.

[Explanation of symbols]

Reference Signs List 1 substrate 2, 3 n ^- layer 4 p layer 5 p ⁺ layer 5 a gate electrode 8, 10 n ⁺ layer 8 a drain electrode 8 b drain butt 9 oxide film 10 a source electrode 13 insulating film 14 protective film

Claims (3)

[Claims] 1. A horizontal high-voltage junction type transistor used as an element upstream of a start-up circuit section of a power supply control IC, a plurality of said horizontal high-voltage junction type transistors are formed, and a drain and a source of these transistors are connected in series. A lateral high-voltage junction transistor, wherein each gate is grounded. 2. The lateral high withstand voltage junction transistor according to claim 1, wherein a high voltage is applied to a drain of the lateral high withstand voltage junction transistor and a reduced voltage is output from a source. 3. When the voltage applied to the drain is several hundred volts, the voltage downstream of the source is reduced to several tens of volts.
3. The lateral high withstand voltage junction type transistor according to claim 1, wherein: