JP2000286298A - Electronic component mounting method and device - Google Patents

Abstract

[PROBLEMS] To join an electronic component to a substrate with good productivity and high reliability by interposing an anisotropic conductive layer having conductive particles without requiring a sealing resin step or a bump leveling step. An electronic component mounting method and apparatus are provided. A bump (3) and a substrate electrode (5) are aligned with an anisotropic conductive layer (10) containing conductive particles (10a) and an inorganic filler (6f) in an insulating resin. The pressure is applied with a pressing force of 20 gf or more to correct the warpage of the chip and the substrate, and to cure the insulating resin while crushing the bumps, thereby joining the chip and the substrate.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed circuit board for an electronic circuit (hereinafter referred to as a "substrate" as a typical example. A method of mounting an electronic component on a circuit board on which an electronic component such as an IC chip or a surface acoustic wave (SAW) device is mounted in a single state (bare IC in the case of an IC chip). The present invention relates to an electronic component unit in which the electronic component is mounted on the substrate by the apparatus and the mounting method.

[0002]

2. Description of the Related Art Today, electronic circuit boards have been used in various products, and their performance has been improved day by day, the frequency used on the circuit boards has been increased, and the flip chip has a low impedance. The mounting is a mounting method suitable for electronic devices using high frequencies. In addition, with the increase in portable devices, flip-chip mounting in which an IC chip is mounted on a circuit board in a bare state instead of a package is required. For this reason, a certain number of defective products are mixed in an IC chip when the IC chip is mounted on a circuit board as it is alone, or in an IC chip mounted on an electronic device or a flat panel display. In addition to the above-mentioned flip chip, CSP (Chip Size Package)
e), BGA (Ball Grid Array) and the like are being used.

[0003] A conventional method for bonding an IC chip to a circuit board of an electronic device (conventional example 1) is disclosed in Japanese Patent Publication No. 06-663.
There is one disclosed in Japanese Patent Application Publication No. 55-55 and the like. Figure 1
It is shown in FIG. As shown in FIG. 15, the Ag paste 74 is transferred to the IC chip 71 on which the bumps 73 are formed, connected to the electrodes 75 of the circuit board 76, and then the Ag paste 74 is cured. And circuit board 7
The method of pouring between 6 is generally known.

As a method of bonding an IC chip to a liquid crystal display (conventional example 2), an anisotropic conductive film 80 is used as shown in Japanese Patent Publication No. Sho 62-6652 shown in FIG. Then, the anisotropic conductive adhesive layer 81 constituted by adding conductive fine particles 82 to the insulating resin 83 is peeled off from the separator 85 to remove the substrate or the liquid crystal display 8.
4. The semiconductor in which the anisotropic conductive adhesive layer 81 is interposed between the substrate 84 and the lower surface of the IC chip 86 other than under the Au bump 87 by applying to the glass of FIG. The connection structure of a chip is generally known.

In Conventional Example 3, a UV curable resin is applied to a substrate, an IC chip is mounted thereon, and the resin between the two is cured by irradiating UV light while applying pressure.
A method of maintaining contact between the two by the contraction force is known.

[0006] As described above, to bond IC chips,
After die bonding an IC chip such as a flat package on a lead frame, connecting the electrodes of the IC chip and the lead frame by wire bonding, forming a package by resin molding, printing cream solder on the circuit board, The above-described bonding has been performed by performing a process of mounting a flat package IC thereon and performing reflow. These SMTs (Surface Mount)
In the method called “Technology”, the process of packaging an IC is long, and it takes time to produce IC components, and it is difficult to reduce the size of a circuit board.
For example, when the IC chip is sealed in a flat pack, it requires about 4 to 10 times the area of the IC chip, which is a factor that hinders miniaturization.

On the other hand, a flip chip method in which an IC chip is directly mounted on a substrate in a bare state has recently been used in order to shorten the process and reduce the size and weight. This flip chip method uses bump formation, bump leveling, Ag / Pd paste transfer,
Stud bump bonding (SBB), which performs mounting, inspection, sealing with a sealing resin, and inspection, and bump formation on an IC chip and UV curing resin application on a substrate are performed in parallel. UV curing and inspection of resin
Many construction methods such as resin bonding have been developed.

[0008]

However, any method has a disadvantage that it takes time to cure the paste for joining the bumps of the IC chip and the electrodes of the substrate and to apply and cure the sealing resin, resulting in poor productivity. Was. Further, it is necessary to use ceramic or glass whose warpage is controlled as a circuit board, which has a disadvantage of being expensive.

In the method of using a conductive paste as a bonding material as in Conventional Example 1, bumps of an IC chip need to be leveled and flattened in order to stabilize the transfer amount. Was.

[0010] In a bonding structure using an anisotropic conductive adhesive as in Conventional Example 2, one using glass as a substrate of a circuit board has been developed. Since it is necessary to sandwich the conductive particles between the two electrodes for electrical conduction between the two electrodes, it is necessary to uniformly disperse the conductive particles in the conductive adhesive. Difficult to distribute evenly,
In order to cause short-circuit due to abnormal dispersion of particles, to use expensive conductive adhesives, and to make bumps uniform in height, bumps of IC chip electrodes have to be formed by electroplating.

In the bonding method using a UV-curable resin as in Conventional Example 3, the height variation of the bumps must be ± 1 (μm) or less, and the resin substrate (glass epoxy substrate) There is a problem that it cannot be bonded to a substrate having poor flatness such as the above. Also in the method using solder, it is necessary to pour and harden a sealing resin after joining to reduce the difference in thermal expansion and contraction between the substrate and the IC chip. It takes 2 to 8 hours to cure the resin sealing, and there is a problem that productivity is extremely poor.

SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to solve the above-mentioned problems, and, after joining a circuit board and an electronic component, to a sealing resin step to be poured between the electronic component and the substrate, and to keep the height of the bump constant. A method and apparatus for mounting an electronic component on a circuit board that joins an electronic component to a substrate with good productivity and high reliability by interposing an anisotropic conductive layer having conductive particles without the need for a bump leveling step for aligning It is to provide an electronic component unit in which the electronic component is mounted on the substrate by the mounting method.

[0013]

In order to achieve the above object, the present invention is configured as follows.

According to the first aspect of the present invention, similarly to wire bonding, a ball is formed at the tip of a metal wire by electric spark, and the formed ball is subjected to ultrasonic thermocompression bonding to an electrode of an electronic component by a capillary. Form bumps,
While interposing an anisotropic conductive layer containing conductive particles in an insulating resin containing an inorganic filler, the electrodes of the electronic component are aligned with the electrodes of the circuit board, and the electronic component is mounted on the substrate. Then, while heating from the electronic component side, heating from the substrate side, or heating from both the electronic component side and the substrate side, the electronic component is bumped on the circuit board by a tool per bump. 2
By pressing with a pressing force of 0 gf or more, while correcting the warpage of the substrate and crushing the bump, the insulating resin of the anisotropic conductive layer interposed between the electronic component and the circuit board is cured, A method of mounting an electronic component, wherein the electronic component and the circuit board are joined to electrically connect the electrode of the electronic component and the electrode of the circuit board.

According to a second aspect of the present invention, after forming the bump, the electrode of the electronic component and the electrode of the circuit board are aligned with the anisotropic conductive layer interposed therebetween. Before mounting the electronic components on the board,
The electronic component mounting method according to the first aspect, wherein the formed bump is once pressed with a load of 20 gf or less to adjust the tip so as to prevent the neck portion of the bump from falling down.

According to a third aspect of the present invention, the insulating resin of the anisotropic conductive layer is an insulating thermosetting epoxy resin, and the inorganic filler to be mixed with the insulating thermosetting epoxy resin is The electronic component mounting method according to the first or second aspect, wherein the amount is 5 to 90 wt% of the insulating thermosetting epoxy resin.

According to a fourth aspect of the present invention, the insulating resin of the anisotropic conductive layer is initially liquid when applied to the substrate, and after being applied to the substrate, the substrate is placed in a furnace. After hardening the applied insulating resin liquid, or by pressing the applied insulating resin liquid with a heated tool, the electronic component is semi-solidified, and then the electronic component is mounted on the substrate. And a mounting method of the electronic component according to any one of the first to third aspects.

According to the fifth aspect of the present invention, similarly to wire bonding, a ball is formed at the tip of a metal wire by electric spark, and the formed ball is subjected to ultrasonic thermocompression bonding to an electrode of an electronic component by a capillary. Forming a gold bump, without leveling the formed bump, interposing an anisotropic conductive layer containing conductive particles in an insulating resin containing an inorganic filler, The electronic component is mounted on the substrate by aligning the electrodes with the electrodes, and thereafter, a tip is trimmed by applying a load from the upper surface side of the electronic component using a tool to prevent the neck portion of the gold bump from falling down. And applying an ultrasonic wave to metal-join the gold bump and the electrode of the substrate, and then heating the electronic component from the upper surface side, or While heating, or while heating from both the electronic component side and the substrate side, the electronic component is pressed against the circuit board with a pressing force of 20 gf or more per bump to correct the warpage of the board and the bump. While crushing, the insulating resin of the anisotropic conductive layer interposed between the electronic component and the circuit board is cured, and the electronic component and the circuit board are joined to form the electrodes of the electronic component. There is provided a method for mounting an electronic component, wherein the electrodes of the circuit board are electrically connected.

According to a sixth aspect of the present invention, the electronic component has a plurality of electrodes. Before the alignment, the electronic component is provided on the circuit board as the anisotropic conductive layer. After attaching a solid anisotropic conductive film sheet having a shape size smaller than the outer dimensions connecting the electrodes, the alignment is performed, and in the bonding, while heating the anisotropic conductive film sheet, Pressing and pressing the component against the circuit board, while simultaneously correcting the warpage of the circuit board, curing the insulating resin interposed between the electronic component and the circuit board, and curing the electronic component and the An electronic component mounting method according to any one of the first to fifth aspects, wherein a circuit board is joined.

According to the seventh aspect of the present invention, when forming a gold ball by electric spark at the tip of a metal wire in the same manner as wire bonding when forming the bump on the electronic component, the Chamfer angle is set to 100. ° or less, and
According to any one of the first to sixth aspects, the gold bump having a substantially conical tip is formed on the electrode of the electronic component by the capillary having a tip shape having no flat portion at a portion in contact with the gold ball. A method for mounting the electronic component described above is provided.

According to an eighth aspect of the present invention, similarly to wire bonding, a ball is formed at the tip of a metal wire by electric spark, and the formed ball is formed on an electrode of an electronic component by a capillary. Without leveling the formed bumps, aligning the electrodes of the electronic component with the electrodes of the circuit board while interposing an anisotropic conductive layer containing conductive particles in an insulating resin containing an inorganic filler. The electronic component is mounted on the substrate by heating the electronic component from the upper surface of the electronic component with a tool heated to a predetermined temperature. While performing the correction of the warp, curing the insulating resin of the anisotropic conductive layer interposed between the electronic component and the circuit board,
Thereafter, after a predetermined time, the electronic component and the circuit board are reduced while reducing the stress at the time of curing the insulating resin of the anisotropic conductive layer by lowering the pressing force to a pressure P2 lower than the pressure P1. A method for mounting an electronic component, wherein the method further comprises joining to electrically connect the electrode of the electronic component and the electrode of the circuit board.

According to a ninth aspect of the present invention, the pressure P1
Is 20 gf / bump or more, and the pressure P2 is the pressure P1
An electronic component mounting method according to an eighth aspect, wherein the mounting method is equal to or less than.

According to a tenth aspect of the present invention, there is provided an apparatus for attaching an anisotropic conductive layer containing conductive particles to an insulating resin containing an inorganic filler to an electrode or an electronic component of a circuit board; A device that forms a ball by electric spark at the tip of a metal wire in the same manner as wire bonding on the electrode of the electrode, and forms the bump without leveling by forming the ball by ultrasonic thermocompression bonding to the electrode on the substrate by a capillary, A device for aligning and mounting electronic components on the electrodes of the circuit board and a tool are used to heat and mount the electronic components on the circuit board for 20 bumps per bump.
gf is pressed by a pressing force of not less than gf to correct the warpage of the board, while curing the insulating resin of the anisotropic conductive layer interposed between the electronic component and the circuit board, and curing the electronic component. And an apparatus for electrically connecting the electrode of the electronic component and the electrode of the circuit board by joining the electronic component and the circuit board.

According to an eleventh aspect of the present invention, the insulating resin of the anisotropic conductive layer is an insulating thermosetting epoxy resin, and the inorganic filler to be mixed with the insulating thermosetting epoxy resin is An electronic component mounting apparatus according to the tenth aspect, wherein the amount is 5 to 90 wt% of the insulating thermosetting epoxy resin.

According to a twelfth aspect of the present invention, the insulating resin of the anisotropic conductive layer is a liquid, and a dispenser for applying the liquid of the insulating resin to the substrate; And a furnace for inserting the applied substrate liquid and curing the inserted insulating substrate liquid to make the insulating resin semi-solid.
Alternatively, there is provided an electronic component mounting apparatus according to the eleventh aspect.

According to a thirteenth aspect of the present invention, the insulating resin of the anisotropic conductive layer is a liquid, and a dispenser for applying the liquid of the insulating resin to the substrate; An apparatus for mounting an electronic component according to the tenth or eleventh aspect, further comprising: a device for semi-solidifying the insulating resin by pressing the applied liquid of the insulating resin.

According to a fourteenth aspect of the present invention, there is provided an apparatus for attaching an anisotropic conductive layer containing conductive particles to an insulating resin containing an inorganic filler to an electrode or an electronic component of a circuit board; A device that forms a ball by electric spark at the tip of a metal wire in the same manner as wire bonding on the electrode of the electrode, and forms an unleveled gold bump by forming the ball by ultrasonic thermocompression bonding to the electrode of the substrate by a capillary, A device for aligning and mounting the electronic component on the electrode of the circuit board, and applying a load from the upper surface of the electronic component using a tool to adjust the tip so as to prevent the neck portion of the gold bump from falling down. A device that applies ultrasonic waves to metal-bond the gold bumps and the electrodes of the substrate, and heating the electronic components to the circuit board while heating with a tool. The insulating resin of the anisotropic conductive layer interposed between the electronic component and the circuit board is pressed by pressing with a pressing force of 20 gf or more per bump to correct the warpage of the substrate and crush the bump. Curing, and mounting the electronic component and the circuit board by electrically connecting the electrode of the electronic component and the electrode of the circuit board. Provide equipment.

According to a fifteenth aspect of the present invention, before the alignment, the anisotropic conductive layer is formed on the circuit board as a solid body having a shape smaller than an outer dimension connecting electrodes of the electronic component. An apparatus for attaching an anisotropic conductive film sheet, and an apparatus for aligning and mounting the circuit board and the electronic component thereafter, and bonding, while heating the anisotropic conductive film sheet, Is pressed against the circuit board to correct the warpage of the circuit board at the same time, while curing the anisotropic conductive film sheet interposed between the electronic component and the circuit board. An electronic component mounting apparatus according to any one of the tenth to thirteenth aspects, further comprising an apparatus for bonding the electronic component and the circuit board.

According to a sixteenth aspect of the present invention, the apparatus for forming a gold ball has a tip shape in which a flat portion is not provided at a portion in contact with the gold ball and has a Chamfer angle of 100 ° or less. Having a capillary,
The electronic component mounting apparatus according to any one of the tenth to fifteenth aspects, wherein the capillary forms the gold bump having a substantially conical tip on the electrode of the electronic component.

According to a seventeenth aspect of the present invention, there is provided an apparatus for attaching an anisotropic conductive layer containing conductive particles to an insulating resin containing an inorganic filler to a circuit board or an electronic component; Similar to wire bonding, a ball is formed at the tip of a metal wire by electric spark, and this is formed on the electrode of the substrate by a capillary to form a bump that does not level, and the electronic component is formed on the electrode of the circuit board. The electronic component is pressed against the circuit board by the pressure P1 as a pressing force while being heated from the upper surface of the electronic component by a device that is aligned and mounted and a tool heated to a predetermined temperature, and warping of the board is performed. While performing the correction, the insulating resin interposed between the electronic component and the circuit board is cured, and then, after a predetermined time, the pressure is reduced to the pressure. The electronic component and the circuit board are joined while lowering the pressure at the pressure P2 lower than P1 to relieve the stress at the time of curing the insulating resin of the anisotropic conductive layer. And a device for electrically connecting the above-mentioned electrodes.

According to an eighteenth aspect of the present invention, the pressure P
1 is 20 gf / bump or more, and the pressure P2 is the pressure P
An electronic component mounting apparatus according to a seventeenth aspect, wherein the mounting rate is equal to or less than 1/2 of 1 is provided.

According to a nineteenth aspect of the present invention, the inorganic filler to be mixed with the insulating resin of the anisotropic conductive layer has an average particle diameter of 3 μm or more.
The electronic component mounting method according to any one of the above aspects is provided.

According to a twentieth aspect of the present invention, the inorganic filler compounded in the insulating resin of the anisotropic conductive layer is a plurality of types of inorganic fillers having different average particle diameters. A method for mounting an electronic component according to any one of the nineteenth aspects is provided.

According to a twenty-first aspect of the present invention, the inorganic filler compounded in the insulating resin of the anisotropic conductive layer is at least two kinds of inorganic fillers having a plurality of different average particle sizes, The average particle size of one of the at least two kinds of inorganic fillers is different from the average particle size of the other one of the at least two kinds of inorganic fillers by at least twice. 19
The electronic component mounting method according to any one of the above aspects is provided.

According to a twenty-second aspect of the present invention, the inorganic filler compounded in the insulating resin of the anisotropic conductive layer is at least two kinds of inorganic fillers having a plurality of different average particle diameters, One of the at least two types of inorganic fillers has an average particle size of more than 3 μm, and the other of the at least two types of inorganic fillers has an average particle size of 3 μm or less. A method for mounting the electronic component according to any one of aspects 3 and 19 is provided.

According to a twenty-third aspect of the present invention, the inorganic filler to be mixed with the insulating resin of the anisotropic conductive layer is at least two kinds of inorganic fillers having a plurality of different average particle diameters, One of the at least two types of inorganic fillers has a large average particle diameter, and is made of the same material as the insulating resin. Electronic component mounting method.

According to a twenty-fourth aspect of the present invention, the inorganic filler compounded in the insulating resin of the anisotropic conductive layer is at least two kinds of inorganic fillers having a plurality of different average particle sizes, One of the at least two types of inorganic fillers having a larger average particle diameter is softer than the epoxy resin as the insulating resin, and the one inorganic filler is compressed, thereby exhibiting a stress relaxing action. A method for mounting an electronic component according to any one of aspects 1 to 3, 19 is provided.

According to a twenty-fifth aspect of the present invention, the anisotropic conductive layer is formed such that a portion in contact with either the electronic component or the substrate has a smaller amount of the inorganic filler than other portions. An electronic component mounting method according to any one of the first to third and 19th to 24th aspects.

According to a twenty-sixth aspect of the present invention, the anisotropic conductive layer is located at a portion in contact with either the electronic component or the substrate and is made of the same insulating resin as the insulating resin. A first resin layer containing the inorganic filler,
The electronic component mounting method according to the twenty-fifth aspect, further comprising: a second resin layer that is in contact with the first resin layer and is made of an insulating resin having a smaller amount of the inorganic filler than the first resin layer. provide.

According to a twenty-seventh aspect of the present invention, the anisotropic conductive layer is such that a portion in contact with the electronic component and the substrate has a smaller amount of the inorganic filler than other portions. An electronic component mounting method according to an aspect is provided.

According to a twenty-eighth aspect of the present invention, the anisotropic conductive layer has an amount of the inorganic filler smaller than that of the first resin layer on a side of the first resin layer opposite to the second resin layer. The electronic component according to the twenty-sixth aspect, further comprising a third resin layer formed of a small amount of insulating resin, wherein the first resin layer and the third resin layer are in contact with the electronic component and the substrate, respectively. Provide an implementation method.

According to a twenty-ninth aspect of the present invention, the portion that comes into contact with the electronic component and the substrate has the amount of the inorganic filler less than 20 wt%, while the other portion has the amount of the inorganic filler. A method for mounting an electronic component according to the twenty-seventh aspect, wherein the content is 20 wt% or more.

According to a thirtieth aspect of the present invention, each of the first resin layer and the third resin layer has an inorganic filler content of less than 20 wt%, while the second resin layer has an inorganic filler content of less than 20 wt%. 2nd filler whose amount is 20 wt% or more
An electronic component mounting method according to an eighth aspect is provided.

According to a thirty-first aspect of the present invention, the anisotropic conductive layer is such that the amount of the inorganic filler gradually increases from a portion in contact with one of the electronic component or the substrate toward another portion. Or the 1st which was made to decrease gradually
An electronic component mounting method according to any one of aspects 3, 19 to 24, is provided.

According to a thirty-second aspect of the present invention, in the anisotropic conductive layer, the amount of the inorganic filler is gradually or stepwise from a portion in contact with the electronic component and the substrate to another portion. A method for mounting an electronic component according to the thirty-first aspect, wherein the mounting method is reduced.

According to the thirty-third aspect of the present invention, in a portion which comes into contact with the electronic component, an insulating resin which improves adhesion to a film material used for the surface of the electronic component is used, while the portion which comes into contact with the substrate is used. In a part, an electronic component mounting method according to any one of the twenty-fifth, twenty-seventh, twenty-ninth, and thirty aspects, wherein an insulating resin that improves adhesion to a material on a substrate surface is used.

According to a thirty-fourth aspect of the present invention, the resin layer in contact with the electronic component uses an insulating resin that improves adhesion to a film material used on the surface of the electronic component, while the resin layer is The method for mounting an electronic component according to any one of the twenty-sixth, twenty-eighth, thirty-second, and thirty-second aspects, wherein the resin layer in contact with the resin layer uses an insulating resin that improves adhesion to a material on the substrate surface. I do.

According to a thirty-fifth aspect of the present invention, in the anisotropic conductive layer, a portion in contact with one of the electronic component and the substrate does not contain the inorganic filler. , 19 to 24, a mounting method of the electronic component.

According to a thirty-sixth aspect of the present invention, the anisotropic conductive layer is located at a portion in contact with either the electronic component or the substrate and is made of the same insulating resin as the insulating resin. A first resin layer containing the inorganic filler,
A method for mounting an electronic component according to a thirty-fifth aspect, comprising: a second resin layer which is in contact with the first resin layer and is made of an insulating resin not containing the inorganic filler.

According to a thirty-seventh aspect of the present invention, the anisotropic conductive layer has an electronic part according to the thirty-fifth aspect, in which a portion in contact with the electronic component and the substrate does not contain the inorganic filler. Provides a method for mounting components.

According to a thirty-eighth aspect of the present invention, the anisotropic conductive layer is formed on the opposite side of the first resin layer from the second resin layer by an insulating resin containing no inorganic filler. The electronic component mounting method according to the thirty-sixth aspect, further comprising a third resin layer, wherein the first resin layer and the third resin layer respectively contact the electronic component and the substrate.

According to a thirty-ninth aspect of the present invention, the portions that come into contact with the electronic component and the substrate do not contain the inorganic filler, while the other portions have the inorganic filler content of 20 wt%. An electronic component mounting method according to the thirty-seventh aspect described above is provided.

According to a fortieth aspect of the present invention, each of the first resin layer and the third resin layer does not contain the inorganic filler, whereas the second resin layer contains the inorganic filler. The electronic component mounting method according to the thirty-eighth aspect, wherein is equal to or greater than 20 wt%.

According to a forty-first aspect of the present invention, the anisotropic conductive layer is made of an insulating resin which is located at a portion in contact with the electronic component and the substrate and is made of an insulating resin containing the inorganic filler. A first resin layer and a fifth resin layer which are located at an intermediate portion between the electronic component and the substrate and are made of an insulating resin having a smaller amount of the inorganic filler than the fourth resin layer; An electronic component mounting method according to any one of aspects 19 to 24 is provided.

According to a forty-second aspect of the present invention, the anisotropic conductive layer is made of an insulating resin which is located at a portion in contact with the electronic component and the substrate and is made of an insulating resin containing the inorganic filler. The first to third, the 19th to the 24th, which include a resin layer and a fifth resin layer which is located at an intermediate portion between the electronic component and the substrate and is made of an insulating resin containing no inorganic filler. An electronic component mounting method according to any one of the aspects is provided.

[0056] According to a forty-third aspect of the present invention, the anisotropic conductive layer extends from the portion in contact with the electronic component and the substrate to the intermediate portion between the electronic component and the substrate. An electronic component mounting method according to any one of the first to third and 19th to 24th aspects, wherein the filler amount is gradually reduced.

According to a forty-fourth aspect of the present invention, the anisotropic conductive layer includes a portion near the electronic component, a portion near the substrate, and a portion near the electronic component and a portion near the substrate. The electronic component mounting method according to any one of the first to third and the 19th to 24th aspects, wherein the amount of the inorganic filler is reduced in the order of the intermediate portion of the electronic component.

According to the forty-fifth aspect of the present invention, the amount of inorganic filler in the portion of the anisotropic conductive layer in the vicinity of the electronic component and in the portion of the anisotropic conductive layer in the vicinity of the substrate is determined by the anisotropic conductive layer of the electronic component. The electronic component according to the forty-third or forty-fourth aspect, wherein the linear expansion coefficient of the portion in contact with the layer and the linear expansion coefficient of the portion of the substrate in contact with the anisotropic conductive layer are respectively blended. Provide an implementation method.

According to the forty-sixth aspect of the present invention, the bump formed on the electrode of the electronic component is interposed between the insulating resin and the cured anisotropic conductive layer in which the inorganic filler is blended and cured, and the bump is crushed. In this state, the electrodes of the electronic component are electrically connected to the electrodes of the circuit board by being joined to the electrodes of the circuit board, and the anisotropic conductive layer is
An electronic component unit is provided, wherein a portion in contact with one of the electronic component and the substrate has a smaller amount of the inorganic filler than other portions.

According to the forty-seventh aspect of the present invention, the bump formed on the electrode of the electronic component is interposed between the insulating resin and the cured anisotropic conductive layer in which the inorganic filler is blended and cured. In this state, the electrodes of the electronic component are electrically connected to the electrodes of the circuit board by being joined to the electrodes of the circuit board, and the anisotropic conductive layer is
A first resin layer in which the inorganic filler is blended with the same insulating resin as the insulating resin, the first resin layer being located at a portion in contact with either the electronic component or the substrate, and contacting the first resin layer; Further, there is provided an electronic component unit comprising a second resin layer made of an insulating resin having a smaller amount of the inorganic filler than the first resin layer.

According to a forty-eighth aspect of the present invention, when the ultrasonic wave is applied to metal-join the gold bump and the electrode of the substrate, the electronic component is heated from the upper surface side, or A method for mounting an electronic component according to a fifth aspect is provided wherein the heating is performed from the substrate side or from both the electronic component side and the substrate side. According to the forty-ninth aspect of the present invention, the first to ninth, 19 to 45, 4
An electronic component unit in which the electronic component is mounted on the substrate by the electronic component mounting method according to any one of the eighth to eighth aspects.

According to a fiftieth aspect of the present invention, the bumps are first to bumps formed by plating or printing.
9. A method for mounting an electronic component according to any one of aspects 9, 19 to 45.

According to a fifty-first aspect of the present invention, the bump is a bump formed by plating or printing.
49. An electronic component unit according to any one of the above aspects.

According to a fifty-second aspect of the present invention, the anisotropic conductive layer is formed by adding conductive particles having an average diameter larger than the average particle size of the inorganic filler to a solid insulating resin containing the inorganic filler. No. 1 to 9, 19 to 45, 5
0. An electronic component mounting method according to any one of the above aspects.

According to a fifty-third aspect of the present invention, the anisotropic conductive layer is formed by adding conductive particles having a larger average particle diameter to the solid insulating resin containing the inorganic filler. The electronic component mounting apparatus according to any one of the tenth to eighteenth aspects, wherein

According to a fifty-fourth aspect of the present invention, the anisotropic conductive layer is formed by adding conductive particles having a larger average particle diameter to the solid insulating resin containing the inorganic filler. The electronic component unit according to any one of the 46th to 49th and 51th aspects, wherein According to a fifty-fifth aspect of the present invention, an apparatus for applying the ultrasonic wave to metal-join the gold bump and the electrode of the substrate is provided from the upper surface side of the electronic component, or from the substrate side, Alternatively, there is provided the electronic component mounting apparatus according to a fourteenth aspect, further comprising a heating member that heats from both the electronic component side and the substrate side, and wherein the heating member heats the metal member during the metal joining.

[0067]

Embodiments of the present invention will be described below in detail with reference to the drawings.

(First Embodiment) Hereinafter, a method for mounting an IC chip on a circuit board as an example of a method and an apparatus for mounting an electronic component according to a first embodiment of the present invention, a device for mounting the IC chip, and the above mounting method will be described. An electronic component unit or module, for example, a semiconductor device in which the IC chip is mounted on the substrate will be described with reference to FIGS.

First, a method for mounting an IC chip on a circuit board according to the first embodiment of the present invention will be described with reference to FIGS. 1A to 4C.
This will be described with reference to FIGS.

In an IC chip 1 which is an example of the electronic component in FIG. 1A, bumps (projections) are formed on an Al pad electrode 2 of the IC chip 1 by an operation as shown in FIGS. 3A to 3F by a wire bonding apparatus. (Electrode) 3 is formed. That is, a ball 96 is formed at the lower end of a wire 95 protruding from a capillary 93 serving as a holder in FIG.
In FIG. 3B, the capillary 93 holding the wire 95 is lowered, and the ball 96 is joined to the electrode 2 of the IC chip 1 to substantially form the shape of the bump 3, while the wire 95 is sent downward in FIG. The ascending of the capillary 93 is started, and FIG.
By moving the capillary 93 to a substantially rectangular loop 99 as shown in FIG. 3D to form a curved portion 98 on the upper part of the bump 3 as shown in FIG.
(B), the bump 3 as shown in FIG. 3 (F) is formed.
Alternatively, the wire 95 is connected to the capillary 93 in FIG.
And the capillary 93 is lifted up and pulled up, so that a metal wire, for example, a gold wire (gold wire) 95 (for example, tin, aluminum, copper, or a metal such as There is a wire of an alloy containing a trace element, etc., but in the following embodiment, a gold wire (gold wire) will be described as a representative example), and the shape of the bump 3 as shown in FIG. It may be formed. FIG. 1B shows a state in which the bumps 3 are formed on the respective electrodes 2 of the IC chip 1 in this manner.

Next, in this embodiment, when the IC chip 1 in which the bumps 3 are formed on the respective electrodes 2 is mounted on the circuit board 4, an anisotropic conductive film (A) is used as an example of the anisotropic conductive layer.
CF) sheet 10 is interposed. The anisotropic conductive film sheet 10 contains an inorganic filler 6f having an average diameter smaller than the average diameter of the conductive particles 10a in the insulating thermosetting solid resin constituting the anisotropic conductive film sheet 10. For example, as shown in FIG. 36, when the average diameter of the conductive particles 10a is 0.5 μm, which is smaller than the average diameter of the conductive particles 10a in the conventional ACF of 1.0 μm, the average diameter of the particles of the inorganic filler 6f is 3 μm. ５5 μm. As the conductive particles 10 a included in the anisotropic conductive film sheet 10, nickel powder plated with gold is used. With such a configuration, the connection resistance value between the electrode 5 on the substrate side and the bump 3 on the IC chip side can be reduced, which is still more preferable.

The conductive particles 10a are more preferably a conductive particle main body 10a-1 of the conductive particles 10a.
Is coated with an insulating layer 10a-2, and the amount of the conductive particles 10a is twice or more that of a generally used anisotropic conductive film. As a result, it is possible to improve resistance to thermal shock due to swelling during moisture absorption and subsequent reflow.

The conductive particles 10 thus coated with the insulation are
When a is sandwiched between the substrate electrode 5 and the bump 3,
At that time, the extremely thin insulating coating portion 10a-2 outside the conductive particles 10a is scraped off, and the conductive particle main body 10a-1 is exposed to exhibit conductivity. Therefore, in the portion not sandwiched between the bump 3 and the electrode 5, the insulating coat portion 10a-1
Is not scraped off and does not exhibit conductivity. Therefore,
This means that a short circuit between the electrode 5 and the electrode 3 is unlikely to occur in the plane direction. Usually, when a stud bump is used, it is difficult to sandwich the conductive particles 10a between the electrode 5 and the bump 3 because the area of the top of the head is small.
It is necessary to increase the amount of the conductive particles 10a,
In such a case, the conductive particles come into contact with each other and the electrodes 3, 5
Because there is a short between the two, as described above,
It is preferable to use insulating conductive particles coated with insulation. Further, the reflow characteristics and the like are improved because the adhesive for forming an anisotropic conductive film (or an anisotropic conductive film sheet) is swelled due to temperature or humidity in the Z direction (the thickness direction of the anisotropic conductive film sheet). This is because, even when expanded, the conductive particles 10a can be expanded further to maintain the connection. For this reason, the conductive particles 10a include Au-Ni having a repulsive force.
It is preferable to use plastic particles of the coat.

Next, as shown in FIG. 1D, the electrode 5 of the circuit board 4 shown in FIG. 1C is cut into a size slightly larger than the size of the IC chip 1 and the inorganic filler 6 is formed.
The anisotropic conductive film sheet 10 containing f is arranged, and the anisotropic conductive film sheet 10 is heated to a pressure of about 5 to 10 kgf / cm ² by the bonding tool 7 heated to, for example, 80 to 120 ° C. Paste on. Thereafter, the preparatory step of the substrate 4 is completed by peeling off the separator 10g detachably disposed on the sticking tool side of the anisotropic conductive film sheet 10. The separator 10g is for preventing the anisotropic conductive film sheet 10 containing a solid or semi-solid thermosetting resin in which the inorganic filler 6f is blended into the tool 7 from sticking. Here, FIG.
As shown by partially enlarging the G portion of (F), the anisotropic conductive film sheet 10 has a spherical or crushed silica having an average diameter smaller than the average diameter of the conductive particles 10a, or an inorganic conductive material such as ceramics such as alumina. It is preferable that the filler 6f is dispersed and mixed in the insulating resin 6m, and the mixture is flattened by a doctor blade method or the like, and the solvent component is vaporized and solidified. (For example, heat resistance enough to withstand 240 ° C. for 10 seconds). The insulating resin is, for example, an insulating thermosetting resin (for example, an epoxy resin, a phenol resin, a polyimide or the like), or an insulating thermoplastic resin (for example, poniphenylene sulfide (P
PS), polycarbonate, modified polyphenylene oxide (PPO), or a mixture of an insulating thermosetting resin and an insulating thermoplastic resin.
Here, the description will be continued with a typical example of an insulating thermosetting resin. The glass transition point of the thermosetting resin 6m is generally about 120 to 200 ° C. When only a thermoplastic resin is used, it is first heated and softened, then stopped by heating and naturally cooled, and then mixed with the insulating thermosetting resin. In the case of using a thermosetting resin, the thermosetting resin functions more dominantly, and is cured by heating in the same manner as in the case of using only the thermosetting resin.

Next, as shown in FIGS. 1E and 1F, in the electronic component mounting apparatus 600 of FIG.
The IC chip 1 on which the bumps 3 are formed in the above process is sucked and held from the tray 602 by the heated bonding tool 8 at the tip of the component holding member 601, and the IC chip 1 is removed.
The IC chip 1 is positioned on the electrode 5 corresponding to the electrode 2 of the IC chip 1 of the substrate 4 prepared in the preceding step and placed on the stage 9, and the IC chip 1 is Press 4 This alignment uses a known position recognition operation. For example, as shown in FIG. 21C, the position recognition mark 605 or the lead or land pattern formed on the substrate 4 is
21D based on an image 606 obtained by the camera 604 as shown in FIG.
The position of the substrate 4 is recognized by recognizing the XY coordinate position of the substrate 4 in the orthogonal XY directions on the stage 9 and the rotational position of the XY coordinate with respect to the origin. On the other hand, as shown in FIG. 21A, the position recognition mark 608 or circuit pattern of the IC chip 1 sucked and held by the joining tool 8 is recognized by the IC chip position recognition camera 603, and FIG. As shown in (5), based on the image 607 obtained by the camera 603, the position of the IC chip 1 is recognized by recognizing the XY coordinate position of the IC chip 1 and the rotational position of the XY coordinate with respect to the origin. Then, based on the result of the position recognition between the substrate 4 and the IC chip 1, the joining tool 8 or the stage 9 is moved so that the electrodes 2 of the IC chip 1 are positioned on the corresponding electrodes 5 of the substrate 4. After the alignment, the IC chip 1 is pressed against the substrate 4 by the heated joining tool 8.
At this time, the bump 3 is pressed on the electrode 5 of the substrate 4 while the head 3a of the bump 3 is deformed from FIG. 4B to FIG. 4C. At this time, similarly to FIGS. 2A to 2B shown in the first embodiment, also in this embodiment, the inorganic filler 6f in the thermosetting resin 6m is filled with the thermosetting resin at the beginning of the joining. Due to the sharp bumps 3 having entered 6 m, the bumps 3 are pushed outward. Also in this embodiment, as in FIG. 2C shown in the first embodiment, the inorganic filler 6f is interposed between the bump 3 and the substrate electrode 5 by the outward pushing action.
Does not enter, an effect of lowering the connection resistance value is exhibited. At this time, if the bump 3 and the substrate electrode 5
Even if the inorganic filler 6f slightly enters between the bumps 3, the bump 3 and the substrate electrode 5 are in direct contact,
There is no problem at all. At this time, the applied load is bump 3
Although it depends on the outer diameter of the head 3a, the folded portion of the head 3a is necessarily deformed as shown in FIG. At this time, as shown in FIG. 6 (E), when the conductive particles 10a in the anisotropic conductive film sheet 10 are coated with metal plating on the resin ball, the conductive particles 10a may be deformed. is necessary. When the conductive particles 10a in the anisotropic conductive film sheet 10 are metal particles such as nickel, FIG.
As shown in (D), it is necessary to apply a load that sinks into the bumps 3 and the electrodes 5 on the substrate side. This load requires at least 20 (gf / per bump). That is, FIG. 17 shows a graph of the relationship between the resistance value and the load in the case of a bump having an outer diameter of 80 μm by 20 (gf /
If it is less than (per bump), the resistance value is larger than 100 mmΩ / bump, and the resistance value is too large, which causes a practical problem. Therefore, it is shown that it is preferably 20 (gf / per bump) or more. I have. FIG.
3 is a graph showing a highly reliable region based on a relationship between bumps having outer diameters of 80 μm and 40 μm and a minimum load. Accordingly, the minimum load is preferably 25 (gf / per bump) or more for a bump having an outer diameter of 40 μm or more, and the minimum load is 20 (gf / per bump) for an outer diameter of less than 40 μm. It is estimated that the above is high reliability. In the future, when the outer diameter of the bump is reduced to less than 40 μm as the pitch of the leads is reduced, it is estimated that the load tends to decrease in proportion to the square of the bump according to the projected area of the bump. Therefore, it is preferable that the minimum load applied to the bump 3 side via the IC chip 1 requires a minimum of 20 (gf / per bump). The upper limit of the load applied to the bump 3 via the IC chip 1 is set so as not to damage the IC chip 1, the bump 3, the circuit board 4, and the like. In some cases, the maximum load may exceed 100 (gf / per bump) or 150 (gf / per bump). At this time, if the inorganic filler 6f having an average diameter smaller than the average diameter of the conductive particles is used, the effect of increasing the elastic modulus of the thermosetting resin 6m and lowering the thermal expansion coefficient can be exerted.

In the drawing, reference numeral 10s denotes a resin obtained by melting the thermosetting resin 6m in the anisotropic conductive film sheet 10 that has been melted by the heat of the joining tool 8 and then thermosetting.

The bumps 3 formed on the electrodes 2 in the previous step by the joining tool 8 heated by the built-in heater 8a such as a ceramic heater or a pulse heater.
A position where the C chip 1 is aligned with the substrate 4 prepared in the preceding step such that the electrodes 2 of the IC chip 1 are positioned on the corresponding electrodes 5 of the substrate 4 as shown in FIG. The alignment step and the step of pressing and joining as shown in FIG. 1 (F) after the alignment are performed by one alignment and press bonding apparatus, for example, the alignment and press bonding apparatus of FIG. 1 (E). It may be. However, in order to improve productivity by simultaneously performing the alignment operation and the press bonding operation in the case of continuously producing a large number of substrates using separate apparatuses, the alignment step is performed in the same manner as in FIG.
The press-bonding step may be performed by the bonding apparatus shown in FIG. 5C. In FIG. 5C, two joining devices 8 are shown in order to improve productivity, and two portions of one circuit board 4 can be pressed and joined at the same time.

In each of the above and following embodiments, the circuit board 4 includes a multilayer ceramic substrate, a glass cloth laminated epoxy substrate (glass epoxy substrate), an aramid nonwoven fabric substrate, a glass cloth laminated polyimide resin substrate, and an FPC (flexible printed circuit board). Circuit) or an aramid nonwoven epoxy substrate (for example, a resin multilayer substrate sold under the registered trademark Alib “ALIVH” manufactured by Matsushita Electric Industrial Co., Ltd.).

These substrates 4 are warped or undulated due to heat history, cutting, and processing, and are not necessarily perfect planes. Therefore, as shown in FIGS. 5A and 5B, the joining tool 8 and the stage 9 whose parallelism is controlled so as to be adjusted to, for example, about 10 μm or less, respectively. By locally applying heat and load to the circuit board 4 through the IC chip 1 toward the side 9, the warpage of the circuit board 4 in the applied portion is corrected.

Although the IC chip 1 is warped with the center of the active surface being concave, the substrate is pressed by applying a strong load of 20 gf or more per bump at the time of bonding.
Warpage and undulation of both the IC chip 1 and the IC chip 1 can be corrected. The warpage of the IC chip 1 is caused by internal stress generated when a thin film is formed on Si when the IC chip 1 is formed. Bump deformation is 10-2
It is about 5 μm, which can be tolerated by adapting the bumps 3 by deformation of the bumps 3 to the influence of undulations appearing on the surface from the inner layer copper foil which the substrate originally has.

With the warpage of the circuit board 4 thus corrected, heat of, for example, 140 to 230 ° C. is applied to the anisotropic conductive film sheet 10 between the IC chip 1 and the circuit board 4 for, for example, several seconds to 20 seconds. This anisotropic conductive sheet 10
Is cured. At this time, first, the anisotropic conductive film sheet 1
The thermosetting resin 6m constituting the “0” flows and seals up to the edge of the IC chip 1. In addition, since the resin is a resin, when heated, it softens naturally at first, so that such fluidity as to flow to the edge occurs. By making the volume of the thermosetting resin 6m larger than the volume of the space between the IC chip 1 and the circuit board 4, the resin can flow out of this space and exhibit a sealing effect. Thereafter, when the heated bonding tool 8 rises, there is no heating source, so that the temperatures of the IC chip 1 and the anisotropic conductive film sheet 10 decrease sharply, and the anisotropic conductive film sheet 10 becomes fluid. As shown in FIGS. 1 (F) and 4 (C), the IC chip 1 is fixed on the circuit board 4 by the cured resin 10s which constitutes the anisotropic conductive film sheet 10. You. The circuit board 4 side is connected to the heater 9a of the stage 9.
If the heating is performed in such a manner, the temperature of the joining tool 8 can be further lowered.

In this way, the anisotropic conductive film sheet 1
In addition, a thermosetting resin in which an inorganic filler having an average particle diameter smaller than the average diameter of the conductive particles 10a is mixed can be used. It is more preferable that the connection resistance value can be reduced by using the material subjected to the above.

According to the first embodiment, the conductive particles 10a are used as the inorganic fillers 6f to be mixed with the thermosetting resin 6m.
Inorganic filler 6f having an average particle diameter smaller than the average diameter of
The reliability can be further improved without inhibiting the function of the conductive particles 10a. That is, the conductive particles 10 a are located between the bump 3 and the electrode 5 of the substrate 4.
Is sandwiched. At this time, even if the inorganic filler 6f is sandwiched at the same time, since the average diameter is smaller than the average diameter of the conductive particles 10a, the conductivity is not impaired, and the elastic modulus of the thermosetting resin 6m is increased. In addition, the thermal expansion coefficient is reduced, and the bonding reliability between the IC chip 1 and the substrate 4 is improved.

(Second Embodiment) Next, according to a second embodiment of the present invention, a method and an apparatus for mounting an electronic component, for example, an IC chip on a circuit board, and the IC chip are mounted on the board by the mounting method. An electronic component unit or module, for example, a semiconductor device will be described.

The second embodiment is different from the first embodiment in that the anisotropic conductive film sheet 1 containing a thermosetting resin
The mixing ratio of the inorganic filler 6f to be added to 0 is set to 5 to 90 wt% of the insulating thermosetting resin, for example, 6 m of the insulating thermosetting epoxy resin, to make the mixing ratio more suitable. If it is less than 5 wt%, there is no point in mixing the inorganic filler 6f, while if it exceeds 90 wt%, the adhesive strength is extremely reduced and it is not preferable because it becomes difficult to form a sheet. As an example, from the viewpoint of maintaining high reliability, 20 to 40 wt% is preferable for a resin substrate and 40 to 70 wt% for a ceramic substrate, and the linear expansion coefficient of the sheet sealant is considerably reduced even at about 20 wt% for a glass epoxy substrate. This is effective in a resin substrate. In volume%, the ratio is about half of the wt% or the ratio of the specific gravity of the silica is about 2 to the ratio of the epoxy resin to 1. Normally, the mixing ratio of the inorganic filler 6f is determined according to the manufacturing conditions when the thermosetting resin 6m is formed into a sheet, the elastic modulus of the substrate 4, and finally the result of the reliability test.

The inorganic filler 6 having the mixing ratio as described above was used.
By adding f to the anisotropic conductive film sheet 10 containing a thermosetting resin, the elastic modulus of the thermosetting resin 6m of the anisotropic conductive film sheet 10 can be increased, and the coefficient of thermal expansion can be reduced. Thus, the bonding reliability between the IC chip 1 and the substrate 4 can be improved. Further, the mixing ratio of the inorganic filler 6f can be determined so as to optimize the material constant of the thermosetting resin 6m, that is, the elastic modulus and the linear expansion coefficient according to the material of the substrate 4. The inorganic filler 6f
As the mixture ratio of increases, the elastic modulus increases, but the coefficient of linear expansion tends to decrease.

In the first and second embodiments, since the solid anisotropic conductive film sheet 10 is used instead of a liquid, it is easy to handle, and since there is no liquid component, it can be formed of a polymer. There is an advantage that a material having a high transition point is easily formed.

Note that FIG. 1A to FIG. 1G and FIG.
2A to 2C and FIGS. 6 and 7 described later, an anisotropic conductive film sheet 10 containing a thermosetting resin as an example of an anisotropic conductive layer or an anisotropic conductive film is formed. Although the formation of the thermosetting adhesive 6b on the circuit board 4 side has been described, the present invention is not limited to this, and FIG.
Alternatively, as shown in FIG. 14B, after being formed on the IC chip 1 side, it may be bonded to the substrate 4. In this case, in particular, the anisotropic conductive film sheet 10 containing a thermosetting resin
In this case, the IC held by the holding member 200 such as a suction nozzle on the elastic member 117 such as rubber on the stage 201 together with the separator 6 a detachably disposed on the circuit board side of the anisotropic conductive film sheet 10. The chip 1 may be pressed so that the anisotropic conductive film sheet 10 is attached to the IC chip 1 along the shape of the bump 3.

(Third Embodiment) Next, a method and an apparatus for mounting an electronic component, for example, an IC chip on a circuit board according to a third embodiment of the present invention, and the IC chip are mounted on the substrate by the above mounting method. An electronic component unit or module, for example, a semiconductor device will be described with reference to FIGS. 6A to 6C and FIGS. 7A to 7F.

In the third embodiment, instead of attaching the anisotropic conductive film sheet 10 containing a thermosetting resin to the substrate 4 in the first embodiment, FIGS.
As shown in (A) and (D), a liquid thermosetting adhesive 6b for forming an anisotropic conductive film as an example of an anisotropic conductive layer is applied on the circuit board 4 by a dispense 502 or the like.
Or after printing or transferring, semi-solid state,
Solidified to the so-called B stage state. After that, the IC chip 1 is mounted on the substrate 4 as in the first or second embodiment.

More specifically, as shown in FIG. 6A, a liquid thermosetting adhesive 6b for forming an anisotropic conductive film is applied on the circuit board 4 by air pressure as shown in FIG. The application, printing, or transfer is performed by a dispenser 502 or the like that controls the discharge amount and is movable in two directions perpendicular to each other on the substrate plane. Next, as shown in FIG. 6 (B), the tool 78 having a built-in heater 78a is applied to apply heat and pressure to uniformize the material, while solidifying to a semi-solid state, that is, a so-called B-stage state, as shown in FIG. 6 (C).

Alternatively, when the viscosity of the liquid thermosetting adhesive 6b for forming an anisotropic conductive film is low, as shown in FIG. After the thermosetting adhesive 6b is applied, the thermosetting adhesive 6b spreads naturally on the substrate due to the low viscosity of the thermosetting adhesive 6b.
The state is as shown in FIG. Thereafter, as shown in FIG. 7C, the substrate 4 is put into a furnace 503 by a transfer device 505 such as a conveyor, and the heater 50 of the furnace 503 is heated.
The liquid thermosetting adhesive 6b of the applied insulating resin is cured by 4 to be semi-solid, that is, solidified to a so-called B-stage state.

On the other hand, when the viscosity of the liquid thermosetting adhesive 6b for forming an anisotropic conductive film is high, as shown in FIG. After the thermosetting adhesive 6b is applied, the squeegee 506 does not spread naturally on the substrate due to the high viscosity of the thermosetting adhesive 6b, as shown in FIGS. 7 (E) and (F).
And stretch it flat. Thereafter, as shown in FIG. 7C, the substrate 4 is transferred to a furnace 5 by a transfer device 505 such as a conveyor.
03, the liquid thermosetting adhesive 6b of the applied insulating resin is hardened by the heater 504 of the furnace 503 to be semi-solid, that is, solidified to a so-called B-stage state.

As described above, when the thermosetting adhesive 6b for forming an anisotropic conductive film is made semi-solid, the thermosetting adhesive 6b is used.
The temperature is 30 to 80% of the glass transition point of the thermosetting resin although there is a difference depending on the properties of the thermosetting resin in the inside.
Press at 0-130 ° C. Usually, it is performed at a temperature of about 30% of the glass transition point of the thermosetting resin. The reason for setting the glass transition point of the thermosetting resin to 30 to 80% as described above is as follows from the graph of the heating temperature and the reaction rate of the anisotropic conductive film sheet in FIG. However, it is possible to leave a sufficient range for further reaction in the subsequent steps. In other words, if the temperature is in the range of 80 to 130 ° C., the reaction rate of the insulating resin such as an epoxy resin can be suppressed to about 10 to 50%, depending on the time, so that the bonding at the time of IC chip crimping in the subsequent process is performed. No problem. That is, a predetermined amount of pressure can be secured when the IC chip is pressed during crimping, and the problem that the pressing cannot be completed hardly occurs.
It is to be noted that semi-solidification may be performed by suppressing the reaction and evaporating only the solvent component.

After the thermosetting adhesive 6b is semi-solidified as described above, when a plurality of IC chips 1 are mounted on the substrate 4, a plurality of IC chips 1 on the substrate 4 are mounted. The semi-solidification step of the thermosetting adhesive 6b is performed in advance at a location as a pre-setup step, and the substrate 4 thus prepared and supplied is supplied.
By joining a plurality of IC chips 1 to the above-mentioned plurality of locations, productivity is further improved. In the subsequent steps, even when the thermosetting adhesive 6b is used, basically the same steps as the steps using the anisotropic conductive film sheet 10 of the first or second embodiment described above are performed. By adding the semi-fixing step, the liquid thermosetting adhesive 6b for forming an anisotropic conductive film can be used similarly to the anisotropic conductive film sheet 10,
Since it is a solid, it is easy to handle, and since there is no liquid component, it can be formed of a polymer, and has an advantage that it can be easily formed with a high glass transition point. When the fluid thermosetting adhesive 6b for forming an anisotropic conductive film is used, compared with the case where the solid anisotropic conductive film sheet 10 is used, any arbitrary amount of the substrate 4 can be used. It also has the advantage of being able to be applied, printed, or transferred to any size at a location.

(Fourth Embodiment) Next, according to a fourth embodiment of the present invention, a method and an apparatus for mounting an electronic component, for example, an IC chip on a circuit board, and the IC chip are mounted on the substrate by the mounting method. An electronic component unit or module, for example, a semiconductor device will be described with reference to FIG.
The fourth embodiment is different from the first embodiment in that, when the IC chip 1 is bonded to the substrate 4, ultrasonic waves are applied in addition to a load, so that the bumps 3 are not leveled,
After pressing with a load of gf or less, the tip of the bump 3 is adjusted so as to prevent a short-circuit with an adjacent bump or electrode due to the fall of the neck (whisker) at the tip of the bump 3 caused by the shredding at the time of bump formation. In other words, the IC chip 1 is mounted on the substrate 4 in alignment with the IC chip 1, and the metal bumps 3 are thermocompression-bonded to the metal on the electrode surface on the substrate side together with the ultrasonic wave. The state of bonding the IC chip 1 to the substrate 4 is as follows.
This is similar to FIGS. 2 and 6 in the previous embodiment. When the ultrasonic wave is applied to metal-bond the gold bump 3 and the electrode of the substrate 4 while heating from the upper surface side of the IC chip 1 or while heating from the substrate side, or Heating may be performed from both the IC chip 1 side and the substrate side.

In the fourth embodiment, a solid anisotropic conductive film sheet 10 in which an inorganic filler 6f is mixed with an insulating thermosetting resin 6m or a liquid thermosetting adhesive 6b for forming an anisotropic conductive film is used. The semi-solidified material is applied to the substrate 4 as described above.
After applying to the substrate 4 a semi-solidified thermosetting adhesive 6b for forming an anisotropic conductive film containing a thermosetting resin, the electrode 5 of the circuit board 4 and the electrode 2 of the electronic component 1 3A to 3F, a ball 96 is formed at the tip of the gold wire 95 by an electric spark by the operation shown in FIGS. 3A to 3F, and the ball 96 is ultrasonically heated to the substrate electrode 5 by the capillary 93. Bump 3 formed by pressing
Is mounted on the substrate 4 while being aligned with the IC chip 1 without leveling. Here, the “semi-solidified liquid thermosetting adhesive 6b for forming a liquid anisotropic conductive film” refers to the liquid anisotropic conductive film as described in the third embodiment. Thermosetting adhesive 6b for film formation
Is solidified in half, which is almost the same as that obtained in the B stage. At this time, in the ultrasonic wave application device 620 shown in FIG.
Air cylinder 62 from the top surface of IC chip 1
5 and an ultrasonic generating element 6 such as a piezo element
The gold bump 3 and the gold plating on the substrate side are adjusted while applying the ultrasonic wave generated by the ultrasonic wave 23 and applied through the ultrasonic horn 624 so as to prevent the neck portion of the gold bump 3 from falling down. Metal bonding. Next, while heating from the upper surface of the IC chip 1 or the substrate side, the above IC
The chip 1 is pressed against the circuit board 4 with a pressing force of 20 gf or more per bump to correct the warpage of the board 4 and crush the bumps 3 while the bumps 3 interposed between the IC chip 1 and the circuit board 4. The anisotropic conductive film sheet 10 or the thermosetting adhesive 6b is cured by the heat, and
The C chip 1 and the circuit board 4 are joined to electrically connect the electrodes 2 and 5. During the metal bonding by the ultrasonic wave application device 620, the IC chip 1 may be heated from the upper surface side, from the substrate side, or from both the IC chip 1 side and the substrate side. Good. That is, specifically, the built-in heater 622 makes the IC
The chip 1 is heated from the upper surface side, or the circuit board 4 side is heated from the substrate side by the heater 9a of the stage 9, or the IC chip 1 side is heated by the built-in heater 622 and the heater 9a of the stage 9. And the substrate side.

The reason why a pressing force of 20 gf or more is required for each bump is that it is difficult to generate frictional heat even in the case of joining using ultrasonic waves, and thus joining cannot be performed. Even when joining gold and gold,
By pressing the bump with a certain load and applying ultrasonic waves thereto, frictional heat is generated and the metals are joined. Therefore, also in this case, a constant load enough to press the bump, that is, a pressing force of 20 gf or more per bump is required. As an example of the pressing force, the pressure is set to 50 gf or more per bump.

According to the fourth embodiment, the metal bump 3
Since the metal plating of the substrate 4 and the metal plating of the substrate 4 are bonded by diffusion, it is suitable for a case where it is desired to increase the strength at the bump portion or a case where the connection resistance value is desired to be further reduced.

(Fifth Embodiment) Next, according to a fifth embodiment of the present invention, a method and an apparatus for mounting an electronic component, for example, an IC chip on a circuit board, and the IC chip are mounted on the board by the mounting method. An electronic component unit or module, for example, a semiconductor device will be described with reference to FIGS. 8A to 8C and FIGS. 9A to 9C. The fifth embodiment is different from the first embodiment in that the sealing step can be omitted.

As described above, the protruding electrodes (bumps) 3 are formed on the electrodes 2 on the IC chip 1 and the circuit board 4 is provided with the bumps 3 (FIGS. 8B, 8C, 9A). 23, as shown in FIG. 23, a rectangular sheet-shaped anisotropic conductive film sheet 10 having a shape smaller than the substantially rectangular outer dimension OL connecting the inner edges of the plurality of electrodes 2 of the IC chip 1 or thermosetting. The adhesive 6b is pasted or applied to the central portion of the circuit board 4 where the electrodes 5 are connected. At this time, the thickness of the sheet-like anisotropic conductive film sheet 10 or the thermosetting adhesive 6b is set so that its volume is larger than the gap between the IC chip 1 and the substrate 4. Further, the bonding device 640 shown in FIG.
A rectangular sheet-like anisotropic conductive film sheet 656 wound around 43 is connected to the inner edges of the plurality of electrodes 2 of the IC chip 1 by upper and lower cutters 641 at portions where the cuts 657 are previously formed. It is cut into smaller dimensions than the substantially rectangular outer dimensions OL. The cut rectangular sheet-like anisotropic conductive film sheet 10 is sucked and held by the bonding head 642 heated in advance by the built-in heater 646, and is bonded to the central portion of the circuit board 4 where the electrodes 5 are connected. Is done. Next, the bump 3 and the electrode 5 of the circuit board 4 are aligned, and as shown in FIG. 8A and FIG.
The IC chip 1 is pressed and pressed against the circuit board 4 by the joining tool 8 heated by a, and the warpage of the board 4 is corrected at the same time. The film sheet 10 or the thermosetting adhesive 6b is cured. At this time, the anisotropic conductive film sheet 10 or the thermosetting adhesive 6b softens as described above due to the heat applied from the joining tool 8 via the IC chip 1, and as shown in FIG.
As shown in (C), the pressure is applied from the affixed or applied position and flows outward. The anisotropic conductive film sheet 10 or the thermosetting adhesive 6b that has flowed out becomes a sealing material (underfill), and significantly improves the reliability of bonding between the bump 3 and the electrode 5. After a certain period of time, the anisotropic conductive film sheet 10 or the thermosetting adhesive 6
In b, the curing progresses gradually, and finally the cured resin 6
The IC chip 1 and the circuit board 4 are joined by s. By raising the bonding tool 8 pressing the IC chip 1, the bonding between the IC chip 1 and the electrode 5 of the circuit board 4 is completed. Strictly speaking, in the case of thermosetting, the reaction of the thermosetting resin proceeds during heating, the joining tool 8 rises, and the fluidity is almost eliminated. According to the method as described above, before bonding, the anisotropic conductive film sheet 10
Or, since the thermosetting adhesive 6b does not cover the electrode 5,
When joining, the bump 3 directly contacts the electrode 5, the anisotropic conductive film sheet 10 or the thermosetting adhesive 6b does not enter under the electrode 5, and the connection resistance value between the bump 3 and the electrode 5 Can be lowered. Further, if the circuit board side is heated, the temperature of the bonding head 8 can be further lowered. When this method is applied to the third embodiment, the bonding between the gold bump and the gold electrode (for example, nickel or gold plated on copper or tungsten) on the circuit board can be performed more easily.

Sixth Embodiment Next, a method and an apparatus for mounting an electronic component, for example, an IC chip on a circuit board according to a sixth embodiment, and an electronic component unit in which the IC chip is mounted on the substrate by the mounting method described above. Alternatively, a module such as a semiconductor device will be described with reference to FIGS.
The sixth embodiment is different from the first embodiment in that:
Even in the case where the bump 103 is displaced from the electrode 5 of the circuit board 4 and mounted, a highly reliable bonding can be achieved.

In the sixth embodiment, as shown in FIG. 10A, when the bumps 3 are formed on the IC chip 1, gold balls 95 are formed by electric sparks using gold wires 95 in the same manner as wire bonding. . Next, while adjusting the size of the ball at the time of electric spark, a ball 96a having a diameter Φd-Bump indicated by 95a is formed, and the thus-formed ball 96a having a diameter Φd-Bump is formed by:
By controlling the time or voltage parameters for generating the electric spark, the Chamfar diameter φ indicated by 93a of the capillary 193 having a Chamfar angle θc of 100 ° or less.
The ball 96a is formed so that D becomes 1/2 to 3/4 of the diameter d-Bump of the gold ball, and a flat portion 93b is provided in a portion of the capillary 93 in contact with the gold ball as shown in FIG. Bump 3 as shown in FIG.
Rather than forming a tip, a capillary 193 having a tip portion 193a having no tip portion 193a at a portion in contact with the gold ball 96a of the capillary 193 as shown in FIG. 2, a bump 1 as shown in FIG.
03 is formed. By using the capillary 193 having the tip shape, the bump 103 having a substantially conical tip as shown in FIG. 10B can be formed on the electrode 2 of the IC chip 1. Even when the bump 103 formed by the above-described method is mounted on the electrode 5 of the circuit board 4 with the bump 103 having a substantially conical tip shifted as shown in FIG. 11C, the bump 103 has a substantially conical tip. If the displacement is up to half the outer diameter of the bump 103, a part of the bump 103 can always contact the electrode 5 of the substrate 4.

On the other hand, in the bump 3 as shown in FIG. 11D, the bump 3 is applied to the electrode 5 of the circuit board 4 as shown in FIG.
(C) When mounted with a shift of dimension Z as shown in (C),
As shown in FIG. 11E, a so-called pedestal 3 having a width d is set.
Part of g contacts the electrode 5, but only partially, resulting in an unstable contact. If the substrate 4 is subjected to a thermal shock test or a reflow in such an unstable bonding state, the bonding in the unstable bonding state may be open, that is, a bonding failure. Was. On the other hand, in the sixth embodiment, even when the bump 103 having a substantially conical tip is shifted by the dimension Z with respect to the electrode 5 of the circuit board 4 as shown in FIG. Because 103 is conical,
In the case where the deviation is up to half of the outer diameter of the bump 103, a part of the bump 103 can always contact the electrode 5 of the substrate 4, preventing a bonding failure even when subjected to a thermal shock test or reflow. it can.

(Seventh Embodiment) Next, a method and an apparatus for mounting an electronic component, for example, an IC chip on a circuit board according to a seventh embodiment, and an electronic component unit in which the IC chip is mounted on the substrate by the mounting method described above. Alternatively, a module such as a semiconductor device will be described with reference to FIGS.
In the seventh embodiment, in the first embodiment, the stress between the IC chip 1 and the circuit board 4 can be reduced when the thermosetting resin is cured after the bonding of the IC chip 1 to the circuit board 4. It was done.

In the seventh embodiment, the solid-state or semi-solid anisotropic conductive film sheet 10 in which the inorganic filler 6f is blended with the insulating thermosetting resin 6m or the thermosetting adhesive 6b is interposed and the IC chip is interposed. The bump 3 formed by wire bonding on one electrode 2 is aligned with the electrode 5 of the circuit board 4 without leveling. For example, 23
While the IC chip 1 is heated from the back surface by the tool 8 heated to a constant temperature of about 0 ° C., the IC chip 1 is heated.
Is pressed against the circuit board 4 by a pressure P1 = 80 gf or more in the case of a ceramic substrate per bump,
While correcting the warpage of the substrate 4, the anisotropic conductive film sheet 10 or the thermosetting adhesive 6b interposed between the IC chip 1 and the circuit board 4 is cured by the heat. Next, after a certain time t ₁ , that is, if the total time is, for example, 20 seconds, it depends on the reaction rate of the material, but after 1/4 or 1/2, 5 to 10 seconds, in other words, Before the reaction rate reaches 90%, the pressure P2 is lowered to a pressure P2 lower than the pressure P1 to relieve the stress at the time of curing the thermosetting adhesive 6b. 2, 5 are electrically connected. Preferably, at least about 20 gf is required for the bumps to be deformed, that is, while obtaining the pressure necessary for the deformation and adaptation of the bumps, the excess resin is removed from the IC chip 1 and the substrate 4.
The pressure P1 is 20 gf / bump or more, while the pressure P2 is 20 gf / bump to remove the hardening strain unevenly distributed in the resin before the deformation of the bump.
By setting the number to be less than the bump, the reliability is further improved.
The reason is as follows. That is, as shown in FIG. 12 (C), the stress distribution of the thermosetting resin in the anisotropic conductive film sheet 10 or the thermosetting adhesive 6b becomes large between the IC chip 1 and the substrate 4 at the time of pressure bonding. I have. In this state, when the fatigue is repeatedly given in the reliability test or the normal long-term use, the thermosetting resin in the anisotropic conductive film sheet 10 or the thermosetting adhesive 6b on the IC chip 1 or the substrate 4 side is subjected to stress. May peel without being able to endure. In such a state, the bonding strength between the IC chip 1 and the circuit board 4 becomes insufficient, and the joint is opened.
Thus, as shown in FIG. 13, by using a two-stage pressure profile of a higher pressure P1 and a lower pressure P2, the pressure P2 can be reduced to a pressure P2 lower than the pressure P1 when the thermosetting adhesive 6b is cured. As shown in FIG. 12 (D), it is possible to reduce the stress between the IC chip 1 and the circuit board 4 by removing the hardening strain unevenly distributed in the resin at the pressure P2 (in other words, to reduce the concentration of the stress). After that, by increasing the pressure to the above-mentioned pressure P1, the pressure necessary for the deformation and adaptation of the bump is obtained, and the excess resin can be pushed out from between the IC chip 1 and the substrate 4, thereby improving the reliability. .

The “adhesive force between the IC chip 1 and the circuit board 4” means a force for attaching the IC chip 1 to the board 4. This is due to the adhesive force of the adhesive, the curing shrinkage force when the adhesive is cured, and the shrinking force in the Z direction (for example, the shrinking force when the adhesive heated to 180 ° C. shrinks when returning to room temperature). ) By these three forces
The IC 1 and the substrate 4 are joined.

(Eighth Embodiment) Next, a method and an apparatus for mounting an electronic component, for example, an IC chip on a circuit board according to an eighth embodiment, and an electronic component unit in which the IC chip is mounted on the substrate by the mounting method described above. Alternatively, a module such as a semiconductor device will be described with reference to FIGS.
In the eighth embodiment, in each of the above embodiments, the average particle size of the inorganic filler 6f mixed with the insulating resin 6m is 3 μm or more. However, the maximum average particle size of the inorganic filler 6f is set to a size that does not exceed the gap size after the bonding between the IC chip 1 and the substrate 4.

If the inorganic filler 6f is replaced with the insulating resin 6m
When the fine particles having an average particle diameter of less than 3 μm are used as the inorganic filler 6f, the surface area itself of the particles becomes large as a whole, and the inorganic filler is a fine particle having an average particle diameter of less than 3 μm. In some cases, moisture is absorbed around 6f, which is not preferable in bonding the IC chip 1 and the substrate 4.

Therefore, when blending the same weight of inorganic filler 6f, the amount of moisture absorption around the inorganic filler 6f can be reduced by using the large inorganic filler 6f having an average particle size of 3 μm or more, and It is possible to improve the performance. In general, an inorganic filler having a large average particle size (in other words, an average particle size) is inexpensive, and is therefore preferable in terms of cost.

As shown in FIG. 24A, a conventional ACF (Ani) is used for bonding the IC chip 1 and the substrate 4.
sotropic Conductive Film:
In the method using 598 anisotropic conductive film, ACF59
8 is always sandwiched between the bump 3 and the substrate electrode 5, and the conductive particles having a diameter of 3 to 5 μm
It is necessary to be crushed to 3 μm to exhibit conductivity. However, in each of the above embodiments of the present invention, it is not always necessary to sandwich the conductive particles 10a between the bumps 3 and the substrate electrode 5 even if the conductive particles 10a are present, and as shown in FIG. Since the compression is performed while squeezing, the inorganic filler 6f as well as the anisotropic conductive layer 10 between the bump 3 and the substrate electrode 4 comes out from between the bump 3 and the substrate electrode 4 at the time of the compression. Based on the feature that the conductivity is hardly hindered by the unnecessary inorganic filler 6f being sandwiched between the bumps 3, the inorganic filler 6f having a large average particle size of 3 μm or more can be used. That is, in the present embodiment, the conductive particles 10a are not sandwiched between the bump 3 and the substrate electrode 5, and the conductive particles 10a having a diameter of 3 to 5 μm
Even if the bump 3 is not crushed to 3 μm and does not exhibit conductivity, the bump 3 is pressed and crushed by the substrate electrode 5 so that the bump 3 is in direct electrical contact with the substrate electrode 5 to obtain electrical conductivity. Therefore, there is no problem, and the reliability can be improved without being affected by the inorganic filler.
That is, when the conductive particles 10a are sandwiched between the bumps 3 and the substrate electrodes 5 in the direct bonding between the bumps 3 and the substrate electrodes 5, the conductive particles 10a
This has the additional effect of reducing the connection resistance value between the semiconductor chip and the bumps 3 on the IC chip side.

(Ninth Embodiment) Next, according to a ninth embodiment of the present invention, a method and an apparatus for mounting an electronic component, for example, an IC chip on a circuit board, and the IC chip are mounted on the substrate by the mounting method. An electronic component unit or module, for example, a semiconductor device will be described with reference to FIGS. FIGS. 25 and 26 are schematic cross-sectional views of a bonded state manufactured by a method and an apparatus for mounting an electronic component, for example, an IC chip on a circuit board according to the ninth embodiment, and an anisotropic conductive material used at that time. FIG. 2 is a partially enlarged schematic cross-sectional view of the membrane sheet 10. In the ninth embodiment, in each of the above embodiments, the inorganic filler 6f to be mixed with the insulating resin 6m of the anisotropic conductive layer 10 includes inorganic fillers 6f-1, 6f having a plurality of different average particle sizes. -2. Specific examples include an inorganic filler having an average particle size of 0.5 μm and an inorganic filler having an average particle size of 2 to 4 μm.

According to the ninth embodiment, by mixing a plurality of inorganic fillers 6f-1 and 6f-2 having different average particle diameters into the insulating resin 6m, the inorganic filler 6f mixed into the insulating resin 6m is mixed. Can be increased, the amount of moisture absorbed around the inorganic filler can be reduced, the moisture resistance can be improved, and the film can be easily formed (solidified). That is, when considered in terms of% by weight, it is possible to increase the amount of inorganic filler per unit volume by mixing inorganic fillers having different particle diameters rather than one kind of inorganic filler. Thereby, the amount of the inorganic filler 6f to be added to the anisotropic conductive film sheet 10 as the sealing sheet or the adhesive 6b for forming the anisotropic conductive film is increased, and the anisotropic conductive film sheet 10 or the anisotropic conductive film The coefficient of linear expansion of the film-forming adhesive 6b can be reduced, the service life can be extended, and the reliability can be improved.

(Tenth Embodiment) Next, a tenth embodiment of the present invention will be described.
Method and apparatus for mounting electronic components, such as IC chips, on a circuit board according to an embodiment
In an electronic component unit or module in which a chip is mounted on the substrate, for example, a semiconductor device, in order to further ensure the effect of the ninth embodiment, the inorganic filler 6f having a plurality of different average particle diameters is further added.
The average particle size of one inorganic filler 6f-1 of -1 and 6f-2 is different from the average particle size of the other inorganic filler 6f-2 by twice or more. As a specific example,
An inorganic filler having an average particle size of 0.5 μm;
An inorganic filler having an average particle size of m.

By doing so, the effect of the ninth embodiment can be further enhanced. That is, the average particle diameter of one inorganic filler 6f-1 is at least twice as large as the average particle diameter of the other inorganic filler 6f-2.
By mixing 6f-2 with the insulating resin 6m, the amount of the inorganic filler 6f mixed with the insulating resin 6m can be more reliably increased, and it becomes easier to form a film (solidify). By increasing the amount of the inorganic filler 6f added to the anisotropic conductive film sheet 10 or the adhesive 6b for forming an anisotropic conductive film, The coefficient of linear expansion can be further reduced, the life can be prolonged, and the reliability can be further improved.

(Eleventh Embodiment) Next, an eleventh embodiment of the present invention will be described.
Method and apparatus for mounting electronic components, such as IC chips, on a circuit board according to an embodiment
In an electronic component unit or module in which a chip is mounted on the substrate, for example, a semiconductor device, in order to further ensure the effects of the ninth embodiment, the inorganic filler 6 mixed with the insulating resin 6m is further added.
f is at least two types of inorganic fillers 6f-1 and 6f-2 having a plurality of different average particle diameters, and one of the at least two types of inorganic fillers 6f-1 has an average particle size exceeding 3 μm. It is preferable that the other inorganic filler 6f-2 of the at least two kinds of inorganic fillers has an average particle diameter of 3 μm or less. Specific examples include an inorganic filler having an average particle size of 0.5 μm and an inorganic filler having an average particle size of 2 to 4 μm.

(Twelfth Embodiment) Next, a twelfth embodiment of the present invention will be described.
Method and apparatus for mounting electronic components, such as IC chips, on a circuit board according to an embodiment
In an electronic component unit or module such as a semiconductor device in which a chip is mounted on the substrate, in each of the above embodiments, the inorganic filler 6f mixed with the insulating resin 6m has at least a plurality of different average particle sizes. The two types of inorganic fillers 6f-1 and 6f-2, wherein one of the at least two types of inorganic fillers 6f-1 having a larger average particle diameter is made of the same material as the insulating resin 6m. Thereby, a stress relaxing action can be achieved. Specific examples include an inorganic filler having an average particle size of 0.5 μm,
An inorganic filler having an average particle size of 4 μm.

According to the twelfth embodiment, in addition to the effects of the ninth embodiment, one of the inorganic fillers 6f-1 having a large average particle diameter is made of the same material as the insulating resin 6m. When a stress acts on the insulating resin 6m, the one inorganic filler 6f-1 having a large average particle diameter is integrated with the insulating resin 6m, thereby exerting a stress relaxing action.

(Thirteenth Embodiment) Next, a thirteenth embodiment of the present invention will be described.
Method and apparatus for mounting electronic components, such as IC chips, on a circuit board according to an embodiment
In an electronic component unit or module such as a semiconductor device in which a chip is mounted on the substrate, in each of the above embodiments, the inorganic filler 6f mixed with the insulating resin 6m has at least a plurality of different average particle sizes. Two types of inorganic fillers 6f-1 and 6f-2, one of the at least two types of inorganic fillers 6f-1 having a larger average particle diameter than the epoxy resin which is the insulating resin 6m. By being soft, the one inorganic filler 6f-1 is compressed,
It is also possible to exert a stress relaxing action.

According to the thirteenth embodiment, in addition to the effects of the ninth embodiment, one of the inorganic fillers 6f-1 having a large average particle diameter is made of the same material as the insulating resin 6m. When a stress acts on the insulating resin 6m, the one inorganic filler 6f-1 having a larger average particle size is softer than the epoxy resin which is the insulating resin 6m.
27 is compressed as shown in FIG. 27, and the tensile force, which is the reaction force against the compression, is dispersed around it, thereby exerting a stress relaxation effect.

(Fourteenth Embodiment) Next, a fourteenth embodiment of the present invention will be described.
Method and apparatus for mounting electronic components, such as IC chips, on a circuit board according to an embodiment
In an electronic component unit or module in which a chip is mounted on the substrate, for example, a semiconductor device, in each of the above-mentioned embodiments, FIGS.
(A), (B), as shown in FIGS. 30 and 31,
In the anisotropic conductive layer 10, the part 700 or the layer 6 x that is in contact with the IC chip 1 or the substrate 4 is different from the other part 70.
The amount of the inorganic filler may be smaller than that of one or the layer 6y, or the inorganic filler 6f may not be blended. In this case, as shown in FIGS. 28A and 28B, the amount of the inorganic filler is gradually reduced without clearly distinguishing the portion 700 contacting the IC chip 1 or the substrate 4 from the other portion 701. May be changed, or may be clearly distinguished as shown in FIGS. 29 (A) and (B) and FIGS. 30 and 31. That is, FIG.
9 (A) and 9 (B) and FIGS. 30 and 31, the anisotropic conductive layer 10 is located at a portion in contact with the IC chip 1 or the substrate 4 and has the same insulation as the insulating resin 6m. A first resin layer 6x in which the inorganic filler 6f is blended with the conductive resin, and the first resin layer 6x is in contact with the first resin layer 6x, and the amount of the inorganic filler is smaller than the first resin layer 6x,
Alternatively, a multilayer structure may be provided by including a second resin layer 6y made of the insulating resin not containing the inorganic filler 6f.

In this way, the following effects can be obtained. That is, if the inorganic filler 6f is added to the entire anisotropic conductive layer by the same weight percentage (wt.
%), The amount of the inorganic filler 6f may increase in the vicinity of the IC chip side or the substrate side or in the vicinity of the opposing surfaces thereof, and may decrease in the middle portion between the IC chip 1 and the substrate 4. As a result, since the amount of the inorganic filler 6f is large in the vicinity of the opposing surface on the IC chip side or the substrate side or both, the adhesive strength between the anisotropic conductive layer 10 and the IC chip 1 or the substrate 4 or both is reduced. May be. According to the fourteenth embodiment, the portion 700 or the layer 6x that comes into contact with either the IC chip 1 or the substrate 4 is replaced with the other portion 7
01 or the amount of the inorganic filler is smaller than that of the layer 6y,
Alternatively, by not including the inorganic filler 6f, it is possible to prevent the adhesive strength from being reduced due to the large amount of the inorganic filler.

Hereinafter, various modifications of the fourteenth embodiment will be described.

First, as a first modification, FIG.
29 (C), FIG. 29 (C), and FIG. 32 (A), the anisotropic conductive layer 10 has a portion 700 that is in contact with both the IC chip 1 and the substrate 4 and other portions 700. The amount of the inorganic filler may be smaller than that of the portion 701, or the inorganic filler 6f may not be blended. Also in this case, as shown in FIG. 28 (C), the portion 7 that contacts both the IC chip 1 and the substrate 4
00 and the other part 701 without distinction
The amount of the inorganic filler may be gradually changed, or may be clearly distinguished as shown in FIG. 29 (C) and FIG. 32 (A). That is, in FIG. 29C and FIG. 32A, the anisotropic conductive layer 10 is formed on the opposite side of the first resin layer 6x from the second resin layer 6y.
A third resin layer 6z composed of the insulating resin not containing the inorganic filler 6f or containing the inorganic filler 6f in a smaller amount than the first resin layer 6x to form a multilayer structure, 6x and the third resin layer 6z
Can be brought into contact with the IC chip 1 and the substrate 4, respectively.

Further, as another modified example, the portion 700 that is in contact with the IC chip 1 and / or the substrate 4 may be such that the amount of the inorganic filler is less than 20 wt% or the inorganic filler 6f is not blended. On the other hand, the other portion 701 may have an inorganic filler content of 20 wt% or more. In this case, as shown in FIGS. 28 (A), (B) and (C), the part 700 contacting the IC chip 1 or the substrate 4 or both and the other part 701 are not clearly distinguished. The amount of the inorganic filler may be gradually changed, or is clearly distinguished as shown in FIGS. 29A, 29B, 29C, 30, 31, and 32A. You may do so. That is, in the first resin layer 6x or the first resin layer 6x and the third resin layer 6z, the amount of the inorganic filler is less than 20 wt% or the inorganic filler 6f is not mixed, The resin layer 6y may have an amount of the inorganic filler of 20% by weight or more.

As a specific example, the second resin layer 6y is
When a thermosetting epoxy resin is used as the insulating resin 6m, the content is 50% by weight for a ceramic substrate and 20% by weight for a glass epoxy substrate. Further, as an example, the thickness of the first resin layer 6x and / or the third resin layer 6z is 15 μm, and the thickness of the second resin layer 6y is 40 to 60 μm.
m. The anisotropic conductive layer 10 has a thickness of IC
The size of the gap after the bonding between the chip 1 and the substrate 4 is set to be larger than the gap size after the bonding, so that the space between the IC chip 1 and the substrate 4 is completely filled when the IC chip 1 and the substrate 4 are bonded. Shall be.

As another modified example, FIG.
The modification shown in FIGS. 29C and 32A may be reversed in the amount of the inorganic filler. That is,
As shown in FIG. 28D, the anisotropic conductive layer 10
The intermediate part 702 of the part 703 that contacts both the IC chip 1 and the substrate 4 is the part 70 that contacts the IC chip 1 and the substrate 4 respectively.
The amount of the inorganic filler may be smaller than 3, or the inorganic filler 6f may not be blended. Also in this case, the amount of the inorganic filler may be gradually changed without clearly distinguishing the intermediate portion 702 from the portion 703 contacting the IC chip 1 or the substrate 4 or both, and FIG. D) and FIG. 32 (B), the distinction may be made clearly. That is, as shown in FIGS. 29 (D) and 32 (B), the anisotropic conductive layer 10 is located at a portion in contact with the IC chip 1 and the substrate 4, and contains the inorganic filler 6f. A fourth resin layer 6v composed of the insulating resin 6m described above, and an amount of the inorganic filler smaller or included in the intermediate portion between the IC chip 1 and the substrate 4 and smaller than that of the fourth resin layer 6v. And a fifth resin layer 6w made of an insulating resin 6m that is not provided.

Thus, the intermediate portion 702 between the IC chip 1 and the substrate 4 or the fifth resin layer 6
In the case of w, since the amount of the inorganic filler is smaller than or not contained in the portion 703 or the fourth resin layer 6v in contact with the IC chip 1 and the substrate 4, respectively, the elastic modulus becomes lower and the stress relaxation effect is obtained. Can be played. In addition, as the insulating resin of the portion 703 that contacts the IC chip 1 and the substrate 4 or the insulating resin of the fourth resin layer 6v, a resin having high adhesion to the IC chip 1 and the substrate 4 is selected and used. The fourth resin layer 6 in the portion 703 that contacts the IC chip 1 or in the vicinity of the IC chip 1
In v, the amount or material of the inorganic filler 6f is selected so as to be as close as possible to the linear expansion coefficient of the IC chip 1, while the portion 703 in contact with the substrate 4 or the fourth resin layer 6v in the vicinity of the substrate 4 is selected. In this case, the amount or material of the inorganic filler 6f can be selected so as to be as close as possible to the coefficient of linear expansion of the substrate 4. As a result, the above IC
Since the linear expansion coefficient between the fourth resin layer 6v and the IC chip 1 in the portion 703 in contact with the chip 1 or in the vicinity of the IC chip 1 is close to each other, peeling between the two hardly occurs and the substrate 4 Part 703 or substrate 4 that contacts
, The linear expansion coefficient of the fourth resin layer 6v and the substrate 4 in the vicinity of the substrate 4 is close to each other, so that separation between them is less likely to occur.

As shown by solid lines in FIGS. 33A and 33B, the anisotropic conductive layer 10
Alternatively, the amount of the inorganic filler may be gradually or gradually reduced from the portion P1 in contact with one of the substrates 4 to the other portion P2.

As shown by solid lines in FIGS. 33 (C) and 33 (D), the anisotropic conductive layer 10 is separated from the portions P3, P4 in contact with the IC chip 1 and the substrate 4, respectively, to other portions. That is, the amount of the inorganic filler may be gradually or gradually increased toward the intermediate portion P5 between the IC chip 1 and the substrate 4.

As shown by the solid line in FIG.
The anisotropic conductive layer 10 starts from a portion that contacts the IC chip 1 and the substrate 4 (a portion corresponding to the contact portion 703 in the modified example of FIG. 28D) from the IC chip 1 and the substrate 4.
The amount of the inorganic filler may be gradually reduced toward an intermediate portion between the chip 1 and the substrate 4 (a portion corresponding to the intermediate portion 702 in the modification of FIG. 28D).

As shown by the solid line in FIG.
The anisotropic conductive layer 10 includes a portion near the IC chip 1, a portion near the substrate 4, and then the IC
The amount of the inorganic filler may be reduced in the order of the intermediate portion between the portion near the chip 1 and the portion near the substrate 4. Although FIG. 33F illustrates an example in which the amount of the inorganic filler gradually changes in the above order, the amount is not limited to this, and may be changed stepwise.

According to the modification shown in FIGS. 33 (E) and 33 (F), the intermediate portion between the IC chip 1 and the substrate 4 is closer to the portions which are in contact with the IC chip 1 and the substrate 4 respectively. Also, since the amount of the above-mentioned inorganic filler is small or not contained, the modulus of elasticity becomes low, and a stress relaxation effect can be exhibited. In addition, if a resin having a high adhesion to the IC chip 1 and the substrate 4 is selected and used as the insulating resin at the portion that comes into contact with the IC chip 1 and the substrate 4, respectively, While the amount or material of the inorganic filler 6f is selected so as to be as close as possible to the linear expansion coefficient of the IC chip 1, the portion of the inorganic filler 6f that contacts the substrate 4 is selected so as to be as close as possible to the linear expansion coefficient of the substrate 4 The amount or material can be selected. When the blending amount of the inorganic filler 6f is determined from this viewpoint, usually, as shown by a solid line in FIG. 33 (F), the vicinity of the IC chip 1, the vicinity of the substrate 4, and then the IC chip The amount of the inorganic filler becomes smaller in the order of the intermediate portion between the portion near 1 and the portion near the substrate 4. With such a configuration, since the linear expansion coefficient of the part contacting the IC chip 1 and the linear expansion coefficient of the IC chip 1 are close to each other, separation between the two is less likely to occur, and the part contacting the substrate 4 and the substrate Since the coefficient of linear expansion with that of No. 4 approaches, peeling between the two hardly occurs.

In any of the cases shown in FIGS. 33A to 33F, the amount of the inorganic filler is preferably in the range of 5 to 90 wt% for practical use. If the content is less than 5 wt%, there is no point in mixing the inorganic filler 6f.

It should be noted that the plurality of resin layers 6x, 6
When the IC chip 1 is thermocompression-bonded to the substrate 4 using a multi-layer film composed of y or 6x, 6y, 6z as an anisotropic conductive layer, the heat at the time of bonding softens the insulating resin 6m, Since the resin layers are melted and mixed with each other, a clear boundary between the resin layers is finally eliminated, and the inorganic filler distribution is inclined as shown in FIG.

Further, in the fourteenth embodiment or each of the modifications, the anisotropic conductive layer having the portion or layer containing the inorganic filler 6f, or the anisotropic conductive layer having the inclined inorganic filler distribution, Alternatively, a different insulating resin can be used depending on the resin layer. For example,
In the part or resin layer that contacts the IC chip 1, an insulating resin that improves adhesion to a film material used on the surface of the IC chip is used, while in the part or resin layer that contacts the substrate 4, the material of the substrate surface is used. It is also possible to use an insulating resin for improving the adhesion to the substrate.

According to the fourteenth embodiment and the various modifications thereof, the inorganic filler 6f does not exist or its amount is small at the bonding interface between the IC chip 1 or the substrate 4 and the anisotropic conductive layer 10. The inherent adhesiveness of the insulating resin is exhibited, and the insulating resin having high adhesiveness at the bonding interface increases, and the IC chip 1 or the substrate 4 and the insulating resin 6 m
IC chip 1
Alternatively, the adhesion to the substrate 4 is improved. Thereby, the life in various reliability tests is improved, and the peel strength against bending is improved.

If the inorganic filler 6f, which does not contribute to the adhesion itself but has the effect of lowering the linear expansion coefficient, is uniformly dispersed in the insulating resin 6m, the inorganic filler 6f contacts the surface of the substrate 4 or the IC chip. However, the amount of the adhesive that contributes to the adhesion is reduced, and the adhesiveness is reduced. As a result, if peeling occurs between the IC chip 1 or the substrate 4 and the adhesive, moisture penetrates therefrom, causing corrosion of the electrodes of the IC chip 1 and the like. Further, as the peeling proceeds from the peeled portion, the bonding between the IC chip 1 and the substrate 4 itself becomes defective, resulting in an electrical connection failure.

On the other hand, according to the fourteenth embodiment and the various modifications thereof, as described above, the adhesive strength is improved while the effect of lowering the linear expansion coefficient by the inorganic filler 6f is provided. be able to. Thereby, the adhesion strength between the IC chip 1 and the substrate 4 is improved, and the reliability is improved.

Further, the portion 7 containing less inorganic filler 6f
When the resin layer 6x is disposed on the IC chip side, or when the inorganic filler distribution is reduced on the IC chip side, the portion 700 or the resin layer 6x is made of silicon nitride or silicon oxide on the IC chip surface. It is possible to improve the adhesion to the passivation film. It is also possible to appropriately select and use an insulating resin that improves the adhesion to the film material used on the surface of the IC chip. Further, by lowering the elastic modulus in the vicinity of the IC chip, stress concentration in the sealing sheet material, which is an example of the anisotropic conductive layer, is reduced. The material used for the substrate 4 is as hard as ceramic (high elastic modulus)
In such a case, if such a structure is adopted, the elastic modulus and the linear expansion coefficient of the sealing sheet material near the substrate match,
It is preferable.

On the other hand, the portion 70 containing less inorganic filler 6f
0 or when the resin layer 6x is arranged on the substrate side, or
When the distribution of the inorganic filler is reduced on the substrate side, when bending is applied to the substrate 4 such as a resin substrate or a flexible substrate (FPC), a bending stress is generated when the substrate 4 is incorporated into a housing of an electronic device. Can be used for the purpose of improving the adhesion strength between the substrate 4 and a sealing sheet which is an example of an anisotropic conductive layer. IC
When the surface layer on the chip side is made of a protective film formed of a polyimide film, the elastic modulus and the linear expansion coefficient are generally increased from the IC chip 1 to the substrate 4 when the insulating resin is in good contact and there is no problem. Is continuously or stepwise changed, so that the sealing sheet is hard on the IC chip side and a soft material on the substrate side. This allows
Since the generation of stress inside the sealing sheet is reduced, the reliability is improved.

Further, on both sides of the IC chip side and the substrate side, the portion 700 or the resin layer 6x, 6
When z is arranged, or when the inorganic filler distribution is reduced on both sides of the IC chip side and the substrate side, the two cases of the IC chip side and the substrate side are made compatible. Adhesion on both sides of the substrate can be improved, and the coefficient of linear expansion
Both the C chip 1 and the substrate 4 can be connected with high reliability. Further, according to the material of the surface on the IC chip side and the material of the substrate, it is possible to select and use an insulating resin having better adhesion and resin wettability. Further, since the inclination of the small amount of the inorganic filler 6f can be freely changed, the matching with the substrate material can be achieved by making the portion or the layer of the inorganic filler 6f extremely thin.

(Fifteenth Embodiment) Next, a fifteenth embodiment of the present invention will be described.
In the embodiment, the method and apparatus for mounting electronic components, such as IC chips, on a circuit board according to the eighth to fourteenth embodiments and their modifications, and the mounting method described above,
A manufacturing process of an anisotropic conductive layer used by an electronic component unit or module, for example, a semiconductor device in which a C chip is mounted on the substrate will be described with reference to FIGS.

First, when the anisotropic conductive layer is formed directly on the circuit board 4, a first resin sheet is attached on the circuit board 4, and a second resin sheet is attached thereon. At this time, when the first resin sheet contains a large amount of the inorganic filler 6f, the state becomes as shown in FIG. 28A or FIG. 30, and when the first resin sheet is reversed, the state becomes as shown in FIG. 28B or FIG. That is, in the former case, the first resin sheet is made of the inorganic filler 6f.
Is the resin sheet corresponding to the portion 701 or the second resin layer 6y, and in the latter case, it is the resin sheet corresponding to the portion 700 or the first resin layer 6x where the inorganic filler 6f is small.

When a third resin sheet is further formed on the second resin sheet, and the first resin sheet and the third resin sheet correspond to the portion 700 having less inorganic filler 6f or the first resin layer 6x. FIG. 28 (C) or FIG.
(A).

Further, as shown in FIGS. 34 and 35, these are previously formed on a base film 672 called a separator.
Above, the first resin sheet 673 and the second resin sheet 674 are attached in this order (only this case is shown in FIGS. 34 and 35), or in reverse, or further, the third resin sheet is attached. It may be formed by attaching. In this case, FIG.
4, a pair of upper and lower heatable rollers 67 as shown in FIG.
A plurality of resin sheets 673 and 674 at 0,270, etc.
Paste while heating as needed. Thereafter, if the formed resin sheet body 671 is cut into predetermined dimensions, the above-described resin sheet body 671 as shown in any of FIGS. 28 (A) to (C), FIGS. 29 (A) to (C), and FIGS. The anisotropic conductive film sheet 10 is obtained.

As another modified example, when an anisotropic conductive film sheet having a continuous anisotropic conductive film sheet 10 is produced, an epoxy and an inorganic filler dissolved in a solvent are separated by a doctor blade method or the like. It is applied on a base film called. The solvent is dried to produce an anisotropic conductive film sheet.

At this time, once the concentration of the inorganic filler 6f is low, or a liquid insulating resin not containing the inorganic filler 6f is applied as a first layer on the base film. The dried first layer is dried. When not drying, the inorganic filler 6f is slightly
As the inorganic filler 6f of the second layer is mixed into the first layer, the inorganic filler distribution is inclined as shown in FIG.

A liquid insulating resin containing more inorganic filler 6f than the first layer is applied on the first layer formed above to form a second layer. By drying the second layer, an anisotropic conductive film sheet having a two-layer structure in which the first layer and the second layer are formed on the base film can be formed. By cutting the anisotropic conductive film sheet into predetermined dimensions, FIG.
(A), FIG. 29 (A), and FIG.

In the case where a layer having a small amount of inorganic filler 6f is arranged on the substrate side, the reverse of the above-mentioned process, that is, after forming the second layer on the base film, the first layer is formed on the second layer. Thus, an anisotropic conductive film sheet having a two-layer structure can be formed. When the anisotropic conductive film sheet is cut into predetermined dimensions, the anisotropic conductive film sheet 10 as shown in FIGS. 28 (B), 29 (B) and 31 is obtained.

Further, once the concentration of the inorganic filler 6f is low, or the insulating resin 6m containing no inorganic filler 6f is applied as a first layer and dried (may be omitted) to form a first layer. An insulating resin in which the inorganic filler 3f is mixed in more than the first layer is applied thereon, and then applied and dried (sometimes omitted) as a second layer, and the amount of the inorganic filler is higher than that of the second layer. Apply a third layer with little or no. By drying this, an anisotropic conductive film sheet having a three-layer structure in which a first layer, a second layer, and a third layer are formed on a base film can be formed. When the anisotropic conductive film sheet is cut into predetermined dimensions, FIG.
(C), the anisotropic conductive film sheet 10 as shown in FIG.

According to the method of directly forming an anisotropic conductive layer on the circuit board 4, the anisotropic conductive layer is formed on the side where the electronic component unit is manufactured, by using a resin of an optimal material for an electronic component. Is selected and placed on the electronic component side, while a resin of a material most suitable for the substrate can be selected and placed on the substrate side, and the degree of freedom in selecting the resin can be increased.

On the other hand, in the method for producing the anisotropic conductive film sheet, there is not much freedom in selection as described above.
A large number of the above-mentioned anisotropic conductive film sheets 10 can be manufactured in a lump, so that the manufacturing efficiency is good and the cost is low, and one attaching device is sufficient.

As described above, according to each of the above embodiments of the present invention, many steps conventionally required for joining an electronic component, for example, an IC chip to a circuit board, can be eliminated, and the productivity is greatly improved. Can be done. That is, for example, in stud bump bonding or solder bump bonding described as a conventional example, it is necessary to inject a sealing material after flip-chip bonding, put it into a batch furnace, and cure it. The injection of the sealing material requires several minutes per unit, and the curing of the sealing material requires 2 to 5 hours. In the stud bump bonding mounting, as a preceding step, a step of transferring an Ag paste to a bump, mounting the Ag paste on a substrate, and then curing the Ag paste is required. This process takes two hours. On the other hand, in the method of the embodiment, the sealing step can be eliminated, and the productivity can be greatly improved.
Further, in the above embodiment, by using a sealing sheet or the like of a solid or semi-solid insulating resin, for example, an epoxy resin having a large molecular weight can be used,
The bonding can be performed in a short time of about 10 to 20 seconds, the bonding time can be reduced, and the productivity can be further improved. Further, the following effects can be obtained.

(1) Bump formation In the method of forming bumps by plating (conventional example 3), a dedicated bump formation step needs to be performed by a semiconductor manufacturer.
Only limited manufacturers can form bumps. However, according to the above embodiment of the present invention, a general-purpose wire bonding IC is provided by a wire bonding apparatus.
A chip can be used, and an IC chip can be easily obtained. In other words, the reason that a general-purpose wire bonding IC chip can be used is that in the case of wire bonding, bumps are formed on a normal IC pad on which an Al pad is formed using a wire bonding apparatus or a bump bonding apparatus. Because it is possible. On the other hand, to form a plated bump by a method of forming a bump by plating (conventional example 3), Ti, C
After forming a barrier metal such as u, Cr or the like, a resist is applied by spin coating, and the resist is exposed to form holes only in the bump forming portions. This is formed by applying electricity thereto and plating the hole with Au or the like. Therefore, forming a plated bump requires a large-scale plating apparatus and a waste liquid treatment apparatus for dangerous substances such as cyanide compounds, so that it cannot be practically performed in a factory where a normal assembly process is performed.

Also, compared to the method of Conventional Example 1, bump leveling for stabilizing the transfer amount of the adhesive in an unstable transfer step such as the transfer of the conductive adhesive becomes unnecessary, and
A leveling device for such a leveling step becomes unnecessary. The reason is that it is not necessary to level only the bumps in advance because the bumps are pressed and crushed on the electrodes of the substrate.

In the above-described embodiment, a highly reliable bonding can be achieved even when the bump 103 is mounted on the electrode 5 of the circuit board 4 while being shifted. That is, when forming the bumps 3 on the IC chip 1, a gold wire 96a is formed by electrical sparking of a gold wire in the same manner as wire bonding. Next, 95a
A ball 96a having a diameter Φd-Bump indicated by a circle is formed, and the diameter 96D of the chamfer diameter 93D of the capillary 193 in which the Chamfar angle θc is 100 ° or less is ° to ３ of the diameter d-Bump of the gold ball 96a. / 4, and the tip of the capillary 193 has a flat shape in which a flat portion is not provided at a portion in contact with the gold ball 96a of the capillary 193.
At 93, bumps 103 are formed on the electrodes 2 of the IC chip 1 by ultrasonic waves and thermocompression bonding. Capillary 19 of the above shape
By using the bump 3, the bump 103 having a substantially conical tip as shown in FIG. 10B can be formed on the electrode 2 of the IC chip 1. Even when the bump 103 formed by the above method is mounted on the electrode 5 of the circuit board 4 with a displacement of the dimension Z as shown in FIG. 11C, since the tip of the bump 103 has a substantially conical shape, the outside of the bump 103 is formed. If the deviation is up to half the diameter, a part of the bump 103 can always contact the electrode 5 of the substrate 4. FIG. 11 of conventional bump 3
In (D), a part of the width dimension d of the so-called pedestal 3g of the bump 3 comes into contact, but the contact is only partially made, resulting in unstable bonding. When this is subjected to a thermal shock test or reflow, the joint becomes open. According to the present invention, such unstable bonding is eliminated, and a bonding with high production yield and high reliability can be provided.

(2) Bonding of IC Chip to Circuit Board According to the method of the conventional example 2, the connection resistance depends on the number of conductive particles existing between the bumps and the electrodes of the circuit board. In the above embodiment, the conductive particles do not need to be sandwiched between the two electrodes for electrical conduction between the IC chip side electrode and the substrate side electrode, and the bump 3 is not leveled in the leveling step as an independent step. The load (for example, 1) applied to the electrode 5 of the circuit board 4 is higher than that of the conventional examples 1 and 2.
Since the bump 3 and the electrode 5 can be directly bonded by pressing with a pressing force of 20 gf or more per bump 3, the connection resistance does not depend on the number of intervening particles, and the connection resistance can be obtained stably. Can be That is, the conductive particles 10a
When the conductive particles 10a are sandwiched between the bump 3 and the substrate electrode 5 in the direct bonding between the bump 3 and the substrate electrode 5, the distance between the substrate-side electrode 5 and the IC chip-side bump 3 This has an additional effect that the connection resistance can be reduced.

Further, in the conventional leveling step, the bump height at the time of bonding with the substrate electrode is adjusted to be constant, but in each of the above embodiments of the present invention, the crushing of the bump 3 is applied to the electrode 2 or 5. Since the bonding can be performed simultaneously with the bonding, not only an independent leveling step is not required, but also the bonding can be performed while deforming and correcting the warpage and undulation of the circuit board 4 at the time of bonding. By hardening the conductive paste adhered to the substrate and deforming the conductive paste at the time of joining, leveling of the bumps 3 and 103 is not required at all, and the joining is performed while correcting and correcting the warpage and undulation of the circuit board 4 at the time of joining. So it is resistant to warping and swell.

By the way, in Conventional Example 1, 10 μm / IC chip (meaning that a thickness warpage dimensional accuracy of 10 μm is required for one IC chip), and in Conventional Example 2, 2 μm.
It is necessary to uniform the substrate 4 and the bumps 3 and 103 with high precision such as 1 μm / IC chip and 1 μm / IC chip (bump height variation ± 1 μm or less) even in Conventional Example 3, and in practice, it is represented by LCD. Glass substrates are used.
On the other hand, according to the embodiment of the present invention, the circuit board 4 is bonded while deforming and correcting the warp and undulation of the circuit board 4 at the time of bonding.
For example, a resin substrate, a flexible substrate, a multilayer ceramic substrate, or the like can be used, and a more inexpensive and versatile IC chip bonding method can be provided.

If the volume of the thermosetting resin 6m between the IC chip 1 and the circuit board 4 is set to be larger than the volume of the space between the IC chip 1 and the circuit board 4, the thermosetting resin 6m protrudes from this space. Flow out as above, and a sealing effect can be obtained. Therefore, there is no need to perform sealing resin (underfill coating) under the IC chip after bonding the IC chip and the circuit board with the conductive adhesive required in Conventional Example 1, and the process can be shortened.

The inorganic filler 6f is replaced with the thermosetting resin 6
By blending about 5 to 90 wt% of m, the elastic modulus and the coefficient of thermal expansion of the thermosetting resin can be controlled to be optimal for the substrate 4. In addition, when this is used for a normal plated bump, an inorganic filler enters between the bump and the circuit board, and the bonding reliability is reduced.
However, if stud bumps (forming method using wire bonding) are used as in the above embodiment of the present invention, the thermosetting resin 6 m
Due to the sharp bumps 3 and 103 penetrating inside, the inorganic filler 6f and thus the thermosetting resin 6m
Is pushed out of the bumps 3 and 103, so that the inorganic filler 6f and the thermosetting resin 6m are extruded from between the bumps 3 and 103 and the electrodes 5 and 2 while the bumps 3 and 103 are being deformed. Unnecessary inclusions can be prevented from being present, and the reliability can be further improved.

As described above, according to the present invention, it is possible to provide an inexpensive method for joining electronic components, such as an IC chip and a circuit board, and a device therefor with higher productivity than the conventional joining method.

In the first embodiment, in addition to the bump 3 shown in FIG.
The present invention is also applicable to bonding between the IC chip 1 having the leveled stud bumps 300 and 301 as shown in FIGS. In this case, a leveling step is required, but other effects such as no need for a sealing step can be obtained. In addition, the above-mentioned bump has an external appearance by plating or printing as shown in FIG.
Bumps formed in substantially the same manner as in (A) and (B) can also be used. For example, bumps are formed by plating titanium, nickel, and gold in this order on the electrodes of the IC chip, or a paste in which aluminum, nickel, or the like is mixed with a synthetic resin is printed on the electrodes of the IC chip and dried or cured. Thereby, a polymer bump can be formed. In particular, when using leveled bumps or bumps formed by plating or printing, the amount of deformation of the bumps is small, so that the inorganic filler is sandwiched between the bumps and the board electrode, and the The electrical connection between the bumps and the substrate electrode may be unstable, but the conductive particles 10a are also interposed between the bump and the substrate electrode, and the conductive particles 10a secure conduction between the bump and the substrate electrode. be able to.

[0165]

As described above, according to the present invention, many steps conventionally required for joining an electronic component and a circuit board can be eliminated, and productivity can be greatly improved.

Further, the following effects can be obtained.

(1) Bump formation In the method of forming bumps by plating (conventional example 3), a dedicated bump formation step needs to be performed by a semiconductor manufacturer.
Only limited manufacturers can form bumps. However, according to the present invention, a general-purpose wire bonding IC chip can be used as an example of the electronic component by the wire bonding apparatus, and the IC chip can be easily obtained.

Further, compared with the method of the conventional example 1, bump leveling for stabilizing the transfer amount of the adhesive in an unstable transfer step such as the transfer of the conductive adhesive is not required.
A leveling device for such a leveling step becomes unnecessary.

If a bump having a substantially conical tip is formed on an electrode of an electronic component, even if the bump is displaced from an electrode of a circuit board and mounted, the bump has a substantially conical tip. If the deviation is up to half the outer diameter of the bump, a part of the bump can always contact the electrode of the substrate. In the conventional bump, a part of the so-called pedestal of the bump comes in contact with the bump, but only partially contacts the bump, resulting in unstable bonding. When this is subjected to a thermal shock test or reflow, the joint becomes open. According to the present invention, such unstable bonding is eliminated, and a bonding with high production yield and high reliability can be provided.

(2) Bonding of IC Chip to Circuit Board According to the method of the conventional example 2, the connection resistance depends on the number of conductive particles existing between the bumps and the electrodes of the circuit board. Therefore, there is no need to sandwich conductive particles between the two electrodes for electrical conduction between the electronic component-side electrode and the substrate-side electrode. Conventional example 1,
Since the bump and the electrode can be directly joined by pressing with a load stronger than 2 (for example, a pressing force of 20 gf or more per bump), the connection resistance value does not depend on the number of intervening particles, and the stability is stable. Thus, a connection resistance value is obtained. That is, when the conductive particles are sandwiched between the bump and the substrate electrode in the direct bonding between the bump and the substrate electrode, the conductive particles are formed between the electrode on the substrate side and the bump on the electronic component side. This has the additional effect of reducing the connection resistance value.

In the conventional leveling process, the bump height at the time of bonding with the substrate electrode is adjusted to be constant. However, according to the present invention, the crushing of the bump can be performed simultaneously with the bonding to the electrode. Not only is an independent leveling process unnecessary, but also it is possible to join while deforming and correcting warpage and undulation of the circuit board at the time of joining, or at the time of joining by curing the conductive paste attached to the bumps By deforming the conductive paste,
Since leveling of bumps is not required at all and bonding is performed while deforming and correcting warpage and undulation of the circuit board during bonding, it is resistant to warpage and undulation.

Incidentally, in Conventional Example 1, 10 μm / IC chip (meaning that a thickness warpage dimensional accuracy of 10 μm per IC chip is required), and in Conventional Example 2, 2 μm / IC chip.
It is necessary to have a highly accurate substrate and uniform bumps such as 1 μm / IC and 1 μm / IC chip (bump height variation ± 1 μm or less) even in Conventional Example 3. In practice, glass substrates represented by LCDs are used. Used. On the contrary,
According to the present invention, since it is possible to join while deforming and correcting warpage and undulation of the circuit board at the time of joining, a substrate having a poor flatness with warpage and undulation, for example, a resin substrate,
A flexible substrate, a multilayer ceramic substrate, or the like can be used, and a more inexpensive and versatile IC chip bonding method can be provided.

If the volume of the insulating resin between the electronic component and the circuit board is set to be larger than the volume of the space between the electronic component and the circuit board, the resin flows out of this space and is sealed. A stopping effect can be achieved. Therefore,
After bonding the IC chip and the circuit board with the conductive adhesive required in Conventional Example 1, there is no need to perform a sealing resin (underfill coating) under the IC chip, and the process can be shortened.

It is to be noted that the inorganic filler is added to the
By blending about ~ 90 wt%, the elastic modulus and thermal expansion coefficient of the insulating resin can be controlled to be optimal for the substrate. In addition, when this is used for a normal plated bump, an inorganic filler enters between the bump and the circuit board, and the bonding reliability is reduced. However,
By using a stud bump (a forming method using wire bonding) as in the present invention, the inorganic filler, and hence the insulating resin, can be formed by the sharp bumps that have entered the insulating resin at the beginning of joining. By extruding the outer side of the bump, the inorganic filler and the insulating resin can be extruded from between the bump and the electrode in the process of the deformation of the bump, so that unnecessary inclusions can be prevented from being present. Reliability can be improved.

When the same weight of inorganic filler is blended, it is necessary to use a large inorganic filler having an average particle size of 3 μm or more, or to use a plurality of inorganic fillers having different average particle sizes. The average particle size of one inorganic filler is different from the average particle size of the other inorganic filler by two times or more, or one of the at least two types of inorganic fillers has an average particle size of 3 μm. If the average particle diameter of the other inorganic filler is 3 μm or less, the amount of moisture absorbed around the inorganic filler can be reduced, and the moisture resistance can be improved. Is possible, the amount of the inorganic filler can be increased, the film can be easily formed (solidified), and an anisotropic conductive layer can be formed. If the linear expansion coefficient of the anisotropic conductive film sheet or an anisotropic conductive film adhesive can be reduced, and it is possible to further longer life, it is possible to improve the reliability. .

Further, if one of the inorganic fillers having a large average particle diameter is made of the same material as the above-mentioned insulating resin, it can exert a stress relaxing action.
One of the inorganic fillers having a large average particle size is softer than the epoxy resin as the insulating resin, and if the one inorganic filler is compressed, it is possible to exert a stress relaxing action.

In addition, if the inorganic filler does not exist at the bonding interface between the electronic component or the substrate and the anisotropic conductive layer, or if the amount thereof is small, the inherent adhesiveness of the insulating resin is exhibited, and Insulating resin with high adhesiveness is increased, and it is possible to improve the adhesion strength between the electronic component or the substrate and the insulating resin, and to provide the effect of lowering the coefficient of linear expansion by the inorganic filler, the electronic component or The adhesion to the substrate is improved. Thereby, the life in various reliability tests is improved, and the peel strength against bending is improved.

Further, an insulating resin for improving the adhesion to the film material used on the surface of the electronic component is used in the portion or layer in contact with the electronic component, while the portion or layer in contact with the substrate is in the substrate or layer. If an insulating resin that improves the adhesion to the material on the surface is used, the adhesion can be further improved. In each of the above embodiments, the electronic wave is applied in both the step of applying the ultrasonic wave to the gold bump and the electrode of the substrate, and the step of correcting the warpage of the substrate and crushing the bump. Instead of heating both the component and the substrate, the heating may be performed from the electronic component side, from the substrate side, or from both the electronic component side and the substrate side, respectively, after the heat treatment.

As described above, according to the present invention, after the circuit board and the electronic component are joined, a sealing resin step to be poured between the electronic component and the board and a bump leveling step to make the height of the bump uniform are not required. A method and an apparatus for mounting an electronic component on a circuit board that joins the electronic component to the substrate with high productivity and high reliability can be provided.

[Brief description of the drawings]

FIG. 1 (A), (B), (C), (D), (E),
FIGS. 4F and 4G are explanatory diagrams illustrating a method of mounting an electronic component, for example, an IC chip, on a circuit board according to the first embodiment of the present invention.

FIGS. 2A and 2B respectively show a method of mounting an electronic component, for example, an IC chip, on a circuit board according to the first embodiment, in which the inorganic filler in the thermosetting resin is mixed with the thermosetting resin at the beginning of joining; FIG. 4 is an explanatory view showing a state in which the bumps are pushed out to the outside of the bumps by the sharp bumps, and FIG. 4C is an explanatory view showing a state in which the inorganic filler does not enter between the bumps and the substrate electrode.

FIG. 3 (A), (B), (C), (D), (E),
(F), (G) is an explanatory view showing a bump forming step using a wire bonder of an IC chip in the mounting method according to the first embodiment of the present invention.

FIGS. 4A, 4B, and 4C respectively show a circuit board and an IC in the mounting method according to the first embodiment of the present invention;
It is explanatory drawing which shows the joining process of C chip.

FIGS. 5A, 5B, and 5C are explanatory views illustrating a bonding step of a circuit board and an IC chip in the mounting method according to the first embodiment of the present invention;

FIGS. 6A, 6B, and 6C respectively show a thermosetting adhesive on a circuit board instead of the anisotropic conductive film sheet in the mounting method of the third embodiment of the present invention. FIGS. 4A and 4B are explanatory diagrams for explaining the arrangement, and FIGS. 4D and 4E are enlarged explanatory diagrams of a joined state in the first embodiment, respectively.

FIG. 7 (A), (B), (C), (D), (E),
(F) shows that, in the mounting method of the third embodiment of the present invention, as a modification of FIG. 6, a thermosetting adhesive is disposed on a circuit board instead of an anisotropic conductive film sheet. It is an explanatory view for explaining.

FIGS. 8A, 8B, and 8C respectively show a circuit board and an IC in a mounting method according to a fifth embodiment of the present invention;
It is explanatory drawing which shows the joining process of C chip.

FIGS. 9A, 9B, and 9C are explanatory views illustrating a bonding step of a circuit board and an IC chip in a mounting method according to a fifth embodiment of the present invention.

FIGS. 10 (A), (B), (C), and (D) are explanatory views showing a bonding step of a circuit board and an IC chip in a mounting method according to a sixth embodiment of the present invention.

FIG. 11 (A), (B), (C), (D), (E)
FIGS. 14A to 14C are explanatory views showing a bonding step of a circuit board and an IC chip in the mounting method according to the sixth embodiment of the present invention.

12 (A), (B), (C), and (D) are explanatory views showing a bonding step of a circuit board and an IC chip in the mounting method according to the seventh embodiment of the present invention.

FIG. 13 is an explanatory view showing a bonding step of a circuit board and an IC chip in a mounting method according to a seventh embodiment of the present invention.

FIGS. 14A and 14B are explanatory views showing a modification of the first embodiment in which a thermosetting resin sheet is formed on the IC chip 1 side, and a thermosetting adhesive is applied on the IC chip 1 side. FIG. 9 is an explanatory view showing a modification of the first embodiment formed in FIG.

FIG. 15 is a cross-sectional view showing a conventional method for bonding an IC chip to a circuit board.

16A and 16B are explanatory views showing a conventional method for bonding an IC chip to a circuit board.

FIG. 17 is a graph showing a relationship between a resistance value and a load in the case of a bump having an outer diameter of 80 μm in the first embodiment.

FIG. 18 is a cross sectional view of the first embodiment, in which 80 μm, 4 μm,
It is the figure of the graph which showed the highly reliable area | region based on the relationship between the bump of each outer diameter of 0 micrometers, and the minimum load.

FIG. 19 is a graph of a heating temperature and a reaction rate of a resin sheet (anisotropic conductive film sheet) in the third embodiment.

FIG. 20 is a perspective view of the electronic component mounting apparatus used in the first embodiment.

21 (A), (B), (C), and (D) are perspective views showing a position recognition operation on the component side in the electronic component mounting apparatus of FIG. 20, and a diagram of a component position recognition image. 3A and 3B are a perspective view illustrating a position recognition operation on the substrate side and a diagram of a position recognition image of the substrate.

FIG. 22 is a schematic view of an ultrasonic wave application device used in the fourth embodiment.

FIG. 23 is a schematic view of a sticking device used in the fifth embodiment.

FIGS. 24A and 24B are enlarged cross-sectional views of the vicinity of a bump for comparison between the ACF method and the method of the embodiment.

FIG. 25 is a schematic cross-sectional view of a bonding state in which electronic components such as an IC chip are mounted on a circuit board according to a ninth embodiment of the present invention by a method and an apparatus.

FIG. 26 is a partially enlarged schematic cross-sectional view of a resin sheet used by a method and an apparatus for mounting an electronic component, for example, an IC chip on a circuit board according to the ninth embodiment.

FIG. 27 is a schematic cross-sectional view of an insulating resin and an inorganic filler in a joined state joined by a method and an apparatus for mounting an electronic component, for example, an IC chip on a circuit board according to a thirteenth embodiment of the present invention.

FIGS. 28 (A), (B), (C), and (D) are anisotropic drawings used in a method and apparatus for mounting an electronic component, for example, an IC chip on a circuit board according to a fourteenth embodiment of the present invention. FIG. 5 is a schematic cross-sectional view of an electronic component unit showing various examples of a conductive conductive layer.

FIGS. 29A, 29B, 29C, and 29D are used by a method and an apparatus for mounting an electronic component, for example, an IC chip on a circuit board according to a modification of the fourteenth embodiment of the present invention; FIG. 4 is a schematic cross-sectional view of various examples of an anisotropic conductive layer.

30A and 30B are joined using an anisotropic conductive layer used in a method and an apparatus for mounting an electronic component, for example, an IC chip, on a circuit board according to the fourteenth embodiment shown in FIG. 29A. It is a schematic cross section of the joined state.

31 is joined using an anisotropic conductive layer used in a method and an apparatus for mounting an electronic component, for example, an IC chip, on a circuit board according to the fourteenth embodiment shown in FIG. 29B. It is a schematic cross section of the joined state.

FIGS. 32A and 32B are used in the method and apparatus for mounting an electronic component, for example, an IC chip on a circuit board according to the fourteenth embodiment shown in FIGS. 29C and 29D, respectively. FIG. 3 is a schematic cross-sectional view of a bonded state using an anisotropic conductive layer.

FIG. 33 (A), (B), (C), (D),
(E) and (F) respectively show the amount of the inorganic filler and the anisotropic conductive layer of the anisotropic conductive layer used by the method and the apparatus for mounting the electronic component such as the IC chip on the circuit board according to the fourteenth embodiment. FIG. 6 is a diagram showing a graph of various relations with the position in the thickness direction of FIG.

FIG. 34 is an explanatory diagram of a process of manufacturing an anisotropic conductive layer used by a method and an apparatus for mounting an electronic component, for example, an IC chip on a circuit board according to a fifteenth embodiment of the present invention.

FIG. 35 is a partially enlarged view of FIG. 34;

FIG. 36 is a distribution diagram of an average diameter of conductive particles and an average diameter of inorganic filler particles in a specific example of the first embodiment.

FIGS. 37A and 37B are diagrams illustrating examples of bumps that can be used in the modification of the first embodiment.

[Explanation of symbols]

1 ... IC chip, 2,5 ... electrode, 3,103 ... bump,
3g: pedestal, 4: circuit board, 6b: thermosetting adhesive for forming an anisotropic conductive film, 6f: inorganic filler, 6f-1: inorganic filler having a large average particle size, 6f-2: small average particle size Inorganic filler, 6 m: anisotropic conductive layer (for example, thermosetting resin), 6 v: fourth resin layer, 6 w: fifth resin layer, 6
x: first resin layer, 6y: second resin layer, 6z: third resin layer, 7: bonding tool, 8: joining tool, 8a: heater, 9, 109, 201: stage, 10: anisotropic conductive film Sheet, 10a: conductive particles, 10s: cured resin constituting the anisotropic conductive film sheet, 93, 193: capillary, 193a: tip portion, 93b: flat portion,
95: wire, 96, 96a: ball, 98: curved portion,
99: loop, 200: holding member, 670: roller, 6
71: insulating resin sheet, 672: base film,
673 1st resin sheet, 674 2nd resin sheet, 7
00: a portion in contact with an IC chip and / or a substrate (a portion having a small amount of inorganic filler or not containing the inorganic filler); 701: another portion (a portion having a large amount of inorganic filler); A portion that is small or does not contain the above-mentioned inorganic filler, 703: a portion where the amount of the inorganic filler is large.

Claims (55)

[Claims] A metal wire (9) similar to wire bonding.
5) The ball (96, 96)
a) is formed, and the formed ball is ultrasonically thermocompression-bonded to the electrode (2) of the electronic component (1) by a capillary (93, 193) to form a bump (3, 103), and an inorganic filler is compounded. Conductive particles (10
The electrode of the electronic component and the electrode (5) of the circuit board (4) are aligned with the anisotropic conductive layer (10) containing a) interposed therebetween, and the electronic component is mounted on the substrate. Then, while heating from the electronic component side, heating from the substrate side, or heating from both the electronic component side and the substrate side, the electronic component is mounted on the circuit board by the tool (8). The insulating resin of the anisotropic conductive layer interposed between the electronic component and the circuit board is cured while pressing with a pressing force of 20 gf or more per bump to correct the warpage of the board and crush the bump. And mounting the electronic component and the circuit board to electrically connect the electrode of the electronic component to the electrode of the circuit board. 2. After forming the bump, the electrode of the electronic component is aligned with the electrode (5) of the circuit board (4) with the anisotropic conductive layer interposed therebetween, and 2. The method according to claim 1, wherein before mounting the component on the substrate, the formed bump is once pressed with a load of 20 gf or less to adjust the tip so as to prevent the neck portion of the bump from falling down. Electronic component mounting method. 3. The insulating resin (6) of the anisotropic conductive layer.
m) is an insulating thermosetting epoxy resin, and the amount of the inorganic filler added to the insulating thermosetting epoxy resin is 5 to 90 wt% of the insulating thermosetting epoxy resin. The electronic component mounting method described in the above. 4. The insulating resin (6) of the anisotropic conductive layer.
m) is a liquid which is initially applied to the substrate, and after being applied to the substrate, the substrate is put into a furnace (503) to cure the applied insulating resin liquid, or The electronic component according to any one of claims 1 to 3, wherein the electronic component is mounted on the substrate after being semi-solidified by pressing the applied insulating resin liquid with a tool (78) that has been applied. How to implement. 5. A metal wire (9) as in wire bonding.
5) The ball (96, 96)
a) is formed, and the formed ball is ultrasonically thermocompression-bonded to the electrode (2) of the electronic component (1) by a capillary (93, 193) to form a gold bump (3, 103). Without leveling the bumps, while interposing an anisotropic conductive layer (10) containing conductive particles (10a) in an insulating resin containing an inorganic filler, the electrode of the electronic component and the circuit board (4). The electronic component is mounted on the substrate by aligning with the electrode (5), and then a load is applied from the upper surface side of the electronic component by the tool (8) to prevent the neck portion of the gold bump from falling down. The gold bumps and the electrodes of the substrate are metal-bonded by applying ultrasonic waves and then heating, and then heating from the upper surface side of the electronic component or from the substrate side. While While heating from both the electronic component side and the substrate side, the electronic component is pressed against the circuit board with a pressing force of 20 gf or more per bump to correct the warpage of the substrate and crush the bumps, Hardening the insulating resin of the anisotropic conductive layer interposed between the electronic component and the circuit board,
A method of mounting an electronic component, wherein the electronic component and the circuit board are joined to electrically connect the electrode of the electronic component and the electrode of the circuit board. 6. The electronic component (1) includes a plurality of electrodes (2).
And the circuit board (4) before the alignment.
Then, as the anisotropic conductive layer, a solid anisotropic conductive film sheet (10) having a shape smaller than an outer dimension (OL) connecting the plurality of electrodes (2) of the electronic component (1) is attached. After the attachment, the positioning is performed, and in the bonding, the anisotropic conductive film sheet (10) is heated while heating.
Pressing and pressing the electronic component against the circuit board, while simultaneously correcting the warpage of the circuit board, curing the insulating resin interposed between the electronic component and the circuit board, The electronic component mounting method according to claim 1, wherein the electronic component is bonded to the circuit board. 7. When forming a gold ball (96a) by electric spark at the tip of a metal wire (95) as in wire bonding when forming the bump on the electronic component, the Chamfer angle (θc) is set. 2. The gold bump having a substantially conical tip formed on the electrode of the electronic component by the capillary having a tip shape that is not more than 100 [deg.] And does not have a flat portion at a portion in contact with the gold ball. 7. The method for mounting an electronic component according to any one of claims 6 to 6. 8. A metal wire (9) as in wire bonding.
5) The ball (96, 96)
a) is formed, and the balls formed above are formed with bumps (3, 103) on the electrodes (2) of the electronic component (1) by capillaries (93, 193) without leveling the formed bumps. The electrode of the electronic component and the electrode (5) of the circuit board (4) are interposed between an insulating resin containing an inorganic filler and an anisotropic conductive layer (10) containing conductive particles (10a). The electronic component is mounted on the substrate after being aligned, and then, while the electronic component is heated from above the upper surface of the electronic component by a tool (8) heated to a predetermined temperature, the electronic component is applied to the circuit board as pressure P1. While pressing to correct the warpage of the board, the insulating resin of the anisotropic conductive layer interposed between the electronic component and the circuit board is cured, and then, after a predetermined time, the pressing force The above The electronic component and the circuit board are joined by lowering the pressure of the insulating resin of the anisotropic conductive layer to a pressure P2 lower than the force P1 while relaxing the insulating resin. A method of mounting an electronic component, wherein the electrodes of a circuit board are electrically connected. 9. The pressure P1 is 20 gf / bump or more,
9. The electronic component mounting method according to claim 8, wherein the pressure P2 is equal to or less than 1/2 of the pressure P1. 10. An anisotropic conductive layer (10) in which conductive particles (10a) are mixed in an insulating resin in which an inorganic filler is mixed.
(7, 109, 200, 201) for bonding the electrode (5) or the electronic component (1) of the circuit board (4) to the electrode (2) of the electronic component (1) in the same manner as wire bonding. A ball (96, 96a) is formed at the tip of the metal wire (95) by electric spark, and the ball (96, 96a) is formed by ultrasonic thermocompression bonding to the electrode on the substrate by a capillary (93, 193) to form a bump (3) which is not leveled. , 10
A device (93) for forming 3), a device (600) for positioning the electronic component on the electrode (5) of the circuit board (4) and mounting the same, and a tool (8) for heating. The anisotropic conductive layer interposed between the electronic component and the circuit board while pressing the electronic component against the circuit board with a pressing force of 20 gf or more per bump to correct the warpage of the board. A device (8, 9) for curing said insulating resin, joining said electronic component and said circuit board, and electrically connecting said electrodes of said electronic component and said electrodes of said circuit board. An electronic component mounting apparatus characterized in that: 11. The insulating resin of the anisotropic conductive layer is an insulating thermosetting epoxy resin, and the amount of the inorganic filler to be added to the insulating thermosetting epoxy resin is the same as that of the insulating thermosetting epoxy resin. The electronic component mounting apparatus according to claim 10, wherein the content of the epoxy resin is 5 to 90 wt%. 12. The insulating resin (6m) of the anisotropic conductive layer is a liquid, a dispenser (502) for applying the liquid of the insulating resin to the substrate, and a dispenser for applying the liquid of the insulating resin to the substrate by the dispenser. 12. The electronic component according to claim 10, further comprising: a furnace (503) that inserts the applied substrate and hardens the liquid of the insulating resin to make the insulating resin semi-solid. Mounting equipment. 13. The dispenser (502) for applying the insulating resin liquid to the substrate, wherein the insulating resin (6m) of the anisotropic conductive layer is a liquid, and the dispenser is applied to the substrate by the dispenser. 12. The electronic component mounting apparatus according to claim 10, further comprising: a device (78) for pressing the liquid of the insulating resin to semi-solidify the insulating resin. 14. An anisotropic conductive layer (10) in which conductive particles (10a) are mixed in an insulating resin in which an inorganic filler is mixed,
A device (7, 109, 200, 201) for attaching to the electrode (5) of the circuit board (4) or the electronic component (1), and a metal wire to the electrode (2) of the electronic component (1) in the same manner as wire bonding. A ball (96, 96a) is formed at the tip of (95) by electric spark, and this is formed by ultrasonic thermocompression bonding to the electrode of the substrate using a capillary (93, 193) to form a gold bump (3, 10
A device (93) for forming 3), a device (600) for positioning and mounting the electronic component on the electrode (5) of the circuit board (4), and a tool (628) for the electronic component. An apparatus (62) that applies a load from the upper surface of the metal bump to adjust the tip so as to prevent the neck portion of the gold bump from falling down, and also applies ultrasonic waves to the metal bump and the electrode of the substrate.
0) and pressing the electronic component against the circuit board with a pressing force of 20 gf or more per bump while heating with the tool (8) to correct the warpage of the board and crush the bump while crushing the bump. The insulating resin of the anisotropic conductive layer interposed between the component and the circuit board is cured, and the electronic component and the circuit board are joined to form the electrode of the electronic component and the electrode of the circuit board. And a device (8, 9) for electrically connecting the components. 15. A shape smaller than an outer dimension (OL) connecting electrodes (2) of the electronic component (1) as the anisotropic conductive layer on the circuit board (4) before the alignment. An apparatus (640) for attaching a solid anisotropic conductive film sheet (10) having dimensions and an apparatus (600) for aligning and mounting the circuit board and the electronic component, While heating the isotropic conductive film sheet (10), the electronic component is pressed and pressed against the circuit board to simultaneously correct the warpage of the circuit board while interposing between the electronic component and the circuit board. 14. The electronic component mounting device according to claim 10, further comprising a device (7, 8) for curing the anisotropic conductive film sheet to be bonded and joining the electronic component and the circuit board. 16. An apparatus (93, 193) for forming the gold ball (96a) has a tip shape in which a flat portion is not provided at a portion in contact with the gold ball, and has a Chamfer angle (θc) of 100 ° or less. The electronic component mounting apparatus according to any one of claims 10 to 15, further comprising the capillary, wherein the gold bump having a substantially conical tip is formed on the electrode of the electronic component by the capillary. 17. An apparatus (7, 109) for attaching an anisotropic conductive layer (10) in which conductive particles (10a) are mixed in an insulating resin in which an inorganic filler is mixed, to a circuit board (4) or an electronic component (1). , 200, 201) and balls (96, 96a) formed on the electrodes (2) of the electronic component (1) by electric spark at the tips of the metal wires (95) in the same manner as wire bonding.
An apparatus (9) for forming bumps (3, 103) which are formed on the electrodes of the substrate by the method of U.S. Pat.
3,193), a device (600) for positioning and mounting the electronic component on the electrode (5) of the circuit board (4), and a tool (8) heated to a predetermined temperature. The insulating resin interposed between the electronic component and the circuit board while the electronic component is pressed against the circuit board by the pressure P1 as a pressing force while heating from the upper surface of the electronic component to correct the warpage of the board. After that, after a predetermined time, the pressing force is reduced to a pressure P2 lower than the pressure P1 to relax the stress at the time of curing the insulating resin of the anisotropic conductive layer and the electronic component and the electronic component. An electronic component mounting device, comprising: a device (8, 9) for joining a circuit board to electrically connect the electrode of the electronic component to the electrode of the circuit board. 18. The electronic component mounting apparatus according to claim 17, wherein the pressure P1 is not less than 20 gf / bump, and the pressure P2 is not more than の of the pressure P1. 19. The electronic component according to claim 1, wherein an average particle diameter of the inorganic filler mixed with the insulating resin of the anisotropic conductive layer is 3 μm or more. Implementation method. 20. The inorganic filler compounded in the insulating resin of the anisotropic conductive layer is a plurality of types of inorganic fillers (6f-1, 6f-2) having different average particle sizes. 20. The method for mounting an electronic component according to any one of items 3 and 19. 21. The inorganic filler to be mixed with the insulating resin of the anisotropic conductive layer comprises at least two types of inorganic fillers having different average particle diameters (6f-1, 6f).
-2), wherein the average particle size of one of the at least two types of inorganic fillers (6f-1) is the other of the at least two types of inorganic fillers (6f-2). 20. The method for mounting an electronic component according to claim 1, wherein the difference is at least twice the average particle size of (1). 22. The inorganic filler to be mixed with the insulating resin of the anisotropic conductive layer comprises at least two kinds of inorganic fillers having different average particle diameters (6f-1, 6f).
-2), wherein one of the at least two types of inorganic fillers (6f-1) has an average particle size of more than 3 μm, and the other one of the at least two types of inorganic fillers (6f-2) is 3 μm
20. The method of mounting an electronic component according to claim 1, wherein the electronic component has the following average particle size. 23. The inorganic filler (6f) blended in the insulating resin (6m) of the anisotropic conductive layer comprises at least two types of inorganic fillers (6f-1, 6f) having a plurality of different average particle sizes. -2), wherein at least 2
The one inorganic filler (6f-1) having a large average particle size among the types of inorganic fillers has a stress relaxing effect by being made of the same material as the insulating resin.
20. The method for mounting an electronic component according to any one of items 3 and 19. 24. The inorganic filler (6f) blended in the insulating resin (6m) of the anisotropic conductive layer comprises at least two kinds of inorganic fillers (6f-1, 6f) having a plurality of different average particle diameters. -2), wherein at least 2
One of the inorganic fillers (6f-1) having a larger average particle diameter among the kinds of inorganic fillers is softer than the epoxy resin as the insulating resin (6m), and the one inorganic filler (6f-1) is compressed. 20. The electronic component mounting method according to claim 1, wherein the electronic component has a stress relaxation effect. 25. The anisotropic conductive layer according to claim 1, wherein a portion in contact with one of the electronic component and the substrate has a smaller amount of the inorganic filler than other portions.
The electronic component mounting method according to any one of claims 1 to 3, 19 to 24. 26. The first anisotropic conductive layer, wherein the first anisotropic conductive layer is located at a portion in contact with one of the electronic component and the substrate, and the inorganic filler is mixed with the same insulating resin as the first resin. A resin layer (6x) and a second resin layer (6y) made of an insulating resin that is in contact with the first resin layer and has a smaller amount of the inorganic filler than the first resin layer.
The method for mounting an electronic component according to claim 25, comprising: 27. The mounting of an electronic component according to claim 25, wherein a portion of the anisotropic conductive layer that contacts the electronic component and the substrate has a smaller amount of the inorganic filler than other portions. Method. 28. The anisotropic conductive layer is formed of an insulating resin having a smaller amount of the inorganic filler than the first resin layer on a side of the first resin layer opposite to the second resin layer. The electronic component mounting method according to claim 26, further comprising a third resin layer (6z), wherein the first resin layer and the third resin layer contact the electronic component and the substrate, respectively. 29. A portion in contact with each of the electronic component and the substrate has an inorganic filler content of 20 wt%.
28. The electronic component mounting method according to claim 27, wherein the amount of the inorganic filler in the other portion is less than or equal to 20 wt%. 30. The first resin layer and the third resin layer each contain less than 20 wt% of the inorganic filler, while the second resin layer contains 20 wt% or more of the inorganic filler. A method for mounting an electronic component according to claim 28. 31. The anisotropic conductive layer such that the amount of the inorganic filler decreases gradually or stepwise from a portion in contact with one of the electronic component or the substrate to another portion. An electronic component mounting method according to any one of claims 1 to 3, 19 to 24. 32. The anisotropic conductive layer, wherein the amount of the inorganic filler gradually or stepwise decreases from a portion in contact with the electronic component and the substrate to another portion. 31. The mounting method of an electronic component according to 31. 33. An insulating resin for improving adhesion to a film material used on the surface of the electronic component is used in a portion in contact with the electronic component, whereas a material in contact with the substrate is used in a portion in contact with the substrate. An insulating resin for improving the adhesiveness is used.
2. The method for mounting an electronic component according to claim 1. 34. The resin layer in contact with the electronic component uses an insulating resin for improving adhesion to a film material used on the surface of the electronic component, while the resin layer in contact with the substrate uses a resin. 27. An insulating resin for improving adhesion to a material on the surface.
The mounting method of an electronic component according to any one of 8, 30, and 32. 35. A portion of the anisotropic conductive layer (10), which contacts one of the electronic component and the substrate,
Claims 1 to 5 wherein the inorganic filler is not blended.
An electronic component mounting method according to any one of 3, 19 to 24. 36. The anisotropic conductive layer (10) is located at a portion in contact with one of the electronic component or the substrate, and the same inorganic resin as the insulating resin is mixed with the inorganic filler. And the first resin layer (6x)
36. The electronic component mounting method according to claim 35, further comprising a second resin layer (6y) that is in contact with the resin layer and is made of an insulating resin not containing the inorganic filler. 37. The method for mounting an electronic component according to claim 35, wherein portions of the anisotropic conductive layer (10) contacting the electronic component and the substrate are not mixed with the inorganic filler. 38. The anisotropic conductive layer (10) is a third resin layer made of an insulating resin not containing the inorganic filler, on the opposite side of the first resin layer from the second resin layer. 37. The electronic component mounting method according to claim 36, further comprising (6z), wherein the first resin layer and the third resin layer respectively contact the electronic component and the substrate. 39. A portion in contact with each of the electronic component and the substrate is not mixed with the inorganic filler, while the other portion has an inorganic filler content of 2%.
The method for mounting an electronic component according to claim 37, wherein the amount is 0 wt% or more. 40. The first resin layer and the third resin layer do not contain the inorganic filler, while the second resin layer has an inorganic filler content of 20%.
39. The mounting method of an electronic component according to claim 38, wherein the amount is not less than wt%. 41. A fourth resin layer (6v), which is located at a portion in contact with the electronic component and the substrate and is made of an insulating resin mixed with the inorganic filler. And a fifth resin layer (6w) located at an intermediate portion between the electronic component and the substrate and made of an insulating resin having a smaller amount of the inorganic filler than the fourth resin layer.
The electronic component mounting method according to any one of claims 1 to 3, and 19 to 24, comprising: 42. The fourth resin layer (6v), which is located at a portion in contact with the electronic component and the substrate and is made of an insulating resin mixed with the inorganic filler. And a fifth resin layer (6w) located at an intermediate portion between the electronic component and the substrate and made of an insulating resin not containing the amount of the inorganic filler. 24. The method of mounting an electronic component according to any one of 24. 43. The amount of the inorganic filler in the anisotropic conductive layer (10) gradually increases from a portion in contact with the electronic component and the substrate to an intermediate portion between the electronic component and the substrate. Claims 1 to be reduced
An electronic component mounting method according to any one of 3, 19 to 24. 44. The anisotropic conductive layer (10) includes a portion in the vicinity of the electronic component, a portion in the vicinity of the substrate, and an intermediate portion between the portion in the vicinity of the electronic component and the portion in the vicinity of the substrate. The method for mounting an electronic component according to claim 1, wherein the amount of the inorganic filler is reduced in order. 45. The amount of each of the inorganic filler in the portion of the anisotropic conductive layer (10) in the vicinity of the electronic component and the portion of the anisotropic conductive layer in the portion of the electronic component in contact with the anisotropic conductive layer 45. The method of mounting an electronic component according to claim 43, wherein the linear expansion coefficient is combined with the linear expansion coefficient of a portion of the substrate that contacts the anisotropic conductive layer. 46. A bump (3, 103) formed on an electrode (2) of an electronic component (1) is formed by mixing an insulating resin (6m) with an inorganic filler (6f) and hardening an anisotropic conductive material. In a state where the layer (10) is interposed and the bumps are crushed, the electrodes are joined to the electrodes (5) of the circuit board (4) to electrically connect the electrodes of the electronic component and the electrodes of the circuit board. The anisotropic conductive layer (10) is characterized in that a portion in contact with either the electronic component or the substrate has a smaller amount of the inorganic filler than other portions. Parts unit. 47. A bump (3, 103) formed on an electrode (2) of an electronic component (1) is formed by mixing an insulating resin (6m) with an inorganic filler (6f) and hardening an anisotropic conductive material. In a state where the layer (10) is interposed and the bumps are crushed, the electrodes are joined to the electrodes (5) of the circuit board (4) to electrically connect the electrodes of the electronic component and the electrodes of the circuit board. The anisotropic conductive layer (10) is located at a portion in contact with either the electronic component or the substrate, and is formed by mixing the inorganic filler with the same insulating resin as the insulating resin. The first resin layer (6x) and the first resin layer,
And a second resin layer (6y) made of an insulating resin having a smaller amount of the inorganic filler than the first resin layer. 48. When applying the ultrasonic wave to metal-join the gold bump and the electrode of the substrate, heating the electronic component from the upper surface side or heating the electronic component from the substrate side. 6. The electronic component mounting method according to claim 5, wherein heating is performed from both the electronic component side and the substrate side. 49. An electronic component unit, wherein the electronic component is mounted on the substrate by the electronic component mounting method according to any one of claims 1 to 9, 19 to 45, and 48. 50. The electronic component mounting method according to claim 1, wherein the bump is a bump formed by plating or printing. 51. The electronic component unit according to claim 46, wherein the bump is a bump formed by plating or printing. 52. The anisotropic conductive layer is formed by adding conductive particles (10) having an average diameter larger than the average particle size of the inorganic filler to a solid insulating resin containing the inorganic filler.
The electronic component mounting method according to any one of claims 1 to 9, 19 to 45, and 50, wherein a) is blended. 53. The anisotropic conductive layer is formed by mixing conductive particles (10a) having a larger average diameter with a larger average particle diameter of the inorganic filler in a solid insulating resin containing the inorganic filler (6f). An electronic component mounting apparatus according to claim 10. 54. The anisotropic conductive layer comprises a solid insulating resin containing the inorganic filler (6f) and conductive particles (10a) having an average diameter larger than that of the inorganic filler. The electronic component unit according to any one of claims 46 to 49, 51. 55. An apparatus for applying the ultrasonic wave to metal-join the gold bump and the electrode of the substrate from the upper surface side of the electronic component, or from the substrate side, or
15. The electronic component mounting apparatus according to claim 14, further comprising a heating member for heating from both the electronic component side and the substrate side, wherein the heating member heats the metal component during the metal joining.