JP2000278131A - Analog / digital converter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To convert a specific analog signal into digital data for a prescribed period in the case that one A/D converter is used to sequentially convert a plurality of analog signals into digital data. SOLUTION: Analog signals requiring A/D conversion for a prescribed period such as negative pressure signals PB of a suction tube of an internal combustion engine are given in common to two input circuits 1, 2. Thus, the signal is always selected by either of the input circuits 1, 2 for a prescribed period independently of a switching state of a changeover switch 3 and the selected signal is A/D converted.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an analog / digital (hereinafter, referred to as "A / D") converter used for controlling an engine of an automobile, for example, and in particular, converts a large number of analog signals into digital data by sequentially switching. A /
The present invention relates to a D conversion device.

[0002]

2. Description of the Related Art Conventionally, techniques in such a field include:
For example, there is one described in the following literature. Document: JP-A-10-112652

FIG. 2 shows a conventional A / A disclosed in the above document.
1 is a configuration diagram of an internal combustion engine control device including a D conversion device. This internal combustion engine control device is used for controlling an engine of an automobile or the like.
0, A1,..., A7, and an input circuit 1 for sequentially selecting and outputting these analog signals A0 to A7 one by one.
, A1 of the second group of analog signals A8, A9,.
5, an input circuit 2 for sequentially selecting and outputting these analog signals A8 to A15 one by one.
The input circuit 1 includes, for example, analog signals A0 to A having a fast changing speed from a throttle opening sensor for detecting the opening of the throttle, a negative pressure sensor for detecting a negative pressure in the intake pipe, and the like.
7 is given. On the other hand, the input circuit 2 is supplied with analog signals A8 to A15 having a slow change speed from an atmospheric pressure sensor or the like for detecting the atmospheric pressure.

A changeover switch 3 is connected to the output side of the input circuits 1 and 2. The changeover switch 3 switches and outputs one of the output signals of the input circuits 1 and 2, and an A / D converter 4 is provided on the output side of the changeover switch 3.
Is connected. The A / D converter 4 is a switch 3
The A / D converter 4 converts an analog signal given by the A / D converter into digital data, and a register circuit 5 is connected to the output side of the A / D converter 4. Register circuit 5 has data holding regions R0, R for holding eight digital data.
, R7. The input circuits 1 and 2, the changeover switch 3, and the register circuit 5 are controlled by the changeover control unit 6, and the input circuit 1 or 2 is controlled according to the state of the changeover switch 3.
The result of the conversion of the analog signal selected in (1) is sequentially held in the data holding areas R0 to R7 of the register circuit 5. The input circuits 1 and 2, the changeover switch 3, the A / D converter 4, the register circuit 5, and the switching control unit 6 constitute an A / D conversion device.

[0005] The register circuit 5 and the switching control unit 6 are connected to a central processing unit (hereinafter, referred to as a “CPU”) 8 via a system bus 7. The system bus 7 further includes a read only memory (hereinafter, referred to as “ROM”) 9, a random access memory (hereinafter, referred to as “RAM”) 10,
Input / output circuit 11, output circuit 12, and rotation speed detector 13
Is connected. The CPU 8 controls the entire internal combustion engine according to control programs and data stored in the ROM 9. The RAM 10 temporarily stores data and the like that are being processed.
And a storage area 10a for storing eight digital data D0 to D7 corresponding to the first group of analog signals A0 to A7, and a second group of analog signals A8 to A8 to
Eight digital data D8 to D15 corresponding to A15
And a storage area 10b for storing the same.

The input / output circuit 11 inputs an on / off state of an ignition switch and the like, and outputs an on / off signal for instructing opening and closing of an intake valve. The output circuit 12 outputs a digital signal such as a fuel injection pulse for driving an injector for injecting and supplying fuel to the engine. Also, the rotation speed detector 1
Reference numeral 3 outputs a position pulse NE indicating the rotational position of the crankshaft of the engine and data on the engine speed. In such an internal combustion engine control device, the analog signals A0 to A7 having a fast changing speed are continuously input, for example, ten times, and then the analog signals A8 to A8 having a slow changing speed are input.
The input is repeated such that A15 is input once.

First, the input circuit 1 is selected by the switching control section 6 based on the control from the CPU 8, and the analog signals A 0 to A 7 are sequentially selected one by one from the input circuit 1, and the analog signals A / A 7 are switched through the changeover switch 3. It is provided to the D converter 4. The analog signals A0 to A7 are sequentially converted into digital data D0 to D7 by the A / D converter 4, and the conversion results are held in holding areas R0 to R7 of the register circuit 5, respectively. That is, the digital data D0 corresponding to the analog signal A0 is held in the data holding area R0, and the digital data D1, D2,... Corresponding to the analog signals A1, A2,.
Respectively. When the conversion of the analog signal A7 is completed, the analog signal A0 is selected again, and the contents of the data holding area R0 are rewritten with the latest digital data D0. Therefore, while the input circuit 1 side is selected,
The CPU 8 operates in a predetermined data holding area R0 of the register circuit 5.
To R7 to read the latest analog signal A0.
Digital data D0 to D7 corresponding to .about.A7 can be obtained.

When the analog signals A0 to A7 of the input circuit 1 are 1
After the conversion is repeated 0 times, the input circuit 2 is selected by the switching control unit 6 based on the control from the CPU 8. Prior to the selection of the input circuit 2, the register circuit 5
The latest digital data D0 to D7 held in the data holding areas R0 to R7 are saved in a storage area 10a provided in the RAM 10. After that, the input circuit 2 is selected, and the analog signal A
8 to A15 are sequentially selected one by one and supplied to the A / D converter 4 via the changeover switch 3. Analog signal A8
To A15 are sequentially converted into digital data D8 to D15 by the A / D converter 4, and the conversion results are held in data holding regions R0 to R7 of the register circuit 5, respectively. While the input circuit 2 is selected, the register circuit 5
Does not hold the digital data D0 to D7, the CPU 8 operates the storage area 1 in the RAM 10 as necessary.
The digital data D0 to D7 saved to 0a are read.

When the conversion of the analog signals A8 to A15 is completed, the digital data D8 to D15 held in the data holding areas R0 to R7 of the register circuit 5 are transferred to the RAM 10
It is saved to the storage area 10b provided in the inside. Thus, the CPU 8 can obtain digital data D8 to D15 by reading the storage area 10b in the RAM 10. Thereafter, the input circuit 1 is selected again, and the input of the analog signals A0 to A7 and the digital data D0 to D0 are selected.
Conversion to D7 is performed repeatedly.

As described above, in the A / D converter in the internal combustion engine control device of FIG. 2, a plurality of analog signals A0
To A15 are analog signals A0 to A7 having a fast change speed.
And analog signals A8 to A15 having a slow change speed, and the A / D conversion of the group having the fast change speed is continuously performed a plurality of times (here, ten times). The digital data held in the register circuit 5 is stored in the corresponding storage areas 10a and 10b in the RAM 10 only when the group is switched. This makes it possible to reduce the frequency of data transfer processing between the RAM 10 and the register circuit 5,
The overall processing capacity can be improved.

[0011]

However, the conventional A / D converter in the internal combustion engine control apparatus has the following problems. That is, the input circuit 2 is selected,
While the A / D conversion of the analog signals A8 to A15 having a slow change speed is being performed, the A / D conversion processing of the analog signals A0 to A7 input to the input circuit 1 is interrupted. In this case, for example, data of an oxygen concentration sensor for detecting the oxygen concentration in the exhaust pipe is stored in a data storage area 10a in the RAM 10.
The digital data saved in is also useful. However, for example, when the data has a close relationship with the rotational position of the engine, such as data from a negative pressure sensor that detects a negative pressure in the intake pipe, the position pulse NE output from the rotational speed detector 13 is used.
It is necessary to obtain the latest digital data in synchronization with.
Therefore, for example, when the changeover switch 3 is switched to the input circuit 2 side and the latest digital data cannot be obtained, the performance of the engine may be greatly affected.

[0012] The present invention solves the problems of the prior art, and when a plurality of analog signals are divided into groups and sequentially converted using one A / D converter, a specific analog signal can be obtained. An object of the present invention is to provide an A / D converter capable of converting a signal into digital data at a predetermined cycle.

[0013]

According to a first aspect of the present invention, there is provided an A / D converter comprising m (where m is a plurality) containing a specific analog signal. Are input in parallel, and a first selecting means for sequentially selecting and outputting these analog signals one by one in accordance with a first selection signal, and n (where n (N is an integer satisfying n ≧ m) analog signals are input in parallel, and the analog signals are sequentially selected and output one by one in accordance with a second selection signal. A switching unit is provided with an output signal of the second selecting unit, and switches and outputs one of the output signals according to the switching signal. Further, the A / D converter includes an A / D converter that converts an output signal of the first or second selector, which is output by switching by the switch, into digital data, When the output signal of the first selection means is being output, the signal is selected by the first selection means and the A signal is output.
Holding m digital data corresponding to the m analog signals converted by the / D conversion means, and when the output signal of the second selection means is output by the switching means, N corresponding to the n analog signals selected by the selection means and converted by the A / D conversion means
And data holding means having at least n data holding areas for holding digital data.

According to the first aspect of the present invention, the A / D
Since the conversion device is configured, the following operation is performed.
When the switching means is switched to the first selection means, m analog signals including a specific analog signal input in parallel to the first switching means are sequentially selected one by one by the first selection signal. The data is output to the A / D conversion means via the switching means. The m analog signals sequentially applied to the A / D conversion means are converted into digital data by the A / D conversion means and output to the data holding means. The m digital data corresponding to the m analog signals are respectively held in the corresponding data holding areas of the data holding means.

Next, when the switching means is switched to the second selecting means, n analog signals including the specific analog signal inputted in parallel to the second switching means are switched to the second selecting signal. Are sequentially selected one by one, and output to the A / D conversion means via this switching means. The n analog signals sequentially applied to the A / D converter are converted into digital data by the A / D converter and output to the data holding unit. The n digital data corresponding to the n analog signals are respectively held in corresponding data holding areas of the data holding means. Thus, the latest digital data corresponding to the specific analog signal is always held in the data holding area of the data holding unit regardless of the switching state of the switching unit.

In a second aspect based on the first aspect, the specific analog signal is supplied to an i-th input side (where i is an integer satisfying 1 ≦ i ≦ m) of the first selection means. At the same time, it is configured to commonly supply to the corresponding i-th input side of the second selecting means. According to the second aspect, the following operation is performed. The specific analog signal is commonly applied to the i-th input of both the first selecting means and the second selecting means. Thus, the latest digital data corresponding to the specific analog signal is always held in the i-th data holding area of the data holding unit regardless of the switching state of the switching unit.

[0017]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS First Embodiment FIG. 1 is a block diagram of an internal combustion engine control device provided with an A / D converter according to a first embodiment of the present invention. Common elements are denoted by common reference numerals. This internal combustion engine control device is used for controlling an engine of an automobile or the like, and has first and second selecting means (for example, input circuits) 1 and 2. The input circuit 1 includes m (eg, eight) analog signals A0, A of the first group.
, A7 are input in parallel, and these analog signals A0 to A7 are sequentially selected and output one by one according to a selection signal SEL1. The input circuit 2 receives n (where n ≧ m, for example, eight) analog signals A8, A9,..., A15 of the second group in parallel, and receives these analog signals A8 to A15 in accordance with the selection signal SEL2. A1
5 are selected and output one by one in order.

For example, as the analog signal A0 of the input circuit 1, the throttle opening signal VTH from the throttle opening sensor is obtained, and as the analog signal A1, the negative pressure signal PB is obtained from the negative pressure sensor for detecting the negative pressure in the intake pipe. As the analog signal A2, an oxygen concentration signal DO2 or the like is input from an oxygen concentration sensor that detects the oxygen concentration in the exhaust pipe. Further, the atmospheric pressure signal ATM from the atmospheric pressure sensor as the analog signal A8 of the input circuit 2, the battery voltage VBT from the battery sensor as the analog signal A9, and the water temperature signal WT from the water temperature sensor for detecting the cooling water temperature of the engine as the analog signal A10. , And an analog signal A11, an external air temperature signal AT is input from an external air temperature sensor. Further, as the analog signal A15 of the input circuit 2, the same negative pressure signal P as the analog signal A1 of the input circuit 1 is used.
B is commonly given.

The output sides of the input circuits 1 and 2 are connected to the input side of a switching means (for example, a changeover switch) 3. The changeover switch 3 is connected to the input circuits 1 and 2 according to the changeover signal SW.
A / D conversion means (for example, A / D converter) 4 is connected to the output side of the changeover switch 3. The A / D converter 4 converts an analog signal supplied from the changeover switch 3 into digital data, and a data holding unit (for example, a register circuit) 5 is connected to an output side of the A / D converter 4. Have been. The register circuit 5 has at least n (in this case, eight) data holding regions R0, R1,..., R7 in order to hold the first group or the second group of digital data. The input circuits 1 and 2, the changeover switch 3, and the register circuit 5 are provided with selection signals SEL1 and SEL2 provided from the changeover control unit 6.
When the changeover switch 3 is switched to the input circuit 1 side, the digital data D0 to D7 as conversion results of the analog signals A0 to A7 selected by the input circuit 1 are stored in a register. Circuit 5
Are sequentially stored in the data holding areas R0 to R7. When the changeover switch 3 is switched to the input circuit 2 side, the digital data D8 to D15 obtained by converting the analog signals A8 to A15 selected by the input circuit 2 are stored in the same data holding region R0 of the register circuit 5. To R7. The input circuits 1 and 2, the changeover switch 3, and the A / D
The converter 4, the register circuit 5, and the switching control unit 6 perform A / D
A conversion device is configured.

The register circuit 5 and the switching control unit 6 are connected to a CPU 8 via a system bus 7. The system bus 7 is further connected to a ROM 9, a RAM 10, an input / output circuit 11, an output circuit 12, a rotation speed detector 13, and a cycle timer 14. The CPU 8 controls the entire internal combustion engine in accordance with control programs and data stored in the ROM 9. The RAM 10 temporarily stores data and the like in the middle of processing.
A storage area 10a for storing eight digital data D0 to D7 corresponding to the first group of analog signals A0 to A7, and eight digital data corresponding to the second group of analog signals A8 to A15 in M10. Data D8 ~
A storage area 10b for storing D15 is provided.

The input / output circuit 11 inputs an on / off state of an ignition switch IGS, an idle switch IDL, and the like, and outputs an on / off signal for instructing opening / closing of an intake valve IV and the like and control of a fuel pump FP. It is. The output circuit 12 includes a fuel injection pulse IJ for driving an injector for injecting and supplying fuel to the engine.
P, an ignition timing control signal IG that determines the ignition timing of the ignition device
N and a digital signal such as a control signal EGR for controlling the opening and closing of an EGR valve of an exhaust gas recirculation device (EGR device). The rotation number detector 13 outputs a position pulse NE indicating the rotation position of the crankshaft of the engine to one.
The engine rotation speed data is output by outputting two pulses for each rotation and counting the position pulse NE. Also, the periodic timer 14
Is executed at predetermined time intervals (for example, 1 ms).
And outputs an interrupt signal INT for interrupting.

FIG. 3 is a time chart showing a schematic operation of the A / D conversion processing in FIG. Hereinafter, FIG.
1 will be described with reference to FIG. First, it is assumed that at time t0 in FIG. 3, the switching signal SW is set to the level “H”, and the analog signals A8 to A15 on the input circuit 2 side are being converted. At time t1, an interrupt signal INT is output from the periodic timer 14 and the CPU 8 is interrupted. When the CPU 8 interrupts, the digital data held in the data holding areas R0 to R7 of the register circuit 5 by the interrupt processing. D8 to D15 are
The data is saved in the storage area 10b in the RAM 10. Time t2
In the RAM 10 of the digital data D8 to D15.
When the save processing is completed, the switching signal SW from the switching control unit 6 is set to the level “L” based on the control from the CPU 8, and the switching switch 3 is switched to the input circuit 1 side. Further, the flag FLG for indicating the determination / indefiniteness of the held content of the register circuit 5 is set to "L", and it is displayed that the held content of the register circuit 5 is indefinite. Further, analog signals A0 to A7 are sequentially selected one by one from the input circuit 1 by the selection signal SEL1 and supplied to the A / D converter 4 via the changeover switch 3.

The analog signals A0 to A7 are sequentially converted into digital data D0 to D7 by the A / D converter 4, and the conversion result is stored in the data holding area R of the register circuit 5.
0 to R7. That is, the analog signal A
The digital data D0 corresponding to 0 is stored in the data holding area R
0, and the analog signals A1, A2,.
Digital data D1, D2,..., D7 corresponding to
The data are held in the data holding regions R1, R2,..., R7. At time t3, when the conversion of the analog signal A7 is completed, the flag FLG is set to “H”, indicating that the content held in the register circuit 5 is determined. Further, the analog signals A0 to A7 are sequentially selected by the selection signal SEL1, and the contents of the data holding regions R0 to R7 are sequentially rewritten to the latest digital data D0 to D7.
At time t4 when 1 ms elapses from time t1, for example,
When the periodic timer 14 interrupts the CPU 8, the digital data D 0 to D 7 held in the data holding areas R 0 to R 7 of the register circuit 5 are stored in the storage area 10 a in the RAM 10 by the interrupt processing by the CPU 8. Will be evacuated.

At time t5, digital data D0
When the save processing of D7 to D7 in the RAM 10 is completed, the CPU
8, the switching signal S from the switching control unit 6 based on the control from
W is set to “H”, and the changeover switch 3
And the flag FLG is set to "L". Further, the analog signals A8 to A15 are sequentially selected one by one from the input circuit 2 by the selection signal SEL2 and supplied to the A / D converter 4 via the changeover switch 3. The analog signals A8 to A15 are sequentially converted into digital data D8 to D15 by the A / D converter 4,
This conversion result is stored in the data holding areas R0 to R0 of the register circuit 5.
Each is held in R7. That is, the digital data D8 corresponding to the analog signal A8 is held in the data holding area R0, and the analog signals A9, A10,.
, D15,..., D15
Are held in the data holding regions R1, R2,..., R7. At time t6, when the conversion of the analog signal A15 is completed, the flag FLG is set to “H”, and the analog signals A8 to A15 are sequentially selected again by the selection signal SEL2, and the data holding regions R0 to R5 are selected.
7 is rewritten to the latest digital data D8 to D15.

Time t, for example, 1 ms after time t4
7, when the CPU 8 is interrupted by the periodic timer 14, the interrupt processing by the CPU 8
As at the time t1, the digital data D8 to D15 held in the data holding areas R0 to R7 of the register circuit 5 are saved to the storage area 10b in the RAM 10. By such repetition, the input circuits 1 and 2 are alternately switched at a period of 1 ms, and the analog signal A
0 to A7 and analog signals A8 to A15 are alternately A / D
The data is converted and stored in the register circuit 5 and the RAM 10.

On the other hand, valid digital data D0 to D1
The location where 5 is stored is specified as follows by the value of the flag FLG and the value of the switching signal SW. That is, the flag FL
When G is "H" and the switching signal SW is "L", the latest digital data D0 to D7 are held in the data holding areas R0 to R7 of the register circuit 5, and the valid digital data D8 to D15 are stored in the RAM 10. It is stored in the storage area 10b. When the flag FLG is “H” and the switching signal SW is “H”, the latest digital data D8 to D15
Are stored in data holding regions R0 to R7 of the register circuit 5, and valid digital data D0 to D7 are stored in the RAM 10
Is stored in the storage area 10a. Also, the flag FL
When G is "L", valid digital data D0 to D0
D15 is stored in the storage areas 10a and 10b of the RAM 10.

Here, the analog signal A1 of the input circuit 1
Since the same negative pressure signal PB is commonly input to the analog signal A15 of the input circuit 2, the digital data D1 and D15 are both digital data obtained by A / D conversion of the negative pressure signal PB. Therefore, for example, when the position pulse NE is given from the rotation speed detector 13, the flag F
If LG is “H” and the switching signal SW is “L”, CP
U8 can obtain digital data corresponding to the latest negative pressure signal PB by reading the data holding region R1 of the register circuit 5. When the flag FLG is “H”,
If the switching signal SW is "H", the CPU 8 can obtain digital data corresponding to the latest negative pressure signal PB by reading the data holding area R7 of the register circuit 5. When the flag FLG is “L”, the storage area 10 of the RAM 10 is changed according to the state of the switching signal SW.
a, 10b, the latest negative pressure signal PB
Can be obtained.

As described above, A /
An internal combustion engine control device provided with a D conversion device commonly inputs a specific analog signal (for example, a negative pressure signal PB of an intake pipe) requiring the latest digital data to the two input circuits 1 and 2. This has the advantage that the negative pressure signal PB can be converted into digital data at a predetermined cycle. Further, since the switching between the two input circuits 1 and 2 is performed at a predetermined fixed cycle, it is possible to simplify the processing for switching the data transfer processing and the like between the RAM 10 and the register circuit 5. And there is an advantage that the overall processing capability can be improved.

Second Embodiment FIG. 4 is a block diagram of an internal combustion engine control apparatus provided with an A / D converter according to a second embodiment of the present invention. The elements common to those in FIG. Are denoted by common symbols. The difference between the internal combustion engine control device of FIG. 4 and the internal combustion engine control device of FIG. 1 resides in the position where the negative pressure signal PB is input to the input circuits 1 and 2, and the other configurations are the same.
That is, in FIG. 1, the negative pressure signal PB is commonly input as the analog signal A1 of the input circuit 1 and the analog signal A15 of the input circuit 2. In contrast, FIG.
Then, the negative pressure signal PB is the analog signal A7 of the input circuit,
The corresponding analog signal A15 of the input circuit 2 is commonly input.

For this reason, when the A / D conversion result of the negative pressure signal PB in FIG. 1 is switched to the input circuit 1 side, it is held in the data holding area R1 of the register circuit 5 and switched to the input circuit 2 side. Sometimes, the data is held in the data holding area R7 of the register circuit 5. On the other hand, in FIG. 4, the A / D conversion result of the negative pressure signal PB is always held in the data holding area R7 of the register circuit 5 irrespective of the switching state of the input circuits 1 and 2. Therefore, in the second embodiment,
In addition to the advantages of the first embodiment, by referring to the data holding area R7 of the register circuit 5, there is an advantage that digital data corresponding to the latest negative pressure signal PB can always be obtained.

The present invention is not limited to the above embodiment, and various modifications are possible. For example, there are the following modifications (a) to (e). (A) FIGS. 1 and 4 show an internal combustion engine control device provided with an A / D conversion device. However, this A / D conversion device is not limited to that incorporated in the internal combustion engine control device. It is applicable to such control. (B) The number of analog signals input to the input circuits 1 and 2 is not limited to eight. An arbitrary number of analog signals can be input as required. (C) The number of input circuits 1 and 2 is not limited to two, and analog signals may be grouped using more input circuits. (D) The switching cycle of the input circuits 1 and 2 by the changeover switch 3 is not limited to 1 ms, and an arbitrary cycle can be set according to the control device to be applied. Further, the switching times of the input circuits 1 and 2 do not need to be the same. For example,
The switching may be continuously performed for 10 ms to the input circuit 1 to which an analog signal having a fast changing speed is input, and may be switched for 1 ms to the input circuit 2 to which an analog signal having a slow changing speed is input. (E) The negative pressure signal PB is set to 1 as a specific analog signal.
Although only one input signal is provided to the input circuits 1 and 2, two or more analog signals may be supplied to the input circuits 1 and 2 as needed.

[0032]

As described in detail above, according to the first aspect, a specific analog signal is provided to both the first selecting means and the second selecting means in common. . Thus, there is an effect that the specific analog signal can be converted into digital data at a predetermined cycle regardless of the switching state of the switching unit. According to the second invention, the specific analog signal is transmitted to the first selecting unit and the second analog signal.
Are provided in common to corresponding input terminals in the same order of the selecting means. Thus, in addition to the same effect as that of the first aspect, there is an effect that digital data corresponding to this specific analog signal can be obtained by always referring to the same data holding area.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of an internal combustion engine control device including an A / D converter according to a first embodiment of the present invention.

FIG. 2 is a configuration diagram of an internal combustion engine control device including a conventional A / D converter.

FIG. 3 is a time chart showing a schematic operation of an A / D conversion process in FIG. 1;

FIG. 4 is a configuration diagram of an internal combustion engine control device including an A / D converter according to a second embodiment of the present invention.

[Explanation of symbols]

 1, 2 input circuit 3 changeover switch 4 A / D converter 5 register circuit 6 changeover control unit 7 system bus 8 CPU 9 ROM 10 RAM 10a, 10b storage area 13 rotation speed detector 14 cycle timer

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5J022 AA01 BA10 CA10 CD02 CE08 CF07 CF08

Claims (2)

[Claims] 1. m (including m) including a specific analog signal
A plurality of analog signals are input in parallel, a first selecting means for sequentially selecting and outputting these analog signals one by one in accordance with a first selection signal, and n (n) including the specific analog signal (Where n is an integer satisfying n ≧ m) analog signals are input in parallel, and a second selecting means for sequentially selecting and outputting these analog signals one by one in accordance with a second selection signal; Switching means for receiving output signals of the first and second selection means and switching and outputting one of the output signals in accordance with a switching signal; and the first or second selection means switched and output by the switching means Analog / digital conversion means for converting an output signal of the means into digital data; and when the output signal of the first selection means is being output by the switching means, the first selection means is provided. Holding m digital data corresponding to the m analog signals selected by the stage and converted by the analog / digital conversion means, and the switching means outputs the output signal of the second selection means; When at least, at least n data holding areas for holding n digital data corresponding to the n analog signals selected by the second selecting means and converted by the analog / digital converting means are provided. An analog / digital conversion device, comprising: 2. The method according to claim 1, wherein the specific analog signal is supplied to an i-th input side (where i is an integer satisfying 1 ≦ i ≦ m) of the first selecting means, and 2. An analog / digital conversion apparatus according to claim 1, wherein said analog / digital conversion apparatus is configured to apply a common signal to an i-th input side.