JP2000114402A - Semiconductor device and method of manufacturing semiconductor device - Google Patents

Abstract

(57) [Problem] To improve the operating speed of a nonvolatile memory and to obtain a semiconductor device excellent in low-voltage operation. SOLUTION: A first gate insulating film 12 formed on a semiconductor substrate 10, a floating gate 13 formed on the first gate insulating film 12, and a second gate formed on the floating gate 13 In a semiconductor device having an insulating film 14 and a control gate 15 formed on the second gate insulating film 14, the floating gate 13 is formed in a curved shape in which only one end of the upper surface protrudes upward, The thickness difference between the thickness of the portion where the floating gate 13 protrudes and the thickness of the portion where the floating gate 13 does not protrude is larger than the thickness difference between the two portions in the first gate insulating film 12.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a non-volatile memory comprising a floating gate and a control gate, and more particularly to a semiconductor device having an improved operation speed of a non-volatile memory and excellent low-voltage operation. The present invention relates to a method for manufacturing a semiconductor device.

[0002]

2. Description of the Related Art FIG. 14 is a sectional view showing a structure of a conventional semiconductor device. In FIG. 14, 1 is a semiconductor substrate, 2 is a source / drain region formed on the semiconductor substrate 1,
Reference numeral 3 denotes a first gate insulating film as a tunnel oxide film formed on the semiconductor substrate 1 serving as a channel region, 4 denotes a floating gate formed on the first gate insulating film 3, and 5 denotes a floating gate 4 The second gate insulating film formed thereon, 6
Is a control gate formed on the second gate insulating film 5.

A conventional semiconductor device is configured as shown in FIG. 14, and has a small capacitance coupling ratio between the floating gate 4 and the control gate 6, and a low writing / erasing speed. To solve this problem, for example, Japanese Patent Laid-Open Publication No.
The following semiconductor device has been proposed. In FIG. 15, the same portions as those in the conventional case are denoted by the same reference numerals, and description thereof will be omitted. Reference numeral 7 denotes a floating gate formed on the first gate insulating film 3 and has an upper surface formed in a concave shape, 8 denotes a second gate insulating film formed so as to cover the floating gate 7, and 9 denotes a second gate insulating film. Is formed on the gate insulating film 8 and is embedded in the recess of the floating gate 7.

In the conventional semiconductor device formed as shown in FIG. 15, the upper surface of the floating gate 7 is formed in a concave shape, and the control gate 9 on the upper portion is formed so as to be buried in the concave portion. Therefore, the capacitance coupling ratio between the floating gate 7 and the control gate 9 is larger than that of the conventional semiconductor device shown in FIG. 14, and a semiconductor device with a higher write / erase speed can be obtained.

[0005]

The conventional semiconductor device is formed as described above, and the capacitance coupling ratio between the floating gate 7 and the control gate 9 is increased. However, the upper surface of the floating gate 7 is formed in a concave shape. Therefore, the edge portions A (six locations) of the floating gate 7 are larger than the edge portions A (two locations) of the floating gate 4 of the other conventional (semiconductor device shown in FIG. 14). Since the electric field concentration occurs at the edge portion A, it is weak against the volatilization of the electrons. Therefore, when the edge portion A increases, the reliability of the semiconductor device decreases.

SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned problems, and to provide a semiconductor device having a non-volatile memory that operates quickly without deteriorating the reliability of the semiconductor device and a method of manufacturing the semiconductor device. The purpose is to provide.

[0007]

Means for Solving the Problems Claim 1 according to the present invention.
A semiconductor device, a first gate insulating film formed on a semiconductor substrate, a floating gate formed on the first gate insulating film, a second gate insulating film formed on the floating gate, In the semiconductor device having the control gate formed on the second gate insulating film, only one end of the upper surface of the floating gate protrudes upward, or only the central portion of the upper surface of the floating gate extends upward. The thickness difference between the film thickness of the projecting portion of the floating gate and the film thickness of the portion not projecting is determined by the thickness of the film at both locations in the first gate insulating film. It is larger than the thickness difference.

According to a second aspect of the present invention, in the semiconductor device according to the first aspect, the thickness of the first gate insulating film is such that the thickness of the first gate insulating film at a position corresponding to the protruding portion of the upper surface of the floating gate is equal to The thickness of the floating gate is larger than that at a position corresponding to a portion where the upper surface of the floating gate does not protrude.

According to a third aspect of the present invention, in the method of manufacturing a semiconductor device, a first gate insulating film is formed on a semiconductor substrate, and a first conductive film is stacked on the first gate insulating film. Patterning the first conductive film so as to remain in a desired region, laminating the conductive film on the first conductive film, and forming a second conductive film having an upwardly projecting portion due to the influence of the first conductive film on the upper surface. Forming a film, forming a floating gate, sequentially stacking a second gate insulating film and a control gate on the floating gate;
The control gate, the second gate insulating film, the floating gate, and the first gate insulating film are patterned so that protruding portions on the upper surface of the floating gate remain.

According to a fourth aspect of the present invention, in the method for manufacturing a semiconductor device according to the third aspect, the first conductive film is patterned by increasing the thickness in a desired region and reducing the thickness in other portions. It is to be done.

According to a fifth aspect of the present invention, in the method of manufacturing a semiconductor device according to the fourth aspect, the first conductive film is patterned by isotropic etching.

According to a sixth aspect of the present invention, in the method of manufacturing a semiconductor device according to the third or fourth aspect, the first conductive film is formed on the upper surface of the lower conductive film after the lower conductive film is laminated. An oxide film is formed, an upper conductive film is laminated on the oxide film, and the first conductive film is patterned by changing the thickness of the portion where the first conductive film is left thinly to the thickness of the lower conductive film. And an oxide film on the upper surface of the lower conductive film is used as an etching stopper.

According to a seventh aspect of the present invention, in a method of manufacturing a semiconductor device according to the third aspect, the first gate insulating film includes a first conductive film patterned in the first gate insulating film. The portion other than the lower portion of the conductive film is etched.

According to an eighth aspect of the present invention, in the method of manufacturing a semiconductor device according to any one of the third to sixth aspects, the first gate insulating film is provided on the semiconductor substrate. After the formation, patterning is performed so as to remain at a desired position, a second insulating film is formed on the semiconductor substrate, and the first insulating film is formed.
And a portion where only the second insulating film is stacked and a portion where only the second insulating film is stacked.

[0015]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiment 1 Hereinafter, embodiments of the present invention will be described. FIG. 1 is a sectional view showing a configuration of a semiconductor device according to a first embodiment of the present invention, and FIGS. 2 and 3 are sectional views showing a method for manufacturing the semiconductor device shown in FIG. In FIG. 1, 10 is a semiconductor substrate, 11 is a source / drain region formed on the semiconductor substrate 10, 12
Is a first gate insulating film as a tunnel oxide film formed on the semiconductor substrate 10 to be a channel region, for example, a silicon oxide film, and has a thickness of 100 Å to 15 Å.
It has 0 angstroms.

Reference numeral 13 denotes a floating gate formed on the first gate insulating film 12, which is formed in a curved shape in which only one end of the upper surface protrudes upward. The difference in film thickness from the film thickness of
Is larger than the thickness difference between the two portions in the gate insulating film 12. The floating gate 13 is made of, for example, a doped polysilicon film and has a thickness of 500 angstroms or more.
Has 2000 angstroms. 14 is the floating gate 1
3, a silicon oxide film, a silicon nitride film, and an ONO film formed by sequentially stacking a silicon oxide film, the thickness of which is the same as that of the silicon oxide film. When converted as having a dielectric constant, it has a thickness of 150 angstroms to 250 angstroms. 1
Reference numeral 5 denotes a control gate formed on the second gate insulating film 13, which is made of, for example, a doped polysilicon film and has a thickness of 1000 to 3000 angstroms.

Next, the first embodiment configured as described above
The method of manufacturing the semiconductor device will be described with reference to FIGS. First, a silicon oxide film is formed on a semiconductor substrate 10 by using, for example, a thermal oxidation method, and a first gate insulating film 12 is formed.
a is formed (FIG. 2A). Next, a first conductive film 16 made of a doped polysilicon film is laminated on the first gate insulating film 12a by, for example, a CVD method (FIG. 2).
(B)).

Next, patterning is performed using a photolithography technique using a resist, and the first conductive film 16a is left only in a desired region (FIG. 2C). At this time, the etching of the first conductive film 16 is performed under the etching condition excellent in the selectivity between the oxide film and the doped polysilicon film so that the first gate insulating film 12a is not etched.

Next, a second conductive film 17 made of a doped polysilicon film is laminated by, for example, a CVD method so as to cover the first conductive film 16a (FIG. 2D). FIG.
As apparent from (d), the steep edge portion caused by the patterning of the first conductive film 16a is alleviated by the lamination of the second conductive film 17, and the upper surface of the second conductive film 17 is Due to the influence of the first conductive film 16a, it is formed in a curved shape protruding upward.

Next, etch back is performed so that the film thickness of the two conductive films 16a and 17 becomes a desired film thickness.
The floating gate 13a is formed. At this time, the floating gate 13
Since the upper surface of a is formed by reflecting the upper surface shape of the second conductive film 17 shown in FIG. 2D, the upper surface is formed in a curved shape protruding upward even after the etch back (FIG. 3
(A)). Note that this etch-back process is performed in the floating gate 1
3a is formed to a desired thickness.
If the desired thickness of the floating gate 13a is obtained in the state shown in (d), this step is omitted.

Next, a second gate insulating film 14a made of an ONO film is laminated so as to cover the floating gate 13a, for example, by the CVD method (FIG. 3D). Next, the second
Control gate 15a made of a doped polysilicon film by, for example, a CVD method so as to cover gate insulating film 14a of FIG.
Are laminated (FIG. 3C). Next, patterning is performed so that a protruding portion on the upper surface of the floating gate 13a remains, and the control gate 15, the second gate insulating film 14, and the floating gate 1 are formed.
3 and a first gate insulating film 12 (FIG. 3
(D)).

Next, using the control gate 15, the second gate insulating film 14, the floating gate 13, and the first gate insulating film 12 as a mask, an impurity is implanted into the semiconductor substrate 10 and the source / drain regions 11 are formed. To form a non-volatile memory (FIG. 1).

According to the first embodiment, the floating gate 1
3 is formed in a curved shape protruding upward only at one end, so that the floating gate 13 and the control gate 1
5, the write / erase speed can be increased and low-voltage operation can be performed, and the edge of the floating gate 13 does not increase and the reliability decreases. Without forming a semiconductor device.

In the first embodiment, an example is shown in which the floating gate 13 is formed in a curved shape in which only one end of the upper surface protrudes upward. As another example, the floating gate 13 is formed in FIG. Then, patterning is performed so that a position different from the case described in the first embodiment, that is, the protrusion of the floating gate 13a is located at the center. Then, as shown in FIG. 4, the first gate insulating film 12b, the floating gate 13
b, second gate insulating film 14b, and control gate 15
It is needless to say that the same effect as in the first embodiment can be obtained by forming the source / drain regions 11b by forming the b and using these as a mask to inject impurities into the semiconductor substrate 10.

In the first embodiment, the first
In the patterning of the conductive film 16 described above, as shown in FIG. 2C, an example is shown in which etching is performed to a position where the upper surface of the first gate insulating film 12a is exposed, but the present invention is not limited to this. As another method, as shown in FIG. 5A, the etching at the time of patterning the first conductive film 16a is stopped before reaching the upper surface of the first gate insulating film 12a, and the projecting portion is formed on the upper surface. The first conductive film 16b is formed.

At this time, since the upper surface of the first gate insulating film 12a is not exposed to the etching atmosphere of the first conductive film 16, it is not damaged at all by the etching of the first conductive film 16a. Therefore, the reliability of the first gate insulating film 12 is not impaired.

Next, as in the first embodiment, a second conductive film 17 made of a doped polysilicon film is laminated by, for example, a CVD method so as to cover the first conductive film 16b (FIG. 5). (B)). As is clear from FIG. 5B, the steep edge portion caused by the patterning of the first conductive film 16b is alleviated by the lamination of the second conductive film 17, and The upper surface is formed in a curved shape protruding upward due to the influence of the first conductive film 16b. Then, through the same steps as in the first embodiment, a semiconductor device similar to the first embodiment can be formed.

As another method, as shown in FIG. 6A, etching during patterning of the first conductive film 16 is stopped before reaching the upper surface of the first gate insulating film 12a. The first conductive film 16c having a protruding portion on the upper surface is formed by isotropic etching.

At this time, similar to the method described above, the first
Of course, the reliability of the gate insulating film 12 does not decrease, and the projection of the first conductive film 16c has a gentler slope than the case shown above because it is performed by isotropic etching.

Next, similarly to the first embodiment, a second conductive film 17 made of a doped polysilicon film is laminated by, for example, a CVD method so as to cover the first conductive film 16c (FIG. 6). (B)). As is clear from FIG. 6B, the gentle edge portion caused by the patterning of the first conductive film 16c is further alleviated by the lamination of the second conductive film 17 and the second conductive film 17c. Is formed in a curved shape protruding upward due to the influence of the first conductive film 16c. Then, through the same steps as in the first embodiment, a semiconductor device similar to the first embodiment can be formed.

By forming in this manner, the second conductive film 17
The upper surface has a more gentle curved shape, so that the accuracy of patterning by photolithography or the like in a later step can be improved. Also, in this case, since the curved shape becomes gentle, the capacitance coupling ratio between the floating gate and the control gate is
Although smaller than in the first embodiment described above, a larger capacitance coupling ratio can be secured than in the conventional case, and the write / erase speed can be increased as compared with the conventional case without lowering the reliability. can do.

Embodiment 2 FIG. FIG. 7 is a cross-sectional view showing a configuration of a semiconductor device according to a second embodiment of the present invention, and FIG. 8 is a cross-sectional view showing a method for manufacturing the semiconductor device shown in FIG.
In FIG. 7, the same parts as those in the first embodiment are denoted by the same reference numerals, and description thereof will be omitted. Reference numeral 18 denotes an oxide film formed at an intermediate position of the projecting portion of the floating gate 13, and is formed of, for example, a natural oxide film.

A method for manufacturing the semiconductor device of the second embodiment formed as described above will be described with reference to FIG. First, similarly to the first embodiment, on the semiconductor substrate 10,
For example, a silicon oxide film is formed using a thermal oxidation method,
Of the gate insulating film 12a is formed. Next, a lower conductive film 19 made of a doped polysilicon film is laminated on the first gate insulating film 12a by, for example, a CVD method.

Next, an oxide film 18a made of a thin film such as a natural oxide film is formed on the upper surface of the lower conductive film 19 (FIG. 8A). Next, an upper conductive film 20 made of a doped polysilicon film is laminated on the oxide film 18a by, for example, a CVD method (FIG. 8B). Next, patterning is performed using a photolithography technique using a resist, and the upper conductive film 20a is left only in a desired region.
9 and a first conductive film 21 composed of the upper conductive film 20a.

At this time, the upper conductive film 20 is etched by
The etching is performed under the etching condition excellent in the selectivity between the oxide film and the doped polysilicon film, and the oxide film 18a is used as an etching stopper. The oxide film 18a exposed by the patterning of the upper conductive film 20a becomes the upper conductive film 20a.
a is removed by over-etching, and the upper conductive film 2 is removed.
Oxide film 18 remains only at the lower portion of Oa (FIG. 8).
(C)).

Next, a second conductive film 22 made of a doped polysilicon film is laminated so as to cover the first conductive film 21 by, for example, a CVD method (FIG. 8D). FIG.
As apparent from (d), the steep edge portion caused by the patterning of the first conductive film 21 is alleviated by the lamination of the second conductive film 22, and the upper surface of the second conductive film 22 is Due to the influence of the first conductive film 21, it is formed in a curved shape protruding upward. Thereafter, through the same steps as in the first embodiment, the floating gate 13, the second gate insulating film, the control gate 15, and the source / drain region 11 are formed to form a semiconductor device as shown in FIG. can do.

According to the semiconductor device of the second embodiment configured as described above, the first conductive film 21 is
An oxide film 18a is formed on the lower conductive film 19, and the upper conductive film 20 is etched on the upper surface of the lower conductive film 19 because the oxide film 18a is used as an etching stopper when patterning the upper conductive film 20. Since the first gate insulating film 12a can be reliably stopped, the upper surface of the first gate insulating film 12a is not exposed to this etching atmosphere, and the reliability of the first gate insulating film 12a does not decrease. Since the floating gate 13 is formed in the same manner as in the first embodiment, reflecting the shape of the upper surface of the second conductive film 22, it is needless to say that the same effect as in the first embodiment is exerted.

Embodiment 3 FIG. 9 is a sectional view showing a configuration of a semiconductor device according to a third embodiment of the present invention, and FIGS. 10 and 11 are sectional views showing a method for manufacturing the semiconductor device shown in FIG. In FIG. 9, the same parts as those in each of the above embodiments are denoted by the same reference numerals, and description thereof will be omitted. 23 is a source / drain region formed on the semiconductor substrate 10.

Reference numeral 24 denotes a semiconductor substrate 10 serving as a channel region.
In the first gate insulating film used as a tunnel oxide film formed thereon, the film thickness at a position corresponding to a protruding portion on the upper surface of the floating gate, which will be described later, It is formed thicker than the film thickness at the corresponding position. And, for example, made of a silicon oxide film,
The thin portion has a thickness of 100 angstroms to 150 angstroms, and the thick portion has a thickness of 150 angstroms to 500 angstroms. Then, the thin portion serves as a tunnel oxide film.

Reference numeral 25 denotes a floating gate formed on the first gate insulating film 24, which is formed in a curved shape in which only one end of the upper surface protrudes upward, for example, is formed of a doped polysilicon film. The thickness is between 500 Angstroms and 2000 Angstroms. 26 is a second gate insulating film formed on the floating gate 25, for example, a silicon oxide film,
An ONO film formed by sequentially stacking a silicon nitride film and a silicon oxide film has a thickness of 150 nm, assuming that the silicon nitride film has the same relative dielectric constant as the silicon oxide film.
It has an angstroms to 250 angstroms. 27 is this second
A control gate formed on the gate insulating film 26 of, for example, a doped polysilicon film, and has a thickness of 1000 Å to 3000 Å.

Next, the third embodiment configured as described above
The method of manufacturing the semiconductor device will be described with reference to FIGS. First, a silicon oxide film is formed on the semiconductor substrate 10 by using, for example, a thermal oxidation method, and a first gate insulating film 24c is formed (FIG. 10A). Next, a first conductive film 28 made of a doped polysilicon film is laminated on the first gate insulating film 24c by, for example, a CVD method (FIG. 10B).

Next, patterning is performed using a photolithography technique using a resist to leave the first conductive film 28a only in a desired region and to form the first gate insulating film 24.
c is etched using the pattern of the first conductive film 28a (FIG. 10C). At this time, the first gate insulating film 24c
This etching plays a role of a tunnel oxide film as in the above embodiments, and is etched to a thickness as small as possible so that the nonvolatile memory can operate at high speed. Further, the first gate insulating film 24c remaining under the first conductive film 28a may or may not function as a gate insulating film, and contributes to the amount of protrusion of the floating gate in a later step. is there.

Next, a second conductive film 29 made of a doped polysilicon film is laminated so as to cover the first conductive film 28a, for example, by the CVD method (FIG. 10D). As is clear from FIG. 10D, the steep edge portion caused by the patterning of the first conductive film 28a is alleviated by the lamination of the second conductive film 29, and
The upper surface of the conductive film 29 is formed in a curved shape protruding upward due to the influence of the first conductive film 28a. At this time, the amount of protrusion of the second conductive film 29 upward depends on the thickness of the first gate insulating film 24a and the thickness of the first conductive film 28a.
It is determined by both the thickness and the thickness of a.

Next, etch back is performed so that the thickness of both conductive films 28a and 29 becomes a desired film thickness, and floating gate 2
5a. At this time, the upper surface of the floating gate 25a is formed by reflecting the upper surface shape of the second conductive film 29 shown in FIG. It is formed. The difference between the thickness of the portion where the floating gate 25a protrudes and the thickness of the portion where the floating gate 25a does not protrude is determined by the first gate insulating film 24.
11A is larger than the film thickness difference between the two portions in FIG.
(A)). Note that this etch-back process is performed in the floating gate 2
5a is formed to form a desired film thickness.
If the desired thickness of the floating gate 25a is obtained in the state shown in (d), this step is omitted.

Next, a second gate insulating film 26a made of an ONO film is laminated so as to cover the floating gate 25a, for example, by the CVD method (FIG. 11B). Next, a control gate 27 made of a doped polysilicon film is formed by, for example, a CVD method so as to cover the second gate insulating film 26a.
a are laminated (FIG. 11C). Next, the floating gate 25
Then, patterning is performed so that the protruding portion on the upper surface of a is left, and a control gate 27, a second gate insulating film 26, a floating gate 25, and a first gate insulating film 24 are formed (FIG. 11D). .

Next, using the control gate 27, the second gate insulating film 26, the floating gate 25, and the first gate insulating film 24 as a mask, an impurity is implanted into the semiconductor substrate 10 and the source / drain regions 23 are formed. To form a non-volatile memory (FIG. 9).

According to the third embodiment, the floating gate 2
Since the amount of protrusion of the curved shape in which only one end of the upper surface of the upper surface of the upper surface of the first gate insulating film 5 projects upward is larger than that in each of the above embodiments, including the portion where the first gate insulating film 24 is thicker. The capacitive coupling ratio between the floating gate 25 and the control gate 27 is further increased, the writing / erasing speed can be further increased, and a low voltage operation can be performed.
The semiconductor device can be formed without increasing the edge portion of No. 5 and without reducing the reliability. Further, one contact portion between the first gate insulating film 24 and the source / drain region 23 serving as a tunnel oxide film is formed as thin as in each of the above embodiments. In the same manner as described above, the processes of extracting and injecting electrons can be performed.

In the third embodiment, an example is shown in which the floating gate 25 is formed in a curved shape in which only one end of the upper surface protrudes upward. As another example, FIG.
Is patterned so as to be different from the case described in the third embodiment, that is, the projection of the floating gate 25a is located at the center. And FIG.
As shown in FIG. 3, a first gate insulating film 24b, a floating gate 25b, a second gate insulating film 26b, and a control gate 27b are formed, and the semiconductor substrate 1
Even if the source / drain region 23b is formed by injecting an impurity into 0, it is needless to say that the same effect as in the third embodiment can be obtained, and furthermore, the contact portion between the two regions of the source / drain region 23b can be obtained. In this case, since the thickness of the first gate insulating film 24b is formed to be small, the speed can be increased when both regions are used at the time of erasing.

In the third embodiment, the first
The example in which the stepped shape of the gate insulating film 24 is performed at the time of patterning the first conductive film 28a as shown in FIG. 10C has been described. However, the present invention is not limited to this. As shown in FIG. 13A, the semiconductor substrate 10
A first insulating film is stacked thereon, and is patterned so that a desired region of the first insulating film remains to form a first insulating film 30. Next, a thin second insulating film 31 is formed so as to cover the upper surface of the first insulating film 30, and the first gate insulating film 24 including the first and second insulating films 30 and 31 is formed.
a is formed (FIG. 13B).

Next, as in the third embodiment, a first conductive film 2 made of a doped polysilicon film is formed so as to cover the first gate insulating film 24a by, for example, a CVD method.
8 are laminated (FIG. 13C). Next, the first conductive film 2
8 and leave only in the desired area
Is formed (FIG. 13D). Hereinafter, through the same steps as those in the third embodiment, the third embodiment
A semiconductor device similar to that described above can be formed.

Although the number of steps increases when formed in this manner, unlike the case where the first conductive film 28 is etched and formed at the same time as the first conductive film 28, the thinned portion of the first gate insulating film 24a is formed in the first gate insulating film 24a. Since it is formed by laminating the two insulating films 31, it can be formed reliably.

[0052]

As described above, according to the first aspect of the present invention, the first gate insulating film formed on the semiconductor substrate, the floating gate formed on the first gate insulating film,
A second gate insulating film formed on the floating gate;
In the semiconductor device having the control gate formed on the gate insulating film, only one end of the upper surface of the floating gate protrudes upward, or only the central portion of the upper surface of the floating gate protrudes upward. The thickness difference between the film thickness of the portion where the floating gate protrudes and the film thickness of the portion where the floating gate does not protrude is the difference in film thickness between the two portions in the first gate insulating film. Since the capacitance is larger, the capacitance coupling ratio between the floating gate and the control gate is increased without lowering the reliability, and it is possible to provide a semiconductor device capable of speeding up a write / erase operation.

According to a second aspect of the present invention, in the first aspect, the thickness of the first gate insulating film is such that the thickness at a position corresponding to a protruding portion on the upper surface of the floating gate is:
Since the thickness of the floating gate is larger than that of a portion corresponding to a portion where the upper surface of the floating gate does not protrude, it is possible to provide a semiconductor device capable of further speeding up the writing / erasing operation.

According to a third aspect of the present invention, a first gate insulating film is formed on a semiconductor substrate, a first conductive film is stacked on the first gate insulating film, and a first conductive film is formed on the first gate insulating film. Patterning the film so as to remain in a desired region, laminating a conductive film on the first conductive film, and forming a second conductive film having an upwardly projecting portion due to the influence of the first conductive film on the upper surface; A second gate insulating film and a control gate are sequentially stacked on the floating gate, and the control gate, the second gate insulating film, the floating gate, and the first gate insulating film are formed on the upper surface of the floating gate. Since the patterning is performed so that the protruding portions remain, the capacitance coupling ratio between the floating gate and the control gate is increased without lowering the reliability, and the method of manufacturing the semiconductor device can speed up the write / erase operation. Can be provided To become.

According to a fourth aspect of the present invention, in the third aspect, the patterning of the first conductive film is performed such that the thickness is increased in a desired region and the thickness is reduced in other portions. Further, it is possible to provide a method for manufacturing a semiconductor device which can be performed without lowering the reliability of the first gate insulating film.

According to a fifth aspect of the present invention, in the fourth aspect, the patterning of the first conductive film is performed by isotropic etching, so that the semiconductor device can be formed without lowering the patterning accuracy. It is possible to provide a manufacturing method.

According to a sixth aspect of the present invention, in the third or fourth aspect, after the first conductive film is laminated with the lower conductive film, an oxide film is formed on the upper surface of the lower conductive film. An upper conductive film is laminated on an oxide film, and the first conductive film is patterned by setting the film thickness of a portion where the first conductive film is thinly left to the lower conductive film thickness. Since the oxide film on the upper surface of the substrate is used as an etching stopper,
It is possible to provide a method of manufacturing a semiconductor device which can be performed without lowering the reliability of the gate insulating film.

According to a seventh aspect of the present invention, in the third aspect, the pattern of the patterned first conductive film is other than the lower portion of the first conductive film in the first gate insulating film. Is etched, it is possible to provide a method of manufacturing a semiconductor device without increasing the number of steps.

According to an eighth aspect of the present invention, in any one of the third to sixth aspects, the first gate insulating film is formed by forming a first gate insulating film on the semiconductor substrate after forming the first insulating film on the semiconductor substrate. A second insulating film is formed on the semiconductor substrate by patterning so as to remain at the position, and only a portion where the first insulating film and the second insulating film are stacked and the second insulating film are stacked. Accordingly, a method for manufacturing a semiconductor device having excellent performance of the first gate insulating film can be provided.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a configuration of a semiconductor device according to a first embodiment of the present invention;

FIG. 2 is a cross-sectional view showing a method for manufacturing the semiconductor device shown in FIG.

FIG. 3 is a sectional view illustrating the method of manufacturing the semiconductor device illustrated in FIG. 1;

FIG. 4 is a sectional view showing a configuration of the semiconductor device according to the first embodiment of the present invention;

FIG. 5 is a sectional view illustrating the method of manufacturing the semiconductor device illustrated in FIG. 1;

FIG. 6 is a sectional view illustrating the method of manufacturing the semiconductor device illustrated in FIG. 1;

FIG. 7 is a sectional view showing a configuration of a semiconductor device according to a second embodiment of the present invention;

FIG. 8 is a sectional view illustrating the method of manufacturing the semiconductor device illustrated in FIG. 7;

FIG. 9 is a sectional view showing a configuration of a semiconductor device according to a third embodiment of the present invention;

10 is a sectional view illustrating the method of manufacturing the semiconductor device illustrated in FIG. 9;

FIG. 11 is a sectional view illustrating the method of manufacturing the semiconductor device illustrated in FIG. 9;

FIG. 12 is a sectional view showing a configuration of a semiconductor device according to a third embodiment of the present invention;

13 is a sectional view illustrating the method of manufacturing the semiconductor device illustrated in FIG. 9;

FIG. 14 is a cross-sectional view illustrating a configuration of a conventional semiconductor device.

FIG. 15 is a cross-sectional view illustrating a configuration of a conventional semiconductor device.

[Description of Signs] 10 semiconductor substrate, 12, 12a, 12b, 24, 24a, 24b, 24c
First gate insulating film, 13, 13a, 13b, 25, 25a, 25b floating gate, 14, 14a, 14b, 26, 26a, 26b second gate insulating film, 15, 15a, 15b, 27, 27a, 27b Control gates, 16, 16a, 16b, 16c, 21, 28, 28a
First conductive film, 17, 22, 29 Second conductive film, 18, 18a Oxide film, 19 Lower conductive film, 20, 20a Upper conductive film, 30 First insulating film, 31
Second insulating film.

 ──────────────────────────────────────────────────続 き Continued on the front page F-term (reference) PR39

Claims (8)

[Claims] 1. A first gate insulating film formed on a semiconductor substrate, a floating gate formed on the first gate insulating film, and a second gate insulating film formed on the floating gate And a control gate formed on the second gate insulating film, wherein only one end of the upper surface of the floating gate protrudes upward, or
Only the central part of the upper surface of the floating gate is formed in a curved shape formed by protruding upward, and the film thickness difference between the film thickness of the part where the floating gate protrudes and the film thickness of the part not protruding is A semiconductor device, wherein the thickness difference between the two portions in the first gate insulating film is larger than the thickness difference between the two portions. 2. The film thickness of a first gate insulating film is a film thickness at a position corresponding to a protruding portion on the upper surface of a floating gate.
2. The semiconductor device according to claim 1, wherein the thickness of the floating gate is larger than that of a portion corresponding to a portion of the upper surface of the floating gate that does not protrude. 3. A step of forming a first gate insulating film on a semiconductor substrate, a step of laminating a first conductive film on the first gate insulating film, and a step of forming the first conductive film on a desired surface. Patterning so as to remain in the region, laminating a conductive film on the first conductive film, and forming a second conductive film having an upwardly projecting portion due to the influence of the first conductive film on the upper surface;
Forming a floating gate, sequentially stacking a second gate insulating film and a control gate on the floating gate, controlling the control gate, the second gate insulating film, the floating gate, and the first gate Patterning the insulating film so that a protruding portion on the upper surface of the floating gate remains. 4. The method of manufacturing a semiconductor device according to claim 3, wherein the patterning of the first conductive film is performed such that a desired region has a large thickness and other portions have a small thickness. . 5. The method according to claim 4, wherein the patterning of the first conductive film is performed by isotropic etching. 6. A method of forming a first conductive film, comprising stacking a lower conductive film, forming an oxide film on the upper surface of the lower conductive film, and stacking an upper conductive film on the oxide film. The patterning of the conductive film is performed by setting the thickness of the portion where the first conductive film is left thin as the thickness of the lower conductive film, and using the oxide film on the upper surface of the lower conductive film as an etching stopper. The method for manufacturing a semiconductor device according to claim 4 or 5, wherein 7. The method according to claim 1, further comprising a step of etching a portion of the first gate insulating film other than a portion below the first conductive film with the patterned first conductive film pattern. The method for manufacturing a semiconductor device according to claim 3. 8. A method of forming a first insulating film on a semiconductor substrate, forming a first insulating film on a semiconductor substrate, and patterning the first insulating film at a desired position, and forming a second insulating film on the semiconductor substrate. 7. The semiconductor device according to claim 3, wherein said first insulating film and said second insulating film are formed of a laminated portion and a portion formed of only said second insulating film. The method for manufacturing a semiconductor device according to any one of the above.