JP2000078472A - Photoelectric conversion device and imaging device using the same - Google Patents

Abstract

(57) [Summary] [PROBLEMS] To provide a pixel output having a memory function in a pixel and an excellent S / N ratio. SOLUTION: The configuration of a pixel is such that an output from a photoelectric conversion unit can be output from a voltage follower circuit, and a memory is provided at an input portion of an output stage of the voltage follower circuit. The voltage follower circuit outputs the differential output of the output signal from the photoelectric conversion unit and the output signal from the voltage follower circuit from the differential amplifier circuit.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a photoelectric conversion device capable of holding a signal in a pixel and an imaging device using the same.

[0002]

2. Description of the Related Art In recent years, CMOS sensors have been receiving attention in response to demands for multifunctional, low cost, and high S / N ratios of photoelectric conversion devices. A sensor having a memory function in a pixel portion has been proposed as one of the CMOS sensors, and has a circuit configuration as shown in FIG. In the figure, 1 is a photodiode for performing photoelectric conversion, 2 is a reset MOS transistor for resetting the potential of the photodiode, 61 is an amplifying MOS transistor of a source follower, 7 is a constant current source of a source follower circuit, 9 is a memory capacity, Reference numeral 62 denotes a transfer switch MOS transistor for transferring charges to a memory capacitor, 10 denotes an amplifying MOS transistor of a source follower circuit, 11 denotes a constant current source of a source follower circuit, 63
Is a transfer switch for transferring the output to the noise elimination circuit. The charge generated by the photodiode is amplified by a source follower and transferred to the memory capacitor 9. When φM is turned off after the accumulation time, the electric charge of the memory capacity is retained, the potential is amplified by the source follower circuit of the next stage, and is transferred to the noise removing circuit.

By using a two-stage source follower circuit and a memory capacity, a multifunctional photoelectric conversion device which can be read many times has been made possible.

[0004]

However, in the above conventional example, since the potential of the photodiode is output through two stages of the source follower amplifier, V _OUT = G ₁ · G ₂ · V _PD- (V _th1 + V _th2 ). Where G ₁ and G ₂ are the gains of each source follower,
V _th1 and V _th2 are threshold voltages of the MOS transistors of each source follower amplifier. Therefore, it is desired that the following points be further improved / improved in consideration of the variation of each transistor. Fixed pattern noise (FPN) due to V _th variation

[0005]

[Outside 1] It becomes big. The read gain decreases to G ₁ × G ₂ . The output voltage changes due to the fluctuation of the power supply voltage V _DD (PSRR
bad)

[0006]

According to the present invention, in order to solve the above-mentioned problems, photoelectric conversion means as in claim 1;
Holding means for holding a signal, switching means for transferring a signal to the holding means, amplifying means for amplifying and outputting a signal from the holding means, and a signal output from the photoelectric conversion means and a signal from the amplifying means. A differential amplifier circuit for obtaining a differential amplified signal with the output signal, and a holding unit for holding a signal output from the differential amplifier circuit are included as a pixel configuration, and an output from the differential amplifier circuit is included. The obtained signal is input to the holding means via the switch means, and a photoelectric conversion device is provided.

Further, in the first aspect, there is provided a photoelectric conversion device, wherein the differential amplifying means, the amplifying means and the switch means are constituted only by MOS transistors.

Further, the photoelectric conversion device according to any one of claims 1 and 2, wherein the holding means is a MOS capacitor.

Further, according to any one of claims 1 to 3, there is provided a photoelectric conversion device, wherein the photoelectric conversion means is a pn photodiode.

The photoelectric conversion device according to any one of claims 1 to 4, further comprising first control means for controlling the operation / non-operation of the differential amplifying means. provide.

Further, according to any one of claims 1 to 4, there is provided a photoelectric conversion device comprising a second control means for controlling the operation / non-operation of the amplifying means. .

Further, according to any one of the first to sixth aspects of the present invention, there is provided a photoelectric conversion device further comprising a noise removing means for removing noise generated in the pixel.

The photoelectric conversion device according to any one of claims 1 to 6, further comprising peak signal output means for outputting peak signals in a plurality of pixels. Provide equipment.

Furthermore, the photoelectric conversion device according to claim 8 and light accumulation amount control means for controlling the amount of light accumulated in the photoelectric conversion means by a peak signal output from the photoelectric conversion device. An imaging device having the same is provided.

[0015]

DESCRIPTION OF THE PREFERRED EMBODIMENTS (Embodiment 1) FIG. 1 is a drawing which best illustrates the features of the present invention. In FIG. 1, 1 is a Pn photodiode for performing photoelectric conversion, and 2 is for resetting the Pn photodiode. Reset MOS transistors, 3 and 4 are amplifier MOS transistors, and 5 and 6 are load MOSs for amplifier MOS transistors 3 and 4.
It is a transistor and forms a current mirror circuit. Reference numeral 7 denotes a constant current circuit, and 3 to 7 constitute a differential amplifier circuit. Reference numeral 8 denotes a transmission gate, 9 denotes a memory capacity for holding electric charges, 10 denotes an amplifier MOS transistor, 11 denotes a constant current source, and 10 and 11 constitute a source follower. One pixel 1 in the above 1 to 11
2. Reference numeral 13 denotes a noise removal circuit for removing noise generated in the pixel, and reference numeral 14 denotes a scanning circuit for sequentially outputting signals from the pixel.

In the above pixel configuration, the output of the differential amplifier circuit is connected to the input of the source follower circuit via the transmission gate 8, and the output of the source follower circuit is fed back to the negative input gate of the differential amplifier circuit. You. Therefore, when the transmission gate is in the conductive state, it operates as a voltage follower circuit. for that reason,
Since the gain of this circuit is approximately 1.0, it is characterized in that the gain is higher than in the prior art.

Next, the operation from the reset of the pixel portion to the end of the accumulation will be described with reference to the timing chart of FIG. At time T ₀ , the charge stored in the photodiode is reset. φRS becomes LOW and pM
OS2 is turned on, and the photodiode receives the reset potential V _RS
Reset to. In the next time T _1, Hi the φRS
gh, the reset operation ends, and the accumulation operation starts. Light enters the photodiode 1 and the potential V _PD of the photodiode increases with time. At the same time, the pixel output V _OUT also increases.

[0018] Any time that has elapsed, at time T _2, the accumulation operation is finished. Here, by setting φCH to High, the transmission gate 8 is turned off.
And to hold the charge stored in the storage capacitor C _M. After time T _2, since the light enters the photodiode,
Although V _PD rises, the potential of the storage capacitor does not change.
The output V _OUT becomes constant after T ₂ . This output is driven by the scanning circuit 14 after the noise is removed by a noise removal circuit at the subsequent stage, and is sequentially output to the outside.

In this embodiment, by providing a voltage follower circuit having a memory function for each photodiode, low FPN, high gain, high dynamic range,
A photoelectric conversion device with good SRR was realized. Also, PSRR
As a result, the demand for the power supply capability is reduced, and the system around the power supply is simplified.

(Embodiment 2) FIG. 3 shows a circuit diagram of a second embodiment of the present invention. In the figure, reference numeral 28 denotes a switch using a pMOS transistor. In this embodiment, pMO
It is characterized by comprising only an nMOS switch, not a transmission switch using S and nMOS. Therefore, the number of constituent elements is reduced, which is effective for further miniaturization.

[0021] Because the switch MOS transistor 28 in this embodiment is a parasitic capacitance between the gate and the drain when off, the potential change of the storage capacitance C _M is greater than that of Example 1, can be corrected at a later stage of the noise removing circuit Therefore, there is no particular problem.

In the present embodiment, a photoelectric conversion device corresponding to further miniaturization has become possible.

(Embodiment 3) FIG. 4 shows a circuit diagram of a third embodiment of the present invention. In the figure, reference numeral 30 denotes a transfer gate for transferring charges of the photodiode 1, and reference numeral 31 denotes a reset MOS transistor for resetting the floating diffusion capacitance and the gate capacitance 3.

In this embodiment, high-sensitivity light detection is possible by completely transferring the charges generated by the photodiode to the floating diffusion capacitance. Further, the dark current can be reduced by forming the photodiode portion to have a P ⁺ nP structure.

In this embodiment, a high-sensitivity, low-noise photoelectric conversion device can be realized.

(Embodiment 4) FIG. 5 is a circuit diagram of a fourth embodiment of the present invention. The present embodiment is characterized in that an on / off switch is provided for a constant current source of each pixel. FIG. 6 shows a timing chart of the present embodiment. ΦR after accumulation
By setting EF1 to High, the differential input circuit becomes O
By performing FF, power consumption can be reduced. Power consumption is reduced by turning off φREF2 except when outputting an output signal.

According to the present embodiment, a photoelectric conversion device which can consume lower power than before can be realized.

(Embodiment 5) FIG. 7 shows a circuit diagram of a fifth embodiment of the present invention. The first embodiment is characterized in that the gate area of the source follower circuit 10 is increased and the memory capacity 9 is eliminated. In this embodiment, the size of the ten MOS gates may be made equal to the size of the memory capacity.

[0029] By removing the memory capacitor C _M in the present embodiment has made it possible to further miniaturization.

In the first to fifth embodiments, the operation amplifier of the PMOS top is used. However, the same effect can be obtained by the differential amplifier of the nMOS top.
After the output, a push-pull circuit may be used instead of the source follower circuit, but the source follower circuit is more preferable in consideration of the size of the circuit.

The differential amplifier circuit is not limited to those described in the first to fifth embodiments, but may be another differential amplifier circuit.

Further, in Examples 1 to 5, ones arranged one-dimensionally are shown, but it is needless to say that the same effects can be obtained by two-dimensionally arranged ones.

(Embodiment 6) FIG. 8 shows an example of the noise elimination circuit 13, and the pixel 12 has been described in the first embodiment.

Reference numeral 51 denotes a differential amplifier, which operates by a voltage follower by feeding back an output to a negative input terminal.
50 is a switch MOS transistor for inputting an output from a pixel to a voltage follower circuit, 54 is a clamp capacitor, and 55 is a switch MO for inputting a clamp potential.
A clamp circuit is composed of S transistors and 54 and 55. 53 is a switch MOS transistor for inputting the output of the pixel to the clamp circuit, and 56 is a switch MO for connecting the clamp circuit and the voltage follower circuit.
The S transistor 52 is a switch MOS transistor for inputting the output of the voltage follower to the clamp circuit, and 50 to 56 constitute a noise removal circuit. 5
Reference numeral 7 denotes a photoelectric conversion output from which noise has been removed by an output amplifier 58.
Switch MOS transistor to output to
4 is driven by the scanning circuit.

Next, the noise removal operation of the present invention will be described with reference to the timing chart shown in FIG.

First, at time T ₀ , the reset MOS transistor 2 is turned on by turning φRS LOW.
Then, the photodiode 1 is reset. Followed by holding the noise signal immediately after the reset by the transmission gate is turned ON by the LOW φCH at next time T _2, the memory capacity C _M. Then, the reset MOS transistor 2 by .phi.RS, the φCH to High at time T _3, the transmission gate 8 is OFF, the fall in the accumulation state to complete the reset photodiode 1.

At time T ₄ when the noise removal operation starts,
By making φTN and φFB High, a noise signal is input to the voltage follower circuit 51 via the switch MOS transistor 50, and the output of the voltage follower circuit is input to the clamp capacitor 54 via the switch MOS transistor 52. At the next times T ₅ and T ₆ , φFB and φTN are set to LOW, respectively, thereby setting the switch MO.
S transistor 52, switch MOS transistor 50
Are turned off in this order. At this time, the clamp capacitor 8 holds a voltage obtained by adding the sensor output including noise and the offset voltage of the voltage follower circuit. V _CP = V _dark + V _FPN + V _RN + V _off (1) (V _dark = sensor dark voltage, V _FPN = fixed pattern noise voltage, V _RN = random noise voltage, V _off = voltage follower circuit offset voltage) Time T ₇ by connecting the clamp circuit and a voltage follower circuit by the φTS2 to High at, at time T ₈ by OFF the φGR to terminate the clamping operation.

The desired time after Tsu of us, the light signal stored in the photodiode is kept at time T ₉ in memory 9. The optical signal held in the memory capacitor 9 is output from the amplifier MOS 10 of the source follower circuit.

The output of the source follower at this time is V _P + V _dark + V _FPN + V _RN (2). Here, _VP is an optical signal voltage. And time T
_{At 11} , φTS1 becomes High, and this voltage is input to the clamp circuit via the switch MOS53. At this time, the difference from the previously stored voltage (1)
The output from the voltage follower _{circuit, V OUT = (2) -} (1) a + V _off = V _P. That is, from the voltage follower circuit, a signal from which not only the noise of the photoelectric conversion pixel but also the noise of the voltage follower circuit has been removed can be obtained. Further, since the output can be performed to the output amplifier 58 of the final stage without lowering the gain, the problem of the gain reduction due to the capacitance division does not occur.

FIG. 10 shows an example of the differential amplifier 51. Here, the CMOS differential amplifier is used, but the same applies to a BiCMOS type amplifier. Also, the output of the circuit may be of a push-pull type.

Here, in this embodiment, the operation of removing noise has been described using the pixels described in the first embodiment.
Noise can be similarly removed from the pixels described in (5) to (5).

The method of removing noise is not limited to the method described in the present embodiment, but may be another method such as providing a clamp circuit on a horizontal output line.

(Embodiment 7) In this embodiment, peak signals (maximum value signal, minimum value signal) of pixels in one row are detected. Here, the pixel may be any of the pixels described in the first to fifth embodiments.

In this embodiment, by simultaneously inputting a pulse from the horizontal scanning circuit to the switch MOS transistor 5 in FIG. 11 to simultaneously output signals from the photoelectric conversion pixels in one row from the voltage follower circuit 6, The peak signal of the photoelectric conversion pixel in the row is obtained. Here, when the output stage of FIG. 7A is an n-type transistor as the voltage follower circuit, the maximum value signal of the photoelectric conversion pixel in one row is determined by the output stage of FIG. 7B. Is a P-type transistor, the minimum value signal of the photoelectric conversion pixel in one row is obtained.

When the voltage follower circuit shown in FIG. 7A is used for the odd columns and the voltage follower circuit shown in FIG. 7B is used for the even columns, the switch MOSs of the odd columns are simultaneously output from the horizontal scanning circuit. By inputting a pulse to the transistor 13 and then simultaneously inputting a pulse from the horizontal scanning circuit to the switch MOS transistor 13 in an even column, an almost maximum value signal and an almost minimum value signal of the photoelectric conversion pixel in one row are obtained. Can be

(Embodiment 8) In this embodiment, the peak signals (maximum value signal, minimum value signal) of the photoelectric conversion pixels in one row are detected more accurately than in the eighth embodiment.

In the eighth embodiment, the maximum value signal of the odd-numbered photoelectric conversion pixels in one row and the minimum value signal of the even-numbered photoelectric conversion pixels in one row are obtained. May occur.

For this purpose, in this embodiment, as shown in FIG. 12, two columns, one for detecting the maximum value (FIG. 7A) and the other for detecting the minimum value (FIG. 7B) are arranged in parallel in one column. One is provided. Then, by simultaneously inputting a pulse from the horizontal scanning circuit to the switch MOS transistor 57 connected to the voltage follower circuit for detecting the maximum value, the maximum value signal of the photoelectric conversion pixel in one row is output to the horizontal output line. , A switch MO connected to a voltage follower circuit for detecting the minimum value
By simultaneously inputting a pulse from the horizontal scanning circuit to the S transistor, the minimum value signal of the photoelectric conversion pixel in one row is output to the horizontal output line.

In the seventh and eighth embodiments, the horizontal scanning circuit is configured to be capable of simultaneously inputting a pulse to the plurality of switch MOS transistors as described above, and the pulse is sequentially input to the plurality of switch MOS transistors. With such a configuration, it is possible to obtain an individual signal for each photoelectric conversion pixel and a maximum value signal and a minimum value signal of the photoelectric conversion pixels in one row.

Here, in the eighth and ninth embodiments, a pulse is input from the scanning circuit 14 to the plurality of switch MOS transistors 57 at the same time, so that the voltage follower circuit 5
A configuration in which one connection portion is commonly connected to a horizontal output line corresponds to a peak signal output means.

(Embodiment 9) This embodiment shows an image pickup apparatus using the photoelectric conversion device shown in Embodiment 7 or 8.

For example, the maximum value signal and the minimum value signal of the pixels in one row are output from the photoelectric conversion device 90 shown in FIG. The output of the comparator is input to an on-chip or external storage time control circuit 93. Here, the accumulation time control circuit controls to stop the accumulation of light in the photoelectric conversion device when the output of the differential amplifier circuit becomes larger than the reference voltage Vref. Following the stop of the accumulation of the light, the signals from the respective photoelectric conversion pixels are individually output, and the signal processing circuit 94 performs processing such as white balance to obtain an image.

[0053]

As described above, according to the present invention,
A photoelectric conversion device and an image pickup device having a memory function in a pixel and a high S / N ratio were realized.

[Brief description of the drawings]

FIG. 1 is a circuit configuration diagram according to a first embodiment of the present invention.

FIG. 2 is a timing chart according to the first embodiment of the present invention.

FIG. 3 is a circuit configuration diagram according to a second embodiment of the present invention.

FIG. 4 is a circuit configuration diagram according to a third embodiment of the present invention.

FIG. 5 is a circuit configuration diagram according to a fourth embodiment of the present invention.

FIG. 6 is a timing chart according to a fourth embodiment of the present invention.

FIG. 7 is a circuit configuration diagram according to a fifth embodiment of the present invention.

FIG. 8 is a circuit configuration diagram according to a sixth embodiment of the present invention.

FIG. 9 is a timing chart according to a sixth embodiment of the present invention.

FIG. 10 is an example of a differential amplifier.

FIG. 11 is a circuit configuration diagram according to a seventh embodiment of the present invention.

FIG. 12 is a circuit configuration diagram according to an eighth embodiment of the present invention.

FIG. 13 is a circuit configuration diagram according to a ninth embodiment of the present invention.

FIG. 14 is a conventional example.

[Explanation of symbols]

 Reference Signs List 1 photodiode 2 reset MOS transistor 3, 4 differential input MOS gate 5, 6 current mirror circuit 7 constant current source 8 transfer gate 9 memory capacity 10 source follower amplification MOS transistor 11 constant current source 12 pixel unit 13 noise removal circuit 14 scanning Circuit 28 nMOS transfer switch 30 transfer gate 31 reset MOS transistor 61 source follower amplification MOS transistor 62 transfer switch 63 transfer switch

Claims (9)

[Claims] 1. A photoelectric conversion unit, a holding unit for holding a signal, a switch unit for transferring a signal to the holding unit, an amplification unit for amplifying and outputting a signal from the holding unit, and the photoelectric conversion unit A differential amplifier circuit for obtaining a differentially amplified signal of the signal output from the amplifier and the signal output from the amplifier unit, and a holding unit for holding the signal output from the differential amplifier circuit, A photoelectric conversion device comprising a configuration, wherein a signal output from the differential amplifier circuit is input to the holding unit via the switch unit. 2. The differential amplifier according to claim 3, wherein:
A photoelectric conversion device, wherein the amplifying means and the switch means are constituted only by MOS transistors. 3. The photoelectric conversion device according to claim 1, wherein said holding means is a MOS capacitor. 4. The photoelectric conversion device according to claim 1, wherein said photoelectric conversion means is a pn photodiode. 5. The method according to claim 1, wherein operation / non-operation of the differential amplifier is controlled.
A photoelectric conversion device, comprising the control means of (1). 6. The photoelectric conversion device according to claim 1, further comprising a second control unit for controlling the operation / non-operation of the amplification unit. 7. The photoelectric conversion device according to claim 1, further comprising a noise removing unit that removes noise generated in the pixel. 8. The photoelectric conversion device according to claim 1, further comprising peak signal output means for outputting peak signals in a plurality of pixels. . 9. The photoelectric conversion device according to claim 8, and a light accumulation amount control unit that controls an accumulation amount of light in the photoelectric conversion unit by a peak signal output from the photoelectric conversion device. Imaging device having the same.