JP2000068328A - Wiring board for flip chip mounting - Google Patents

Abstract

(57) [Summary] When mounting a semiconductor chip on a wiring board face down, it is possible to prevent a land connected to a bump of the semiconductor chip from being buried and eliminate a short circuit between the semiconductor chip and the wiring board. A semiconductor chip having bumps formed on pads is mounted face down on a wiring board. Land 3 to which pad formed on semiconductor chip 7 is connected
And an inner layer reinforcing pattern 5 provided in an inner layer portion immediately below the land 3. The inner layer reinforcing pattern 5 prevents the land 3 from being buried when the semiconductor chip 7 is mounted.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a flip-chip mounting wiring board on which a semiconductor chip is mounted face down.

[0002]

2. Description of the Related Art A conventional wiring board which can be used for mounting a flip chip is disclosed in Japanese Patent Laid-Open No. 4-16839.
No. 6,086,045. FIG. 13 shows this wiring board 10.
Indicates 0.

[0003] A wiring board 100 is provided with wirings 110 extending from four sides to a central portion on the surface thereof, and a flat rectangular reinforcing pattern 1 is provided inside an end of the wiring 110.
20 are formed. The reinforcing pattern 120 is the wiring 11
0 and a part of the metal material constituting the wiring 110, and acts to prevent deformation and expansion and contraction of the circuit board 100 in the x-axis direction and the y-axis direction.

A semiconductor chip is bonded to the wiring board 100 using solder. In this bonding, the temperature of the circuit board 100 becomes high due to the heat applied to melt the solder. However, good flatness can be maintained by the reinforcing pattern 120 described above.
Further, even after the solder bump electrodes of the semiconductor chip are bonded to the ends of the wirings 110, good flatness can be maintained, so that the solder bump electrodes and the wirings 110 can be reliably electrically connected. Can be.

[0005]

When a semiconductor chip is mounted face-down on a wiring board, it is necessary to apply heat while applying pressure to the semiconductor chip. FIG. 14 shows a state in which a semiconductor chip 200 is mounted on the above-described conventional wiring board 100 by such face-down.

As shown in FIG. 14, a land 130 connected to the above-described wiring 110 is formed on a wiring substrate 100, while a bump 2 is formed on a pad of a semiconductor chip 200.
10 are formed. The semiconductor chip 200 is face-down to bring the bump 210 into contact with the land 130, and the adhesive 150 is applied around and inside the semiconductor chip 200. Then, the semiconductor chip 200 is fixed by heating and pressing from the semiconductor chip 200 side, and the pad and the land 130 are connected via the bump 210.

However, such mounting has a problem that the land 130 is buried in the wiring board 100 due to the pressing force, and the burial causes the edge 200a of the semiconductor chip 200 and the wiring 110 to be short-circuited.

The present invention has been made in consideration of such conventional problems, and it is possible to prevent a short circuit between an edge of a semiconductor chip and a wiring even when the semiconductor chip is mounted under pressure. It is an object of the present invention to provide a flip-chip mounting wiring board having no structure.

[0009]

According to a first aspect of the present invention, there is provided a wiring board for flip-chip mounting in which a semiconductor chip having bumps formed on pads is mounted face-down. And a land connected to the pad, and an inner layer reinforcing pattern provided in an inner layer portion immediately below the land.

[0010] In the present invention, since the inner layer reinforcing pattern provided immediately below the land supports the land from below and regulates the burial amount, the land burial amount is reduced. Therefore, flip-chip mounting can be performed favorably without causing a short circuit between the wiring and the semiconductor chip.

A second aspect of the present invention is the invention according to the first aspect, wherein the inner layer reinforcing pattern is formed using a part of a wiring.

In the present invention, the wiring can be provided in the inner layer immediately below the land by using a part of the wiring as the inner layer reinforcing pattern. For this reason, it is possible to increase the wiring density of the inner layer of the wiring board.

According to a third aspect of the present invention, in the first aspect of the present invention, a dummy land for equalizing the land interval is provided at a portion where the pad is not connected.

According to the present invention, the dummy lands are provided so that the land spacing becomes uniform, so that the variation in the burial amount between the lands is reduced, and the occurrence of a short circuit between the wiring and the semiconductor chip is more reliably prevented. it can.

The invention according to claim 4 is the invention according to claim 1, wherein an insulating layer having a thickness smaller than the sum of the thickness of the bump and the thickness of the land is provided immediately below the circuit surface of the semiconductor chip. It is characterized by being.

According to the present invention, the insulating layer provided immediately below the circuit surface prevents contact between the circuit in the semiconductor chip and the wiring, and
The amount of land burial can be easily controlled by changing the thickness of the insulating layer.

The invention according to claim 5 is the invention according to claim 1, wherein the semiconductor chip is adhered to the surface with an adhesive, and a surface layer reinforcing pattern is provided at a boundary between the adhesive and the surface. It is characterized by having.

According to the present invention, the surface reinforcing pattern provided at the boundary between the adhesive and the surface increases the mechanical strength of the flip chip mounting portion.

A sixth aspect of the present invention is the invention according to the third aspect, wherein the dummy land is formed using a part of the wiring.

In the present invention, since the dummy land is provided by using a part of the wiring, the wiring can also be formed on the land inside the surface layer, and the wiring density of the surface layer can be increased.

[0021]

1 to 3 show a first embodiment of the present invention. FIG. 1 is a plan view thereof, FIG. 2 is a sectional view taken along line AA of FIG. 3 is a cross-sectional view of the flip chip mounted state.

As shown in FIGS. 1 and 2, the wiring board for flip-chip mounting includes a wiring 2, a land 3 and a dummy land 4 formed on the surface of a substrate 1, and an inner layer reinforcement provided inside the substrate 1. Pattern 5.

The substrate 1 is formed mainly of a resin such as a polyimide resin or a glass epoxy resin. The wiring 2 is formed of Cu, Al, or another conductive metal. The land 3 is connected to the wiring 2 and is exposed from the substrate surface by etching the surface of the substrate 1. The lands 3 are arranged around the mounting portion of the semiconductor chip, and the bumps 8 of the semiconductor chip 7 are connected as shown in FIG.

The dummy land 4 is a land not connected to the wiring 2 and is formed of the same material as the land 3. The dummy land 4 and the land 3 are formed so that the interval 6 is uniform. The top 4a of the dummy land 4 and the top 3a of the land 3 are subjected to a surface treatment. When the dummy lands 4 and lands 3 are made of copper, this surface treatment is performed by rust-proofing the copper base, performing nickel plating on the copper base, further performing gold plating, or performing solder plating on the copper base. It is.

The inner layer reinforcing pattern 5 is provided inside the substrate 1. Further, the inner layer reinforcing pattern 5 is formed in an area and a shape having a size that covers the formation area of the land 3 and the dummy land 4, whereby the land 3 is located above the inner layer reinforcing pattern 5. This inner layer reinforcement pattern 5
The same material as that of the wiring 2 and the land 3 is used.
The thickness of the inner layer reinforcing pattern 5 is, for example, 18 to 35.
It is formed to have a thickness of μm.

The formation of the inner layer reinforcing pattern 5 can be performed by forming the substrate 1 into two layers, a lower substrate 1a and an upper substrate 1b. That is, after the inner layer reinforcing pattern 5 is formed on the upper surface of the lower substrate 1a, the upper substrate 1b is bonded on the lower substrate 1a with an epoxy-based adhesive to form the inner layer reinforcing pattern 5 inside the substrate 1. It is.

Next, the mounting of the semiconductor chip on the flip-chip mounting wiring board of this embodiment will be described with reference to FIG. A bump 8 is formed on a pad (not shown) of the semiconductor chip 7, the semiconductor chip 7 is face-down, and the bump 8 is brought into contact with the corresponding land 3. And
While applying a pressure of 25 to 100 gf / bump and a heat of 180 to 250 ° C. from the back of the semiconductor chip 7,
At the same time, the semiconductor chip 7 and the substrate 1 are fixed by the adhesive 9 supplied around and inside the semiconductor chip 7.

The above-mentioned heating may be performed only from the semiconductor chip 7 side, or may be performed from both sides of the semiconductor chip 7 and the substrate 1. In addition, when heating from the substrate 1 side, it is preferable to perform heating at 120 ° C. or lower in order to prevent deformation of the substrate 1.

In the above-mentioned pressurization and heating, since the substrate 1 is formed of a polyimide resin or a glass epoxy resin having a glass transition temperature of 120 to 150 ° C., it becomes very soft at the above-mentioned heating temperature, and is heated in that state. When pressed, the bottom of the land 3 is buried in the substrate 1. However, in this embodiment, since the inner layer reinforcing pattern 5 is provided immediately below all the lands 3, the amount of burial is very small and the amount of burial is uniform. Therefore, the edge of the semiconductor chip 7 and the wiring 2 do not come into contact with each other,
No short circuit due to contact occurs.

Further, as shown in FIG.
Are arranged so as to make the land spacing 6 uniform, so that there is no variation in shrinkage between the lands on the surface of the substrate 1, and it is possible to further reduce the variation in the burial amount. Furthermore, since it is structurally simple and can be manufactured easily, the manufacturing cost can be reduced.

(Embodiment 2) FIG. 4 is a plan view of a flip-chip mounting wiring board according to Embodiment 2 of the present invention, FIG. 5 is a sectional view taken along the line BB of FIG. 4, and FIG. FIG. 4 is a sectional view taken along line C of FIG.

In this embodiment, the dummy land 4A is provided using a part of the surface wiring 10. As shown in FIGS. 5 and 6, the inner layer reinforcing pattern 5A is provided using a part of the inner layer wiring 12. The inner layer reinforcing pattern 5A is formed simultaneously with the formation of the inner layer wiring 12 on the upper surface of the lower substrate 1a.

The surface wiring 10 and the inner wiring 12 are connected by a via hole 11. The via hole 11 is a wiring penetrating from the surface layer to the inner layer below the semiconductor chip 7 (not shown), and a part thereof is a dummy land 4A and an inner layer reinforcing pattern 5A.

In this embodiment, the dummy land 4
A uses a part of the surface wiring 10 and has a width larger than the width of the surface wiring 10. On the other hand, the inner layer reinforcing pattern 5A is composed of the land 3 and the dummy land
Is provided immediately below. The inner layer reinforcing pattern 5 has a width larger than the width of the inner layer wiring 12, and is formed to have a width equal to or somewhat larger than the lands 3 and the dummy lands 4A.

In such an embodiment, the surface wiring 10
Is used to form the dummy land 4A and a part of the inner layer wiring 12 is used to form the inner layer reinforcing pattern 5A. Therefore, the inside of the land 3 formation region and immediately below it are used as the wiring region. be able to. For this reason, the wiring density to the substrate 1 can be increased.

(Embodiment 3) FIG. 7 is a plan view of a flip-chip mounting wiring board according to Embodiment 3 of the present invention, FIG. 8 is a sectional view taken along line DD of FIG. 7, and FIG. It is sectional drawing which expanded.

Also in this embodiment, the inner layer reinforcing pattern 5 is provided in the substrate 1. Similar to the first embodiment, the inner layer reinforcing pattern 5 is located immediately below the lands 3 and the dummy lands 4 and is formed so as to have an area and a shape larger than the area where the lands 3 and the dummy lands 4 are formed. .

In this embodiment, an insulating layer 13 is provided on the substrate 1 in addition to the inner layer reinforcing pattern 5. The insulating layer 13 is provided so as to be located inside the regions where the lands 3 and the dummy lands 4 are formed, and the thickness thereof is smaller than the sum of the thickness of the bumps 8 of the semiconductor chip 7 and the thickness of the lands 3. Is set to The insulating layer 13 is provided by printing a polyimide resin or a resist on the substrate 1 or bonding a film made of a polyimide resin or a resist.

In this embodiment, as shown in FIG.
The bumps 8 are formed on the pads of the semiconductor chip 7, the semiconductor chip 7 is face-down, and the bumps 8 are aligned with the lands 3. Then, from 25 to 1 from the back of the semiconductor chip 7
The semiconductor chip 7 is mounted by fixing the semiconductor chip 7 to the substrate 1 with the adhesive 9 while applying a pressure of 00 gf / bump and heat of 180 to 250 ° C.

Also in this embodiment, the bottom of the land 3 is buried in the substrate 1 during pressurization and heating. However, if a certain amount is buried, the semiconductor chip 7 and the insulating layer 13 come into contact, and the insulating layer 13 becomes a resistor. Therefore, it will not be buried any more. Therefore, contact between the circuit of the semiconductor chip 7 and the substrate 1 can be prevented. Further, in this embodiment, there is an effect that the buried amount of the land 3 can be controlled by changing the thickness of the insulating layer 13.

(Embodiment 4) FIG. 10 is a plan view of a flip-chip mounting wiring board according to Embodiment 4 of the present invention.
1 is a cross-sectional view taken along the line GG of FIG. 10, and FIG. 12 is a cross-sectional view taken along the line FF of FIG.

Also in this embodiment, the inner layer reinforcing pattern 5 is provided in the substrate 1. Similar to the first embodiment, the inner layer reinforcing pattern 5 is located immediately below the lands 3 and the dummy lands 4 and is formed so as to have an area and a shape larger than the area where the lands 3 and the dummy lands 4 are formed. .

In this embodiment, in addition to the inner layer reinforcing pattern 5, a surface layer reinforcing pattern 14 is provided. The surface layer reinforcing pattern 14 is provided so as to surround the formation regions of the lands 3 and the dummy lands 4. The surface layer reinforcing pattern 14 is provided so as to be located at the boundary between the surface of the substrate 1 and the area where the adhesive 9 is applied. The surface reinforcement pattern 14 is connected to the dummy land 4 on the substrate 1 and is formed of the same material as the dummy land 4. Such a surface layer reinforcing pattern 14 has a width of about 1 to 2 mm and is arranged so as to occupy most of the bonding boundary portion as shown in FIG.

In this embodiment, as shown in FIG. 12, a bump 8 is formed on a pad of a semiconductor chip 7, and the semiconductor chip 7 is face-down so that the bump 8 is aligned with the land 3. Then, 25 from the back of the semiconductor chip 7
The semiconductor chip 7 is mounted by fixing the semiconductor chip 7 to the substrate 1 with the adhesive 9 while applying a pressure of １００100 gf / bump and heat of 180 to 250 ° C.

Due to such mounting, the surface layer reinforcing pattern 14 and the adhesive 9 are in contact with most of the boundary between the adhesive 9 and the substrate surface. This surface reinforcement pattern 14 improves the mechanical strength near the adhesive interface. For this reason, the durability against mechanical stress from the outside is improved, which is effective for a flexible substrate made of a polyimide resin having a soft material.

From the above description, the present invention includes the following inventions.

(1) In a flip-chip mounting structure in which a semiconductor chip having bumps formed on pads is mounted face-down on a flip-chip mounting wiring board, the flip-chip mounting structure is provided inside the flip-chip mounting wiring board;
A flip-chip mounting structure, wherein an inner layer reinforcing pattern is provided immediately below a land on the surface of the flip-chip mounting wiring board electrically connected to the bump.

In the present invention, since the inner layer reinforcing pattern regulates the burial of the land, there is no short circuit between the semiconductor chip and the flip-chip mounting wiring board.

[0049]

As described above, according to the first aspect of the present invention, the inner layer reinforcing pattern provided immediately below the land supports the land from below and regulates the burial amount of the land. The amount of burial is reduced, and short-circuiting between the wiring and the semiconductor chip does not occur.

According to the second aspect of the present invention, since a part of the wiring is used as the inner layer reinforcing pattern, the wiring density of the inner layer of the wiring board can be increased.

According to the third aspect of the present invention, since the dummy lands are provided so that the land intervals are uniform, the variation in the burial amount between the lands is reduced, and the occurrence of a short circuit between the wiring and the semiconductor chip is ensured. Can be prevented.

According to the fourth aspect of the present invention, the insulating layer prevents contact between the circuit in the semiconductor chip and the wiring, and the buried amount of the land can be easily controlled by changing the thickness of the insulating layer.

According to the fifth aspect of the present invention, the mechanical strength of the flip chip mounting portion can be increased by the surface layer reinforcing pattern.

According to the sixth aspect of the present invention, since the dummy land is provided by using a part of the wiring, the wiring can be formed also on the land inside the surface layer, and the wiring density of the surface layer can be increased. .

[Brief description of the drawings]

FIG. 1 is a plan view of a flip-chip mounting wiring board according to a first embodiment;

FIG. 2 is a sectional view taken along line AA of FIG.

FIG. 3 is an enlarged cross-sectional view of the flip-chip mounted state according to the first embodiment.

FIG. 4 is a plan view of a flip-chip mounting wiring board according to a second embodiment;

FIG. 5 is a sectional view taken along line BB of FIG. 4;

FIG. 6 is a sectional view taken along line CC of FIG. 5;

FIG. 7 is a plan view of a flip-chip mounting wiring board according to a third embodiment;

FIG. 8 is a sectional view taken along line DD of FIG. 7;

FIG. 9 is an enlarged cross-sectional view of the flip-chip mounted state according to the third embodiment.

FIG. 10 is a plan view of a flip-chip mounting wiring board according to a fourth embodiment;

11 is a sectional view taken along line GG of FIG.

FIG. 12 is an enlarged cross-sectional view showing a flip-chip mounting state according to a fourth embodiment along the line 10F-F.

FIG. 13 is a plan view of a conventional flip-chip mounting wiring board.

FIG. 14 is an enlarged cross-sectional view showing a conventional flip-chip mounting state.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Substrate 2 Wiring 3 Land 4 Dummy land 5 5A Inner layer reinforcement pattern 7 Semiconductor chip 8 Bump 9 Adhesive 10 Surface layer wiring 12 Inner layer wiring 13 Insulation layer 14 Surface layer reinforcement pattern

Claims (6)

[Claims] 1. A flip-chip mounting wiring board on which a semiconductor chip having bumps formed on pads is mounted face-down, wherein: a land to which a pad formed on the semiconductor chip is connected; and an inner layer immediately below the land. A flip-chip mounting wiring board, comprising: an inner layer reinforcing pattern provided on a portion thereof. 2. The flip-chip mounting wiring board according to claim 1, wherein the inner layer reinforcing pattern is formed using a part of a wiring. 3. The flip-chip mounting wiring board according to claim 1, wherein a dummy land for making the land interval uniform is provided at a portion where the pad is not connected. 4. The flip chip mounting method according to claim 1, wherein an insulating layer having a thickness smaller than the sum of the thickness of the bump and the thickness of the land is provided immediately below the circuit surface of the semiconductor chip. Wiring board. 5. The flip chip mounting according to claim 1, wherein the semiconductor chip is bonded to the surface with an adhesive, and a surface layer reinforcing pattern is provided at a boundary between the adhesive and the surface. Wiring board. 6. The flip-chip mounting wiring board according to claim 3, wherein the dummy land is formed using a part of a wiring.