IT1204247B - LOGIC CMOS CIRCUIT COMPATIBLE WITH TTL LOGIC CIRCUITS AND WITH LOW CURRENT ABSORPTION IN THE INPUT STAGE - Google Patents
LOGIC CMOS CIRCUIT COMPATIBLE WITH TTL LOGIC CIRCUITS AND WITH LOW CURRENT ABSORPTION IN THE INPUT STAGEInfo
- Publication number
- IT1204247B IT1204247B IT83624/86A IT8362486A IT1204247B IT 1204247 B IT1204247 B IT 1204247B IT 83624/86 A IT83624/86 A IT 83624/86A IT 8362486 A IT8362486 A IT 8362486A IT 1204247 B IT1204247 B IT 1204247B
- Authority
- IT
- Italy
- Prior art keywords
- input stage
- low current
- cmos circuit
- logic
- current absorption
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/356—Bistable circuits
- H03K3/356104—Bistable circuits using complementary field-effect transistors
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/01—Modifications for accelerating switching
- H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
- H03K19/01707—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits
- H03K19/01721—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits by means of a pull-up or down element
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
- H03K19/018507—Interface arrangements
- H03K19/018521—Interface arrangements of complementary type, e.g. CMOS
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Logic Circuits (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| IT83624/86A IT1204247B (en) | 1986-06-04 | 1986-06-04 | LOGIC CMOS CIRCUIT COMPATIBLE WITH TTL LOGIC CIRCUITS AND WITH LOW CURRENT ABSORPTION IN THE INPUT STAGE |
| GB8712118A GB2191355B (en) | 1986-06-04 | 1987-05-22 | Ttl compatible cmos logic with low power dissipation in the input stage |
| JP62132029A JPS63153917A (en) | 1986-06-04 | 1987-05-29 | Transistor-transistor logic circuit compatible cmos logic circuit with little power consumption in input stage |
| FR8707764A FR2599912B1 (en) | 1986-06-04 | 1987-06-03 | TTL COMPATIBLE CMOS LOGIC CIRCUIT, WITH LOW POWER DISSIPATION IN THE INPUT STAGE |
| DE19873718769 DE3718769A1 (en) | 1986-06-04 | 1987-06-04 | TTL-COMPATIBLE CMOS LOGIC WITH LOW PERFORMANCE IN THE INPUT LEVEL |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| IT83624/86A IT1204247B (en) | 1986-06-04 | 1986-06-04 | LOGIC CMOS CIRCUIT COMPATIBLE WITH TTL LOGIC CIRCUITS AND WITH LOW CURRENT ABSORPTION IN THE INPUT STAGE |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| IT8683624A0 IT8683624A0 (en) | 1986-06-04 |
| IT1204247B true IT1204247B (en) | 1989-03-01 |
Family
ID=11323308
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| IT83624/86A IT1204247B (en) | 1986-06-04 | 1986-06-04 | LOGIC CMOS CIRCUIT COMPATIBLE WITH TTL LOGIC CIRCUITS AND WITH LOW CURRENT ABSORPTION IN THE INPUT STAGE |
Country Status (5)
| Country | Link |
|---|---|
| JP (1) | JPS63153917A (en) |
| DE (1) | DE3718769A1 (en) |
| FR (1) | FR2599912B1 (en) |
| GB (1) | GB2191355B (en) |
| IT (1) | IT1204247B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4763021A (en) * | 1987-07-06 | 1988-08-09 | Unisys Corporation | CMOS input buffer receiver circuit with ultra stable switchpoint |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4593212A (en) * | 1984-12-28 | 1986-06-03 | Motorola, Inc. | TTL to CMOS input buffer |
-
1986
- 1986-06-04 IT IT83624/86A patent/IT1204247B/en active
-
1987
- 1987-05-22 GB GB8712118A patent/GB2191355B/en not_active Expired
- 1987-05-29 JP JP62132029A patent/JPS63153917A/en active Pending
- 1987-06-03 FR FR8707764A patent/FR2599912B1/en not_active Expired - Lifetime
- 1987-06-04 DE DE19873718769 patent/DE3718769A1/en not_active Withdrawn
Also Published As
| Publication number | Publication date |
|---|---|
| GB2191355A (en) | 1987-12-09 |
| GB8712118D0 (en) | 1987-06-24 |
| GB2191355B (en) | 1989-12-20 |
| FR2599912B1 (en) | 1992-12-18 |
| FR2599912A1 (en) | 1987-12-11 |
| IT8683624A0 (en) | 1986-06-04 |
| DE3718769A1 (en) | 1987-12-10 |
| JPS63153917A (en) | 1988-06-27 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| TA | Fee payment date (situation as of event date), data collected since 19931001 |
Effective date: 19970628 |