IT1122415B - Circuito stampato a piu'strati e procedimento per la sua progettazione - Google Patents
Circuito stampato a piu'strati e procedimento per la sua progettazioneInfo
- Publication number
- IT1122415B IT1122415B IT24908/79A IT2490879A IT1122415B IT 1122415 B IT1122415 B IT 1122415B IT 24908/79 A IT24908/79 A IT 24908/79A IT 2490879 A IT2490879 A IT 2490879A IT 1122415 B IT1122415 B IT 1122415B
- Authority
- IT
- Italy
- Prior art keywords
- procedure
- design
- printed circuit
- layer printed
- layer
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0286—Programmable, customizable or modifiable circuits
- H05K1/0287—Programmable, customizable or modifiable circuits having an universal lay-out, e.g. pad or land grid patterns or mesh patterns
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
- H05K1/0298—Multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09372—Pads and lands
- H05K2201/09454—Inner lands, i.e. lands around via or plated through-hole in internal layer of multilayer PCB
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09609—Via grid, i.e. two-dimensional array of vias or holes in a single plane
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09681—Mesh conductors, e.g. as a ground plane
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
- H05K2201/09945—Universal aspects, e.g. universal inner layers or via grid, or anisotropic interposer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4641—Manufacturing multilayer circuits by laminating two or more circuit boards having integrally laminated metal sheets or special power cores
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Structure Of Printed Boards (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CH837178A CH630211A5 (en) | 1978-08-07 | 1978-08-07 | Method for designing electrically conductive layers for producing printed circuits, as well as a multilayer base material for carrying out the method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| IT7924908A0 IT7924908A0 (it) | 1979-08-03 |
| IT1122415B true IT1122415B (it) | 1986-04-23 |
Family
ID=4339288
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| IT24908/79A IT1122415B (it) | 1978-08-07 | 1979-08-03 | Circuito stampato a piu'strati e procedimento per la sua progettazione |
Country Status (5)
| Country | Link |
|---|---|
| BE (1) | BE877835A (it) |
| CH (1) | CH630211A5 (it) |
| DE (2) | DE7920553U1 (it) |
| IT (1) | IT1122415B (it) |
| LU (1) | LU81559A1 (it) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3020196C2 (de) * | 1980-05-28 | 1982-05-06 | Ruwel-Werke Spezialfabrik für Leiterplatten GmbH, 4170 Geldern | Mehrebenen-Leiterplatte und Verfahren zu deren Herstellung |
| FR2512315A1 (fr) * | 1981-09-02 | 1983-03-04 | Rouge Francois | Ebauche de circuit electrique multicouche et procede de fabrication de circuits multicouches en comportant application |
-
1978
- 1978-08-07 CH CH837178A patent/CH630211A5/de not_active IP Right Cessation
-
1979
- 1979-07-18 DE DE19797920553U patent/DE7920553U1/de not_active Expired
- 1979-07-18 DE DE19792929051 patent/DE2929051A1/de not_active Withdrawn
- 1979-07-23 BE BE0/196407A patent/BE877835A/xx not_active IP Right Cessation
- 1979-07-27 LU LU81559A patent/LU81559A1/de unknown
- 1979-08-03 IT IT24908/79A patent/IT1122415B/it active
Also Published As
| Publication number | Publication date |
|---|---|
| DE2929051A1 (de) | 1980-02-21 |
| LU81559A1 (de) | 1979-10-31 |
| BE877835A (fr) | 1979-11-16 |
| CH630211A5 (en) | 1982-05-28 |
| DE7920553U1 (de) | 1979-10-11 |
| IT7924908A0 (it) | 1979-08-03 |
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