HK1196181B - Low profile image sensor package and method - Google Patents

Description

Low profile image sensor package and method

Technical Field

The present invention relates to packaging of microelectronic devices, and more particularly to packaging of optical semiconductor devices.

Background

The trend in semiconductor devices is for smaller Integrated Circuit (IC) devices (also referred to as chips) to be packaged in smaller packages that provide off-chip signal connectivity while protecting the chip. One example is an image sensor, which is an IC device that includes a photodetector (which converts incident light into an electrical signal) that accurately reflects the intensity and color information of the incident light with good spatial resolution.

There are different driving forces behind the development of wafer level packaging solutions for image sensors. For example, the simplified form factor (i.e., increased density for achieving the highest volume/volume ratio) overcomes space limitations and enables smaller camera module solutions. Increased electrical performance can be achieved with shorter interconnect lengths, which improves electrical performance and thus device speed, and which greatly reduces chip power consumption. Heterogeneous integration allows integration of different functional layers (e.g., integration of high and low resolution image sensors, integration of an image sensor with its processor, etc.).

Currently, chip-on-board (COB-where the bare chip is mounted directly on a printed circuit board) and Shellcase wafer-level CSP (where the wafer is laminated between two sheets of glass) are the primary packaging and assembly processes used to construct image sensor modules (e.g., for mobile device cameras, optical mice, etc.). However, with the use of higher pixel image sensors, COB and shellcaslewlcsp assembly becomes increasingly difficult due to assembly limitations, size limitations (this requirement is for lower profile devices), yield issues, and capital investment for packaged 8 and 12 inch image sensor wafers. Furthermore, standard WLP packages are fan-in packages (in which the chip area is equal to the package area), thereby limiting the number of I/O connections. Finally, standard WLP packages are die packages (which can be complex in trial processing, assembly, and SMT).

There is a need for improved packaging and packaging techniques that provide a low-profile packaging solution that is cost effective and reliable (i.e., provides the necessary mechanical support and electrical connectivity).

Disclosure of Invention

The image sensor package includes a printed circuit board including: a first substrate having opposing first and second surfaces; an aperture extending through the first substrate between the first and second surfaces; one or more circuit layers; and a plurality of first contact pads electrically coupled to the one or more circuit layers. A sensor chip is mounted to the printed circuit board and is at least partially disposed in the aperture. The sensor chip includes: a second substrate having opposing first and second surfaces; a plurality of photodetectors formed on or in the second substrate; and a plurality of second contact pads formed at the first surface of the second substrate, which are electrically coupled to the photodetectors. Each electrical connector electrically connects one of the first contact pads and one of the second contact pads. A lens module is mounted to the printed circuit board and includes one or more lenses arranged to focus light onto the photodetectors.

The method of forming an image sensor package includes: providing a first substrate having opposing first and second surfaces and a plurality of image sensors formed thereon, wherein each image sensor comprises a plurality of photodetectors formed on or in the first substrate and a plurality of first contact pads formed at the first surface of the first substrate, which are electrically coupled to the photodetectors; mounting a second substrate having opposing first and second surfaces onto the first substrate by attaching the second substrate first surface to the first substrate first surface; forming trenches partially extending through the second substrate into the second substrate second surface, wherein each of the trenches is disposed over one or more of the first contact pads; forming a plurality of openings, each opening extending from one of the trenches to the second substrate first surface and exposing one of the first contact pads; forming a plurality of conductive traces, each conductive trace extending from one of the first contact pads and through one of the plurality of openings; cutting the mounted first and second substrates along a cut line in the middle of the image sensors into a plurality of separate image sensor assemblies, wherein each of the image sensor assemblies comprises one of the image sensors; mounting one of the image sensor assemblies onto a printed circuit board, wherein the printed circuit board includes a third substrate having opposing first and second surfaces, a cavity formed into the third substrate first surface, an opening extending from the cavity to the third substrate second surface, one or more circuit layers, and a plurality of second contact pads electrically coupled to the one or more circuit layers, wherein the first substrate of the one image sensor assembly is at least partially disposed in the cavity; and electrically connecting each of the plurality of conductive traces of the one image sensor component to one of the second contact pads.

The method of forming an image sensor package includes: providing a first substrate having opposing first and second surfaces and a plurality of image sensors formed thereon, wherein each image sensor comprises a plurality of photodetectors formed on or in the first substrate and a plurality of first contact pads formed at the first surface of the first substrate, which are electrically coupled to the photodetectors; forming trenches partially extending through the first substrate into the first substrate first surface, wherein each of the trenches is disposed between two of the plurality of image sensors; forming a plurality of conductive traces, each conductive trace extending from one of the first contact pads and into one of the trenches; cutting the first substrate along a cut line intermediate the image sensors into a plurality of separate image sensor assemblies, wherein each of the image sensor assemblies comprises one of the image sensors; mounting one of the image sensor assemblies onto a printed circuit board, wherein the printed circuit board includes a second substrate having opposing first and second surfaces, a hole formed through the second substrate, one or more circuit layers, and a plurality of second contact pads electrically coupled to the one or more circuit layers, wherein the first substrate of the one image sensor assembly is at least partially disposed in the hole; and wherein the mounting includes electrically connecting each of the plurality of conductive traces of the one image sensor component to one of the second contact pads.

Other objects and features of the present invention will become apparent from a review of the specification, claims and appended figures.

Drawings

Fig. 1A-1J are cross-sectional side views showing in sequence the steps in forming an image sensor assembly.

Fig. 2A-2C are cross-sectional side views showing in sequence the steps in packaging an image sensor assembly with a printed circuit board.

Fig. 3 is a cross-sectional side view showing a first alternative embodiment.

Fig. 4 is a cross-sectional side view showing a second alternative embodiment.

Fig. 5 is a cross-sectional side view showing a third alternative embodiment.

Fig. 6A-6F are cross-sectional side views showing in sequence the steps in an alternative embodiment of forming a packaged image sensor assembly.

FIG. 7 is a cross-sectional side view showing an alternative embodiment of the display of FIG. 6F.

Detailed Description

The present invention is a low profile, chip-level sensor module (e.g., for use in a camera) incorporating a low profile wafer-level wire-bond or flip-chip packaged image sensor directly mounted to a printed circuit board, a printed circuit board with an imaging window, and an optical/camera lens module.

FIGS. 1A-1J and 2A-2C illustrate the formation of a packaged image sensor. The formation begins with a wafer 10 (substrate) including a plurality of image sensors 12 formed thereon, as shown in fig. 1A. Each image sensor 12 includes a plurality of photodetectors 14, support circuitry 16, and contact pads 18. The sensor 12 is commonly referred to as a BSI (backside illuminated) sensor because the photodetector 14 is configured to detect and measure light entering from the back surface of the wafer 10 (i.e., the surface opposite the front surface at which the circuitry 16 and contact pads 18 are formed). The contact pads 18 are electrically connected to the photodetectors 14 and/or their supporting circuitry 16 for providing off-chip signals. Each photodetector 14 converts light energy into a voltage signal. Additional circuitry may be included to amplify the voltage and/or convert it to digital data. Color filters and/or microlenses 20 may be mounted over the photodetectors 14. Sensors of this type are well known in the art and are not described further herein.

The wafer 10 is first mounted on a support substrate 22, as shown in fig. 1B. The substrate 22 is preferably made of silicon. An optically transparent protective substrate 24 is mounted over the back surface of the wafer 10 via spacers 26 that maintain an open space 28 between the wafer surface and the protective substrate 24. Optically transparent means transparent to at least those wavelengths of light that will be detected/measured by the photodetector 14. The protective substrate 24 may be a polymer, glass, a combination of glass and polymer, or any other transparent material. As a non-limiting example, the protective substrate is glass having a thickness of 100 μm to 1000 μm. The spacer 26 may be a polymer, glass, silicon, epoxy, or other material. A non-limiting example of the thickness of the spacer 26 is between 5 μm and 30 μm.

Preferably, the support substrate 22 is thinned by mechanical grinding or/and chemical etching of its bottom surface. The thickness of the thinned support substrate 22 is preferably in the range of 100 to 400 μm. A trench 30 is formed into the bottom surface of the support substrate 22 extending most, but not all, of the way through the substrate 22, as shown in fig. 1D. Conventional silicon etch techniques may be used to form the trenches 30. Openings 32 are next formed extending from the trenches to the top surface of the support substrate 22 to expose the contact pads 18, as shown in fig. 1E. The openings 32 may be formed using a combination of laser or lithographic and plasma etching(s) or chemical etching methods. The size of each opening 32 is preferably equal to or smaller than the size of the corresponding contact pad 18.

A layer of dielectric material 34 is deposited or formed on the bottom surface of support substrate 22, including the sidewalls and bottom wall of trenches 30 and the sidewalls of openings 32, while leaving contact pads 18 exposed, as shown in fig. 1F. The dielectric layer 34 may be silicon dioxide, silicon nitride, a polymer, an epoxy, a polyimide, a resin, a metal oxide, or any other suitable dielectric material(s). Preferably, the dielectric is silicon dioxide formed by thermal oxidation or deposited using sputtering or chemical vapor deposition techniques. The preferred thickness of the dielectric layer 34 is 0.1 μm or more. The formation of layer 34 may include depositing or forming the material over contact pad 18 followed by selectively removing the material over contact pad 18.

A layer of conductive material 36 is deposited or formed on the dielectric layer 34, including on the contact pads 18, as shown in fig. 1G. Conductive layer 36 may be copper, aluminum, a polymer, or any other suitable conductive material(s). Conductive layer 36 may be deposited by electroplating, sputtering, chemical vapor deposition, screen printing, or any other suitable deposition method(s). A photolithographic process is used to selectively remove portions of conductive material 36, leaving conductive traces 38 of the conductive material 36, each of the conductive traces 38 extending from one of the contact pads 18, through an opening 32, and to the bottom surface of the trench 30, as shown in fig. 1H.

A dielectric material 40 is formed over the traces 38 (encapsulating each trace), except for selected portions of each trace 38 (pad regions 39) on the bottom surface of the trench 30, as shown in fig. 1I. The dielectric material 40 may be a polymer, epoxy, metal oxide, resin, or any other suitable encapsulating material(s). Material 40 is preferably at least 0.5 μm in thickness. The wafer 10 is then cut (diced) along dicing lines 42, resulting in individual image sensor assemblies 44, as shown in fig. 1J. Wafer dicing may be performed using a mechanical blade dicing apparatus, laser dicing, or any other suitable process.

The image sensor assembly 44 may be mounted to a Printed Circuit Board (PCB) 50 (which has the configuration shown in fig. 2A). PCB50 includes a substrate 52 on and/or in which one or more conductive PCB circuit layers 54 are formed. PCB50 includes contact pads 56 on its bottom surface that are electrically coupled to the PCB circuit layer 54 for off-board signal communication. The PCB circuit layer(s) may include conductive traces, embedded circuit components, and/or other electronic components. The PCB50 includes a hole 57 extending therethrough. The aperture 57 includes a cavity 58 formed into the bottom surface of the base 52 and an opening 60 extending between the cavity and the upper surface of the base 52 to define a shoulder 61 (i.e., the opening 60 has a lateral dimension smaller than the lateral dimension of the cavity 58 to define a laterally extending shoulder 61).

Image sensor assembly 44 is mounted inside cavity 58 of PCB50, preferably to shoulder 61, with a layer of adhesive 62 having a thickness of 0.1 μm to 20 μm, so that photodetector 14 is oriented to receive light through opening 60, as shown in fig. 2B. A wire bonding process is then performed to form electrical connectors in the form of wires 64 between pad regions 39 and corresponding contact pads 56. The wire 64 may be alloyed gold, copper, or any other suitable wire bonding material and attached using any suitable conventional wire bonding technique known in the art.

The lens module 66 is mounted to the PCB50 in a manner that covers the opening 60, as shown in fig. 2C. Lens module 66 includes one or more optical lenses 68 separated by spacers 70 and mounted within a housing 72. The final image sensor package assembly is shown in fig. 2C. Incident light is focused by the lens module 66, focused and filtered by the color filter/microlens 20, and detected/measured by the photodetector 14. The signal generated by the photodetector 14 is processed or propagated by the support circuit 16 and provided to the contact pad 18. The signal travels from contact pad 18, through trace 38, through lead 64, through contact pad 56 and through PCB circuit layer 54. The lens module 66 protects the upper surface of the image sensor assembly 44 and the PCB50 provides mechanical support and electrical signal connectivity for the image sensor assembly 44.

Fig. 3 shows an alternative embodiment to the display of fig. 2C in which the substrate 24 and spacers 26 are omitted from the image sensor assembly 44 and the top surface of the wafer 10 is mounted directly to the shoulder 61. During assembly, the protective tape may be placed on the upper surface of the wafer 10 in place of the substrate 24 and spacer 26, and removed after dicing.

Fig. 4 shows a second alternative embodiment in which a flip-chip connection between the image sensor assembly 44 and the PCB50 is utilized. In this embodiment, the orientation of the PCB50 is reversed (the cavity 58 is formed into the top surface of the base 52, and the opening 60 extends between the cavity 58 and the bottom surface of the base 52). Contact pads 56 are formed on the shoulders 61. The image sensor assembly is inserted into the cavity 58 such that a Ball Grid Array (BGA) or land grid array electrical connector 76 makes electrical contact between the respective pad region 39 and the contact pad 56. The electrical connector 76 also mechanically secures the image sensor assembly 44 to the PCB 50.

FIG. 5 illustrates an alternative embodiment to the display of FIG. 4 in which the substrate 24 and spacers 26 are omitted from the image sensor assembly 44. During assembly, the protective tape may be placed on the upper surface of the wafer 10 in place of the substrate 24 and spacer 26, and removed after dicing.

Fig. 6A-6F illustrate the formation of a packaged image sensor according to another alternative embodiment. This embodiment utilizes an image sensor 12 that is an FSI (front surface illuminated) sensor (i.e., the photodetector is configured to detect and measure light entering from the front surface of the wafer 10, which is the same surface at which the circuitry 16 and contact pads 18 are formed). In the case of an FSI image sensor, the wafer 10 may be thick enough to negate the need to attach a separate support substrate (since the increased wafer thickness will not adversely affect the detected light, which no longer travels from the back surface through the substrate to reach the photodetector).

Fig. 6A shows an FSI image sensor 12 formed on a substrate 10. Trenches 78 are formed into the front surface of wafer 10 between adjacent image sensors 12, as shown in fig. 6B. A layer of dielectric material 80 is deposited or formed on the sidewalls and bottom walls of the trenches 78 and on the front surface of the wafer 10 up to but not over the contact pads 18. The dielectric layer 80 may be formed using the same techniques and material(s) as the dielectric layer 34 previously described. Conductive traces 82 (of conductive material) are formed on the dielectric layer 80 in the trenches 78 and on portions of the front surface of the wafer 10, including on the contact pads 18, in a similar manner as the conductive traces 38. Each conductive trace 82 extends from one of the contact pads 18 into one of the trenches 78 and to a bottom surface of the trench 78. The resulting structure is shown in fig. 6C.

The wafer 10 is then diced (separated) along dicing lines 42, resulting in individual image sensor assemblies 84, as shown in fig. 6D. The image sensor assembly 84 is then mounted onto a Printed Circuit Board (PCB) 86 as shown in fig. 6E. The configuration of PCB86 is the same as PCB50 described above, except that hole 57 includes cavity 58 that extends completely through substrate 52 (i.e., without shoulder 61). A flip chip connection between the image sensor assembly 84 and the PCB86 is utilized in which Ball Grid Array (BGA) or land grid array electrical connectors 76 make electrical contact between the respective traces 82 and the PCB contact pads 56. The electrical connector 76 also mechanically secures the image sensor assembly 84 to the PCB 86. The transparent protective substrate 24 is mounted to the PCB86 and the lens module 66 is mounted to the protective substrate 24 as previously described. The final structure is shown in fig. 6F.

FIG. 7 shows an alternative embodiment to the display of FIG. 6F in which substrate 24 and spacers 26 are omitted and lens module 66 is mounted directly to PCB 86.

It will be understood that: the present invention is not limited to the embodiment(s) described above and shown herein, but encompasses any and all variations falling within the scope of the appended claims. For example, references herein to the present invention are not intended to limit the scope of any claim or claim term, but rather merely to refer to one or more features that may be covered by one or more claims. The above-described materials, processes, and numerical examples are illustrative only and should not be construed as limiting the claims. Moreover, as is apparent from the claims and specification, not all method steps need be performed in the exact order illustrated or claimed, but independently or simultaneously in any order that allows for proper formation of the image sensor package of the present invention. Individual layers of material may be formed as multiple layers of such or similar materials, and vice versa.

It should be noted that: as used herein, both the terms "over" and "upper" broadly include "directly on …" (with no intervening material, elements, or spaces disposed therebetween) and "indirectly on …" (with intervening material, elements, or spaces disposed therebetween). Likewise, the term "adjacent" includes "directly adjacent" (no intermediate material, element, or space disposed therebetween) and "indirectly adjacent" (intermediate material, element, or space disposed therebetween), "mounted to" includes "directly mounted to" (no intermediate material, element, or space disposed therebetween) and "indirectly mounted to" (intermediate material, element, or space disposed therebetween), and "electrically coupled" includes "directly electrically coupled to" (no intermediate material or element therebetween that electrically connects the elements together) and "indirectly electrically coupled to" (there is an intermediate material or element therebetween that electrically connects the elements together). For example, forming an element "over" a substrate may include forming the element directly on the substrate with no intervening materials/elements therebetween, and forming the element indirectly on the substrate with one or more intervening materials/elements therebetween.

Claims (27)

1. An image sensor package, comprising:

a printed circuit board comprising:

a first substrate having opposing first and second surfaces,

a hole extending through the first substrate between the first and second surfaces, one or more circuit layers,

a plurality of first contact pads electrically coupled to the one or more circuit layers;

a sensor chip mounted to the printed circuit board and at least partially disposed in the aperture, wherein the sensor chip comprises:

a second substrate having opposing first and second surfaces,

a plurality of photodetectors formed on or in the second substrate, an

A plurality of second contact pads formed at the first surface of the second substrate, which are electrically coupled to the photodetectors;

electrical connectors, each of the electrical connectors electrically connecting one of the first contact pads and one of the second contact pads; and

a lens module mounted to the printed circuit board, wherein the lens module includes one or more lenses arranged to focus light onto the photodetectors.

2. The image sensor package of claim 1, wherein the printed circuit board includes a shoulder extending laterally in the aperture.

3. The image sensor package of claim 2, wherein the sensor chip is mounted onto the shoulder via an adhesive, and wherein the plurality of photodetectors are oriented to receive light through the apertures.

4. The image sensor package of claim 2, wherein the lens module is mounted to the second surface of the first substrate and is disposed over the aperture.

5. The image sensor package of claim 2, wherein the plurality of first contact pads are disposed at the first surface of the first substrate.

6. The image sensor package of claim 2, wherein the sensor chip further comprises:

a third substrate attached to the first surface of the second substrate;

a plurality of openings, each of the plurality of openings extending through the third substrate and exposing one of the second contact pads;

a plurality of conductive traces, each of the plurality of conductive traces extending from one of the second contact pads and through one of the plurality of openings;

wherein each of the electrical connectors is a lead connected between one of the plurality of conductive traces and one of the first contact pads.

7. The image sensor package of claim 3, further comprising:

an optically transparent substrate mounted to and spaced apart from the second substrate second surface, wherein the adhesive is disposed directly between the optically transparent substrate and the shoulder.

8. The image sensor package of claim 3, wherein the adhesive is disposed directly between the second substrate second surface and the shoulder.

9. The image sensor package of claim 2, wherein:

the plurality of first contact pads are disposed at the shoulder of the first substrate;

the electrical connector is a Ball Grid Array (BGA) or land grid array electrical connector;

the sensor chip is mounted onto the printed circuit board via the electrical connector.

10. The image sensor package of claim 2, wherein the sensor chip further comprises:

a third substrate attached to the first surface of the second substrate;

a plurality of openings, each of the plurality of openings extending through the third substrate and exposing one of the second contact pads;

a plurality of conductive traces, each of the plurality of conductive traces extending from one of the second contact pads and through one of the plurality of openings;

wherein each of the electrical connectors is a Ball Grid Array (BGA) or land grid array electrical connector connected between one of the plurality of conductive traces and one of the first contact pads.

11. The image sensor package of claim 9, further comprising:

an optically transparent substrate mounted to and spaced apart from the sensor chip second surface.

12. The image sensor package of claim 1, wherein the sensor chip further comprises:

a trench formed into the first surface of the second substrate,

a plurality of conductive traces, each of the plurality of conductive traces extending from one of the second contact pads and into the trench;

wherein the electrical connector is a Ball Grid Array (BGA) or land grid array electrical connector that each electrically connects one of the first contact pads to one of the plurality of conductive traces.

13. The image sensor package of claim 12, further comprising:

an optically transparent substrate mounted to the printed circuit board, wherein the optically transparent substrate is disposed between the printed circuit board and the lens module and over the aperture.

14. A method of forming an image sensor package, comprising:

providing a first substrate having opposing first and second surfaces and a plurality of image sensors formed thereon, wherein each image sensor comprises a plurality of photodetectors formed on or in the first substrate and a plurality of first contact pads formed at the first surface of the first substrate that are electrically coupled to the photodetectors;

mounting a second substrate having opposing first and second surfaces onto the first substrate by attaching the second substrate first surface to the first substrate first surface;

forming trenches into the second substrate second surface that extend partially through the second substrate, wherein each of the trenches is disposed over one or more of the first contact pads;

forming a plurality of openings, each of the plurality of openings extending from one of the trenches to the second substrate first surface and exposing one of the first contact pads;

forming a plurality of conductive traces, each of the plurality of conductive traces extending from one of the first contact pads and through one of the plurality of openings;

cutting the mounted first and second substrates along a cut line in the middle of the image sensors into a plurality of separate image sensor assemblies, wherein each of the image sensor assemblies comprises one of the image sensors;

mounting one of the image sensor assemblies onto a printed circuit board, wherein the printed circuit board includes a third substrate having opposing first and second surfaces, a cavity formed into the third substrate first surface, an opening extending from the cavity to the third substrate second surface, one or more circuit layers, and a plurality of second contact pads electrically coupled to the one or more circuit layers, wherein the first substrate of the one image sensor assembly is at least partially disposed in the cavity; and

electrically connecting each of the plurality of conductive traces of the one image sensor component to one of the second contact pads.

15. The method of claim 14, wherein the printed circuit board includes a shoulder extending laterally at the second surface of the third substrate such that the opening has a lateral dimension that is less than a lateral dimension of the cavity.

16. The method of claim 15, further comprising:

mounting a lens module onto the printed circuit board, wherein the lens module comprises one or more lenses arranged to focus light onto the photodetector.

17. The method of claim 15, wherein the installing comprises: mounting the one image sensor assembly onto the shoulder via an adhesive, and wherein the plurality of photodetectors are oriented to receive light through an opening extending from the cavity to the third substrate second surface.

18. The method of claim 16, wherein the lens module is mounted to the second surface of the third substrate and is disposed over the opening.

19. The method of claim 15, wherein the plurality of second contact pads are disposed at the first surface of the third substrate.

20. The method of claim 17, further comprising:

mounting an optically transparent substrate to and spaced from the first substrate second surface of the one image sensor assembly, wherein the adhesive is disposed directly between the optically transparent substrate and the shoulder.

21. The method of claim 17, wherein the adhesive is disposed directly between the first substrate second surface of the one image sensor assembly and the shoulder.

22. The method of claim 15, wherein:

the plurality of second contact pads are arranged at the shoulder of the third substrate;

the electrical connection includes: ball Grid Array (BGA) or land grid array electrical connectors are used.

23. The method of claim 22, further comprising:

an optically transparent substrate is mounted to and spaced from the first substrate second surface of the one image sensor assembly.

24. A method of forming an image sensor package, comprising:

providing a first substrate having opposing first and second surfaces and a plurality of image sensors formed thereon, wherein each image sensor comprises a plurality of photodetectors formed on or in the first substrate and a plurality of first contact pads formed at the first surface of the first substrate that are electrically coupled to the photodetectors;

forming trenches into the first substrate first surface that extend partially through the first substrate, wherein each of the trenches is disposed between two of the plurality of image sensors;

forming a plurality of conductive traces, each of the plurality of conductive traces extending from one of the first contact pads and into one of the trenches;

cutting the first substrate along a cut line intermediate the image sensors into a plurality of separate image sensor assemblies, wherein each of the image sensor assemblies comprises one of the image sensors;

mounting one of the image sensor assemblies onto a printed circuit board, wherein the printed circuit board includes a second substrate having opposing first and second surfaces, a hole formed through the second substrate, one or more circuit layers, and a plurality of second contact pads electrically coupled to the one or more circuit layers, wherein the first substrate of the one image sensor assembly is at least partially disposed in the hole; and

wherein the mounting comprises: electrically connecting each of the plurality of conductive traces of the one image sensor component to one of the second contact pads.

25. The method of claim 24, wherein the electrically connecting comprises: ball Grid Array (BGA) or land grid array electrical connectors are used.

26. The method of claim 24, further comprising:

mounting an optically transparent substrate onto the printed circuit board, wherein the optically transparent substrate is disposed over the aperture.

27. The method of claim 24, further comprising:

mounting a lens module onto the printed circuit board, wherein the lens module comprises one or more lenses arranged to focus light onto the photodetector.