HK1034348B - Synchronizing apparatus and method for a compressed audio/video signal receiver - Google Patents

Description

Synchronization apparatus and method for compressed audio/video signal receiver

Technical Field

The present invention relates to a method and apparatus for synchronizing audio and/or video components of a compressed audio/video (a/V) signal receiver.

Background

MPEG is a video signal compression protocol established by the moving picture experts group of the international organization for standardization. This protocol defines a common signal format that includes intra-frame coding as well as motion compensated predictive coding. Due to the frame-to-frame variation in the encoding format, as well as variations in the image content, different frames have very dispersed amounts of compressed data. Data frames tend to be sent asynchronously because different compressed frames have different amounts of data.

The audio signal may also be compressed according to an MPEG protocol. The compressed audio signal may be related to the video signal but transmitted independently. For transmission, the compressed audio signal is segmented into packets and then time division multiplexed with the compressed video signal in an asynchronous manner.

The associated compressed audio and video components are not only independently asynchronous, but also do not have a time or synchronization relationship with each other in the transmission.

MPEG compressed audio and video component signals may include Presentation Time Stamps (PTS) to establish a reference between particular compressed signal segments and a system reference clock signal. The audio and video PTS are used by the receiver device to resynchronize the respective decompressed components and restore their temporal correlation.

An MPEG or MPEG-like a/V receiver will provide a/V component time reference signals (PTS) in accordance with the associated decompressed component signals. The synchronization means within the receiver will use the PTS's present in the audio and video components in order to maintain the synchronization of the audio and video components. When the system is in sync and the audio is not in sync with the lip movements of the image, the audio is typically muted because the viewer is reluctant to hear the audio without the audio being in sync with the image, at least for a short interval. The occurrence of silence is usually only for relatively short intervals, because of relatively strict requirements with respect to the timing of the transmitted audio and video components of a given standard. Synchronization is guaranteed to be achieved within a short interval.

A problem arises with receivers designed to decode the standard a/V component where a non-standard signal is received or has been demultiplexed and re-multiplexed in multiple actual transmission channels. In both cases, the timing relationship of the audio and video components of interest may be varied. Synchronization of lip movements is not possible and silence may occur for a long time. This situation is unacceptable.

The second problem occurs with synchronization methods when applied to non-standard signals. The synchronization process typically includes a coarse mode and a fine mode. Audio data is typically decoded prior to video data and stored in memory. When the appropriate video is decoded, the stored audio is reproduced from memory. However, if the audio in the non-standard signal comes too late, there will be no accompanying sound reproduction and no synchronization can occur. On the other hand, if the audio occurs too early (relative to the amount of buffering), there will be insufficient memory to store the audio and data will be lost. This also presents the problem of not being able to synchronize and may last for long intervals.

Disclosure of Invention

It will be appreciated that viewers would like to reproduce both video and audio in these situations rather than tolerate long periods of audio silence. Therefore, an adaptive synchronization system is required in a digital a/V receiver to accommodate both standard and non-standard received signals.

An a/V receiver according to the present invention will provide an a/V component time reference signal (PTS) consistent with the reproduction of the associated decompressed component signal. The synchronization circuitry produces a function of a difference of the component audio and video PTSs present. This function indicates the case of synchronization of the associated audio and video. If the function value is within a certain range, the synchronization process is continued. If the function value exceeds a predetermined criterion, the synchronization process is terminated and the unsynchronized audio and video components are reproduced. In a further embodiment, the synchronization process is continued for a given range of the function, but the audio component is muted.

According to a first aspect of the present invention there is provided a receiver apparatus for processing a compressed audio/video signal, comprising:

a detector for providing said compressed audio/video signal;

an audio decompressor responsive to said compressed audio/video signal for providing a decompressed audio signal;

a video decompressor responsive to said compressed audio/video signal for providing a decompressed video signal;

an error detector responsive to the time stamps provided by the decompressed audio signal and the decompressed video signal for generating an error signal which is a measure of the non-synchronism of the associated decompressed audio and decompressed video signals;

a processor for controlling said audio decompressor in response to a first range of values of said error signal to skip or repeat segments of the decompressed audio signal for synchronizing associated decompressed audio and video components, and for preventing synchronization of associated decompressed audio and video components in response to the error signal being greater than said first range.

According to a second aspect of the present invention there is provided a method of synchronising audio and video components in a compressed audio/video receiver, comprising:

determining a value representative of the asynchronous timing of the decompressed audio and video signals;

if said value is less than a predetermined time, synchronizing the decompressed audio and video and providing synchronized or partially synchronized decompressed audio and video output signals; and

if said value is greater than said predetermined time, the synchronous processing of the decompressed audio and video signals is prevented/suspended and unsynchronized decompressed audio and video output signals are provided.

Drawings

Fig. 1 is a block diagram of an audio/video compression apparatus.

Fig. 2 is a block diagram of an audio/video decompression apparatus implementing the present invention.

Fig. 3 is a block diagram of an apparatus for providing a receiver system clock signal having substantially the same frequency as the system clock of the compression apparatus.

Fig. 4 is a flow chart of the operation of the apparatus of fig. 2.

Fig. 5 is a block diagram of another muting circuit that may be implemented in fig. 2.

Detailed Description

Fig. 1 shows an exemplary system in which the present invention may be implemented, which is a compressed digital video signal transmission apparatus. In this system, a video signal from a signal source 10 is applied to a video signal compression unit 11, which may comprise a motion compensated predictive encoder using a discrete cosine transform. The compressed video signal from the unit 11 is fed to a formatter 12. The formatter arranges the compressed video signal and other auxiliary data according to some signal protocol, such as MPEG (a standard set by the international organization for standardization). The standard signal is applied to a transmission processor 13 which divides the signal into data packets for transmission purposes and adds some additional component of anti-noise. The transmission data packets, which typically occur at a non-uniform rate, are fed into a rate buffer 14 which provides output data at a relatively constant rate in order to efficiently utilize the narrower bandwidth transmission channel. The buffered data is sent to the modem 15, and signal transmission is performed.

The system clock 22 provides a clock signal to run most of the devices, including at least the transport processor. The clock will operate at a fixed frequency, for example 27 MHZ. However, as shown in the figure, it is used to generate timing information. The system clock is connected to the clock input of the counter 23 and the counter 23 can be used to count modulo 2. The count value from the counter is fed to two latches 24 and 25. The latch 24 is adjusted by the video signal source and latches the count value at intervals of each frame. These count values, which represent the presentation time stamps PTS and which are included in the compressed video signal stream by the formatter 12, are used by the receiver to provide lip synchronization of the associated audio and video information. The latch 25 is adjusted by the transport processor 13 (or the system controller 21) to latch the count value according to a predetermined scheme. These count values represent the system clock reference SCR and are embedded as auxiliary data in the respective auxiliary transmission data packets.

An audio signal associated with a video signal from the signal source 10 is applied to an audio signal compressor 18. Compressor 18 provides frame sampling pulses (independent of the video frames) to control latch 19. In response to the sampling pulse, the latch 19 receives the count value provided by the counter 23. These latched values correspond to the time stamps PTSaud of the audio occurrences. PTSaud is incorporated into the compressed audio signal provided by the compressor 18. The compressed audio signal is applied to a transmission processor 17 which divides the signal into data packets for transmission purposes and adds some ancillary operations to combat noise. Audio transport packets provided by the processor 17 are provided to a multiplexer 16 which time multiplexes the audio and video transport packets. In the figure, separate transport processors are shown in the audio and video signal processing channels. For systems with moderate data rates, the functions of both transport processors and the multiplexer 16 may be included in a single transport processor.

System controller 21 is a device programmed to coordinate the variable states of the various processing components. Note that the controller 21, the compressors 11 and 18, the transport processors 13 and 17, and the rate buffer 14 may or may not operate asynchronously by means of a common clock device as long as appropriate handshaking is provided between the processing elements. However, both compressors drive the PTS value from the same reference counter 23, thus forming an accurate timing relationship between the two compressed signals in the compressed output signal.

Fig. 2 shows an exemplary receiver apparatus embodying the present invention, in which modem 200 performs the inverse function of modem 15 and rate buffer 206 actually performs the inverse function of rate buffer 14. The reverse transport processor 202 separates the respective transport packets by service and allocates the active portions of the respective packets in different memory blocks of the rate buffer 206. In doing so, the active portion of each transmitted data packet signal is separated from the auxiliary data, which is provided to controller 210. In another arrangement a separate transport processor may be included in each processing channel and arranged to identify and process data relating only to the respective channel.

The compressed video data from rate buffer 206 enters video decompressor 214. Rate buffer 206 receives compressed video data at a non-uniform rate and provides the data to decompressor 214 upon request. The decompressor is responsive to the compressed video signal to produce a non-compressed video signal for display or storage, etc. in a suitable display or storage device (not shown).

The compressed audio data from the inverse transport processor 202 is provided to a rate buffer 206, which provides a compressed audio signal to an audio decompressor 212 according to a system protocol. The decompressor pair 212 is responsive to the compressed audio signal to produce a non-compressed audio signal for playback or storage, etc. in a suitable speaker or storage device (not shown).

The inverse processor 202 also provides SCR and control signals from the auxiliary transmission data to the system clock generator 208. A clock generator is responsive to these signals for generating a system clock signal that is synchronized with at least the transport processor operation. The system clock signal is provided to the receiver system controller 210 to control the timing of the appropriate processing elements.

Fig. 3 shows details of an exemplary clock generator 208. Data from the receiver modem 200 is sent to the reverse transport processor 202' which includes the auxiliary data packet detector 31. The reverse transport processor 202' separates transport header data from the active portion of each transport packet. Processor 202' is responsive to the transmission of the header data to demultiplex the desired active portions of the associated audio and video program components and the active portions of the associated auxiliary data. The audiovisual and auxiliary active portions are written in separate memory blocks of the rate buffer 206. Each of the individual memory blocks operates as a first-in-first-out memory or FIFO, writing data when it is obtained from the modem, and reading data when it is requested by the corresponding component signal processor (not shown). The SCRs present in a particular assistance data packet are routed and stored in the memory component 34.

The ancillary data packet detector 31 may be a matched filter for identifying code words representing ancillary transmission data packets including SCRs and generating a control pulse in the presence of a transmission data packet including such data. This control pulse is used to take the count value currently displayed by the local counter 36 at a time exactly related to the detection time and store it in the latch 35. The local counter 36 is used to count the pulses provided by the voltage controlled oscillator 37. Counter 36 is modulo M, which may (but need not) be equal to the modulo of the corresponding counter in the decoder (counter 23). If M is different from N, the difference may be included in the error equation.

The voltage controlled oscillator 37 is controlled by an error signal provided by a clock controller 39, which is filtered by a low pass filter 38. The error signal is generated in the following manner. The SCR arriving at time n is denoted SCRn and the local count value simultaneously taken in latch 35 is denoted LCRn. The clock controller reads the successive values of SCR and LCR and forms an error signal E proportional to the difference:

E*|SCR_n-SCR_n-1|-|LCR_n-LCR_n-1|

the error signal E is used to adjust the frequency of the voltage controlled oscillator 37 towards being equal to the difference. As previously described, the negative error due to the inclusion of the modulo counter is negligible. The error signal generated by the clock controller 39 may be a pulse width modulated signal which may be converted into an analog error signal using a low pass filter 38 comprised of analog components.

The limitation of the present system is that the counters at both ends of the system count the same frequencies or even multiples thereof. This requires that the nominal frequency of the voltage controlled oscillator be very close to the frequency of the system clock of the encoder.

The above method provides fairly fast synchronization but may cause long-term errors. The long time error LTE is proportional to the difference:

LTE*|LCR_n-LCR₀|-|SCR_n-SCR₀|

for example, where SCRO and LCCo are the first occurrence of an SCR and the latched value in the corresponding receiver counter. Nominally the error signals E and LTE will vary in separate steps. Thus, once the system is "synchronized," the error signal will vary by one unit around zero. The preferred synchronization method is to start the control of the vco with the error signal E until a one unit variation in the error signal E occurs, and then switch to controlling the vco with the long time error signal LTE.

At least the transport processor and the rate buffer may be operated with the system clock signal provided by the VCXO 37. Since it is synchronized in frequency to at least the decoder system clock, there is virtually no overflow or underflow of the rate buffer due to clock timing errors.

Reference is again made to fig. 2 describing audio/video synchronization. Wherein the time stamp of occurrence PTSvid is included in the compressed video signal in relation to the predetermined video data. PTSvid indicates the relative time of the relevant video to be displayed. Similarly, the compressed audio signal includes a presentation time stamp PTSaud, which is associated with the audio to be played back at the time associated with the respective PTSaud. Since the individual samples are determined at different times, the comparison may not be made directly at the receivers PTSaud and PTSVid to provide a/V synchronization. Each PTS value is compared to a continuous time base, which is the receiver's clock provided by the VCXO 37. This is accomplished by sampling the local count LCR generated by the system clock 208 to obtain a local time stamp.

When data associated with the corresponding PTS appears, the LCR is sampled. For example, audio decompressor 212 issues a PTSaud when outputting individual audio frames for playback. At these times, the control signal causes latch 220 to sample the LCR, the value of which will be denoted as LAS as the local audio marker. Similarly, when the video decompressor provides a frame of video for display, it provides a PTSvid and a control pulse that causes latch 222 to store the current value of the LCR. These LCR values are indicative LVS for local videomarks.

LAS and the corresponding PTSaud are fed to respective inputs of a subtractor 218, the subtractor 218 generating a signal Δ a-PTS according to the following relation:

ΔA-PTS＝PTSaud-LAS

LVS and the corresponding PTSvid are supplied to respective inputs of a subtractor 217, the subtractor 217 generating a signal Δ V-PTS according to the following relation:

ΔV-PTS＝PTSvid-LAS

the numbers Δ V-PTS and Δ a-PTS are fed to respective inputs of the next subtractor pair 9, and the subtractor 219 generates the a/V synchronization error signal ERRPTS according to the following relation:

ERRPTS＝ΔV-PTS-ΔA-PTS

synchronization of audio and video requires that the a/V synchronization error become zero. Thus, when the difference between the values of the respective audio and video PTSs is equal to the time in units of local reference between the occurrences of the respective PTSs, the audio and video signals will be synchronized.

It should be remembered, however, that if the synchronization error exceeds a certain value according to the available audio decoder memory, the audio and video components will not be synchronized and the attempt to synchronize will result in loss of audio data or undesirable production of reproduced artificially distorted audio. Therefore, a/V synchronization should be suspended for error values greater than a certain threshold.

Based on the error signal ERRPTS, two mechanisms may be employed to adjust a/V synchronization, skip and repeat data portions, and transition clock bias. The fixed intervals of audio, i.e., "frames," are skipped, advancing the audio data stream by a fixed interval relative to the video signal. The repetition (i.e., muting in the absence of data) delays the audio data stream by a fixed interval relative to the video signal. Skipping and repeating audio frames is in many cases audible and therefore can only be used for coarse adjustment of the synchronization. Even so, a brief jump or repetition may be preferred to identify audio/video synchronization errors. If the audio pause is less than 40 milliseconds, then the synchronization error achieved by the skip/repeat coarse adjustment is within +20 milliseconds, which is within industry standards for A/V synchronization. However; this synchronization will deteriorate if the audio transition time base does not match the time base of the signal source. Once the synchronization is coarsely adjusted, the variation in the audio transition clock frequency will be used to further improve the a/V synchronization.

The error signal ERRPTS is applied to a filter and processing component 216. The function of the filter here is to smooth the signal ERRPTS in order to minimize the anomalous effects that can be produced by signal noise. The processing section in block 216 checks the smoothed error signal to determine whether a skip/repeat of audio should be used to perform a coarse synchronization of the audio and video signals and/or whether an adjustment should be made to the frequency of the audio processing to achieve accurate synchronization, or neither adjustment. If it is determined that a coarse synchronization adjustment is necessary, the processor 216 provides a control signal (S/R) to the audio decompressor 212 causing the decompressor to skip or repeat the currently decompressed audio frame. Alternatively, or in addition to the coarse tuning, if it is determined that fine tuning of the synchronization is necessary, the processor 216 provides a control signal to the audio time base 215 to adjust the frequency of the audio processing clock signal.

The flow chart of fig. 4 shows the processing rules in detail. After the system starts at the beginning 400 step, the system monitors (401) whether PTSaud is present in the audio decompressor and if PTSaud is detected, it reads out at step 403 and acquires and stores the local clock reference LAS. If PTSaud is not present, the system monitors the video decompressor for the presence of PTSVid in step 402. If PTSVid occurs, then PTSVid is read out and local clock reference LVS is acquired and stored. When PTSaud and PTSvid have both been read at step 405, ERRPTS is calculated according to the following equation:

ERRPTS＝ΔV-PTS-ΔA-PTS

depending on the size of the delay memory in the audio decoder, the magnitude of the error signal is checked (420) to determine if it is greater than a predetermined maximum value. If the error is greater than this maximum, then a check is made in step 421 to determine how long this condition has existed. If it is greater than a predetermined value, i.e., a time greater than N seconds is selected, the synchronization process is aborted (422). If the condition already exists for less than N seconds, the synchronization continues at step 406. Since the skip and repeat functions function differently for audio memories, the threshold value for N seconds may be different for positive and negative values of the error signal.

The amplitude of the error signal is checked at step 406 to determine if it is greater than, for example, one-half of an audio frame interval. If it is greater than half the audio frame period, the polarity of the error signal is checked in step 407. If the polarity is positive then the current audio frame is repeated at step 409. If the polarity is negative, then the current audio frame is skipped at step 408. After skipping or repeating a frame, the system returns to the starting position to wait for the next occurrence of the PTS.

If the amplitude of the error signal is less than half the audio frame period, step 406, then the error is checked, step 410, to determine if it is greater than zero. If the error is greater than zero, then the error is checked to determine if it is less than the previous error signal at step 412. If less than the previous error signal; it indicates that the system is approaching synchronization and the synchronization control parameters are not changed. The system returns to the start position waiting for the next occurrence of PTS. Conversely, if the error exceeds the previous error signal, the audio system processing clock is adjusted to decrease its frequency at step 414.

If the error is less than zero (negative) at step 410, then it is determined whether it is greater than the previous error signal at step 411. If it is greater than the previous error signal, it also indicates that the system is approaching synchronization and the synchronization control parameters are not changed. Alternatively, if the current error signal is less than the previous error signal, the system further deviates from the frequency and increases the audio processing clock frequency at step 413. After processing steps 411 and 413, the system returns to wait for the next occurrence of PTS. It should be noted in this example that the system only performs a coarse adjustment by skipping or repeating audio frames until the a/V synchronization error is reduced to less than half the audio frame period.

In another embodiment, the filtered error signal is compared to a predetermined threshold related to the size of the respective audio frame. If the error signal is less than the threshold, indicating that the audio-video time error is less than one audio frame, the error signal is sent to the audio timebase circuit 215, which is used to adjust the frequency of the audio signal processing (decompression) clock. Additionally, if the error signal is greater than the threshold, the error signal may be divided by the audio frame period to determine the number of audio frames for which the audio and video signals are misaligned. The integer part of the quotient is fed to the audio decompressor, which is caused to skip or repeat the number of audio frames. The polarity of the error signal will determine whether an audio frame will be skipped or repeated. Nominally the compressed data is placed in a buffer memory before being decoded so that the audio frame can be simply skipped or repeated by controlling the commands that allow memory read/write.

The fractional part of the quotient is fed to an audio timebase circuit 215 which adjusts the audio processing clock to fine tune the a/V synchronization.

The generation rate of the audio PTS is proportional to the processing speed of the audio decompressor. The processing speed of the audio decompressor is directly proportional to the frequency of the clock signal used to operate the audio decompressor. If the audio decompressor's clock frequency is independent of the clock used to operate the video decompressor and can be fine tuned, then the relative rates of audio and video PTS occurrences can be adjusted and the a/V accurately synchronized.

The decompressed audio signal is supplied to a digital-to-analog converter (DAC) 227. The analog output signal from DAC227 is then passed through resistor 228 to an analog processing circuit (not shown). The conductive path of mute transistor 229 is connected between resistor 228 and ground potential. The control electrode of the transistor is connected to the output of the threshold detector 225. A positive control voltage greater than Vbe causes transistor 229 to bin the audio output signal from DAC227 at ground potential, thereby muting the audio signal.

A typical compressed audio signal will comprise a plurality of components such as a left channel signal, a right channel signal, etc. For simplicity, fig. 2 shows only one audio output, however each audio channel will include a muting circuit controlled by a common muting control signal.

Muting of an audio signal is due to various reasons, not just loss of lip sync. The device is characterized in that the device is based on lip motion error to perform mute

The viewer will notice lip sync errors of-20 ms or +40 ms. In the exemplary system shown, the audio is muted if the lip sync error crosses approximately 13 ms. A threshold of 13ms is chosen which is less than 20ms but greater than half of the layer II audio frame of MPEG1 (which is 24 ms). The threshold is chosen to be slightly larger than half of the audio frame because with a/V sync frame hopping and repetition, an initial sync state is possible at half frame (12ms), while a threshold near or less than 12ms will result in synchronization but audio silence. Furthermore, due to uncertainty in the clock and gate sampling of the PTS, a threshold equal to half a frame will result in intermittent silence because of small fluctuations in the calculated lip sync error.

The mute control signal is generated by a threshold detector 225 which monitors the a/V sync error signal from subtractor 219. When the error signal exceeds a value corresponding to 13ms, a mute control value is generated. In order that noise or other pulsing conditions do not cause an erroneous mute signal to be generated, the error signal from subtractor 219 may be low pass filtered before entering threshold detector 225.

The dashed arrows emanating from detector 225 and terminating at DAC227 and audio decompressor 212 represent additional muting possibilities. For example, the mute control signal may be designed to disable the output of the DAC227 or the output of the decompressor 212. In either case, the disabling function will cause each processing element to output a signal having an amplitude value that is one-half the dynamic range of the output signal. The circuit of fig. 2 also shows that video muting (or blanking) can be performed by control of the video DAC 224.

When the synchronization distance is too far from convergence, the mute control may be discontinued. The detector may be designed to compare the error signal with a maximum threshold and to cease muting if the error signal exceeds this threshold, or if it exceeds the maximum threshold for a predetermined time, or if muting occurs simply for a longer time than a predetermined interval. A mute abort control may also be provided by the processor 216 at step 422.

Fig. 5 shows another muting design. In this embodiment, the skip/repeat (S/R) signal generated by filter 216 is used as a basic mute control. This signal is coupled to the muting circuit via an or gate 230 and an and gate 233. The and gate 233 is used as a MUTE override response to a SUSPEND MUTE signal from the processor 216. And gate 233 is symbolic in nature because the suspension of muting will likely be done within the mute control signal generator itself. If in a particular system the fine control used to adjust the audio timing spans a range that includes half of at least one audio frame, a threshold detector 231 may be included to monitor the audio timing fine control signal and generate an auxiliary mute control signal. The auxiliary control signal is also supplied to the muting circuit through the or gate 230.

The apparatus of fig. 5 represents another possible muting circuit, comprising an and gate 226 for selectively supplying the decompressed audio signals from the decompressor pair 212 to a DAC 227. The audio signal is nominally bipolar (AC) and fluctuates above and below a zero value. When in the uncoupled state, the and gate outputs a zero value, which is the middle of the dynamic range of the signal, as required.

Recently, compressed a/V direct broadcast satellite systems have been developed in which a plurality of programs divided into data packets are time-multiplexed and transmitted through a repeater. A particular program includes only one audio signal, avoiding lip sync problems. However, if the system clock is synchronized, unwanted audio may be played back. Thus, another threshold detector 232 may be included to monitor the error signal produced by the clock controller 39 shown in FIG. 3. The threshold detector 232 generates a mute control signal when the error signal generated by the controller indicates a frequency deviation from the lock state, e.g., 0.2. The mute control signal is sent to the or gate 230 for audio muting; until the system clock is substantially synchronized with the corresponding encoding system clock. Similarly, a detection means may be connected to measure the frequency offset of the audio time base 215 in order to generate a further mute signal which is ored in the gate 230.

Claims (11)

1. A receiver apparatus for processing compressed audio/video signals, characterized by:

a detector (200, 202, 206) for providing said compressed audio/video signal;

an audio decompressor (212) responsive to said compressed audio/video signal for providing a decompressed audio signal;

a video decompressor (214) responsive to said compressed audio/video signal for providing a decompressed video signal;

an error detector (217) 222 responsive to the time stamps provided by the decompressed audio signal and the decompressed video signal for generating an error signal which is a measure of the non-synchronization of the associated decompressed audio and decompressed video signals;

a processor (216) controls said audio decompressor to skip or repeat segments of the decompressed audio signal for synchronizing associated decompressed audio and video components in response to a first range of values of said error signal and to prevent synchronization of associated decompressed audio and video components in response to the error signal being greater than said first range.

2. The apparatus of claim 1, wherein said processor comprises:

a timing circuit for timing the duration of said error signal greater than said first range; and

wherein said processor prevents synchronization of the associated decompressed audio and video components when the duration of said error signal is greater than said first range for more than a predetermined period of time.

3. The apparatus of claim 1 further characterized in that the muting circuit is operative to mute a given range of the decompressed audio signal of said error signal in response to said error signal.

4. The apparatus of claim 3, wherein said muting means comprises:

a threshold detector responsive to said error signal for generating a control signal having a first or second state, respectively, when said error signal is greater than or less than said predetermined threshold value; and

signal clamping means responsive to said control signal for passing said decompressed audio signal when said control signal exhibits said second state and for providing a substitute value for said decompressed audio signal when said control signal exhibits said first state.

5. The apparatus of claim 4, further characterized by:

synchronization circuitry responsive to said compressed audio/video signal for generating a system clock signal having a predetermined relationship to an encoder system clock signal used in the generation of said compressed audio/video signal, and a detector for providing a further error signal which is a measure of the non-synchronization of said system clock signal;

a further threshold detector responsive to said further error signal for generating a control signal having a first or second state, respectively, when said further error signal is greater than or less than said predetermined threshold value; and

or arithmetic circuitry for combining said control signals from said threshold and further threshold detectors.

6. The apparatus of claim 1 wherein said error detector is a lip sync detector.

7. The apparatus of claim 1, wherein the audio and video components of said audio/video signal include respective time stamps PTSaud and PTSvid determined at predetermined times and are associated with an encoder system clock, and said audio and video decompressor provides said time stamps PTSaud and PTSvid using associated decompressed audio and video signals, said error detector comprising:

a local source of clock signals;

determining means for determining the time T occurring between the respective time stamps PTSaud and PTSvid in the period of said local clock signal;

calculating means for calculating the difference between the respective time stamps PTSaud and PTSvid and comparing this difference with said time T to generate an A/V synchronization error signal.

8. The apparatus of claim 1 wherein the audio and video components of said audio/video signal include time stamps PTSaud and PTSvid, respectively, determined at predetermined times and are associated with an encoder system clock, and said audio and video decompressors provide said time stamps PTSaud and PTSvid using associated decompressed audio and video signals, and said detecting means generates said error signal as a function of the difference between said PTSaud and PTSvid for the associated decompressed audio and video.

9. A method of synchronizing audio and video components in a compressed audio/video receiver, characterized by:

determining a value representative of the asynchronous timing of the decompressed audio and video signals;

if said value is less than a predetermined time, synchronizing the decompressed audio and video and providing synchronized or partially synchronized decompressed audio and video output signals; and

if said value is greater than said predetermined time, the synchronous processing of the decompressed audio and video signals is prevented/suspended and unsynchronized decompressed audio and video output signals are provided.

10. The method of synchronizing audio and video components of claim 9, further characterized by the step of: determining a value of duration greater than said predetermined time; and

the synchronization of said decompressed audio and video signals is suspended only if said duration is greater than a predetermined duration.

11. The method of synchronizing audio and video components of claim 9, further characterized by the step of:

comparing a value representative of the timing with a range of values;

if said value is greater than another predetermined time, muting said audio signal and effecting synchronization of said system.