HK1087279A

HK1087279A - Method and system for compensating for phase variations intermittently introduced into communication signals by enabling or disabling an amplifier

Info

Publication number: HK1087279A
Application number: HK06109206.5A
Authority: HK
Inventors: 艾佩斯兰‧戴米尔; 利昂德‧卡萨凯费许; 坦毕尔‧哈克
Original assignee: 美商内数位科技公司
Priority date: 2003-06-06
Filing date: 2004-05-05
Publication date: 2006-10-06

Description

Method and system for compensating for phase variations of intermittently-intervening communication signals by enabling or disabling amplifiers

Technical Field

The present invention generally relates to wireless communication systems. And more particularly to Digital Signal Processing (DSP) techniques for compensating for phase variations associated with switching an amplifier on or off.

Background

In a conventional phase sensitive communication system, a receiver uses amplifiers to control the power level of a Radio Frequency (RF) and/or Intermediate Frequency (IF) communication signal. Typically, one or more amplifiers (i.e., gain stages) are used to amplify the communication signal. Low Noise Amplifiers (LNAs) are preferred because they have a low noise figure (noise floor) and therefore they do not significantly increase the noise floor of the communication system.

Since the communication signals have different power levels when received, these amplifiers are intermittently switched on or off, which results in a considerable phase deviation being introduced into the communication signal. These phase deviations degrade the performance of the phase sensitive communication system. Therefore, there is a need for a method and system for canceling phase deviation of a communication signal caused by switching an amplifier on or off.

Disclosure of Invention

The present invention is embodied in a communication system that includes an amplifier (i.e., gain stage), a receiver, an analog-to-digital converter (ADC), and an insertion phase variation compensation module. The amplifier receives a communication signal. If the amplifier is enabled, the amplifier amplifies the communication signal and outputs the amplified communication signal to the receiver. If the amplifier is disabled, the amplifier sends the communication signal to the receiver without amplifying the communication signal. The receiver outputs an analog complex signal to the ADC. The ADC outputs a digital complex signal to the insertion phase variation compensation module that cancels the effect of a phase offset intermittently introduced into the communication signal by the amplifier being enabled or disabled (i.e., open or closed). The analog and digital complex signals each include in-phase (I) and quadrature signal components.

An amplification control signal is supplied to the amplifier on an intermittent basis. The amplification control signal switches the amplifier on or off. A phase offset estimate is provided to the insertion phase variation compensation module as a function of the amplification control signal.

The insertion phase variation compensation module may receive the digital I and Q signal components from the ADC and output altered digital I and Q signal components having different phase characteristics than the digital I and Q signal components. The communication system may further comprise a modem receiving said altered digital I and Q signal components. The modem may include a processor that generates the amplification control signal. The processor can calculate how much power is being input to the ADC.

The communication system may further include a look-up table (LUT) in communication with the processor and the insertion phase variation compensation module. The LUT may receive the amplified signal from the processor and provide an estimate of phase deviation of a function of the amplification control signal to the insertion phase variation compensation module. The provided estimate may include a Sin function and a Cos function of a phase offset x. The insertion phase variation compensation module may have a real (Re) input associated with a digital I signal component and an imaginary (Im) input associated with a Q signal component, and based on the estimate provided by the LUT, the insertion phase variation compensation module may output an I signal component having a phase adjusted according to a function [ cos (x) xre ] - [ sin (x) xmi ] and a Q signal component having a phase adjusted according to a function [ sin (x) xre ] + cos (x) xmi ]. The communication signal may include first and second time slots separated by a guard period. The amplification control signal may be provided to the amplifier during the guard period that occurs after data in the first time slot has been received and processed by the amplifier, and in response may cause the amplifier to be enabled or disabled. When the data in the first time slot is received by the amplifier which is disabled, the data in the second time slot can be received by the amplifier which is enabled. When the data in the first time slot is received by the enabled amplifier, the data in the second time slot is received by the disabled amplifier. Also, the estimated phase offset value may be provided to the insertion phase variation compensation module during the guard period, and the insertion phase variation compensation module may adjust the phase of the communication signal according to the provided estimated value.

Drawings

The invention will be better understood from the following description of a preferred embodiment, given by way of example, with reference to the accompanying drawings, in which:

FIG. 1 is a block diagram of a communication system including an insertion phase variation compensation module that cancels phase offset intermittently introduced into a communication signal by switching an amplifier on or off, in accordance with the present invention;

FIG. 2 depicts an exemplary communication signal having a guard period that occurs between two time slots;

FIG. 3 is an exemplary configuration of the insertion phase variation compensation module of FIG. 1;

FIG. 4 is a flow chart of a method including steps for canceling the effects of phase offset intermittently introduced into a communication signal by disabling the amplifier of FIG. 1;

FIG. 5 is a flow chart of a method including steps for canceling the effects of phase offset intermittently introduced into a communication signal by enabling the amplifier of FIG. 1;

FIG. 6 is a flow chart of a method including steps for canceling the effects of phase offset intermittently introduced into a communication signal by disabling the amplifier of FIG. 1 during a guard period; and is

Fig. 7 is a flow chart of a method including steps for canceling the effects of phase offset intermittently introduced into a communication signal by enabling the amplifier of fig. 1 during a guard period.

Detailed Description

The present invention provides a method and system for canceling phase differences introduced into an RF or IF communication signal (i.e., data stream) by switching an amplifier on or off.

Preferably, the disclosed method and system are embodied in a wireless transmit/receive unit (WTRU). Hereinafter, a WTRU includes, but is not limited to, a user equipment, a mobile base station, a fixed or mobile subscriber unit, pager, or any other type of device capable of operating in a wireless environment. The features of the present invention may be embodied within an Integrated Circuit (IC) or may be programmed into a circuit comprising a multitude of interconnecting components.

The present invention is applicable to communication systems employing Time Division Duplex (TDD), Time Division Multiple Access (TDMA), Frequency Division Duplex (FDD), Code Division Multiple Access (CDMA), CDMA 2000, time division synchronous CDMA (tdscdma), Orthogonal Frequency Division Multiplexing (OFDM), or similar technologies.

Fig. 1 is a block diagram of a communication system 100 operating in accordance with the present invention. The communication system 100 includes an amplifier (e.g., LNA)105, a receiver 110, an analog-to-digital converter (ADC)115, an insertion phase variation compensation module 120, and a modem 125. The amplifier 105 and ADC 115 may be incorporated within the receiver 110. In addition, the insertion phase variation compensation module 120 may be incorporated into the modem 125. The modem 125 includes a processor 130 that calculates how much power is delivered to the ADC 115. The modem 125 receives the complex I and Q signal components 135, 140 from the insertion phase variation compensation module 120 and outputs an amplification control signal 145 to the amplifier 105 via the processor 130. The amplification control signal 145 enables or disables the amplifier 105. The amplifier 105 may be comprised of a single gain stage or multiple gain stages (i.e., the amplifier 105 may represent a series of amplifiers, all controlled by the same amplification control signal 145). When the amplifier 105 is disabled (i.e., turned off), an RF and/or IF communication signal 150 passes through the amplifier 105 without amplification. When the amplifier 105 is enabled (i.e., enabled), the communication signal 150 is thus amplified. The amplification control signal 145 is also output from the processor 130 to a look-up table (LUT)155 that provides an estimate of the phase offset inserted into the communication signal 150 to the insertion phase variation compensation module 120 using the amplification control signal 145.

Each time amplifier 105 is enabled or disabled, an associated phase offset (i.e., phase rotation) may be introduced into communication signal 150. This phase deviation is considerable. For example, the phase of the communication signal 150 may vary by a large amount (i.e., rotated by 80 or 90 degrees). Thus, the phase offset estimate (x) of a function of the state of the amplifier 105 (i.e., open or closed) can be determined by accessing the LUT 155, a predefined polynomial, or any other method that maps the state of the amplifier (i.e., enabled or disabled) to an estimate of the phase offset.

Fig. 2 depicts an example of a communication signal 150 having a guard period 205 that occurs between two time slots 210, 215. The exemplary communication signal may be employed assuming that communication system 100 is a TDD, TDMA, TDSCDMA, or other time-slotted communication system. In this example, data within communication signal 150 is communicated via time slots 210 and 215. Thus, the only time that the amplifier 105 can be enabled or disabled without disrupting the data in the time slots 210, 215 of the communication signal 150 is the guard period 205. Any phase offset caused by switching the amplifier 105 to be on or off is cancelled by inserting the phase variation compensation module during the same guard period 205 so that the phase offset or its cancellation does not degrade the data received in the time slot 215 occurring after the end of the guard period 205.

Fig. 3 illustrates an example configuration of the insertion phase variation compensation module 120 that rotates the phase characteristics of the I and Q signal components of a digital complex signal output from the ADC 115 based on the amplification control signal 145 to cancel the effects of phase offset intermittently introduced into a communication signal 150 by the amplifier 105. Therefore, the modem 125 is not affected by such phase deviations, and the performance of the communication system 100 does not deteriorate.

As shown in fig. 3, the insertion phase variation compensation module 120 includes multipliers 305, 310, 315, 320 and adders 325 and 330. The insertion phase variation compensation module 120 receives a real (Re) I signal component 350 and an imaginary (jIm) Q signal component 360 from the ADC 115 and rotates the phase of the signal components Re and jIm by x degrees (e) as shown in equation 1 below^jx)：

(Re+jIm)×e^jx＝(Re+jIm)×[Cos(x)+jSin(x)]Equation 1

Result of real part outputAs shown in equation 2 below:

equation 2

Note that if x approaches zero, cos (x) is 1.0 and sin (x) is x, as shown in equation 3 below:

equation 3

Result of imaginary outputAs shown in equation 4 below:

equation 4

Note that if x approaches zero, cos (x) is 1.0 and sin (x) is x, as shown in equation 5 below:

equation 5

Thus, as shown in equation 2, the real signal component 350 is multiplied by a cos (x) function 380, as specified by LUT 155, via multiplier 315, and the imaginary signal component 360 is multiplied by a sin (x) function 370, also as specified by LUT 155, via multiplier 310, whereby the output of multiplier 310 is subtracted from the output of multiplier 315 by adder 325. Furthermore, as shown in equation 4, the real signal component 350 is multiplied by a sin (x) function 370, as specified by LUT 155, via multiplier 305, and the imaginary signal component 360 is multiplied by a cos (x) function 380, also specified by LUT 155, via multiplier 320, whereby the output of multiplier 320 is added to the output of multiplier 305 by adder 330.

In one embodiment, only a single phase compensation value is required to compensate for phase offset caused by switching the amplifier 105 on or off, whereby the insertion phase variation compensation module 120 can be disabled by physical switching hardware when the amplifier 105 is on. When the insertion phase variation compensation module 120 is disabled, the corresponding input and output I and Q signal components of the insertion phase variation compensation module 120 are the same, and the I and Q signal components pass through the insertion phase variation compensation module 120 unaffected. When the amplifier 105 is open, the insertion phase variation compensation module 120 is enabled, causing it to compensate for the phase deviation caused by switching the amplifier 105 open with a phase adjustment value X. When the amplifier 105 is switched back, the insertion phase variation compensation module 120 is disabled again, causing the phase to change from X to zero, thereby compensating for the phase offset caused by switching the amplifier 105 back.

Alternatively, instead of using additional switching hardware, the insertion phase variation compensation module 120 (i.e., a zero phase offset or a phase offset x) may be controlled in a manner similar to that described above using a first register (i.e., memory location) for storing sin (x) and a second register (i.e., memory location) for storing cos (x).

In another embodiment, the insertion phase variation compensation module 120 may be set to any desired phase compensation value using a plurality of registers. The plurality of registers may include a first register for storing Sin (x), a second register for storing Sin (0), a third register for storing Cos (x), and a fourth register for storing Cos (0), where Sin (0) is 0 and Cos (0) is 1. If the amplifier 105 is switched to the channel, the data in the second and fourth registers is applied as a phase rotation error to the insertion phase variation compensation module 120. If the amplifier 105 is switched off, the data in the first and third registers is applied as a phase rotation error to the insertion phase variation compensation module 120.

Fig. 4 is a flow chart of a method 400 that includes steps for canceling the effects of phase offset intermittently introduced into the communication signal 150 by disabling the amplifier 105. The method 400 may be implemented in any type of communication system. In step 405, the amplification control signal 145 is provided to an enabled amplifier 105 that is configured to receive a communication signal 150. In step 410, enabled amplifier 105 is disabled in response to amplification control signal 145, thereby causing a phase offset to be intermittently introduced into communication signal 150. In step 415, the estimate of the phase deviation as a function of the amplification control signal 145 is provided to the insertion phase variation compensation module 120. In step 420, the insertion phase variation compensation module 120 adjusts the phase of the communication signal 150 according to the provided estimate.

Fig. 5 is a flow chart of a method 500 comprising steps for canceling the effects of phase offset intermittently introduced into communication signal 150 by enabling amplifier 105. The method 500 may be implemented in any type of communication system. In step 505, the amplification control signal 145 is provided to a disabled amplifier 105 that is programmed to receive a communication signal 150. In step 510, disabled amplifier 105 is enabled in response to amplification control signal 145, thereby causing a phase offset to be intermittently introduced into communication signal 150. In step 515, an estimate of the phase deviation of a function of the amplification control signal 145 is provided to the insertion phase variation compensation module 120. In step 520, the insertion phase variation compensation module 120 adjusts the phase of the communication signal 150 according to the provided estimate.

Fig. 6 is a flow chart of a method 600 that includes steps for canceling the effects of phase offset intermittently introduced into the communication signal 150 by disabling the amplifier 105 during a guard period. The method 600 may be implemented in a TDD, TDMA, TDSCDMA, or other slotted communication system. In step 605, data in a first time slot 210 of a communication signal 150 is received and processed by an enabled amplifier 105. In step 610, the amplification control signal 145 is provided to the enabled amplifier 105 during a guard period 205 occurring after the first time slot 210 ends. In step 615, enabled amplifier 105 is disabled during guard period 205 in response to amplification control signal 145, thereby causing a phase offset to intermittently intervene in communication signal 150. In step 620, an estimate of the phase deviation of a function of the amplification control signal 145 is provided to the insertion phase variation compensation module 120 during the guard period 205. In step 625, the insertion phase variation compensation module 120 adjusts the phase of the communication signal 150 within the guard period 205 according to the provided estimate. In step 630, data in a second time slot 215 of the communication signal 150 is received and processed by the disabled amplifier 105 after the guard period 205.

Fig. 7 is a flow chart of a method 700 that includes steps for canceling the effects of phase offset intermittently introduced into communication signal 150 by enabling amplifier 105 during a guard period. The method 700 may be implemented in a TDD, TDMA, TDSCDMA, or other slotted communication system. In step 705, data in a first time slot 210 of a communication signal 150 is received and processed by a disabled amplifier 105. In step 710, the amplification control signal 145 is provided to the disabled amplifier 105 during a guard period 205 occurring after the first time slot 210 ends. In step 715, disabled amplifier 105 is enabled in response to amplification control signal 145 during guard period 205, thereby causing a phase offset to be intermittently introduced into communication signal 150. In step 720, an estimate of the phase offset of a function of the amplification control signal 145 is provided to the insertion phase variation compensation module 120 during the guard period 205. In step 725, the insertion phase variation compensation module 120 adjusts the phase of the communication signal 150 during the guard period 205 according to the provided estimate. In step 730, data in a second time slot 215 of the communication signal 150 is received and processed by the enabled amplifier 105 after the guard period 205.

While the preferred embodiments have been particularly shown and described with reference to the accompanying drawings, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the scope of the invention described above.

Claims

1. A communication system, comprising:

(a) an amplifier receiving a communication signal, the amplifier being controlled by an amplification control signal; and

(b) an insertion phase variation compensation module that cancels the effect of phase deviation intermittently interposed in the communication signal when the amplifier is enabled or disabled in response to the amplification control signal, wherein the communication signal is amplified by the amplifier when the amplifier is enabled and the communication signal is not amplified by the amplifier when the amplifier is disabled.

2. The communication system of claim 1, further comprising:

(c) a receiver that receives the communication signal from the amplifier and outputs analog in-phase (I) and quadrature (Q) signal components; and

(d) an analog-to-digital converter (ADC) receives the analog I and Q signal components from the receiver and converts the analog signal components to digital I and Q signal components.

3. The communication system of claim 2 wherein the insertion phase variation compensation module receives the digital I and Q signal components from the ADC and outputs altered I and Q signal components having different phase characteristics than the digital I and Q signal components, the communication system further comprising:

(e) a modem receiving said altered I and Q signal components, said modem comprising a processor generating said amplification control signal.

4. The communication system of claim 3 wherein the processor calculates how much power is input to the ADC.

5. The communication system of claim 2 wherein the insertion phase variation compensation module receives the digital I and Q signal components from the ADC and modifies the phase characteristics of the digital I and Q signal components as a function of the amplification control signal.

6. The communication system of claim 1, further comprising:

(c) a processor for generating the amplification control signal; and

(d) a look-up table (LUT) in communication with the processor and the insertion phase variation compensation module, wherein the LUT receives the amplification control signal from the processor and provides a phase offset estimate to the insertion phase variation compensation module as a function of the amplification control signal.

7. The communication system of claim 6 wherein the provided estimate comprises a Sin function and a Cos function of a phase offset, x.

8. The communication system of claim 7 wherein the insertion phase variation compensation module has a real (Re) input associated with a digital in-phase (I) signal component and an imaginary (Im) input associated with a quadrature (Q) signal component, and the insertion phase variation compensation module outputs an I signal component having a phase adjusted according to a function [ cos (x) x Re ] - [ sin (x) x Im ] based on the estimate provided by the LUT.

9. The communication system of claim 7 wherein the insertion phase variation compensation module has a real input (Re) associated with a digital in-phase (I) signal component and an imaginary input (Im) associated with a quadrature (Q) signal component, and the insertion phase variation compensation module outputs a Q signal component having a phase adjusted according to a function [ sin (x) xre ] + [ cos (x) xm ] based on the estimate provided by the LUT.

10. The communication system of claim 1 wherein the communication signal includes first and second time slots separated by a guard period, and the amplification control signal is provided to the amplifier during the guard period after data in the first time slot has been received and processed by the amplifier.

11. The communication system of claim 1 wherein the communication signal includes first and second time slots separated by a guard period, and the amplifier is enabled or disabled during the guard period after data occurring in the first time slot has been received and processed by the amplifier.

12. The communication system of claim 11 wherein data in the second time slot is received by the amplifier that is enabled when data in the first time slot is received by the amplifier that is disabled.

13. The communication system of claim 11 wherein data in the second time slot is received by the amplifier that is disabled when data in the first time slot is received by the amplifier that is enabled.

14. The communication system of claim 6 wherein the communication signal includes first and second time slots separated by a guard period, and the estimate of the phase offset is provided to the insertion phase variation compensation module during the guard period after data in the first time slot has been received and processed by the amplifier.

15. The communication system of claim 6 wherein the communication signal includes first and second time slots separated by a guard period, and the insertion phase variation compensation module adjusts the phase of the communication signal in accordance with the provided estimate during the guard period after data in the first time slot has been received and processed by the amplifier.

16. A wireless transmit/receive unit (WTRU), comprising:

17. The WTRU of claim 16, further comprising:

18. The WTRU of claim 17 wherein the insertion phase variation compensation module receives the digital I and Q signal components from the ADC and outputs altered I and Q signal components having different phase characteristics than the digital I and Q signal components, the WTRU further comprising:

19. The WTRU of claim 18 wherein the processor calculates how much power is input to the ADC.

20. The WTRU of claim 17 wherein the insertion phase variation compensation module receives the digital I and Q signal components from the ADC and modifies the phase characteristics of the digital I and Q signal components as a function of the amplification control signal.

21. The WTRU of claim 16, further comprising:

(c) a processor for generating the amplification control signal; and

22. The WTRU of claim 21 wherein the provided estimate includes a Sin function and a Cos function of a phase offset, x.

23. The WTRU of claim 22 wherein the insertion phase variation compensation module has a real (Re) input associated with a digital in-phase (I) signal component and an imaginary (Im) input associated with a quadrature (Q) signal component, and the insertion phase variation compensation module outputs an I signal component having a phase adjusted according to a function [ cos (x) xre ] - [ sin (x) xm ] based on the estimate provided by the LUT.

24. The WTRU of claim 22 wherein the insertion phase variation compensation module has a real input (Re) associated with a digital in-phase (I) signal component and an imaginary input (Im) associated with a quadrature (Q) signal component, and the insertion phase variation compensation module outputs a Q signal component having a phase adjusted according to a function [ sin (x) xre ] + [ cos (x) xm ] based on the estimate provided by the LUT.

25. The WTRU of claim 16 wherein the communication signal includes first and second time slots separated by a guard period and the amplification control signal is provided to the amplifier during the guard period after data in the first time slot has been received and processed by the amplifier.

26. The WTRU of claim 25 wherein data in the second time slot is received by the amplifier that is enabled when data in the first time slot is received by the amplifier that is disabled.

27. The WTRU of claim 25 wherein data in the second timeslot is received by the amplifier that is disabled when data in the first timeslot is received by the amplifier that is enabled.

28. The WTRU of claim 16 wherein the communication signal includes first and second time slots separated by a guard period, and the amplifier is enabled or disabled during the guard period after data in the first time slot has been received and processed by the amplifier.

29. The WTRU of claim 21 wherein the communication signal includes first and second time slots separated by a guard period and the estimate of the phase offset is provided to the insertion phase variation compensation module during the guard period after data in the first time slot has been received and processed by the amplifier.

30. The WTRU of claim 21 wherein the communication signal includes first and second time slots separated by a guard period, and the insertion phase variation compensation module adjusts the phase of the communication signal based on the provided estimate during the guard period after data in the first time slot has been received and processed by the amplifier.

31. An Integrated Circuit (IC), comprising:

32. The IC of claim 31, further comprising:

(d) an analog-to-digital converter (ADC) receives the analog I and Q signal components from the receiver and converts the analog I and Q signal components to digital I and Q signal components.

33. The IC of claim 32 wherein the insertion phase variation compensation module receives the digital I and Q signal components from the ADC and outputs altered I and Q signal components having different phase characteristics than the digital I and Q signal components, the IC further comprising:

34. The IC of claim 33 wherein the processor calculates how much power is input to the ADC.

35. The IC of claim 32 wherein the insertion phase variation compensation module receives the digital I and Q signal components from the ADC and modifies the phase characteristics of the digital I and Q signal components as a function of the amplification control signal.

36. The IC of claim 31, further comprising:

(c) a processor for generating the amplification control signal; and

(d) a look-up table (LUT) in communication with the processor and the insertion phase variation compensation module, wherein the LUT receives the amplification control signal from the processor and provides the phase offset estimate to the insertion phase variation compensation module as a function of the amplification control signal.

37. The IC of claim 36 wherein the provided estimate comprises a Sin function and a Cos function of a phase offset, x.

38. The IC of claim 37 wherein the insertion phase variation compensation module has a real (Re) input associated with a digital in-phase (I) signal component and an imaginary (Im) input associated with a quadrature (Q) signal component, and the insertion phase variation compensation module outputs an I signal component having a phase adjusted according to functions [ cos (x) xre ] - [ sin (x) xm ] based on the estimate provided by the LUT.

39. The IC of claim 37 wherein the insertion-phase-variation compensation module has a real input (Re) associated with a digital in-phase (I) signal component and an imaginary input (Im) associated with a quadrature (Q) signal component, and the insertion-phase-variation compensation module outputs a Q signal component having a phase adjusted according to a function [ sin (x) xre ] + [ cos (x) xm ] based on the estimate provided by the LUT.

40. The IC of claim 31 wherein the communication signal includes first and second time slots separated by a guard period, and the amplification control signal is provided to the amplifier during the guard period after data in the first time slot has been received and processed by the amplifier.

41. The IC of claim 40 wherein data in the second time slot is received by the amplifier that is enabled when data in the first time slot is received by the amplifier that is disabled.

42. The IC of claim 40 wherein data in the second time slot is received by the amplifier that is disabled when data in the first time slot is received by the amplifier that is enabled.

43. The IC of claim 37 wherein the communication signal includes first and second time slots separated by a guard period, and the amplifier is enabled or disabled during the guard period after data in the first time slot has been received and processed by the amplifier.

44. The IC of claim 36 wherein the communication signal includes first and second time slots separated by a guard period, and the estimate of the phase offset is provided to the insertion phase variation compensation module during the guard period after data in the first time slot has been received and processed by the amplifier.

45. The IC of claim 36 wherein the communication signal includes first and second time slots separated by a guard period, and the insertion phase variation compensation module adjusts the phase of the communication signal in accordance with the provided estimate during the guard period after data in the first time slot has been received and processed by the amplifier.

46. A method for use in a communication system including an amplifier and an inserted phase variation compensation module to counteract the effects of phase deviation intermittently introduced into a communication signal by the amplifier being enabled, the method comprising:

(a) providing an amplification control signal to the amplifier when the amplifier is disabled;

(b) enabling the amplifier in response to the amplification control signal, the enabling of the amplifier causing a phase offset to be introduced into the communication signal;

(c) providing a phase offset estimate to the insertion phase variation compensation module as a function of the amplification control signal; and is

(d) The insertion phase variation compensation module adjusts the phase of the communication signal according to the provided estimation value.

47. The method of claim 46 wherein the provided estimate comprises a Sin function and a Cos function of a phase offset, x.

48. The method of claim 47 wherein the insertion phase variation compensation module has a real (Re) input associated with a digital in-phase (I) signal component and an imaginary (Im) input associated with a quadrature (Q) signal component, and the insertion phase variation compensation module outputs an I signal component having a phase adjusted according to the functions [ Cos (x) xRe ] - [ sin (x) xIm ] based on the estimates provided by the LUT.

49. The method of claim 47 wherein the insertion-phase-variation compensation module has a real input (Re) associated with a digital in-phase (I) signal component and an imaginary input (Im) associated with a quadrature (Q) signal component, and the insertion-phase-variation compensation module outputs a Q signal component having a phase adjusted according to a function [ sin (x) xRe ] + [ Cos (x) xIm ] based on the estimate provided by the LUT.

50. The method of claim 46 wherein the communication signal includes first and second time slots separated by a guard period, and at least one of steps (a) - (d) is performed during the guard period after data in the first time slot has been received and processed by the amplifier.

51. The method of claim 46 wherein the communication signal includes first and second time slots separated by a guard period such that data in the first time slot is received by the amplifier that is disabled and data in the second time slot is received by the amplifier that is enabled.

52. A method for use in a communication system including an amplifier and an inserted phase variation compensation module to counteract the effects of phase deviation intermittently introduced into a communication signal due to disabling of the amplifier, the method comprising:

(a) providing an amplification control signal to the amplifier when the amplifier is enabled;

(b) disabling the amplifier in response to the amplification control signal, the disabling of the amplifier causing a phase offset to be introduced into the communication signal;

53. The method of claim 52 wherein the provided estimates include a Sin function and a Cos function of a phase offset, x.

54. The method of claim 53 wherein the insertion phase variation compensation module has a real (Re) input associated with a digital in-phase (I) signal component and an imaginary (Im) input associated with a quadrature (Q) signal component, and the insertion phase variation compensation module outputs an I signal component having a phase adjusted according to the functions [ Cos (x) xRe ] - [ sin (x) xIm ] based on the estimates provided by the LUT.

55. The method of claim 53 wherein the insertion-phase-variation compensation module has a real input (Re) associated with a digital in-phase (I) signal component and an imaginary input (Im) associated with a quadrature (Q) signal component, and the insertion-phase-variation compensation module outputs a Q signal component having a phase adjusted according to a function [ sin (x) xRe ] + [ Cos (x) xIm ] based on the estimate provided by the LUT.

56. The method of claim 52 wherein the communication signal includes first and second time slots separated by a guard period, and at least one of steps (a) - (d) is performed during the guard period after data in the first time slot has been received and processed by the amplifier.

57. The method of claim 52 wherein the communication signal includes first and second time slots separated by a guard period such that data in the first time slot is received by the amplifier that is enabled and data in the second time slot is received by the amplifier that is disabled.