HK1066657B - Spread spectrum interference canceler system and method - Google Patents

Description

Spread spectrum interference canceller system

Technical Field

The present invention relates to spread spectrum communications, and more particularly, to an interference canceller and method for reducing interference in a direct sequence code division multiple access receiver.

Background

Direct sequence code division multiple access spread spectrum communication systems are limited in their capacity due to interference from other co-existing users. This situation is exacerbated if adaptive power control is not used, or is used but is not optimal.

Code division multiple access is interference limited. The more users that transmit simultaneously, the higher the Bit Error Rate (BER). Increased capacity requires Forward Error Correction (FEC) coding, which in turn increases data rates and limits capacity.

Disclosure of Invention

It is a general object of the present invention to reduce noise due to N-1 interfering signals in a direct sequence code division multiple access receiver.

The present invention provides a spread spectrum interference canceller system for reducing interference in a spread spectrum receiver having N channels, wherein each of the N channels is identified by a different chip-code signal, the spread spectrum interference canceller system comprising:

a code division multiple access/DS detector for detecting a received spread spectrum signal having a plurality of channels and despreading it into a plurality of despread spread spectrum channels;

a plurality of serially connected interference cancellers, wherein a first interference canceller samples the plurality of despread spread spectrum channels from the code division multiple access/DS detector to obtain and holds sample values that remain unchanged as inputs until a next sample and outputs a corresponding plurality of estimates for the plurality of channels, wherein each interference canceller samples the corresponding plurality of estimates output by a preceding interference canceller to obtain and hold the plurality of sample values that remain unchanged as respective inputs until the next sample and generates a subsequent corresponding plurality of estimates;

n combining means for combining the respective plurality of estimates of the plurality of interference cancellers, a first combining means for combining a first channel output of the code division multiple access/DS detector and a first plurality of estimates of a first channel to produce a first average output of channel 1, a second combining means for combining a second channel output of the code division multiple access/DS detector and a second plurality of estimates of a second channel to produce a second average output of channel 2, and an mth combining means for combining an mth channel output of the code division multiple access/DS detector and an mth plurality of estimates of an mth channel of the N channels to produce an mth average output of channel M; and

n decision devices, a first decision device for deciding a first average output of the channel 1, a second decision device for deciding a second average output of the channel 2, and an mth decision device for deciding an mth average output of an mth channel among the N channels.

Additional objects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate preferred embodiments of the invention and together with the description, serve to explain the principles of the invention.

Fig. 1 is a block diagram of a spread spectrum CDMA interference canceller using a correlator;

fig. 2 is a block diagram of a spread spectrum CDMA interference canceller for processing multiple channels using a correlator;

fig. 3 is a block diagram of a spread spectrum CDMA interference canceller using a matcher;

fig. 4 is a block diagram of a spread spectrum CDMA interference canceller for processing multiple channels using a matcher;

fig. 5 is a block diagram of a spread spectrum CDMA interference canceller with multiple iterations for processing multiple channels;

FIG. 6 shows the theoretical performance characteristics for Eb/η of 6 dB;

FIG. 7 shows the theoretical performance characteristics for Eb/η of 10 dB;

FIG. 8 shows the theoretical performance characteristics for Eb/η 15 dB;

FIG. 9 shows the theoretical performance characteristics for Eb/η of 20 dB;

FIG. 10 shows the theoretical performance characteristics for Eb/η 25 dB;

FIG. 11 shows the theoretical performance characteristics for Eb/η of 30 dB;

fig. 12 is a block diagram of an interference canceller connected together;

fig. 13 is a block diagram incorporating the output of the interference canceller of fig. 12;

fig. 14 shows the simulated performance characteristics of EbN 30dB for asynchronous, 100 PG, same power;

fig. 15 shows the simulated performance characteristics of EbN 30dB for asynchronous, 100 PG, same power;

fig. 16 shows the simulated performance characteristics of EbN 30dB for asynchronous, 100 PG, same power;

fig. 17 shows the simulated performance characteristics of EbN 30dB for asynchronous, 100 PG, same power.

Detailed Description

Reference will now be made in detail to the preferred embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to the like elements throughout the several views.

In the exemplary arrangement shown in fig. 1, a spread spectrum Code Division Multiple Access (CDMA) interference canceller is provided that reduces interference in a spread spectrum CDMA receiver having N channels. The present invention may also operate in a spread spectrum Code Division Multiplexing (CDM) system. Thus, to avoid loss of generality, the term spread-spectrum CDMA signal as used herein includes spread-spectrum CDMA signals and spread-spectrum CDM signals. In personal communication services, the interference canceller may be used in a base station or in a remote unit such as a handset.

Fig. 1 shows an interference canceller for a first channel defined by a first chip code signal. The interference canceller includes a plurality of despreading means, a plurality of timing means, a plurality of spread spectrum processing means, subtracting means, and first channel despreading means.

The plurality of despreading means despreads the received spread CDMA signal into a plurality of despread signals, respectively, using a plurality of chip-code signals. In fig. 1, a plurality of despreading means are represented as first despreading means, second despreading means, through nth despreading means. The first de-inclusion means comprises a first correlator, which is embodied, for example, as a first mixer 51, a first chip code signal generator 52, and a first integrator 54. The first integrator 54 may alternatively be a first low pass filter or a first band pass filter. A first mixer 51 is connected between the input 41 and a first chip code signal generator 52 and a first integrator 54.

The second de-inclusion means comprises a second correlator, which is embodied, for example, as a second mixer 61, a second chip-code signal generator 62, and a second integrator 64. The second integrator 64 may alternatively be a second low pass filter or a second band pass filter. A second mixer 61 is connected between the input 41 and a second chip-code signal generator 62 and a second integrator 64.

The nth deconstructing device is depicted as an nth correlator, shown, for example, as an nth mixer 71, an nth chip signal generator 72, and an nth integrator 74. The nth integrator 74 may alternatively be an nth low pass filter or an nth band pass filter. The nth mixer 71 is connected between the input 41 and the nth chip signal generator 72 and the nth integrator 74.

The first through nth despreading means may be implemented by any means capable of despreading a channel in a spread signal, as is well known in the art.

The plurality of timing means may be embodied as delay means 53, 63, 73. The first delay means 53 have a delay time T which is approximately the same as the integration time Tb of the first integrator 54 or the time constant of the first low-pass filter or the first band-pass filter. The second delay means 63 have a delay time T which is approximately the same as the integration time Tb of the second integrator 64 or the time constant of the second low-pass filter or the second band-pass filter. Similarly, the nth device 73 has a delay time T that is approximately the same as the nth integration time Tb, or the nth filter or the time constant of the nth filter. The integration times of the first integrator 54, the second integrator 64 to the nth integrator 74 are the same. If low pass filters are used, typically the time constants of the first low pass filter, the second low pass filter to the nth filter are the same. If band pass filters are used, the time constants of the first band pass filter, the second band pass filter, and the nth filter are the same.

The plurality of spread spectrum processing means use a timed version (i.e., delayed version) of the plurality of chip-code signals for spread spectrum processing the plurality of despread signals, respectively, each chip-code signal corresponding to a respective despread signal. The plurality of spread spectrum processing devices are embodied as, for example, a first processing mixer 55, a second processing mixer 65, and an nth processing mixer 75. The first processing mixer 55 is connected to a first integrator 54 and to the first chip-code signal generator 52 via first delay means 53. The second processing mixer 65 is connected to the second integrator 64 and to the second chip-code signal generator 62 via second delay means 63. The nth mixer 75 is connected to the nth integrator 74 and to the nth chip signal generator 72 through the nth delay device 73.

In order to reduce interference to a channel using an ith signal of a spread CDMA signal, a subtracting means subtracts each of the N-1 spread-processed despread signals which do not correspond to the ith channel from the spread CDMA signal. The subtracting means thus generates a subtraction signal. The subtracting means is denoted a first subtractor 150. The subtracting means 150 is shown connected to the output of the second processing mixer 65 via the nth mixer 75. Furthermore, the first subtracting means 150 is connected to the input 41 via a main delaying means 48.

The ith channel despreading means despreads the subtracted signal into an ith signal using the ith chip code signal. The first channel despreading means is shown as a first channel mixer 147. The first channel mixer 147 is connected to the first delay means 53 and the first subtractor 150. The first channel integrator 146 is connected to a first channel mixer 147.

The first chip signal generator 52, the second chip signal generator 62 to the Nth chip signal generator 72 generate a first chip signal, a second chip signal to an Nth chip signal, respectively. As is well known in the art, the term "chip-code signal" is used herein to refer to a spread signal of a spread spectrum signal. A typical chip-code signal is generated from a pseudo-random (PN) sequence. The first chip code signal, the second chip code signal through the Nth chip code signal can be generated from the first PN sequence, the second PN sequence through the Nth PN sequence respectively. The first PN sequence is defined or generated by a first chip code word, and the second PN sequence is defined or generated by a second chip code word until the Nth PN sequence is defined or generated by an Nth chip code word. Each of the first chip codeword, the second chip codeword, through the nth chip codeword is different, i.e., different from each other. In general, a chip codeword can be the actual order of a PN sequence or used to define the adjustments used to generate the PN sequence. The adjustment may be, for example, a delay tap of a shift register.

A first mixer 51 despreads a received spread-spectrum CDMA signal at input 41 as a first despread signal, using the first chip-code signal generated by the first chip-code signal generator 52. The first despread signal from the first mixer 51 is filtered by the first integrator 54. The first integrator 54 integrates over a time Tb, such as a time interval of one bit symbol. At the same time, the first chip signal is delayed by a delay means 53 by a time T. The delay time T is approximately equal to the integration time Tb plus the system or component delay. The system or component delay is typically small compared to the integration time Tb.

The delayed version of the first chip signal is processed with the first despread signal from the output of the first integrator 54 using a first spreading mixer 55. The output of the first spreading mixer 55 is fed to subtractors other than the first subtracter 150 for processing the second to nth channels of the spread CDMA signal.

To reduce interference to the first channel of the spread-spectrum CDMA signal, the received spread-spectrum CDMA signal is processed by the second through nth despreaders, as described below. A second channel of the spread CDMA signal is despread by the second despreading means. In a second mixer 61, a second chip-code signal generated by a second chip-code signal generator 62 despreads a second channel of the spread-spectrum CDMA signal. The despread second channel is filtered by a second integrator 64. The output of the second integrator 64 is a second despread signal. The second despread signal is spread by a second processing mixer 65 using a delayed version of the second chip-code signal. The second chip-code signal is delayed by delay means 63. The delay means 63 delays the second chip-code signal by a time T. A second channel mixer 65 spreads a timed, i.e., delayed, version of the second chip-code signal with a filtered version of the second spread-spectrum channel from the second integrator 64. The term "spread spectrum processing" as used herein includes any method of generating a spread spectrum signal by mixing or modulating a signal with a chip code signal. The spread spectrum processing may be implemented by a multiplication device, an exclusive or gate, a matched filter, or any device or circuit known in the art.

Similarly, the nth channel of the spread CDMA signal is despread by the nth despreading means. Thus, the received spread-spectrum CDMA signal has an nth channel despread by the nth mixer 71 by mixing the spread-spectrum CDMA signal with the nth chip signal from the nth chip signal generator 72. The output of the nth mixer 71 is filtered by an nth integrator 74. The output of the nth integrator 74 as the nth despread signal is a despread and filtered version of the nth channel of the spread spectrum CDMA signal. And performing spread spectrum processing on the Nth despread signal by using the delayed version of the Nth chip signal. The nth chip signal is delayed by the delay means 73. The nth channel mixer 75 spreads the timed version, i.e., the delayed version, of the nth chip signal with the nth despread signal.

In the first subtractor 150, each output of the second processing mixer 65 through the nth processing mixer 75 is subtracted from the timed version, i.e., the delayed version, of the spread spectrum CDMA signal from the input 41. The delay of the spread spectrum CDMA signal is timed by the first main delay device 48. Typically, the delay of the first main delay means 48 is a time T, which is approximately equal to the integration time of the first integrator 54 to the nth integrator 74.

A first subtracted signal is generated at the output of the first subtractor 150. The first subtracted signal for the first channel of the spread-spectrum CDMA signal is defined herein as the delayed version of the spread-spectrum CDMA signal minus the outputs from the second through nth processing mixers 65 through 75. The second to nth subtraction signals are defined identically.

The delayed version of the first chip code signal from the output of the first delay means 53 is used to despread the output of the first subtractor 150. Thus, the first subtracted signal is despread by the first channel mixer 147 using the first chip signal. The output of the first channel mixer 147 is filtered by a first channel integrator 146. This produces an output estimate d1 of the first channel of the spread-spectrum CDMA signal.

As shown in fig. 2, a plurality of subtractors 150, 250, 350, 450 may be suitably connected to the input 41 of fig. 1 and the first expansion mixer 55, the second expansion mixer 65, the third expansion mixer through the nth expansion mixer 75. The plurality of subtractors 150, 250, 350, 450 are also connected to the main delay means 48 leading from the input 41. This arrangement produces a first subtraction signal from the first subtractor 150; generating a second subtracted signal from the second subtractor 250; generating a third subtracted signal from the third subtractor 350; until an nth subtracted signal is generated from the nth subtractor 450.

The outputs of the first subtractor 150, the second subtractor 250, the third subtractor 350 through the nth subtractor 450 are each coupled to a respective first channel mixer 147, second channel mixer 247, third channel mixer 347, through the nth channel mixer 447. Each channel mixer is coupled to a delayed version of the first chip-code signal g1(T-T), the second chip-code signal g2(T-T), the third chip-code signal g3(T-T), through the nth chip-code signal gN (T-T). The output of each of the respective first channel mixer 147, second channel mixer 247, third channel mixer 347, through nth channel mixer 447 is connected to the first channel integrator 146, second channel integrator 246, third channel integrator 346, through nth channel integrator 446, respectively. At the output of each of the channel integrators, a corresponding first channel estimate d1, a second channel estimate d2, a third channel estimate d3, through N channel estimates dN are generated.

Referring to fig. 1, the use of the present invention is illustrated with a first channel of a spread spectrum CDMA signal under the condition that the operation of the second through nth CDMA channels is the same. The received spread spectrum CDMA signal at input 41 is delayed by delay means 48 and fed to a first subtractor 150. The spread-spectrum CDMA signal has second through nth channels despread with the second chip-code signal by the second mixer 61, through the nth mixer 71. Corresponding second through Nth chip-code signals are generated by the second through Nth chip-code signal generators 62 through 72. The second through nth channels are despread and filtered by the second through nth integrators 64 through 74, respectively. Despreading partially or completely removes the non-despread channels at each output of the second integrator 64 through the nth integrator 74.

In a preferred embodiment, each of the chip-code signals for the first chip-code signal generator 52, the second chip-code signal generator 62 through the nth chip-code signal generator 72 are orthogonal to each other. However, the use of orthogonal chip-code signals is not required for the operation of the present invention. When orthogonal chip-code signals are used, the despread signal possesses a respective channel plus noise at the output of each integrator. With orthogonal chip-code signals, the mixer theoretically eliminates channels that are orthogonal to the despread signal. The respective channels are spread-spectrum processed by respective processing mixers.

At the outputs of the second through nth processing mixers 65 through 75 are the delayed versions of the second through nth channels plus the noise components contained therein. Then, each of the second through nth channels is subtracted from the received spread spectrum CDMA signal by the first subtractor 150. The first subtracted signal is despread with the delayed version of the first chip signal by the first channel mixer 147 and filtered by the first channel filter 146. Thus, the second through nth channels plus noise components aligned with these channels are subtracted from the received spread-spectrum CDMA signal before despreading the first channel of the spread-spectrum CDMA signal. As shown in fig. 3, an alternative embodiment of a spread spectrum CDMA interference canceller includes a plurality of first despreading means, a plurality of spreading processing means, subtracting means, and second despreading means. In fig. 3, the plurality of despreading means are represented as first despreading means, second despreading means through nth despreading means. The first despreading means is embodied as a first matched filter 154. The first matched filter 154 has an impulse response matched to the first chip code signal for spreading processing and defining a first channel of a spread-spectrum CDMA signal. A first matched filter 154 is connected to input 41.

The second despreading means is embodied as a second matched filter 164. The second matched filter 164 has an impulse response matched to the second chip-code signal for spreading processing and defining a second channel of the spread-spectrum CDMA signal. A second matched filter 164 is connected to input 41.

The nth despreading means is embodied as an nth matched filter 174. The nth matched filter 174 has an impulse response matched to the nth chip signal for spreading processing and defining the nth channel of the spread CDMA signal. An nth matched filter 174 is connected to input 41.

The term "matched filter" as used herein includes any type of matched filter that can be matched to a chip-code signal. The matched filter may be a digital filter or an analog filter. Surface Acoustic Wave (SAW) devices may be used in Radio Frequency (RF) or Intermediate Frequency (IF). Digital signal processors and Application Specific Integration Circuits (ASICs) with matched filters may be used in RF, IF, or baseband frequencies.

In fig. 3, the plurality of spread spectrum processing means are embodied as a first processing filter 55, a second processing filter 65 to an nth processing filter 75. The first processing filter 55 may be connected to the first chip-signal generator 52 via a first adjusting means 97. The second processing filter 55 may be connected to the second chip-code signal generator 62 via a second adjusting means 98. The nth processing filter 75 may be coupled to the nth chip signal generator 72 through an nth adjusting means 99. The first adjusting means 97, the second adjusting means 98 to the nth adjusting means 99 are optional and are used for adjustment of aligning the first chip signal, the second chip signal to the nth chip signal with the first despread signal, the second despread signal to the nth despread signal output from the first matched filter 154, the second matched filter 164 to the nth matched filter 174, respectively.

The subtracting means is represented as a first subtractor 150. The first subtractor 150 is connected to the outputs of the second processing mixer 65 to the nth processing mixer 75. Furthermore, the first subtractor 150 is also connected to the input 41 via the main delay means 48.

The first channel despreading means is shown as a first channel matched filter 126. The first channel matched filter 126 is connected to a first subtractor 150. The first channel matched filter 126 has an impulse response matched to the first chip code signal.

A first channel of a received spread spectrum CDMA signal at input 41 is despread by the first matched filter 154. The first matched filter 154 has an impulse response matched to the first chip code signal. The first chip code signal defines a first channel of the spread spectrum CDMA signal and is used by a first chip code signal generator 52. The first chip code signal is delayed by the adjustment means 97 by an adjustment time tau. The first processing mixer 55 performs spread spectrum processing on the output of the first matched filter 154 with the first chip signal. The output of the first processing mixer 55 is fed to subtractors other than the first subtracter 150 for processing the second through nth channels of the spread CDMA signal.

In order to reduce interference to the first spread spectrum channel, the received spread spectrum CDMA signal is processed by the second through nth despreading means as described below. The second matched filter 164 has an impulse response matched to the second chip-code signal. The second chip-code signal defines a second channel of the spread-spectrum CDMA signal and is used by a second chip-code signal generator 62. The second matched filter 164 despreads a second channel of the spread CDMA signal. The output of the second matched filter 164 is a second despread signal. The second despread signal triggers the second chip-code signal generator 62. The second processing mixer 65 also performs spread spectrum processing on the second despread signal using a timed version of the second chip-code signal. The timing of the second chip-code signal triggers a second despread signal from the second matched filter 164.

Similarly, the nth despreading means despreads an nth channel of the spread CDMA signal. Thus, the received spread-spectrum CDMA signal has an nth channel despread by the nth matched filter 174. The output of the nth matched filter 174 is an nth despread signal, i.e., a despread and filtered version of the nth channel of the spread CDMA signal. And carrying out spread spectrum processing on the N despread signal by a timing version of the N chip code signal. The timing of the nth chip signal is triggered by the nth despread signal from the nth filter 174. The nth processing mixer 75 performs a spreading process on the timed version of the nth chip code signal using the nth despread signal.

In the first subtractor 150, each output of the second processing mixer 65 through the nth processing mixer 75 is subtracted from the delayed version of the spread-spectrum CDMA signal from the input 41. The delay of the spread spectrum CDMA signal is timed by the first main delay device 48. The delay means 48 is set to be aligned with the despread signals of the second to nth spread processes subtracted from the spread CDMA signal. This produces a first subtracted signal at the output of the first subtractor 150. The subtracted signal is despread by the first channel matched filter 126. This produces an output estimate d1 of the first channel of the spread-spectrum CDMA signal.

As shown in fig. 4, a plurality of subtractors 150, 250, 350, 450 may be suitably connected to the outputs of the first processing mixer, the second processing mixer, the third processing mixer through the nth processing mixer, and to the main delay device 48 leading from the input 41. The first subtraction signal is output by the first subtractor 150; the second subtraction signal is output by the second subtractor 250; the third subtracted signal is output by the third subtractor 350; until the nth subtracted signal is output by the nth subtractor 450.

The outputs of the first subtractor 150, the second subtractor 250, the third subtractor 350 through the nth subtractor 450 are each coupled to a respective first channel matched filter 126, second channel matched filter 226, third channel filter 326, through the nth channel filter 426. The first channel matched filter 126, the second channel matched filter 226, the third channel filter 326, through the nth channel filter 426 have impulse responses matched to the first chip signal, the second chip signal, the third chip signal through the nth chip signal of the spread-spectrum CDMA signal that define the first channel, the second channel, the third channel, through the nth channel, respectively. At each output of the respective first channel matched filter 126, second channel matched filter 226, third channel filter 326 to nth channel filter 426, an estimate d1, a second channel estimate d2, a third channel estimate d3 to nth channel estimate dN of the respective first channel is generated.

The use of the present invention is illustrated with the first channel of a spread spectrum CDMA signal under the condition that the operation of the second through nth CDMA channels is the same. The received spread spectrum CDMA signal at input 41 is delayed by delay means 48 and fed to a first subtractor 150. The spread CDMA signal has second to nth channels despread by the second to nth matched filters 164 to 174. This despreading removes other CDMA channels from the respective despread channels. In a preferred embodiment, each chip-code signal used by the first channel, the second channel through the nth channel is orthogonal to the other chip-code signals. At the output of the first matched filter 154, the second matched filter 164 through the nth matched filter 174 are the first despread signal, the second despread signal through the nth despread signal, and noise.

Each channel is spread by each processing mixer. Thus, at the output of the second through nth processing mixers 65 through 75 are the delayed versions of the second through nth despread signals plus the noise components contained therein. Each spread-processed despread signal is then subtracted from the received spread-spectrum CDMA signal by a first subtractor 150. This produces a first subtracted signal. The first subtracted signal is despread using the first channel matched filter 126. Thus, the second through nth channels plus noise components aligned with these channels are subtracted from the received spread-spectrum CDMA signal before despreading the first channel of the spread-spectrum CDMA signal.

As is known in the art, the correlator and matched filter may be interchanged to achieve the same function. Fig. 1 to 3 show alternative embodiments using correlators or matched filters. Changes may also be made to these settings. For example, the plurality of despreading means may be embodied as a plurality of matched filters, and the channel despreading means may be embodied as one correlator. Alternatively, the plurality of despreading means may be a combination of matched filters and correlators. Furthermore, the spread spectrum processing means may be embodied as a matched filter or SAW, or an xor gate, or other device for mixing the despread signal with the chip-code signal. Any spread-spectrum despreader or demodulator may despread the spread-spectrum CDMA signal, as is known in the art. The particular circuits shown in fig. 1 through 4 illustrate the invention by way of example.

As shown in fig. 5, the concepts taught in fig. 1-4 may be repeated. Fig. 5 shows a first plurality of interference cancellers 511, 512, 513, a second plurality of interference cancellers 521, 522, 523, up to an nth plurality of interference cancellers 531, 532, 533. Each of the plurality of interference cancellers includes the appropriate components already discussed with reference to fig. 1-4. The input is delayed by a delay means in each interference canceller.

The received spread spectrum CDMA signal has interference first cancelled by the first plurality of interference cancellers 511, 512, 513, thereby producing a first set of estimates, namely: the first estimate d11, the second estimate d12, through the N estimate d1N of the first, second through nth channels of the spread spectrum CDMA signal. The first set of estimates can have interference cancelled by the second plurality of interference cancellers 521, 522, 523. The first set of estimates d11, d12, …, d1N of the first channel, the second channel through the nth channel are input to a second plurality of interference cancellers, an interference canceller 521 of the second plurality of interference cancellers, an interference canceller 522 through an nth interference canceller 523. The second plurality of interference cancellers thus produces a second set of estimates of the first channel, second channel through nth channel, i.e., d21, d22, …, d 2N. Similarly, the second set of evaluations can be passed through a third plurality of interference cancellers, and ultimately through the mth set of interference cancellers 531, 532, 533, respectively.

The present invention also includes a method of reducing interference in a spread spectrum CDMA receiver having N chip-code channels. Each of the N channels is identified by a different chip-code signal. The method includes the step of despreading the spread-spectrum CDMA signal with a plurality of chip-code signals into a plurality of despread signals, respectively. A timing version of the plurality of chip-code signals is applied to spread the plurality of despread signals with the chip-code signals corresponding to each despread signal. Subtracting each of the N-1 spread-processed, despread signals from the spread-spectrum CDMA signal, said N-1 spread-processed, despread signals not including the spread-spectrum-processed signal of the ith despread signal, thereby producing a subtracted signal. The subtracted signal is despread to generate an ith channel.

The probability of error Pe for a direct sequence spread spectrum CDMA system is:

where erfc is the complementary error function, SNR is the signal-to-noise ratio, and α is 1 ≦ 2. The value of a depends on how a particular interference canceller system is designed.

The SRN and method after interference cancellation are given by:

where N is the number of channels, PG is the processing gain, R is the number of times the interference canceller is reproduced, Eb is the energy per information bit, and η is the noise spectral density.

Fig. 6 shows the theoretical performance characteristics of the interference canceller and its method when Eb/η is 6 dB. It shows performance characteristics of the SNR versus PG/N that do not conform to the interference canceller. The lowest curve (R ═ 0) is characteristic of no interference cancellers. The improved performance of using one and two interference cancellers as shown in fig. 5 is shown for the curves of R-1 and R-2. When PG/N → 1, there is an SNR that works inefficiently. If PG > N, the output SNR of the interference canceller is close to Eb/η. Furthermore, if (N/PG) R +1, then

SNR→(Eb/η)(1-N/PG)。

Fig. 7 shows the theoretical performance characteristics for Eb/η of 10 dB. Fig. 7 shows that reusing the interference canceller three times can produce a 4dB improvement with N/PG 2.

Fig. 8 shows the theoretical performance characteristics for Eb/η 15 dB. Using this bit energy to noise ratio, reusing the interference canceller twice can yield a 6dB improvement with N/PG 2.

Fig. 9 shows the theoretical performance characteristics for Eb/η of 20 dB. Using this bit energy to noise ratio, reusing the interference canceller twice can yield a 6dB improvement with N/PG 2. Similarly, fig. 10 and 11 show that reusing the interference canceller once can produce a greater than 10dB improvement with N/PG 2.

The invention can be extended to multiple interference cancellers. As shown in fig. 12, a received spread spectrum signal r (t) is despread and detected by CDMA/DS detector 611. Each channel is represented as output O01, O02, O03, …, O0 m. Thus, each output is a despread spread-spectrum channel obtained from the received spread-spectrum signal r (t). Each output of the CDMA/DS detector 611 passes through a plurality of interference cancellers 612, 613, …, 614 connected in series. As previously described, each spread-spectrum channel is processed through interference cancellation. The input to each interference canceller is obtained by sampling and holding the previous stage output once per bit. For channel i, the first interference canceller samples the output of the CDMA/DS detector at time T + τ i. This value is taken as input and kept constant until T ═ 2T + τ i; the next bit value is sampled at that time. The input waveform to the interference canceller is then the estimate di (t- τ i) of the original data waveform di (t- τ i), and the output is the other estimate di (t- τ i). The M spread channel outputs O0i, i 1, 2, …, M are passed through the interference canceller 612 to produce a new corresponding set of channel outputs O1i, i 1, 2, …, M.

As shown in fig. 13, the outputs of a particular spread spectrum channel may be combined, with the outputs being at the output of each interference canceller. Therefore, the combiner 615 may combine the first channel output from the CDMA/DS detector 611 with the output O11 from the first interference canceller 612, the output O21 from the second interference canceller 613, up to the output ON1 from the N-th interference canceller 614. Each output to be combined has a corresponding bit. Thus, each Os1 is inserted with an "s" bit time delay. The combined output then passes through decision device 616. A decision is made for each spread spectrum channel to name the output of each combiner 615, 617, 619 as: a channel 1 average output O1, a channel 2 average output O2, and a channel M average output OM. Each average output passes sequentially through decision device 616, decision device 618, and decision device 620. Preferably, these average outputs have amplification factors Cj that can be varied according to a particular design. In a preferred embodiment, Cj 1/2 j. It allows combining the outputs of the various interference cancellers in a particular way.

Figures 14-17 show simulated performance characteristics of the arrangements of figures 12 and 13. Fig. 14-17 are for an asynchronous channel (the relative time delays are uniformly distributed between 0 and the bit time T), with a processing gain of 100, and all users with the same power and thermal signal-to-noise ratio (Eb/η of 30 dB). Length 8191 Gold codes (Gold codes) are used for PN sequences.

In fig. 14, the performance characteristics of each output stage of fig. 12 are shown. Thus, S0 represents the BER characteristic at the output of the CDMA/DS detector 611, S1 represents the BER characteristic at the output of the interference canceller 612, S2 represents the BER characteristic at the output of the interference canceller 613, and so on. The combination of the outputs of the interference cancellers is not used in determining the performance characteristics shown in fig. 14. Instead, the performance characteristic is to repeatedly use the interference canceller. As indicated, in each of the sequential figures, each figure shows the output of one feature of the CDMA/DS detector 611.

Fig. 15 shows performance characteristics when the outputs of sequential interference cancellers are combined. Which shows the performance characteristics of a particular channel. Thus, curve S0 is the output of CDMA/DS detector 611. The curve S1 represents the BER performance of the average of the outputs of the CDMA/DS detector 611 and the interference canceller 612. Here, C0 ═ C1 ═ 1/2 Cj ═ 0, and j is not equal to 0, 1. Curve S2 represents the average BER performance of the outputs of the interference canceller 613 and 612. The curve S2 is determined by the combiner shown in fig. 13. Here, C0 and C1 are set equal to 1/2, while all other Cj are set to 0. Similarly, curve S3 is the performance of the outputs of the second and third interference cancellers averaged together. Thus, curve S3 is the performance characteristic averaged between the outputs of the second and third interference cancellers. Curve S4 is the performance characteristic of the average output of the third and fourth interference cancellers. At a certain moment, only two interference cancellers are used to determine the performance characteristics of the average output of these particular interference cancellers. Fig. 16 shows the conventional outputs of the CDMA/DS detector 611, and the first and second interference cancellers 612, 613. Further, the average output of the CDMA/DS detector 611, and the first interference canceller 612 is denoted as S1 AVG. The average BER performance of the outputs of the first interference canceller 612 and the second interference canceller 613 is represented as an average output S2 AVG.

Fig. 17 shows performance characteristics consistent with those shown in fig. 16, but with signal-to-noise ratios in dB.

It will be apparent to those skilled in the art that various modifications may be made in the spread spectrum CDMA interference canceller and method thereof without departing from the scope and spirit of the invention, and the invention is intended to cover modifications and variations of the spread spectrum CDMA interference canceller and their equivalents as defined in the scope of the appended claims of this application.

Claims (1)

1. A spread spectrum interference canceller system for reducing interference in a spread spectrum receiver having N channels, wherein each of the N channels is identified by a different chip-code signal, the spread spectrum interference canceller system comprising:

a code division multiple access/DS detector for detecting a received spread spectrum signal having a plurality of channels and despreading it into a plurality of despread spread spectrum channels;

a plurality of serially connected interference cancellers, wherein a first interference canceller samples the plurality of despread spread spectrum channels from the code division multiple access/DS detector to obtain and holds sample values that remain unchanged as inputs until a next sample and outputs a corresponding plurality of estimates for the plurality of channels, wherein each interference canceller samples the corresponding plurality of estimates output by a preceding interference canceller to obtain and hold the plurality of sample values that remain unchanged as respective inputs until the next sample and generates a subsequent corresponding plurality of estimates;

n combining means for combining the respective plurality of estimates of the plurality of interference cancellers, a first combining means for combining a first channel output of the code division multiple access/DS detector and a first plurality of estimates of a first channel to produce a first average output of channel 1, a second combining means for combining a second channel output of the code division multiple access/DS detector and a second plurality of estimates of a second channel to produce a second average output of channel 2, and an mth combining means for combining an mth channel output of the code division multiple access/DS detector and an mth plurality of estimates of an mth channel of the N channels to produce an mth average output of channel M; and

n decision devices, a first decision device for deciding a first average output of the channel 1, a second decision device for deciding a second average output of the channel 2, and an mth decision device for deciding an mth average output of an mth channel among the N channels.