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GB2180698A - Bonding integrated circuit chips to substrates - Google Patents

Bonding integrated circuit chips to substrates Download PDF

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Publication number
GB2180698A
GB2180698A GB08622864A GB8622864A GB2180698A GB 2180698 A GB2180698 A GB 2180698A GB 08622864 A GB08622864 A GB 08622864A GB 8622864 A GB8622864 A GB 8622864A GB 2180698 A GB2180698 A GB 2180698A
Authority
GB
United Kingdom
Prior art keywords
adhesive
chip
substrate
connection
conductor paths
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB08622864A
Other versions
GB2180698B (en
GB8622864D0 (en
Inventor
Dr Rolf A Cremers
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Borg Instruments AG
Original Assignee
Borg Instruments AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Borg Instruments AG filed Critical Borg Instruments AG
Publication of GB8622864D0 publication Critical patent/GB8622864D0/en
Publication of GB2180698A publication Critical patent/GB2180698A/en
Application granted granted Critical
Publication of GB2180698B publication Critical patent/GB2180698B/en
Expired legal-status Critical Current

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Classifications

    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1345Conductors connecting electrodes to cell terminals
    • G02F1/13452Conductors connecting driver circuitry and terminals of panels
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/321Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10674Flip chip
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10954Other details of electrical connections
    • H05K2201/10984Component carrying a connection agent, e.g. solder, adhesive
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03Metal processing
    • H05K2203/0338Transferring metal or conductive material other than a circuit pattern, e.g. bump, solder, printed component
    • H10W72/073
    • H10W72/07331
    • H10W72/352

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
  • Optics & Photonics (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Mathematical Physics (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Wire Bonding (AREA)
  • Liquid Crystal (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

A method of conductively attaching a chip to a substrate e.g. a liquid crystal cell includes the step of applying a spot pattern of conductive adhesive to an intermediate carrier. The pattern corresponds to the pattern of the connecting conductors on the chip. Since the intermediate carrier has a low adhesion with the adhesive the adhesive can be transferred to the conductors of the chip by contact and the chip then secured to conducting paths on the substrate. The defined predetermined geometry and the adhesive specification ensures that no short-circuit bridges form. Prior to hardening of the adhesive, a dynamic operational test of the chip can be effected with test-apparatus contacting by way of the conductor paths and if necessary a chip displaying malfunctions can be removed and exchanged. The conductor paths can be produced in thin-film technology and thereby do not represent a restriction for the substrate spacing of liquid-crystal cells which can be produced economically groupwise in a batch process.

Description

SPECIFICATION A method of contacting (applying) chips onto conductor paths, apparatus for carrying out the method and a liquid-crystal cell having bonded-on chips This invention relates to a method for the adhesive contacting or applying of chip connection conductors on conductor paths on a substrate, to apparatusforcarrying outthemethodandtoa liquid-crystal cell having a substrate with conductor paths and chips connected thereto.
As shown in Patent Specification No. EP-OS 111 734, large-area flexible liquid-crystal display mechanisms are fitted with integrated circuits (chips for selective display-element control. For this, the integrated circuit is contacted (applied) in a tape mounting process (tape bonding) with connection conductors fashioned on a film (film leadframe), whereupon the connection conductors are deformed asfaras necessaryoutoftheiroriginal plane and are then punched out ofthe carrierfilm (in orderthen to be contacted or applied with their free ends on conductor paths on a substrate of the liquid-crystal cell).However, in that specification nothing is set forth in more detail with regard to carrying outsucha contacting/applying process; it merely mentions that, advantageously, fastening is effected with the aid of a clamping device or with the aid of an adhesive.
An object of at least some embodiments of the present invention is to provide a method forthis contacting (application of the integrated circuits onto conductor paths) which can be carried out in an operationally reliable mannerwith automatic equipmentand moreespeciallywhich method is also applicable in the case of standard liquid-crystal cells (which cells can be produced in a cost-effective manner in the so-called batch process (see DE-OS 29 21 097) in groups with a spacing of less than 10#i (microns) between the substrate glass plates).
If conventional solder contacting (application) is used, 'Chip-on-Glass Technology' requires the application of a solderable conductor-path layer, on the front side of the salient edge ofthe rearward cell substrate (glass plate or othertransparent circuit carrier; see for example EP-OS 79 045), which for technological reasons regarding the soldering process necessitates a minimum thickness of 1 5S. If, already, this layerthickness is preset between the individual cell regions during the Batch Process, the flat rigid substrate plates can, of course, no long be brought close enough to one another to a distance of under 101l.which is an optimum requirement for TN-liquid-crystal cells which are rich in contrast.
There are indeed contacting (application) possibilities, not based on a soldering process, in thin-layertechnologies, in which the layerthickness no longer precludes the desirable proximity distance of the glass plates to one another; here, however, the method oftape-bonding,which is preferred in production technology respects, is not usable -this results in severe restrictions on the geometry of the connection positions to the chip. Such restrictions inconveniently limit the design of large-area complex displays. Since, moreover, the chips (which are still not bonded) are not seemingly checkable dynamicallyforfunctioning,the reject losses are very great; since onlythe already equipped individual cells can be subjected to a dynamic operational test and in the event of faulty behaviour ofthe chips the cell as a whole is rejected.
In recognition ofthese factors, a further object of at least some embodiments of the present invention is to provide, with the possibility of economical large-scale production of even complexdisplays,the possibility of a dynamic test of the control structural elements (chips), and in the event of a fault, also provide for the discrete exchange thereof, without resulting in rejection of the complete, costly display.
According to the present invention there is provided a method for the adhesive contacting or applying of chip (integrated circuit) connection conductors on conductor paths on a substrate, characterised in that an adhesive-spots pattern consisting of defined amounts of electrically conductively adjusted adhesive material is applied in accordance with the position ofthe contacting ends of the connection conductors on the conductor paths to an intermediate carrier, in that a chip bonded to its connection conductors is brought into contact at its connection-conductor contacting ends with the adhesive spots on the intermediate carrier, in that the chip, with the thus taken up or transfered adhesive material at the contacting ends of its connection conductors, is superimposed onto the substrate conductor paths, and in that there then these adhesive connections are hardened/cured.
Further according to the present invention there is provided apparatus for carrying out the method in accordance with the immediately preceding paragraph comprising an intermediate carrierwith a surface on which an electrically conductive adhesive has low adhesion therewith, a transfer device for applying adhesive spots consisting of dosed or measured amounts of adhesive in a predetermined geometric distribution, and a handling device for superimposing the connection ends of the connection conductors bonded onto a chip and for the subsequent transfer thereof onto the connection region of conductor paths on a substrate.
Still further according to the present invention there is provided a liquid-crystal cell, producible in the batch process, with conductor paths, fashioned onthefrontsurface of a laterally protruding edge of its rearwa rd substrate, forthe connection of control circuits, characterised in that the circuits (chips) with film-bonded connection conductors (leadframe) are fastened by means of an electrically-conductive adhesive at the connection-conductor contacting ends on the conductor paths.
The fundamental idea ofthe present invention is thus based on undertaking the adhesive contacting (proposed as such without details for a liquid-crystal cell of specific requirements, namely for a large-area flexible cell) by means of a conductive adhesive which is applied in dosed manner, in a predetermined geometric pattern in accordance with the connection regions between the chip connection conductors and the substrate conductor paths, and which preferably does not immediately harden.
Therefore, aftertape-bonded chips are superimposed on the substrate a dynamic electrical operationaltestcan be carried out and, in the event of malfunction of a chip, the chip can be removed from the adhesion position and replaced by another chip, without having to additionally reject the substrate (more especially of a complex cell with several possible circuits,forexampleforthe complex matrix control). Malfunctions caused by short-circuits between the closely (typically 0.17 mm) adjacent contacting positions by adhesive bridge formations are reliably avoided, since the contacting ends in each case have only the adhesive composition associated in a quantity wise and geometrically defined manner, which is transfered to the contacting location ofthe substrate conductor paths.
Suitable conductive adhesives are commercially available; an example of a particular instance of use is described in Patent Specification DE-PS 25 34 783.
Thus forthin liquid-crystal cells, the Chip-on-Glass mounting is ensured whilst maintaining a quite substantial advantage ofthe technology offilm bonding. This advantage lies more especially in the fact thatthere are seemingly unrestricted connection possibilites of conductor-path bus structures at bond positions (pads) situated arbitrarily on the chip, without cross or intersection problems in the conductive path, because the individual conductor paths, as a result of the spatial deformation of the connection conductors upon separating out from the carrierfilm, are bridged arcuately in a second plane.
Also, these bridgings are not short-circuited, for instance, by surplus conductive adhesive; because the adhesive composition is transferred, quantitywise and locally in a very accurately optimised manner, directly by means ofthe connection conductor ends themselves into the final contacting locations on the substrate conductor paths.
Usually, only after the electrical operational test has been carried out is the hardening ofthe conduction-adhesive contact points effected, for example through the effect of time ortemperature.
Also, this contacting method can be utilised in an equally advantageous manner outside the field of production of liquid-crystal cells having rigid substrates, thus for example in the case of the aforedescribed flexible liquid-crystal cell; or generally on any desired conductor-path substrate even outside the field of liquid-crystal cell technology.
However, a particular advantage is realised in multi-cell production of liquid-crystal cells in the batch process, since, as stated, practically no restriction ofthe substrate spacing is essential for the contacting requirements. On the contrary, the conductor paths can be applied in thethin-layer technique to the substrate (in the form ofthe one of the two glass plates), without requiring special costly surface treatments before or afterthe application; and the substrate spacing may be ensured in a conventional manner, for example by spacer bodies in the layerofthe single-frameterminal adhesive.
Thus, the job of equipping the display with circuits (chips) can be moved from the producer of the glass cells to the displayfinisher, who may have recourse to any desired commercially-available control circuits and can thus optimisethe liquid-crystal cell functionally and in price respects; without having to take into accountspecial features which are typical in glass-cell production but which are outside the intervention possibilities of the display supplier.
Advantageously,forthetransfer ofthe seemingly optimised amount of adhesive onto the contacting ends ofthe chip connection conductors punched out from the tape film, an appropriate spot or dot pattern is transferred by means of a conventional screen -printing process to the intermediate carrier; which carrier has seemingly the least possible adhesion forthe conductive adhesive material used and is advantageously designed as a plate ortape madeofsilicon-containing material (such asfor instance Teflon); this allows the intermediate carrier to be cleaned again after each procedure ofthe take-up of the adhesive spots by the contacting ends of the chip connection conductors without great expense, and the carrier can be printed afresh with the dot or spot pattern.The printing process is less time-consuming if several spot patterns are applied directly and offset side-by-side and are taken up by the contacting ends of consecutive chips, until all the patterns are worked offthe carrier and after cleaning of the intermediate carrier are again imprinted anew.
The typical contacting spacings lie in the order of magnitude of 0.017 mm and can thus be readily accommodated within the tolerance necessaryfor the electrical contacting and mechanical retention, by means of automatic screen-printing equipment with a suitably adjusted viscosity of the conductive adhesive, without it leading to drop and bridge formation. If contacting ends were immersed into a store of adhesive this would not be ensured, on the contrary, at the individual contacting ends different and mostly unnecessarily large amounts of conductive adhesive would adhere and would by virtue ofthe surface tension or, in the course ofthe drop formation, lead to electrical short-circuit bridge formation.On the other hand, the at all times substantially identical amounts of adhesive, optimised by the screen-printing pattern forthe individual connection points, leads to the same mechanical and thermal strength of all ofthe contacting locations and thus, after the hardening of the conductive adhesive, to an exceedingly functionally reliable mechanical and electrical connection Asapparatusforcarrying out the method, the intermediate carrier is, advantageously, designed as a changing/alternating table (Wechseltisch) or as a deflection belt and operated following on the commercially available tape-bond automatic machines, where also the electrical measuring and testing equipment for operational testing (with the adhesive contact connection not yet hardened) can be directly connected up. Automatic handling machines can be provided, in order, in the case of defective electrical circuits, to remove the chip with its film leadframe from the conductor-path substrate priortothe hardening of the adhesive connection again -afterwhich (possiblyaftertreatmentofthe remaining adhesive residues) a renewed equipping and testing procedure can be carried out.
The scope of the present invention should not be unduly limited by the choice of particular terminology and use of any specific term may extend to, or be replaced by, any reasonable equivalent or generic term where sensible. For example the term 'chip' is intended to cover 'microchip' or 'integrated circuit' and 'connection conductor' may be replaced by 'terminal'. Additionally, particular features, method or function appertaining thereto or combinations thereof may be individually patentably inventive.
Therefore, still further according to the present invention there is provided a method of assembling the terminals of an integrated circuit onto a substrate orsupporthaving electrically conductive pathsor tracks, said method comprising: (a) applying a predetermined amount of adhesive in a spot pattern or matrix onto a carrier or sheet, the adhesive itself being selected to have a lower adhesion with the carrier orsheetthan with the terminals of the integrated circuit, (b) introducing the terminals of said circuit to the spot pattern or matrix on the carrierorsheetsothat dosed amounts of adhesive material are desposited on the terminals substantially simultaneously, (c) subsequently moving the terminals away from the carrier or sheet and applying the adhesive coated terminals onto the conductive paths or tracks to adheretheterminals to the substrate orsupport.
Preferably, the adhesive material is such that itwill not cure immediately in orderto provide enough timeforan operational test to be carried outonthe substrate/support and circuit. Should the test prove negative the terminals can be removed along with the integrated circuit and a new integrated circuit provided rather than the circuit and substrate/support assembly having to be rejected.
Preferably, a plurality of integrated circuits are assembled automatically in position and a plurality of adhesive spot patterns are, preferably, applied to the same carrier or sheet for associated integrated circuits. The carrier may be such that it can be cleaned and re-used.
The present invention may extend to apparatus for carrying outthe above method and to an integrated circuit and substrate/support assembly when made by the method.

Claims (15)

1. A method forthe adhesive contacting or applying of chip (Integrated circuit) connection conductors on conductor paths on a substrate, characterised in that an adhesive-spots pattern consisting of defined amounts of electrically conductively adjusted adhesive material is applied in accordance with the position of the contacting ends ofthe connection conductors on the conductor paths to an intermediate carrier, in that a chip bonded to its connection conductors is brought into contact at its connection-conductor contacting ends with the adhesive spots on the intermediate carrier, in that the chip, with the thus taken up or transfered adhesive material at the contacting ends of its connection conductors, is superimposed onto the substrate conductor paths, and in that there then these adhesive connections are hardened.
2. A method as claimed in Claim 1, in which the adhesive spots of a pattern, or of several patterns (for associated chips) side-by-side, are applied in a screen-printing process to the intermediate carrier.
3. A method as claimed in Claim 1 or2, in which the intermediate carrier after each transfer of the adhesive spots by superimposition of the contacting ends is cleaned and equipped afresh with the spot pattern or patterns.
4. A method as claimed in anyone ofthe preceding claims, in which the intermediate carrier has a surface made of a material which has very low adhesion forthe material of the contacting adhesive.
5. A method as claimed in any one of the preceding claims, in which a dynamic electric operational test of the chip superimposed with its connection-conductor contacting ends onto the substrate conductor paths is carried out before the contacting adhesive is hardened.
6. A method as claimed in Claim 5, in which defective chips together with their connection conductors are removed from the substrate conductor paths before the adhesive is hardened.
7. A method as claimed in any one ofthe preceding claims, in which the spot-pattern adhesive material transfer onto the intermediate carrier and by way of the contacting ends of the chip connection conductors onto the substrate conductor paths, as well as the electrical operational test where applicable, and the deformation thereof and separation out from the leadframefilm, is effected, in apparatus respects,directlyfollowing onthe automaticfilm tape bonding of the chip onto the network of its connection conductors.
8. A method as claimed in any one ofthe preceding claims, in which the chip is superimposed with its connection-conductor contacting ends onto conductor paths which are fashioned on the front surface of the laterally protruding edge ofthe rearward substrate of liquid-crystal cell, for example a glass liquid-crystal cell produced groupwise in the batch process.
9. Apparatusforcarrying out any one ofthe methods in accordance with Claims 1 to 8, comprising an intermediate carrier with a surface on which an electrically conductive adhesive has low adhesion therewith, a transfer device for applying adhesive spots consisting of dosed or measured amounts of adhesive in a predetermined geometric distribution, and a handling device for superimposing the connection ends ofthe connection conductors bonded onto a chip and for the subsequenttransferthereofonto the connection region of conductor paths on a substrate.
10. Apparatus as claimed in Claim 9, including dynamictesting equipmentforchipswhen connected to the conductor paths.
11. Apparatus as claimed in Claim 9 or 10, having automatic bonding equipmentforconnection conductors (leadframes) on a film carriertape.
12. A liquid-crystal cell, producible in the batch process, with conductor paths, fashioned on the front surface of a laterally protruding edge of its rearward substrate, forthe connection of control circuits, characterised in that the circuits (chips) with film-bonded connection conductors (leadframe) are fastened by means of an electrically-conductive adhesive atthe connection-conductor contacting ends on the conductor paths.
13. A method as claimed in Claim 1 and substantially as herein described.
14. Apparatusas claimed in Claim 9 and substantially as herein described.
15. A liquid-crystal cell as claimed in Claim 12 and substantially as herein described.
GB08622864A 1985-09-24 1986-09-23 A method of contacting (applying)chips onto conductor paths, apparatus for carrying out the method and a liquid-crystal cell having bonded-on chips Expired GB2180698B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19853533993 DE3533993A1 (en) 1985-09-24 1985-09-24 METHOD FOR CONTACTING ON PATHWAYS, DEVICE FOR EXERCISING THE METHOD, AND LIQUID CRYSTAL CELL WITH BONDED CHIP

Publications (3)

Publication Number Publication Date
GB8622864D0 GB8622864D0 (en) 1986-10-29
GB2180698A true GB2180698A (en) 1987-04-01
GB2180698B GB2180698B (en) 1988-12-14

Family

ID=6281772

Family Applications (1)

Application Number Title Priority Date Filing Date
GB08622864A Expired GB2180698B (en) 1985-09-24 1986-09-23 A method of contacting (applying)chips onto conductor paths, apparatus for carrying out the method and a liquid-crystal cell having bonded-on chips

Country Status (3)

Country Link
JP (1) JPS6399540A (en)
DE (1) DE3533993A1 (en)
GB (1) GB2180698B (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0303256A3 (en) * 1987-08-13 1990-09-26 Shin-Etsu Polymer Co., Ltd. A method for electrically connecting ic chips, a resinous bump-forming composition used therein and a liquid-crystal display unit electrically connected thereby
EP0389826A1 (en) * 1989-03-20 1990-10-03 Seiko Epson Corporation Arrangement of semiconductor devices and method of and apparatus for mounting semiconductor devices
EP0734087A3 (en) * 1991-04-08 1996-10-16 NGK Spark Plug Co. Ltd. Microwave stripline filter
GB2301938A (en) * 1994-02-28 1996-12-18 Mitsubishi Electric Corp Testing semiconductor elements

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4366342A (en) * 1978-06-21 1982-12-28 Minnesota Mining And Manufacturing Company Conductively coated embossed articles
CH624491A5 (en) * 1978-11-06 1981-07-31 Ebauches Electroniques Sa
JPS57185316A (en) * 1981-05-11 1982-11-15 Sumitomo Metal Mining Co Ltd Electrically conductive resin paste
DE3243227A1 (en) * 1982-11-23 1984-05-24 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt METHOD FOR PRODUCING A LIQUID CRYSTAL DISPLAY DEVICE

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0303256A3 (en) * 1987-08-13 1990-09-26 Shin-Etsu Polymer Co., Ltd. A method for electrically connecting ic chips, a resinous bump-forming composition used therein and a liquid-crystal display unit electrically connected thereby
EP0389826A1 (en) * 1989-03-20 1990-10-03 Seiko Epson Corporation Arrangement of semiconductor devices and method of and apparatus for mounting semiconductor devices
EP0734087A3 (en) * 1991-04-08 1996-10-16 NGK Spark Plug Co. Ltd. Microwave stripline filter
EP0532770B1 (en) * 1991-04-08 1998-06-10 NGK Spark Plug Co. Ltd. Microwave strip line filter
GB2301938A (en) * 1994-02-28 1996-12-18 Mitsubishi Electric Corp Testing semiconductor elements
GB2301938B (en) * 1994-02-28 1997-03-12 Mitsubishi Electric Corp Testing semiconductor elements

Also Published As

Publication number Publication date
GB2180698B (en) 1988-12-14
DE3533993C2 (en) 1987-10-08
GB8622864D0 (en) 1986-10-29
JPS6399540A (en) 1988-04-30
JPH0346975B2 (en) 1991-07-17
DE3533993A1 (en) 1987-04-02

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PCNP Patent ceased through non-payment of renewal fee

Effective date: 19990923