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GB2021863B - Method of making integrated circuits - Google Patents

Method of making integrated circuits

Info

Publication number
GB2021863B
GB2021863B GB7918080A GB7918080A GB2021863B GB 2021863 B GB2021863 B GB 2021863B GB 7918080 A GB7918080 A GB 7918080A GB 7918080 A GB7918080 A GB 7918080A GB 2021863 B GB2021863 B GB 2021863B
Authority
GB
United Kingdom
Prior art keywords
integrated circuits
making integrated
making
circuits
integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB7918080A
Other versions
GB2021863A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Boeing North American Inc
Original Assignee
Rockwell International Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US05/909,886 external-priority patent/US4277881A/en
Priority claimed from US05/913,184 external-priority patent/US4221045A/en
Application filed by Rockwell International Corp filed Critical Rockwell International Corp
Publication of GB2021863A publication Critical patent/GB2021863A/en
Application granted granted Critical
Publication of GB2021863B publication Critical patent/GB2021863B/en
Expired legal-status Critical Current

Links

Classifications

    • H10P14/69215—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B20/00—Read-only memory [ROM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0413—Manufacture or treatment of FETs having insulated gates [IGFET] of FETs having charge-trapping gate insulators, e.g. MNOS transistors
    • H10D64/0113—
    • H10D64/01344—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/23—Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
    • H10D64/251—Source or drain electrodes for field-effect devices
    • H10D64/258—Source or drain electrodes for field-effect devices characterised by the relative positions of the source or drain electrodes with respect to the gate electrode
    • H10D64/259—Source or drain electrodes being self-aligned with the gate electrode and having bottom surfaces higher than the interface between the channel and the gate dielectric
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/681—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered
    • H10D64/685—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered being perpendicular to the channel plane
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/693—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator the insulator comprising nitrogen, e.g. nitrides, oxynitrides or nitrogen-doped materials
    • H10P14/6306—
    • H10P14/6308—
    • H10P14/6322—
    • H10P14/6522—
    • H10P14/6529—
    • H10P14/6927—
    • H10P14/69433—
    • H10P76/40—
    • H10W20/01—
    • H10P14/662—
GB7918080A 1978-05-26 1979-05-24 Method of making integrated circuits Expired GB2021863B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US05/909,886 US4277881A (en) 1978-05-26 1978-05-26 Process for fabrication of high density VLSI circuits, having self-aligned gates and contacts for FET devices and conducting lines
US05/913,184 US4221045A (en) 1978-06-06 1978-06-06 Self-aligned contacts in an ion implanted VLSI circuit

Publications (2)

Publication Number Publication Date
GB2021863A GB2021863A (en) 1979-12-05
GB2021863B true GB2021863B (en) 1983-02-02

Family

ID=27129540

Family Applications (1)

Application Number Title Priority Date Filing Date
GB7918080A Expired GB2021863B (en) 1978-05-26 1979-05-24 Method of making integrated circuits

Country Status (1)

Country Link
GB (1) GB2021863B (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5621372A (en) 1979-07-31 1981-02-27 Fujitsu Ltd Manufacture of semiconductor device
US4430791A (en) * 1981-12-30 1984-02-14 International Business Machines Corporation Sub-micrometer channel length field effect transistor process
US4503601A (en) * 1983-04-18 1985-03-12 Ncr Corporation Oxide trench structure for polysilicon gates and interconnects
DE3342773A1 (en) * 1983-11-25 1985-06-05 Siemens AG, 1000 Berlin und 8000 München Process for producing MOS field-effect transistors with high dielectric strength and with a gentle concentration profile at the drain junction

Also Published As

Publication number Publication date
GB2021863A (en) 1979-12-05

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee