GB201601478D0 - Method and system for implementing a dynamic array data structure in a cache line - Google Patents
Method and system for implementing a dynamic array data structure in a cache lineInfo
- Publication number
- GB201601478D0 GB201601478D0 GBGB1601478.9A GB201601478A GB201601478D0 GB 201601478 D0 GB201601478 D0 GB 201601478D0 GB 201601478 A GB201601478 A GB 201601478A GB 201601478 D0 GB201601478 D0 GB 201601478D0
- Authority
- GB
- United Kingdom
- Prior art keywords
- implementing
- data structure
- cache line
- array data
- dynamic array
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F16/00—Information retrieval; Database structures therefor; File system structures therefor
- G06F16/10—File systems; File servers
- G06F16/17—Details of further file system functions
- G06F16/176—Support for shared access to files; File sharing support
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0875—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with dedicated cache, e.g. instruction or stack
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/76—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Data Mining & Analysis (AREA)
- Databases & Information Systems (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB1312443.3A GB2516091A (en) | 2013-07-11 | 2013-07-11 | Method and system for implementing a dynamic array data structure in a cache line |
| PCT/IB2014/062756 WO2015004570A1 (en) | 2013-07-11 | 2014-07-01 | Method and system for implementing a dynamic array data structure in a cache line |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| GB201601478D0 true GB201601478D0 (en) | 2016-03-09 |
| GB2530234A GB2530234A (en) | 2016-03-16 |
| GB2530234B GB2530234B (en) | 2020-04-15 |
Family
ID=49081140
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB1312443.3A Withdrawn GB2516091A (en) | 2013-07-11 | 2013-07-11 | Method and system for implementing a dynamic array data structure in a cache line |
| GB1601478.9A Active GB2530234B (en) | 2013-07-11 | 2014-07-01 | Method and system for implementing a dynamic array data structure in a cache line |
Family Applications Before (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB1312443.3A Withdrawn GB2516091A (en) | 2013-07-11 | 2013-07-11 | Method and system for implementing a dynamic array data structure in a cache line |
Country Status (5)
| Country | Link |
|---|---|
| JP (1) | JP6333370B2 (en) |
| CN (1) | CN105359145B (en) |
| DE (1) | DE112014003226B4 (en) |
| GB (2) | GB2516091A (en) |
| WO (1) | WO2015004570A1 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10762000B2 (en) | 2017-04-10 | 2020-09-01 | Samsung Electronics Co., Ltd. | Techniques to reduce read-modify-write overhead in hybrid DRAM/NAND memory |
| US11281589B2 (en) * | 2018-08-30 | 2022-03-22 | Micron Technology, Inc. | Asynchronous forward caching memory systems and methods |
Family Cites Families (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0720087A1 (en) * | 1994-12-27 | 1996-07-03 | Motorola, Inc. | Apparatus and method for a memory extension stack in a data processing system |
| US6009499A (en) * | 1997-03-31 | 1999-12-28 | Sun Microsystems, Inc | Pipelined stack caching circuit |
| US6138209A (en) * | 1997-09-05 | 2000-10-24 | International Business Machines Corporation | Data processing system and multi-way set associative cache utilizing class predict data structure and method thereof |
| US20030005219A1 (en) * | 2001-06-29 | 2003-01-02 | Royer Robert J. | Partitioning cache metadata state |
| US7127559B2 (en) * | 2001-07-10 | 2006-10-24 | Micron Technology, Inc. | Caching of dynamic arrays |
| JP2003030051A (en) * | 2001-07-19 | 2003-01-31 | Sony Corp | Data processing device and data access method |
| US6836823B2 (en) * | 2001-11-05 | 2004-12-28 | Src Computers, Inc. | Bandwidth enhancement for uncached devices |
| US7010645B2 (en) * | 2002-12-27 | 2006-03-07 | International Business Machines Corporation | System and method for sequentially staging received data to a write cache in advance of storing the received data |
| US7454572B2 (en) * | 2005-11-08 | 2008-11-18 | Mediatek Inc. | Stack caching systems and methods with an active swapping mechanism |
| US7822926B2 (en) | 2007-04-16 | 2010-10-26 | Arm Limited | Cache memory |
| US8566524B2 (en) * | 2009-08-31 | 2013-10-22 | International Business Machines Corporation | Transactional memory system with efficient cache support |
| US20110219215A1 (en) * | 2010-01-15 | 2011-09-08 | International Business Machines Corporation | Atomicity: a multi-pronged approach |
| US20120185672A1 (en) * | 2011-01-18 | 2012-07-19 | International Business Machines Corporation | Local-only synchronizing operations |
-
2013
- 2013-07-11 GB GB1312443.3A patent/GB2516091A/en not_active Withdrawn
-
2014
- 2014-07-01 GB GB1601478.9A patent/GB2530234B/en active Active
- 2014-07-01 CN CN201480038913.0A patent/CN105359145B/en not_active Expired - Fee Related
- 2014-07-01 DE DE112014003226.3T patent/DE112014003226B4/en active Active
- 2014-07-01 JP JP2016524920A patent/JP6333370B2/en not_active Expired - Fee Related
- 2014-07-01 WO PCT/IB2014/062756 patent/WO2015004570A1/en not_active Ceased
Also Published As
| Publication number | Publication date |
|---|---|
| CN105359145A (en) | 2016-02-24 |
| JP6333370B2 (en) | 2018-05-30 |
| DE112014003226B4 (en) | 2024-11-21 |
| GB201312443D0 (en) | 2013-08-28 |
| GB2516091A (en) | 2015-01-14 |
| DE112014003226T5 (en) | 2016-04-28 |
| GB2530234B (en) | 2020-04-15 |
| WO2015004570A1 (en) | 2015-01-15 |
| GB2530234A (en) | 2016-03-16 |
| CN105359145B (en) | 2019-03-22 |
| JP2016526738A (en) | 2016-09-05 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 746 | Register noted 'licences of right' (sect. 46/1977) |
Effective date: 20200603 |