GB1399024A - Electronic correction circuit in a timepiece - Google Patents

Abstract

1399024 Electronic timepieces SOC SUISSE POUR L'INDUSTRIE HORLOGERE MANAGEMENT SERVICES SA 22 June 1973 [12 July 1972] 32577/72 Heading G3T Relates to modification of the seconds display setting and correcting arrangement in an electronic timepiece incorporating a frequency divider chain operating a time display, particularly via a stepping motor, as disclosed and claimed in Specification 1385890. In the modification a single control push button switch is used to add seconds to or block seconds from the time display. The timepiece Fig. 1, has a main divider chain, only stages 9 to 18 being shown. Stages 17 and 18 are, in normal operation, set and reset alternately each second to control complementary transistor pairs which pass current alternately in opposite directions through a motor M. A manually operable setting switch P is followed by an integrator I to suppress effects of any irregularities in switch contact. A predetermined delay T D is set by a second sequence of dividers 20-23, and is initiated by the closure of switch P 1 . For each closure of switch P a second is added, i.e. time display is advanced by 1 sec. If the switch is maintained closed for longer than period TD, firstly 1 sec. is added during the period TD and then the "seconds" are suppressed or blocked. Normally the stages 20-23 are disabled when P is open, a transistor T 1 being saturated. When P is closed an output from an inverter N blocks T 1 and stages 20-23 count signals received from stage 10. During this time the leading edge of signal Q from stage 12 will switch a flip-flop 19 which in turn switches a toggle 16 thus adding 1 sec to display. If P is released before the end of period T D i.e. before a flip-flop 24 is caused to change state, then 20-23 will be reset to zero and the main divider stages will be unaffected. If P is maintained closed for longer than T D , a transistor T 2 will saturate and remain so until P is released. For so long as T 2 is saturated, stage 11 will be clamped and this suspends the action of stages 12 onwards and thus suppresses current pulses to the motor. Alternatively, T 2 may be omitted and an AND gate inserted between stages 10 and 11, and controlled by stage 24. To set the phase exactly, a switch Sw is provided (e.g. operable by a crown of the timepiece) and together with a resistor R and transistor T 3 is used to clamp stages 12 to 16. When S W is released the next motor drive pulse will follow 1 sec later. The toggle 16 effectively remembers the direction of the last current pulse to the motor.