GB1150968A - Improvements in or relating to the Manufacture of Semiconductor Components - Google Patents

Abstract

1,150,968. Semi-conductor devices. SIEMENS A.G. 22 Nov., 1966 [23 Nov., 1965], No. 52225/66. Heading H1K. In the manufacture of a planar semi-conductor device a portion only of an oxide layer 8, formed during the diffusion of the emitter region 7, is removed during a subsequent photoetching stage, so as to leave part of the planar surface stabilized by the oxide layer 8 while the semi-conductor surface is exposed at 9, 10 to permit the application of base and emitter contacts. In the preferred embodiment a P-type base region 4 is formed by boron diffusion into an N-type silicon wafer 1 through an oxide mask 2. A new oxide layer 5 is then provided and photo-etched to provide a hole 6, through which phosphorus is diffused to form the p-type emitter region 7. During this diffusion the active wafer surface is provided with a layer 8 of phosphoric oxide glass. Apertures 9 are then etched through the layers 8, 5 to expose portions of the base region. After being pre-heated to 800‹ C. for approximately 10 minutes the wafer is coated with a photo-varnish by dripping on and centrifuging off, and after exposure through a mask and hardening of the unexposed photovarnish the portion of the layer 8 covered by the exposed photo-varnish is etched away with a 4% solution of hydrofluoric acid buffered with ammonium fluoride. The remaining photovarnish is dissolved, e.g. by acetone. The holes 6, 9 are thus exposed, and aluminium contacts may be evaporated on. Planar transistors made in this way may be part of an integrated circuit.