GB1038782A - Electronic code translator - Google Patents

Abstract

1,038,782. Electric selective signalling. GENERAL DATA CORPORATION. Jan. 30, 1963 [Feb. 5, 1962], No. 13141/66. Divided out of 1,038,781. Heading G4H. A digital code translator comprises a digitalto-analogue converter responsive to an input number, the output being connected to an analogue-to-digital converter of which the scale of operation is offset in relation to the digitalto-analogue converter by a half a bit so that the combined errors of the two converters are ignored. In this form shown first and second 4- bit numbers D501 and D502, Fig. 1 (not shown), are applied to digital-to-analogue converter 503, the output is amplified at 504 and applied to a five-bit analogue to digital converter. A number of units 505, 507 &c. may be connected in series the highest significant bit being entered as the carry term in the next highest unit. In Fig. 2 (not shown) curve 608 represents the output of amplifier 504 and curve 609 indicates the operation of converter 505. It changes state at approximately the middle of the step between adjacent input digits so that errors 611, 612 do not affect the correct relationship between input and output. The analogue-to-digital converter, Fig. 3 (not shown), consist of a number of threshold units 100, 101, 102, 103. The first has a threshold of 8 and if this is exceeded it gives an output and causes 8 volts to be subtracted from the inputs to succeeding threshold devices. The next operates at 4 volts and, if this is exceeded it gives an output and subtracts 4 volts from the inputs to the remaining devices and so on. A signal representing the complete number is subtracted from the original input voltage and the difference passed by amplifier 106 to a similar circuit providing four digits representing the next lower decade. The threshold circuits Fig. 4 (not shown), are designed with feed backs through resistor R1 so that there is hysteresis amounting to approximately half a bit that is a change in one direction does not take place until the nominal level has been exceeded by half a bit value and in the other the change is delayed until the input is half a bit less than the threshold value. The digital-to-analogue converter, Fig. 5 (not shown), has compensating resistors r1-rn corresponding to each of the weighted resistors R1-Rn. When one of the resistors R1-Rw is switched into circuit by the presence of a corresponding input bit, the resistor r1-rn is switched out. The impedance of the output line 400 is thereby kept substantially constant.