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FR2919401B1 - Procede de test des chemins de donnees dans un circuit electronique - Google Patents

Procede de test des chemins de donnees dans un circuit electronique

Info

Publication number
FR2919401B1
FR2919401B1 FR0705381A FR0705381A FR2919401B1 FR 2919401 B1 FR2919401 B1 FR 2919401B1 FR 0705381 A FR0705381 A FR 0705381A FR 0705381 A FR0705381 A FR 0705381A FR 2919401 B1 FR2919401 B1 FR 2919401B1
Authority
FR
France
Prior art keywords
electronic circuit
data paths
testing data
testing
paths
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0705381A
Other languages
English (en)
Other versions
FR2919401A1 (fr
Inventor
Patrick Dervin
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Thales SA
Original Assignee
Thales SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thales SA filed Critical Thales SA
Priority to FR0705381A priority Critical patent/FR2919401B1/fr
Priority to US12/173,278 priority patent/US7913129B2/en
Publication of FR2919401A1 publication Critical patent/FR2919401A1/fr
Application granted granted Critical
Publication of FR2919401B1 publication Critical patent/FR2919401B1/fr
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/18—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
    • G11C29/26—Accessing multiple arrays
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/38—Response verification devices
    • G11C29/40—Response verification devices using compression techniques
    • G11C2029/4002—Comparison of products, i.e. test results of chips or with golden chip
FR0705381A 2007-07-24 2007-07-24 Procede de test des chemins de donnees dans un circuit electronique Expired - Fee Related FR2919401B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR0705381A FR2919401B1 (fr) 2007-07-24 2007-07-24 Procede de test des chemins de donnees dans un circuit electronique
US12/173,278 US7913129B2 (en) 2007-07-24 2008-07-15 Method of testing data paths in an electronic circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0705381A FR2919401B1 (fr) 2007-07-24 2007-07-24 Procede de test des chemins de donnees dans un circuit electronique

Publications (2)

Publication Number Publication Date
FR2919401A1 FR2919401A1 (fr) 2009-01-30
FR2919401B1 true FR2919401B1 (fr) 2016-01-15

Family

ID=39153958

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0705381A Expired - Fee Related FR2919401B1 (fr) 2007-07-24 2007-07-24 Procede de test des chemins de donnees dans un circuit electronique

Country Status (2)

Country Link
US (1) US7913129B2 (fr)
FR (1) FR2919401B1 (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2946815B1 (fr) * 2009-06-12 2011-06-17 Thales Sa Procede d'acquisition d'une pluralite de signaux logiques, avec confirmation de validite d'etat
CN103389920B (zh) * 2012-05-09 2016-06-15 深圳市腾讯计算机系统有限公司 一种磁盘坏块的自检测方法和装置

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2029986B (en) * 1978-09-13 1983-02-02 Hitachi Ltd Sequence control system
US4825360A (en) * 1986-07-30 1989-04-25 Symbolics, Inc. System and method for parallel processing with mostly functional languages
DE3718182A1 (de) * 1987-05-29 1988-12-15 Siemens Ag Verfahren und anordnung zur ausfuehrung eines selbsttestes eines wortweise organisierten rams
JPH01251400A (ja) * 1988-03-30 1989-10-06 Toshiba Corp Ｒａｍのチェック方法
US6381682B2 (en) * 1998-06-10 2002-04-30 Compaq Information Technologies Group, L.P. Method and apparatus for dynamically sharing memory in a multiprocessor system
DE19749240A1 (de) * 1997-11-07 1999-05-12 Cit Alcatel Verfahren zum Testen des Pufferspeichers eines Mikroprozessorsystems
US6665777B2 (en) * 2000-07-26 2003-12-16 Tns Holdings, Inc. Method, apparatus, network, and kit for multiple block sequential memory management
US7167405B1 (en) * 2005-09-19 2007-01-23 Lattice Semiconductor Corporation Data transfer verification systems and methods

Also Published As

Publication number Publication date
US20090027981A1 (en) 2009-01-29
US7913129B2 (en) 2011-03-22
FR2919401A1 (fr) 2009-01-30

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